; LLVM IR from AdaptiveCpp/AdaptiveCpp :: src/runtime/pcuda/pcuda_runtime.ll (ZN7hipsycl2rt5pcuda17pcuda_application9tls_stateEv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::lock_guard" = type { ptr }
%"class.hipsycl::rt::pcuda::pcuda_application" = type { %"class.hipsycl::rt::pcuda::pcuda_runtime", %"class.std::__cxx11::list", %"class.std::mutex" }
%"class.hipsycl::rt::pcuda::pcuda_runtime" = type { %"class.hipsycl::rt::runtime_keep_alive_token", %"class.hipsycl::rt::pcuda::device_topology" }
%"class.hipsycl::rt::runtime_keep_alive_token" = type { %"class.std::shared_ptr" }
%"class.std::shared_ptr" = type { %"class.std::__shared_ptr" }
%"class.std::__shared_ptr" = type { ptr, %"class.std::__shared_count" }
%"class.std::__shared_count" = type { ptr }
%"class.hipsycl::rt::pcuda::device_topology" = type { %"class.std::vector" }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<hipsycl::rt::pcuda::device_topology::backend, std::allocator<hipsycl::rt::pcuda::device_topology::backend>>::_Vector_impl" }
%"struct.std::_Vector_base<hipsycl::rt::pcuda::device_topology::backend, std::allocator<hipsycl::rt::pcuda::device_topology::backend>>::_Vector_impl" = type { %"struct.std::_Vector_base<hipsycl::rt::pcuda::device_topology::backend, std::allocator<hipsycl::rt::pcuda::device_topology::backend>>::_Vector_impl_data" }
%"struct.std::_Vector_base<hipsycl::rt::pcuda::device_topology::backend, std::allocator<hipsycl::rt::pcuda::device_topology::backend>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::__cxx11::list" = type { %"class.std::__cxx11::_List_base" }
%"class.std::__cxx11::_List_base" = type { %"struct.std::__cxx11::_List_base<hipsycl::rt::pcuda::thread_local_state, std::allocator<hipsycl::rt::pcuda::thread_local_state>>::_List_impl" }
%"struct.std::__cxx11::_List_base<hipsycl::rt::pcuda::thread_local_state, std::allocator<hipsycl::rt::pcuda::thread_local_state>>::_List_impl" = type { %"struct.std::__detail::_List_node_header" }
%"struct.std::__detail::_List_node_header" = type { %"struct.std::__detail::_List_node_base", i64 }
%"struct.std::__detail::_List_node_base" = type { ptr, ptr }
%"class.std::mutex" = type { %"class.std::__mutex_base" }
%"class.std::__mutex_base" = type { %union.pthread_mutex_t }
%union.pthread_mutex_t = type { %struct.__pthread_mutex_s }
%struct.__pthread_mutex_s = type { i32, i32, i32, i32, i32, i16, i16, %struct.__pthread_internal_list }
%struct.__pthread_internal_list = type { ptr, ptr }

@_ZZN7hipsycl2rt5pcuda17pcuda_application9tls_stateEvE13tls_state_ptr = external hidden thread_local global ptr, align 8

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress uwtable
define dso_local noundef nonnull align 8 dereferenceable(96) ptr @_ZN7hipsycl2rt5pcuda17pcuda_application9tls_stateEv(ptr noundef nonnull align 8 dereferenceable(104) %0) #0 align 2 personality ptr @__gxx_personality_v0 {
  %2 = alloca ptr, align 8
  %3 = alloca %"class.std::lock_guard", align 8
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  store ptr %0, ptr %2, align 8, !tbaa !5
  %7 = load ptr, ptr %2, align 8
  %8 = call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @_ZZN7hipsycl2rt5pcuda17pcuda_application9tls_stateEvE13tls_state_ptr)
  %9 = load ptr, ptr %8, align 8, !tbaa !5
  %10 = icmp ne ptr %9, null
  br i1 %10, label %24, label %11

11:                                               ; preds = %1
  call void @llvm.lifetime.start.p0(i64 8, ptr %3) #4
  %12 = getelementptr inbounds %"class.hipsycl::rt::pcuda::pcuda_application", ptr %7, i32 0, i32 2
  call void @_ZNSt10lock_guardISt5mutexEC2ERS0_(ptr noundef nonnull align 8 dereferenceable(8) %3, ptr noundef nonnull align 8 dereferenceable(40) %12)
  %13 = getelementptr inbounds %"class.hipsycl::rt::pcuda::pcuda_application", ptr %7, i32 0, i32 1
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #4
  %14 = getelementptr inbounds %"class.hipsycl::rt::pcuda::pcuda_application", ptr %7, i32 0, i32 0
  store ptr %14, ptr %4, align 8, !tbaa !5
  %15 = invoke noundef nonnull align 8 dereferenceable(96) ptr @_ZNSt7__cxx114listIN7hipsycl2rt5pcuda18thread_local_stateESaIS4_EE12emplace_backIJPNS3_13pcuda_runtimeEEEERS4_DpOT_(ptr noundef nonnull align 8 dereferenceable(24) %13, ptr noundef nonnull align 8 dereferenceable(8) %4)
          to label %16 unwind label %20

16:                                               ; preds = %11
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #4
  %17 = getelementptr inbounds %"class.hipsycl::rt::pcuda::pcuda_application", ptr %7, i32 0, i32 1
  %18 = call noundef nonnull align 8 dereferenceable(96) ptr @_ZNSt7__cxx114listIN7hipsycl2rt5pcuda18thread_local_stateESaIS4_EE4backEv(ptr noundef nonnull align 8 dereferenceable(24) %17) #4
  %19 = call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @_ZZN7hipsycl2rt5pcuda17pcuda_application9tls_stateEvE13tls_state_ptr)
  store ptr %18, ptr %19, align 8, !tbaa !5
  call void @_ZNSt10lock_guardISt5mutexED2Ev(ptr noundef nonnull align 8 dereferenceable(8) %3) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %3) #4
  br label %24

20:                                               ; preds = %11
  %21 = landingpad { ptr, i32 }
          cleanup
  %22 = extractvalue { ptr, i32 } %21, 0
  store ptr %22, ptr %5, align 8
  %23 = extractvalue { ptr, i32 } %21, 1
  store i32 %23, ptr %6, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #4
  call void @_ZNSt10lock_guardISt5mutexED2Ev(ptr noundef nonnull align 8 dereferenceable(8) %3) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %3) #4
  br label %27

24:                                               ; preds = %16, %1
  %25 = call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @_ZZN7hipsycl2rt5pcuda17pcuda_application9tls_stateEvE13tls_state_ptr)
  %26 = load ptr, ptr %25, align 8, !tbaa !5
  ret ptr %26

27:                                               ; preds = %20
  %28 = load ptr, ptr %5, align 8
  %29 = load i32, ptr %6, align 4
  %30 = insertvalue { ptr, i32 } poison, ptr %28, 0
  %31 = insertvalue { ptr, i32 } %30, i32 %29, 1
  resume { ptr, i32 } %31
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare nonnull ptr @llvm.threadlocal.address.p0(ptr nonnull) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt10lock_guardISt5mutexEC2ERS0_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(40)) unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(96) ptr @_ZNSt7__cxx114listIN7hipsycl2rt5pcuda18thread_local_stateESaIS4_EE12emplace_backIJPNS3_13pcuda_runtimeEEEERS4_DpOT_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(8)) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(96) ptr @_ZNSt7__cxx114listIN7hipsycl2rt5pcuda18thread_local_stateESaIS4_EE4backEv(ptr noundef nonnull align 8 dereferenceable(24)) #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt10lock_guardISt5mutexED2Ev(ptr noundef nonnull align 8 dereferenceable(8)) unnamed_addr #3 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::lock_guard" = type { ptr }

@_ZZN7hipsycl2rt5pcuda17pcuda_application9tls_stateEvE13tls_state_ptr = external hidden thread_local local_unnamed_addr global ptr, align 8

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress uwtable
define dso_local noundef nonnull align 8 dereferenceable(96) ptr @_ZN7hipsycl2rt5pcuda17pcuda_application9tls_stateEv(ptr noundef nonnull align 8 dereferenceable(104) %0) local_unnamed_addr #0 align 2 personality ptr @__gxx_personality_v0 {
  %2 = alloca %"class.std::lock_guard", align 8
  %3 = alloca ptr, align 8
  %4 = tail call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @_ZZN7hipsycl2rt5pcuda17pcuda_application9tls_stateEvE13tls_state_ptr)
  %5 = load ptr, ptr %4, align 8, !tbaa !5
  %.not = icmp eq ptr %5, null
  br i1 %.not, label %6, label %14

6:                                                ; preds = %1
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %2) #4
  %7 = getelementptr inbounds i8, ptr %0, i64 64
  call void @_ZNSt10lock_guardISt5mutexEC2ERS0_(ptr noundef nonnull align 8 dereferenceable(8) %2, ptr noundef nonnull align 8 dereferenceable(40) %7)
  %8 = getelementptr inbounds i8, ptr %0, i64 40
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3) #4
  store ptr %0, ptr %3, align 8, !tbaa !5
  %9 = invoke noundef nonnull align 8 dereferenceable(96) ptr @_ZNSt7__cxx114listIN7hipsycl2rt5pcuda18thread_local_stateESaIS4_EE12emplace_backIJPNS3_13pcuda_runtimeEEEERS4_DpOT_(ptr noundef nonnull align 8 dereferenceable(24) %8, ptr noundef nonnull align 8 dereferenceable(8) %3)
          to label %10 unwind label %12

10:                                               ; preds = %6
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #4
  %11 = call noundef nonnull align 8 dereferenceable(96) ptr @_ZNSt7__cxx114listIN7hipsycl2rt5pcuda18thread_local_stateESaIS4_EE4backEv(ptr noundef nonnull align 8 dereferenceable(24) %8) #4
  store ptr %11, ptr %4, align 8, !tbaa !5
  call void @_ZNSt10lock_guardISt5mutexED2Ev(ptr noundef nonnull align 8 dereferenceable(8) %2) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2) #4
  %.pre = load ptr, ptr %4, align 8, !tbaa !5
  br label %14

12:                                               ; preds = %6
  %13 = landingpad { ptr, i32 }
          cleanup
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #4
  call void @_ZNSt10lock_guardISt5mutexED2Ev(ptr noundef nonnull align 8 dereferenceable(8) %2) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2) #4
  resume { ptr, i32 } %13

14:                                               ; preds = %10, %1
  %15 = phi ptr [ %.pre, %10 ], [ %5, %1 ]
  ret ptr %15
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare nonnull ptr @llvm.threadlocal.address.p0(ptr nonnull) #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt10lock_guardISt5mutexEC2ERS0_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(40)) unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(96) ptr @_ZNSt7__cxx114listIN7hipsycl2rt5pcuda18thread_local_stateESaIS4_EE12emplace_backIJPNS3_13pcuda_runtimeEEEERS4_DpOT_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(96) ptr @_ZNSt7__cxx114listIN7hipsycl2rt5pcuda18thread_local_stateESaIS4_EE4backEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt10lock_guardISt5mutexED2Ev(ptr noundef nonnull align 8 dereferenceable(8)) unnamed_addr #3 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #2 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass