; LLVM IR from AF-GRILL/DISPluginForUnreal :: Source/ThirdParty/include/dis6/ActionRequestPdu.ll (ZN3DIS16ActionRequestPduC2Ev)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.DIS::ActionRequestPdu" = type { %"class.DIS::SimulationManagementFamilyPdu", i32, i32, i32, i32, %"class.std::vector", %"class.std::vector.0" }
%"class.DIS::SimulationManagementFamilyPdu" = type { %"class.DIS::Pdu.base", [4 x i8], %"class.DIS::EntityID", %"class.DIS::EntityID" }
%"class.DIS::Pdu.base" = type <{ ptr, i8, i8, i8, i8, i32, i16, i16 }>
%"class.DIS::EntityID" = type <{ ptr, i16, i16, i16, [2 x i8] }>
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<DIS::FixedDatum, std::allocator<DIS::FixedDatum>>::_Vector_impl" }
%"struct.std::_Vector_base<DIS::FixedDatum, std::allocator<DIS::FixedDatum>>::_Vector_impl" = type { %"struct.std::_Vector_base<DIS::FixedDatum, std::allocator<DIS::FixedDatum>>::_Vector_impl_data" }
%"struct.std::_Vector_base<DIS::FixedDatum, std::allocator<DIS::FixedDatum>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<DIS::VariableDatum, std::allocator<DIS::VariableDatum>>::_Vector_impl" }
%"struct.std::_Vector_base<DIS::VariableDatum, std::allocator<DIS::VariableDatum>>::_Vector_impl" = type { %"struct.std::_Vector_base<DIS::VariableDatum, std::allocator<DIS::VariableDatum>>::_Vector_impl_data" }
%"struct.std::_Vector_base<DIS::VariableDatum, std::allocator<DIS::VariableDatum>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@_ZTVN3DIS16ActionRequestPduE = external dso_local unnamed_addr constant { [7 x ptr] }, align 8

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN3DIS16ActionRequestPduC2Ev(ptr noundef nonnull align 8 dereferenceable(120) %0) unnamed_addr #0 align 2 personality ptr @__gxx_personality_v0 {
  %2 = alloca ptr, align 8
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  store ptr %0, ptr %2, align 8, !tbaa !5
  %5 = load ptr, ptr %2, align 8
  call void @_ZN3DIS29SimulationManagementFamilyPduC2Ev(ptr noundef nonnull align 8 dereferenceable(56) %5)
  store ptr getelementptr inbounds inrange(-16, 40) ({ [7 x ptr] }, ptr @_ZTVN3DIS16ActionRequestPduE, i32 0, i32 0, i32 2), ptr %5, align 8, !tbaa !9
  %6 = getelementptr inbounds %"class.DIS::ActionRequestPdu", ptr %5, i32 0, i32 1
  store i32 0, ptr %6, align 8, !tbaa !11
  %7 = getelementptr inbounds %"class.DIS::ActionRequestPdu", ptr %5, i32 0, i32 2
  store i32 0, ptr %7, align 4, !tbaa !26
  %8 = getelementptr inbounds %"class.DIS::ActionRequestPdu", ptr %5, i32 0, i32 3
  store i32 0, ptr %8, align 8, !tbaa !27
  %9 = getelementptr inbounds %"class.DIS::ActionRequestPdu", ptr %5, i32 0, i32 4
  store i32 0, ptr %9, align 4, !tbaa !28
  %10 = getelementptr inbounds %"class.DIS::ActionRequestPdu", ptr %5, i32 0, i32 5
  call void @_ZNSt6vectorIN3DIS10FixedDatumESaIS1_EEC2Ev(ptr noundef nonnull align 8 dereferenceable(24) %10) #4
  %11 = getelementptr inbounds %"class.DIS::ActionRequestPdu", ptr %5, i32 0, i32 6
  call void @_ZNSt6vectorIN3DIS13VariableDatumESaIS1_EEC2Ev(ptr noundef nonnull align 8 dereferenceable(24) %11) #4
  invoke void @_ZN3DIS3Pdu10setPduTypeEh(ptr noundef nonnull align 8 dereferenceable(20) %5, i8 noundef zeroext 16)
          to label %12 unwind label %13

12:                                               ; preds = %1
  ret void

13:                                               ; preds = %1
  %14 = landingpad { ptr, i32 }
          cleanup
  %15 = extractvalue { ptr, i32 } %14, 0
  store ptr %15, ptr %3, align 8
  %16 = extractvalue { ptr, i32 } %14, 1
  store i32 %16, ptr %4, align 4
  call void @_ZNSt6vectorIN3DIS13VariableDatumESaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %11) #4
  call void @_ZNSt6vectorIN3DIS10FixedDatumESaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %10) #4
  call void @_ZN3DIS29SimulationManagementFamilyPduD2Ev(ptr noundef nonnull align 8 dereferenceable(56) %5) #4
  br label %17

17:                                               ; preds = %13
  %18 = load ptr, ptr %3, align 8
  %19 = load i32, ptr %4, align 4
  %20 = insertvalue { ptr, i32 } poison, ptr %18, 0
  %21 = insertvalue { ptr, i32 } %20, i32 %19, 1
  resume { ptr, i32 } %21
}

declare void @_ZN3DIS29SimulationManagementFamilyPduC2Ev(ptr noundef nonnull align 8 dereferenceable(56)) unnamed_addr #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIN3DIS10FixedDatumESaIS1_EEC2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIN3DIS13VariableDatumESaIS1_EEC2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #2 align 2

declare void @_ZN3DIS3Pdu10setPduTypeEh(ptr noundef nonnull align 8 dereferenceable(20), i8 noundef zeroext) #1

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIN3DIS13VariableDatumESaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIN3DIS10FixedDatumESaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #2 align 2

; Function Attrs: nounwind
declare void @_ZN3DIS29SimulationManagementFamilyPduD2Ev(ptr noundef nonnull align 8 dereferenceable(56)) unnamed_addr #3

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"vtable pointer", !8, i64 0}
!11 = !{!12, !15, i64 56}
!12 = !{!"_ZTSN3DIS16ActionRequestPduE", !13, i64 0, !15, i64 56, !15, i64 60, !15, i64 64, !15, i64 68, !18, i64 72, !22, i64 96}
!13 = !{!"_ZTSN3DIS29SimulationManagementFamilyPduE", !14, i64 0, !17, i64 24, !17, i64 40}
!14 = !{!"_ZTSN3DIS3PduE", !7, i64 8, !7, i64 9, !7, i64 10, !7, i64 11, !15, i64 12, !16, i64 16, !16, i64 18}
!15 = !{!"int", !7, i64 0}
!16 = !{!"short", !7, i64 0}
!17 = !{!"_ZTSN3DIS8EntityIDE", !16, i64 8, !16, i64 10, !16, i64 12}
!18 = !{!"_ZTSSt6vectorIN3DIS10FixedDatumESaIS1_EE", !19, i64 0}
!19 = !{!"_ZTSSt12_Vector_baseIN3DIS10FixedDatumESaIS1_EE", !20, i64 0}
!20 = !{!"_ZTSNSt12_Vector_baseIN3DIS10FixedDatumESaIS1_EE12_Vector_implE", !21, i64 0}
!21 = !{!"_ZTSNSt12_Vector_baseIN3DIS10FixedDatumESaIS1_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!22 = !{!"_ZTSSt6vectorIN3DIS13VariableDatumESaIS1_EE", !23, i64 0}
!23 = !{!"_ZTSSt12_Vector_baseIN3DIS13VariableDatumESaIS1_EE", !24, i64 0}
!24 = !{!"_ZTSNSt12_Vector_baseIN3DIS13VariableDatumESaIS1_EE12_Vector_implE", !25, i64 0}
!25 = !{!"_ZTSNSt12_Vector_baseIN3DIS13VariableDatumESaIS1_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!26 = !{!12, !15, i64 60}
!27 = !{!12, !15, i64 64}
!28 = !{!12, !15, i64 68}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@_ZTVN3DIS16ActionRequestPduE = external dso_local unnamed_addr constant { [7 x ptr] }, align 8

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN3DIS16ActionRequestPduC2Ev(ptr noundef nonnull align 8 dereferenceable(120) %0) unnamed_addr #0 align 2 personality ptr @__gxx_personality_v0 {
  tail call void @_ZN3DIS29SimulationManagementFamilyPduC2Ev(ptr noundef nonnull align 8 dereferenceable(56) %0)
  store ptr getelementptr inbounds inrange(-16, 40) (i8, ptr @_ZTVN3DIS16ActionRequestPduE, i64 16), ptr %0, align 8, !tbaa !5
  %2 = getelementptr inbounds i8, ptr %0, i64 56
  %3 = getelementptr inbounds i8, ptr %0, i64 72
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %2, i8 0, i64 16, i1 false)
  tail call void @_ZNSt6vectorIN3DIS10FixedDatumESaIS1_EEC2Ev(ptr noundef nonnull align 8 dereferenceable(24) %3) #5
  %4 = getelementptr inbounds i8, ptr %0, i64 96
  tail call void @_ZNSt6vectorIN3DIS13VariableDatumESaIS1_EEC2Ev(ptr noundef nonnull align 8 dereferenceable(24) %4) #5
  invoke void @_ZN3DIS3Pdu10setPduTypeEh(ptr noundef nonnull align 8 dereferenceable(20) %0, i8 noundef zeroext 16)
          to label %5 unwind label %6

5:                                                ; preds = %1
  ret void

6:                                                ; preds = %1
  %7 = landingpad { ptr, i32 }
          cleanup
  tail call void @_ZNSt6vectorIN3DIS13VariableDatumESaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %4) #5
  tail call void @_ZNSt6vectorIN3DIS10FixedDatumESaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %3) #5
  tail call void @_ZN3DIS29SimulationManagementFamilyPduD2Ev(ptr noundef nonnull align 8 dereferenceable(56) %0) #5
  resume { ptr, i32 } %7
}

declare void @_ZN3DIS29SimulationManagementFamilyPduC2Ev(ptr noundef nonnull align 8 dereferenceable(56)) unnamed_addr #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIN3DIS10FixedDatumESaIS1_EEC2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIN3DIS13VariableDatumESaIS1_EEC2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #2 align 2

declare void @_ZN3DIS3Pdu10setPduTypeEh(ptr noundef nonnull align 8 dereferenceable(20), i8 noundef zeroext) local_unnamed_addr #1

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIN3DIS13VariableDatumESaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIN3DIS10FixedDatumESaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #2 align 2

; Function Attrs: nounwind
declare void @_ZN3DIS29SimulationManagementFamilyPduD2Ev(ptr noundef nonnull align 8 dereferenceable(56)) unnamed_addr #3

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #4

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"vtable pointer", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InstCombinePass,MemCpyOptPass,SROAPass,SimplifyCFGPass,TailCallElimPass