; LLVM IR from nsccgz-storage/nvlsm :: util/arena.ll (ZN7leveldb5Arena15AllocateAlignedEm)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.leveldb::Arena" = type { ptr, i64, %"class.std::vector", %"struct.std::atomic" }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<char *, std::allocator<char *>>::_Vector_impl" }
%"struct.std::_Vector_base<char *, std::allocator<char *>>::_Vector_impl" = type { %"struct.std::_Vector_base<char *, std::allocator<char *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<char *, std::allocator<char *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"struct.std::atomic" = type { %"struct.std::__atomic_base" }
%"struct.std::__atomic_base" = type { i64 }

@.str = external hidden unnamed_addr constant [57 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [68 x i8], align 1
@__PRETTY_FUNCTION__._ZN7leveldb5Arena15AllocateAlignedEm = external hidden unnamed_addr constant [46 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local noundef ptr @_ZN7leveldb5Arena16AllocateFallbackEm(ptr noundef nonnull align 8 dereferenceable(48), i64 noundef) #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef ptr @_ZN7leveldb5Arena15AllocateAlignedEm(ptr noundef nonnull align 8 dereferenceable(48) %0, i64 noundef %1) #1 align 2 {
  %3 = alloca ptr, align 8
  %4 = alloca i64, align 8
  %5 = alloca i32, align 4
  %6 = alloca i64, align 8
  %7 = alloca i64, align 8
  %8 = alloca i64, align 8
  %9 = alloca ptr, align 8
  store ptr %0, ptr %3, align 8, !tbaa !5
  store i64 %1, ptr %4, align 8, !tbaa !9
  %10 = load ptr, ptr %3, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  store i32 8, ptr %5, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #3
  %11 = getelementptr inbounds %"class.leveldb::Arena", ptr %10, i32 0, i32 0
  %12 = load ptr, ptr %11, align 8, !tbaa !13
  %13 = ptrtoint ptr %12 to i64
  %14 = and i64 %13, 7
  store i64 %14, ptr %6, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #3
  %15 = load i64, ptr %6, align 8, !tbaa !9
  %16 = icmp eq i64 %15, 0
  br i1 %16, label %17, label %18

17:                                               ; preds = %2
  br label %21

18:                                               ; preds = %2
  %19 = load i64, ptr %6, align 8, !tbaa !9
  %20 = sub i64 8, %19
  br label %21

21:                                               ; preds = %18, %17
  %22 = phi i64 [ 0, %17 ], [ %20, %18 ]
  store i64 %22, ptr %7, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #3
  %23 = load i64, ptr %4, align 8, !tbaa !9
  %24 = load i64, ptr %7, align 8, !tbaa !9
  %25 = add i64 %23, %24
  store i64 %25, ptr %8, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #3
  %26 = load i64, ptr %8, align 8, !tbaa !9
  %27 = getelementptr inbounds %"class.leveldb::Arena", ptr %10, i32 0, i32 1
  %28 = load i64, ptr %27, align 8, !tbaa !21
  %29 = icmp ule i64 %26, %28
  br i1 %29, label %30, label %43

30:                                               ; preds = %21
  %31 = getelementptr inbounds %"class.leveldb::Arena", ptr %10, i32 0, i32 0
  %32 = load ptr, ptr %31, align 8, !tbaa !13
  %33 = load i64, ptr %7, align 8, !tbaa !9
  %34 = getelementptr inbounds i8, ptr %32, i64 %33
  store ptr %34, ptr %9, align 8, !tbaa !5
  %35 = load i64, ptr %8, align 8, !tbaa !9
  %36 = getelementptr inbounds %"class.leveldb::Arena", ptr %10, i32 0, i32 0
  %37 = load ptr, ptr %36, align 8, !tbaa !13
  %38 = getelementptr inbounds i8, ptr %37, i64 %35
  store ptr %38, ptr %36, align 8, !tbaa !13
  %39 = load i64, ptr %8, align 8, !tbaa !9
  %40 = getelementptr inbounds %"class.leveldb::Arena", ptr %10, i32 0, i32 1
  %41 = load i64, ptr %40, align 8, !tbaa !21
  %42 = sub i64 %41, %39
  store i64 %42, ptr %40, align 8, !tbaa !21
  br label %46

43:                                               ; preds = %21
  %44 = load i64, ptr %4, align 8, !tbaa !9
  %45 = call noundef ptr @_ZN7leveldb5Arena16AllocateFallbackEm(ptr noundef nonnull align 8 dereferenceable(48) %10, i64 noundef %44)
  store ptr %45, ptr %9, align 8, !tbaa !5
  br label %46

46:                                               ; preds = %43, %30
  %47 = load ptr, ptr %9, align 8, !tbaa !5
  %48 = ptrtoint ptr %47 to i64
  %49 = and i64 %48, 7
  %50 = icmp eq i64 %49, 0
  br i1 %50, label %51, label %52

51:                                               ; preds = %46
  br label %54

52:                                               ; preds = %46
  call void @__assert_fail(ptr noundef @.str, ptr noundef @.str.1, i32 noundef 54, ptr noundef @__PRETTY_FUNCTION__._ZN7leveldb5Arena15AllocateAlignedEm) #4
  unreachable

53:                                               ; No predecessors!
  br label %54

54:                                               ; preds = %53, %51
  %55 = load ptr, ptr %9, align 8, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  ret ptr %55
}

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
attributes #4 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!14, !6, i64 0}
!14 = !{!"_ZTSN7leveldb5ArenaE", !6, i64 0, !10, i64 8, !15, i64 16, !19, i64 40}
!15 = !{!"_ZTSSt6vectorIPcSaIS0_EE", !16, i64 0}
!16 = !{!"_ZTSSt12_Vector_baseIPcSaIS0_EE", !17, i64 0}
!17 = !{!"_ZTSNSt12_Vector_baseIPcSaIS0_EE12_Vector_implE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseIPcSaIS0_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!19 = !{!"_ZTSSt6atomicImE", !20, i64 0}
!20 = !{!"_ZTSSt13__atomic_baseImE", !10, i64 0}
!21 = !{!14, !10, i64 8}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [57 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [68 x i8], align 1
@__PRETTY_FUNCTION__._ZN7leveldb5Arena15AllocateAlignedEm = external hidden unnamed_addr constant [46 x i8], align 1

; Function Attrs: mustprogress uwtable
declare dso_local noundef ptr @_ZN7leveldb5Arena16AllocateFallbackEm(ptr noundef nonnull align 8 dereferenceable(48), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef ptr @_ZN7leveldb5Arena15AllocateAlignedEm(ptr noundef nonnull align 8 dereferenceable(48) %0, i64 noundef %1) local_unnamed_addr #0 align 2 {
  %3 = load ptr, ptr %0, align 8, !tbaa !5
  %4 = ptrtoint ptr %3 to i64
  %5 = and i64 %4, 7
  %6 = icmp eq i64 %5, 0
  %7 = sub nuw nsw i64 8, %5
  %8 = select i1 %6, i64 0, i64 %7
  %9 = add i64 %8, %1
  %10 = getelementptr inbounds i8, ptr %0, i64 8
  %11 = load i64, ptr %10, align 8, !tbaa !17
  %.not = icmp ugt i64 %9, %11
  br i1 %.not, label %16, label %12

12:                                               ; preds = %2
  %13 = getelementptr inbounds i8, ptr %3, i64 %8
  %14 = getelementptr inbounds i8, ptr %3, i64 %9
  store ptr %14, ptr %0, align 8, !tbaa !5
  %15 = sub i64 %11, %9
  store i64 %15, ptr %10, align 8, !tbaa !17
  br label %18

16:                                               ; preds = %2
  %17 = tail call noundef ptr @_ZN7leveldb5Arena16AllocateFallbackEm(ptr noundef nonnull align 8 dereferenceable(48) %0, i64 noundef %1)
  br label %18

18:                                               ; preds = %16, %12
  %.0 = phi ptr [ %13, %12 ], [ %17, %16 ]
  %19 = ptrtoint ptr %.0 to i64
  %20 = and i64 %19, 7
  %21 = icmp eq i64 %20, 0
  br i1 %21, label %23, label %22

22:                                               ; preds = %18
  tail call void @__assert_fail(ptr noundef nonnull @.str, ptr noundef nonnull @.str.1, i32 noundef 54, ptr noundef nonnull @__PRETTY_FUNCTION__._ZN7leveldb5Arena15AllocateAlignedEm) #2
  unreachable

23:                                               ; preds = %18
  ret ptr %.0
}

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"_ZTSN7leveldb5ArenaE", !7, i64 0, !10, i64 8, !11, i64 16, !15, i64 40}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!"_ZTSSt6vectorIPcSaIS0_EE", !12, i64 0}
!12 = !{!"_ZTSSt12_Vector_baseIPcSaIS0_EE", !13, i64 0}
!13 = !{!"_ZTSNSt12_Vector_baseIPcSaIS0_EE12_Vector_implE", !14, i64 0}
!14 = !{!"_ZTSNSt12_Vector_baseIPcSaIS0_EE17_Vector_impl_dataE", !7, i64 0, !7, i64 8, !7, i64 16}
!15 = !{!"_ZTSSt6atomicImE", !16, i64 0}
!16 = !{!"_ZTSSt13__atomic_baseImE", !10, i64 0}
!17 = !{!6, !10, i64 8}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass