; LLVM IR from upupming/algorithm :: acwing/算法竞赛进阶指南/0x29-总结与练习/185. 玛雅游戏.ll (Z3dfsi)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.Path = type { i32, i32, i32 }

@path = external dso_local global [5 x %struct.Path], align 16
@n = external dso_local global i32, align 4
@cnt = external dso_local global [11 x i32], align 16
@g = external dso_local global [5 x [7 x i32]], align 16

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z4moveiii(i32 noundef, i32 noundef, i32 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_Z3dfsi(i32 noundef %0) #2 {
  %2 = alloca i1, align 1
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca [5 x [7 x i32]], align 16
  %7 = alloca [11 x i32], align 16
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca %struct.Path, align 4
  %12 = alloca %struct.Path, align 4
  store i32 %0, ptr %3, align 4, !tbaa !5
  %13 = load i32, ptr %3, align 4, !tbaa !5
  %14 = load i32, ptr @n, align 4, !tbaa !5
  %15 = icmp eq i32 %13, %14
  br i1 %15, label %16, label %20

16:                                               ; preds = %1
  %17 = load i32, ptr @cnt, align 16, !tbaa !5
  %18 = icmp ne i32 %17, 0
  %19 = xor i1 %18, true
  store i1 %19, ptr %2, align 1
  br label %140

20:                                               ; preds = %1
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #4
  store i32 0, ptr %4, align 4, !tbaa !5
  br label %21

21:                                               ; preds = %39, %20
  %22 = load i32, ptr %4, align 4, !tbaa !5
  %23 = icmp slt i32 %22, 10
  br i1 %23, label %25, label %24

24:                                               ; preds = %21
  store i32 2, ptr %5, align 4
  br label %42

25:                                               ; preds = %21
  %26 = load i32, ptr %4, align 4, !tbaa !5
  %27 = sext i32 %26 to i64
  %28 = getelementptr inbounds [11 x i32], ptr @cnt, i64 0, i64 %27
  %29 = load i32, ptr %28, align 4, !tbaa !5
  %30 = icmp eq i32 %29, 1
  br i1 %30, label %37, label %31

31:                                               ; preds = %25
  %32 = load i32, ptr %4, align 4, !tbaa !5
  %33 = sext i32 %32 to i64
  %34 = getelementptr inbounds [11 x i32], ptr @cnt, i64 0, i64 %33
  %35 = load i32, ptr %34, align 4, !tbaa !5
  %36 = icmp eq i32 %35, 2
  br i1 %36, label %37, label %38

37:                                               ; preds = %31, %25
  store i1 false, ptr %2, align 1
  store i32 1, ptr %5, align 4
  br label %42

38:                                               ; preds = %31
  br label %39

39:                                               ; preds = %38
  %40 = load i32, ptr %4, align 4, !tbaa !5
  %41 = add nsw i32 %40, 1
  store i32 %41, ptr %4, align 4, !tbaa !5
  br label %21, !llvm.loop !9

42:                                               ; preds = %37, %24
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #4
  %43 = load i32, ptr %5, align 4
  switch i32 %43, label %142 [
    i32 2, label %44
    i32 1, label %140
  ]

44:                                               ; preds = %42
  call void @llvm.lifetime.start.p0(i64 140, ptr %6) #4
  call void @llvm.lifetime.start.p0(i64 44, ptr %7) #4
  %45 = getelementptr inbounds [5 x [7 x i32]], ptr %6, i64 0, i64 0
  call void @llvm.memcpy.p0.p0.i64(ptr align 16 %45, ptr align 16 @g, i64 140, i1 false)
  %46 = getelementptr inbounds [11 x i32], ptr %7, i64 0, i64 0
  call void @llvm.memcpy.p0.p0.i64(ptr align 16 %46, ptr align 16 @cnt, i64 44, i1 false)
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #4
  store i32 0, ptr %8, align 4, !tbaa !5
  br label %47

47:                                               ; preds = %133, %44
  %48 = load i32, ptr %8, align 4, !tbaa !5
  %49 = icmp slt i32 %48, 5
  br i1 %49, label %51, label %50

50:                                               ; preds = %47
  store i32 5, ptr %5, align 4
  br label %136

51:                                               ; preds = %47
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #4
  store i32 0, ptr %9, align 4, !tbaa !5
  br label %52

52:                                               ; preds = %127, %51
  %53 = load i32, ptr %9, align 4, !tbaa !5
  %54 = icmp slt i32 %53, 7
  br i1 %54, label %56, label %55

55:                                               ; preds = %52
  store i32 8, ptr %5, align 4
  br label %130

56:                                               ; preds = %52
  %57 = load i32, ptr %8, align 4, !tbaa !5
  %58 = sext i32 %57 to i64
  %59 = getelementptr inbounds [5 x [7 x i32]], ptr @g, i64 0, i64 %58
  %60 = load i32, ptr %9, align 4, !tbaa !5
  %61 = sext i32 %60 to i64
  %62 = getelementptr inbounds [7 x i32], ptr %59, i64 0, i64 %61
  %63 = load i32, ptr %62, align 4, !tbaa !5
  %64 = icmp ne i32 %63, 0
  br i1 %64, label %65, label %126

65:                                               ; preds = %56
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #4
  %66 = load i32, ptr %8, align 4, !tbaa !5
  %67 = add nsw i32 %66, 1
  store i32 %67, ptr %10, align 4, !tbaa !5
  %68 = load i32, ptr %10, align 4, !tbaa !5
  %69 = icmp slt i32 %68, 5
  br i1 %69, label %70, label %89

70:                                               ; preds = %65
  call void @llvm.lifetime.start.p0(i64 12, ptr %11) #4
  %71 = getelementptr inbounds %struct.Path, ptr %11, i32 0, i32 0
  %72 = load i32, ptr %8, align 4, !tbaa !5
  store i32 %72, ptr %71, align 4, !tbaa !11
  %73 = getelementptr inbounds %struct.Path, ptr %11, i32 0, i32 1
  %74 = load i32, ptr %9, align 4, !tbaa !5
  store i32 %74, ptr %73, align 4, !tbaa !13
  %75 = getelementptr inbounds %struct.Path, ptr %11, i32 0, i32 2
  store i32 1, ptr %75, align 4, !tbaa !14
  %76 = load i32, ptr %3, align 4, !tbaa !5
  %77 = sext i32 %76 to i64
  %78 = getelementptr inbounds [5 x %struct.Path], ptr @path, i64 0, i64 %77
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %78, ptr align 4 %11, i64 12, i1 false), !tbaa.struct !15
  call void @llvm.lifetime.end.p0(i64 12, ptr %11) #4
  %79 = load i32, ptr %8, align 4, !tbaa !5
  %80 = load i32, ptr %9, align 4, !tbaa !5
  %81 = load i32, ptr %10, align 4, !tbaa !5
  call void @_Z4moveiii(i32 noundef %79, i32 noundef %80, i32 noundef %81)
  %82 = load i32, ptr %3, align 4, !tbaa !5
  %83 = add nsw i32 %82, 1
  %84 = call noundef zeroext i1 @_Z3dfsi(i32 noundef %83)
  br i1 %84, label %85, label %86

85:                                               ; preds = %70
  store i1 true, ptr %2, align 1
  store i32 1, ptr %5, align 4
  br label %123

86:                                               ; preds = %70
  %87 = getelementptr inbounds [5 x [7 x i32]], ptr %6, i64 0, i64 0
  call void @llvm.memcpy.p0.p0.i64(ptr align 16 @g, ptr align 16 %87, i64 140, i1 false)
  %88 = getelementptr inbounds [11 x i32], ptr %7, i64 0, i64 0
  call void @llvm.memcpy.p0.p0.i64(ptr align 16 @cnt, ptr align 16 %88, i64 44, i1 false)
  br label %89

89:                                               ; preds = %86, %65
  %90 = load i32, ptr %8, align 4, !tbaa !5
  %91 = sub nsw i32 %90, 1
  store i32 %91, ptr %10, align 4, !tbaa !5
  %92 = load i32, ptr %10, align 4, !tbaa !5
  %93 = icmp sge i32 %92, 0
  br i1 %93, label %94, label %122

94:                                               ; preds = %89
  %95 = load i32, ptr %10, align 4, !tbaa !5
  %96 = sext i32 %95 to i64
  %97 = getelementptr inbounds [5 x [7 x i32]], ptr @g, i64 0, i64 %96
  %98 = load i32, ptr %9, align 4, !tbaa !5
  %99 = sext i32 %98 to i64
  %100 = getelementptr inbounds [7 x i32], ptr %97, i64 0, i64 %99
  %101 = load i32, ptr %100, align 4, !tbaa !5
  %102 = icmp ne i32 %101, 0
  br i1 %102, label %122, label %103

103:                                              ; preds = %94
  call void @llvm.lifetime.start.p0(i64 12, ptr %12) #4
  %104 = getelementptr inbounds %struct.Path, ptr %12, i32 0, i32 0
  %105 = load i32, ptr %8, align 4, !tbaa !5
  store i32 %105, ptr %104, align 4, !tbaa !11
  %106 = getelementptr inbounds %struct.Path, ptr %12, i32 0, i32 1
  %107 = load i32, ptr %9, align 4, !tbaa !5
  store i32 %107, ptr %106, align 4, !tbaa !13
  %108 = getelementptr inbounds %struct.Path, ptr %12, i32 0, i32 2
  store i32 -1, ptr %108, align 4, !tbaa !14
  %109 = load i32, ptr %3, align 4, !tbaa !5
  %110 = sext i32 %109 to i64
  %111 = getelementptr inbounds [5 x %struct.Path], ptr @path, i64 0, i64 %110
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %111, ptr align 4 %12, i64 12, i1 false), !tbaa.struct !15
  call void @llvm.lifetime.end.p0(i64 12, ptr %12) #4
  %112 = load i32, ptr %8, align 4, !tbaa !5
  %113 = load i32, ptr %9, align 4, !tbaa !5
  %114 = load i32, ptr %10, align 4, !tbaa !5
  call void @_Z4moveiii(i32 noundef %112, i32 noundef %113, i32 noundef %114)
  %115 = load i32, ptr %3, align 4, !tbaa !5
  %116 = add nsw i32 %115, 1
  %117 = call noundef zeroext i1 @_Z3dfsi(i32 noundef %116)
  br i1 %117, label %118, label %119

118:                                              ; preds = %103
  store i1 true, ptr %2, align 1
  store i32 1, ptr %5, align 4
  br label %123

119:                                              ; preds = %103
  %120 = getelementptr inbounds [5 x [7 x i32]], ptr %6, i64 0, i64 0
  call void @llvm.memcpy.p0.p0.i64(ptr align 16 @g, ptr align 16 %120, i64 140, i1 false)
  %121 = getelementptr inbounds [11 x i32], ptr %7, i64 0, i64 0
  call void @llvm.memcpy.p0.p0.i64(ptr align 16 @cnt, ptr align 16 %121, i64 44, i1 false)
  br label %122

122:                                              ; preds = %119, %94, %89
  store i32 0, ptr %5, align 4
  br label %123

123:                                              ; preds = %122, %118, %85
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #4
  %124 = load i32, ptr %5, align 4
  switch i32 %124, label %130 [
    i32 0, label %125
  ]

125:                                              ; preds = %123
  br label %126

126:                                              ; preds = %125, %56
  br label %127

127:                                              ; preds = %126
  %128 = load i32, ptr %9, align 4, !tbaa !5
  %129 = add nsw i32 %128, 1
  store i32 %129, ptr %9, align 4, !tbaa !5
  br label %52, !llvm.loop !16

130:                                              ; preds = %123, %55
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #4
  %131 = load i32, ptr %5, align 4
  switch i32 %131, label %136 [
    i32 8, label %132
  ]

132:                                              ; preds = %130
  br label %133

133:                                              ; preds = %132
  %134 = load i32, ptr %8, align 4, !tbaa !5
  %135 = add nsw i32 %134, 1
  store i32 %135, ptr %8, align 4, !tbaa !5
  br label %47, !llvm.loop !17

136:                                              ; preds = %130, %50
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #4
  %137 = load i32, ptr %5, align 4
  switch i32 %137, label %139 [
    i32 5, label %138
  ]

138:                                              ; preds = %136
  store i1 false, ptr %2, align 1
  store i32 1, ptr %5, align 4
  br label %139

139:                                              ; preds = %138, %136
  call void @llvm.lifetime.end.p0(i64 44, ptr %7) #4
  call void @llvm.lifetime.end.p0(i64 140, ptr %6) #4
  br label %140

140:                                              ; preds = %139, %42, %16
  %141 = load i1, ptr %2, align 1
  ret i1 %141

142:                                              ; preds = %42
  unreachable
}

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #3

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!12, !6, i64 0}
!12 = !{!"_ZTS4Path", !6, i64 0, !6, i64 4, !6, i64 8}
!13 = !{!12, !6, i64 4}
!14 = !{!12, !6, i64 8}
!15 = !{i64 0, i64 4, !5, i64 4, i64 4, !5, i64 8, i64 4, !5}
!16 = distinct !{!16, !10}
!17 = distinct !{!17, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.Path = type { i32, i32, i32 }

@path = external dso_local local_unnamed_addr global [5 x %struct.Path], align 16
@n = external dso_local local_unnamed_addr global i32, align 4
@cnt = external dso_local local_unnamed_addr global [11 x i32], align 16
@g = external dso_local local_unnamed_addr global [5 x [7 x i32]], align 16

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z4moveiii(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i1 @_Z3dfsi(i32 noundef %0) local_unnamed_addr #0 {
  %2 = alloca [5 x [7 x i32]], align 16
  %3 = alloca [11 x i32], align 16
  %4 = load i32, ptr @n, align 4, !tbaa !5
  %5 = icmp eq i32 %4, %0
  %6 = load i32, ptr @cnt, align 16, !tbaa !5
  br i1 %5, label %7, label %.preheader67.preheader

.preheader67.preheader:                           ; preds = %1
  %.off = add i32 %6, -1
  %switch54 = icmp ult i32 %.off, 2
  br i1 %switch54, label %.loopexit, label %.preheader67.1

7:                                                ; preds = %1
  %.not53 = icmp eq i32 %6, 0
  br label %.loopexit

.preheader67.1:                                   ; preds = %.preheader67.preheader
  %8 = load i32, ptr getelementptr inbounds (i8, ptr @cnt, i64 4), align 4, !tbaa !5
  %.off.1 = add i32 %8, -1
  %switch54.1 = icmp ult i32 %.off.1, 2
  br i1 %switch54.1, label %.loopexit, label %.preheader67.2

.preheader67.2:                                   ; preds = %.preheader67.1
  %9 = load i32, ptr getelementptr inbounds (i8, ptr @cnt, i64 8), align 8, !tbaa !5
  %.off.2 = add i32 %9, -1
  %switch54.2 = icmp ult i32 %.off.2, 2
  br i1 %switch54.2, label %.loopexit, label %.preheader67.3

.preheader67.3:                                   ; preds = %.preheader67.2
  %10 = load i32, ptr getelementptr inbounds (i8, ptr @cnt, i64 12), align 4, !tbaa !5
  %.off.3 = add i32 %10, -1
  %switch54.3 = icmp ult i32 %.off.3, 2
  br i1 %switch54.3, label %.loopexit, label %.preheader67.4

.preheader67.4:                                   ; preds = %.preheader67.3
  %11 = load i32, ptr getelementptr inbounds (i8, ptr @cnt, i64 16), align 16, !tbaa !5
  %.off.4 = add i32 %11, -1
  %switch54.4 = icmp ult i32 %.off.4, 2
  br i1 %switch54.4, label %.loopexit, label %.preheader67.5

.preheader67.5:                                   ; preds = %.preheader67.4
  %12 = load i32, ptr getelementptr inbounds (i8, ptr @cnt, i64 20), align 4, !tbaa !5
  %.off.5 = add i32 %12, -1
  %switch54.5 = icmp ult i32 %.off.5, 2
  br i1 %switch54.5, label %.loopexit, label %.preheader67.6

.preheader67.6:                                   ; preds = %.preheader67.5
  %13 = load i32, ptr getelementptr inbounds (i8, ptr @cnt, i64 24), align 8, !tbaa !5
  %.off.6 = add i32 %13, -1
  %switch54.6 = icmp ult i32 %.off.6, 2
  br i1 %switch54.6, label %.loopexit, label %.preheader67.7

.preheader67.7:                                   ; preds = %.preheader67.6
  %14 = load i32, ptr getelementptr inbounds (i8, ptr @cnt, i64 28), align 4, !tbaa !5
  %.off.7 = add i32 %14, -1
  %switch54.7 = icmp ult i32 %.off.7, 2
  br i1 %switch54.7, label %.loopexit, label %.preheader67.8

.preheader67.8:                                   ; preds = %.preheader67.7
  %15 = load i32, ptr getelementptr inbounds (i8, ptr @cnt, i64 32), align 16, !tbaa !5
  %.off.8 = add i32 %15, -1
  %switch54.8 = icmp ult i32 %.off.8, 2
  br i1 %switch54.8, label %.loopexit, label %.preheader67.9

.preheader67.9:                                   ; preds = %.preheader67.8
  %16 = load i32, ptr getelementptr inbounds (i8, ptr @cnt, i64 36), align 4, !tbaa !5
  %.off.9 = add i32 %16, -1
  %switch54.9 = icmp ult i32 %.off.9, 2
  br i1 %switch54.9, label %.loopexit, label %17

17:                                               ; preds = %.preheader67.9
  call void @llvm.lifetime.start.p0(i64 140, ptr nonnull %2)
  call void @llvm.lifetime.start.p0(i64 44, ptr nonnull %3)
  call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 16 dereferenceable(140) %2, ptr noundef nonnull align 16 dereferenceable(140) @g, i64 140, i1 false)
  call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 16 dereferenceable(44) %3, ptr noundef nonnull align 16 dereferenceable(44) @cnt, i64 44, i1 false)
  %18 = sext i32 %0 to i64
  %19 = getelementptr inbounds [5 x %struct.Path], ptr @path, i64 0, i64 %18
  %.sroa.44.0..sroa_idx = getelementptr inbounds i8, ptr %19, i64 4
  %.sroa.55.0..sroa_idx = getelementptr inbounds i8, ptr %19, i64 8
  %20 = add nsw i32 %0, 1
  br label %.preheader

.preheader:                                       ; preds = %17, %.split.us
  %indvars.iv84 = phi i64 [ 0, %17 ], [ %indvars.iv.next85, %.split.us ]
  %21 = phi i1 [ true, %17 ], [ %73, %.split.us ]
  %.04571 = phi i32 [ 0, %17 ], [ %22, %.split.us ]
  %.not50 = icmp eq i64 %indvars.iv84, 4
  %indvars.iv.next85 = add nuw nsw i64 %indvars.iv84, 1
  %22 = add nuw nsw i32 %.04571, 1
  %23 = add nsw i64 %indvars.iv84, -1
  %24 = add nsw i32 %.04571, -1
  %.not51 = icmp eq i64 %indvars.iv84, 0
  br i1 %.not50, label %.preheader.split.us.preheader, label %.preheader.split

.preheader.split.us.preheader:                    ; preds = %.preheader
  %25 = load i32, ptr getelementptr inbounds (i8, ptr @g, i64 112), align 16, !tbaa !5
  %.not.us = icmp ne i32 %25, 0
  %26 = load i32, ptr getelementptr inbounds (i8, ptr @g, i64 84), align 4
  %.not52.us = icmp eq i32 %26, 0
  %or.cond = select i1 %.not.us, i1 %.not52.us, i1 false
  br i1 %or.cond, label %27, label %.thread60.us

27:                                               ; preds = %.preheader.split.us.preheader
  store i32 4, ptr %19, align 4, !tbaa !5
  store i32 0, ptr %.sroa.44.0..sroa_idx, align 4, !tbaa !5
  store i32 -1, ptr %.sroa.55.0..sroa_idx, align 4, !tbaa !5
  tail call void @_Z4moveiii(i32 noundef 4, i32 noundef 0, i32 noundef 3)
  %28 = tail call noundef zeroext i1 @_Z3dfsi(i32 noundef %20)
  br i1 %28, label %.thread64, label %29

29:                                               ; preds = %27
  call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 16 dereferenceable(140) @g, ptr noundef nonnull align 16 dereferenceable(140) %2, i64 140, i1 false)
  call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 16 dereferenceable(44) @cnt, ptr noundef nonnull align 16 dereferenceable(44) %3, i64 44, i1 false)
  br label %.thread60.us

.thread60.us:                                     ; preds = %29, %.preheader.split.us.preheader
  %30 = load i32, ptr getelementptr inbounds (i8, ptr @g, i64 116), align 4, !tbaa !5
  %.not.us.1 = icmp ne i32 %30, 0
  %31 = load i32, ptr getelementptr inbounds (i8, ptr @g, i64 88), align 8
  %.not52.us.1 = icmp eq i32 %31, 0
  %or.cond92 = select i1 %.not.us.1, i1 %.not52.us.1, i1 false
  br i1 %or.cond92, label %32, label %.thread60.us.1

32:                                               ; preds = %.thread60.us
  store i32 4, ptr %19, align 4, !tbaa !5
  store i32 1, ptr %.sroa.44.0..sroa_idx, align 4, !tbaa !5
  store i32 -1, ptr %.sroa.55.0..sroa_idx, align 4, !tbaa !5
  tail call void @_Z4moveiii(i32 noundef 4, i32 noundef 1, i32 noundef 3)
  %33 = tail call noundef zeroext i1 @_Z3dfsi(i32 noundef %20)
  br i1 %33, label %.thread64, label %34

34:                                               ; preds = %32
  call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 16 dereferenceable(140) @g, ptr noundef nonnull align 16 dereferenceable(140) %2, i64 140, i1 false)
  call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 16 dereferenceable(44) @cnt, ptr noundef nonnull align 16 dereferenceable(44) %3, i64 44, i1 false)
  br label %.thread60.us.1

.thread60.us.1:                                   ; preds = %34, %.thread60.us
  %35 = load i32, ptr getelementptr inbounds (i8, ptr @g, i64 120), align 8, !tbaa !5
  %.not.us.2 = icmp ne i32 %35, 0
  %36 = load i32, ptr getelementptr inbounds (i8, ptr @g, i64 92), align 4
  %.not52.us.2 = icmp eq i32 %36, 0
  %or.cond93 = select i1 %.not.us.2, i1 %.not52.us.2, i1 false
  br i1 %or.cond93, label %37, label %.thread60.us.2

37:                                               ; preds = %.thread60.us.1
  store i32 4, ptr %19, align 4, !tbaa !5
  store i32 2, ptr %.sroa.44.0..sroa_idx, align 4, !tbaa !5
  store i32 -1, ptr %.sroa.55.0..sroa_idx, align 4, !tbaa !5
  tail call void @_Z4moveiii(i32 noundef 4, i32 noundef 2, i32 noundef 3)
  %38 = tail call noundef zeroext i1 @_Z3dfsi(i32 noundef %20)
  br i1 %38, label %.thread64, label %39

39:                                               ; preds = %37
  call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 16 dereferenceable(140) @g, ptr noundef nonnull align 16 dereferenceable(140) %2, i64 140, i1 false)
  call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 16 dereferenceable(44) @cnt, ptr noundef nonnull align 16 dereferenceable(44) %3, i64 44, i1 false)
  br label %.thread60.us.2

.thread60.us.2:                                   ; preds = %39, %.thread60.us.1
  %40 = load i32, ptr getelementptr inbounds (i8, ptr @g, i64 124), align 4, !tbaa !5
  %.not.us.3 = icmp ne i32 %40, 0
  %41 = load i32, ptr getelementptr inbounds (i8, ptr @g, i64 96), align 16
  %.not52.us.3 = icmp eq i32 %41, 0
  %or.cond94 = select i1 %.not.us.3, i1 %.not52.us.3, i1 false
  br i1 %or.cond94, label %42, label %.thread60.us.3

42:                                               ; preds = %.thread60.us.2
  store i32 4, ptr %19, align 4, !tbaa !5
  store i32 3, ptr %.sroa.44.0..sroa_idx, align 4, !tbaa !5
  store i32 -1, ptr %.sroa.55.0..sroa_idx, align 4, !tbaa !5
  tail call void @_Z4moveiii(i32 noundef 4, i32 noundef 3, i32 noundef 3)
  %43 = tail call noundef zeroext i1 @_Z3dfsi(i32 noundef %20)
  br i1 %43, label %.thread64, label %44

44:                                               ; preds = %42
  call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 16 dereferenceable(140) @g, ptr noundef nonnull align 16 dereferenceable(140) %2, i64 140, i1 false)
  call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 16 dereferenceable(44) @cnt, ptr noundef nonnull align 16 dereferenceable(44) %3, i64 44, i1 false)
  br label %.thread60.us.3

.thread60.us.3:                                   ; preds = %44, %.thread60.us.2
  %45 = load i32, ptr getelementptr inbounds (i8, ptr @g, i64 128), align 16, !tbaa !5
  %.not.us.4 = icmp ne i32 %45, 0
  %46 = load i32, ptr getelementptr inbounds (i8, ptr @g, i64 100), align 4
  %.not52.us.4 = icmp eq i32 %46, 0
  %or.cond95 = select i1 %.not.us.4, i1 %.not52.us.4, i1 false
  br i1 %or.cond95, label %47, label %.thread60.us.4

47:                                               ; preds = %.thread60.us.3
  store i32 4, ptr %19, align 4, !tbaa !5
  store i32 4, ptr %.sroa.44.0..sroa_idx, align 4, !tbaa !5
  store i32 -1, ptr %.sroa.55.0..sroa_idx, align 4, !tbaa !5
  tail call void @_Z4moveiii(i32 noundef 4, i32 noundef 4, i32 noundef 3)
  %48 = tail call noundef zeroext i1 @_Z3dfsi(i32 noundef %20)
  br i1 %48, label %.thread64, label %49

49:                                               ; preds = %47
  call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 16 dereferenceable(140) @g, ptr noundef nonnull align 16 dereferenceable(140) %2, i64 140, i1 false)
  call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 16 dereferenceable(44) @cnt, ptr noundef nonnull align 16 dereferenceable(44) %3, i64 44, i1 false)
  br label %.thread60.us.4

.thread60.us.4:                                   ; preds = %49, %.thread60.us.3
  %50 = load i32, ptr getelementptr inbounds (i8, ptr @g, i64 132), align 4, !tbaa !5
  %.not.us.5 = icmp ne i32 %50, 0
  %51 = load i32, ptr getelementptr inbounds (i8, ptr @g, i64 104), align 8
  %.not52.us.5 = icmp eq i32 %51, 0
  %or.cond96 = select i1 %.not.us.5, i1 %.not52.us.5, i1 false
  br i1 %or.cond96, label %52, label %.thread60.us.5

52:                                               ; preds = %.thread60.us.4
  store i32 4, ptr %19, align 4, !tbaa !5
  store i32 5, ptr %.sroa.44.0..sroa_idx, align 4, !tbaa !5
  store i32 -1, ptr %.sroa.55.0..sroa_idx, align 4, !tbaa !5
  tail call void @_Z4moveiii(i32 noundef 4, i32 noundef 5, i32 noundef 3)
  %53 = tail call noundef zeroext i1 @_Z3dfsi(i32 noundef %20)
  br i1 %53, label %.thread64, label %54

54:                                               ; preds = %52
  call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 16 dereferenceable(140) @g, ptr noundef nonnull align 16 dereferenceable(140) %2, i64 140, i1 false)
  call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 16 dereferenceable(44) @cnt, ptr noundef nonnull align 16 dereferenceable(44) %3, i64 44, i1 false)
  br label %.thread60.us.5

.thread60.us.5:                                   ; preds = %54, %.thread60.us.4
  %55 = load i32, ptr getelementptr inbounds (i8, ptr @g, i64 136), align 8, !tbaa !5
  %.not.us.6 = icmp ne i32 %55, 0
  %56 = load i32, ptr getelementptr inbounds (i8, ptr @g, i64 108), align 4
  %.not52.us.6 = icmp eq i32 %56, 0
  %or.cond97 = select i1 %.not.us.6, i1 %.not52.us.6, i1 false
  br i1 %or.cond97, label %57, label %.thread64

57:                                               ; preds = %.thread60.us.5
  store i32 4, ptr %19, align 4, !tbaa !5
  store i32 6, ptr %.sroa.44.0..sroa_idx, align 4, !tbaa !5
  store i32 -1, ptr %.sroa.55.0..sroa_idx, align 4, !tbaa !5
  tail call void @_Z4moveiii(i32 noundef 4, i32 noundef 6, i32 noundef 3)
  %58 = tail call noundef zeroext i1 @_Z3dfsi(i32 noundef %20)
  br i1 %58, label %.thread64, label %59

59:                                               ; preds = %57
  call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 16 dereferenceable(140) @g, ptr noundef nonnull align 16 dereferenceable(140) %2, i64 140, i1 false)
  call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 16 dereferenceable(44) @cnt, ptr noundef nonnull align 16 dereferenceable(44) %3, i64 44, i1 false)
  br label %.thread64

.preheader.split:                                 ; preds = %.preheader
  %60 = trunc nuw nsw i64 %indvars.iv84 to i32
  br label %61

61:                                               ; preds = %.preheader.split, %.thread60
  %indvars.iv = phi i64 [ 0, %.preheader.split ], [ %indvars.iv.next, %.thread60 ]
  %62 = getelementptr inbounds [5 x [7 x i32]], ptr @g, i64 0, i64 %indvars.iv84, i64 %indvars.iv
  %63 = load i32, ptr %62, align 4, !tbaa !5
  %.not = icmp eq i32 %63, 0
  br i1 %.not, label %.thread60, label %64

64:                                               ; preds = %61
  store i32 %60, ptr %19, align 4, !tbaa !5
  %65 = trunc nuw nsw i64 %indvars.iv to i32
  store i32 %65, ptr %.sroa.44.0..sroa_idx, align 4, !tbaa !5
  store i32 1, ptr %.sroa.55.0..sroa_idx, align 4, !tbaa !5
  tail call void @_Z4moveiii(i32 noundef %60, i32 noundef %65, i32 noundef %22)
  %66 = tail call noundef zeroext i1 @_Z3dfsi(i32 noundef %20)
  br i1 %66, label %.thread64, label %67

67:                                               ; preds = %64
  call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 16 dereferenceable(140) @g, ptr noundef nonnull align 16 dereferenceable(140) %2, i64 140, i1 false)
  call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 16 dereferenceable(44) @cnt, ptr noundef nonnull align 16 dereferenceable(44) %3, i64 44, i1 false)
  br i1 %.not51, label %.thread60, label %.thread58

.thread58:                                        ; preds = %67
  %68 = getelementptr inbounds [5 x [7 x i32]], ptr @g, i64 0, i64 %23, i64 %indvars.iv
  %69 = load i32, ptr %68, align 4, !tbaa !5
  %.not52 = icmp eq i32 %69, 0
  br i1 %.not52, label %70, label %.thread60

70:                                               ; preds = %.thread58
  store i32 %60, ptr %19, align 4, !tbaa !5
  store i32 %65, ptr %.sroa.44.0..sroa_idx, align 4, !tbaa !5
  store i32 -1, ptr %.sroa.55.0..sroa_idx, align 4, !tbaa !5
  tail call void @_Z4moveiii(i32 noundef %60, i32 noundef %65, i32 noundef %24)
  %71 = tail call noundef zeroext i1 @_Z3dfsi(i32 noundef %20)
  br i1 %71, label %.thread64, label %72

72:                                               ; preds = %70
  call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 16 dereferenceable(140) @g, ptr noundef nonnull align 16 dereferenceable(140) %2, i64 140, i1 false)
  call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 16 dereferenceable(44) @cnt, ptr noundef nonnull align 16 dereferenceable(44) %3, i64 44, i1 false)
  br label %.thread60

.thread60:                                        ; preds = %67, %.thread58, %72, %61
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond = icmp eq i64 %indvars.iv.next, 7
  br i1 %exitcond, label %.split.us, label %61, !llvm.loop !9

.split.us:                                        ; preds = %.thread60
  %73 = icmp ult i64 %indvars.iv84, 4
  %exitcond86.not = icmp eq i64 %indvars.iv.next85, 5
  br i1 %exitcond86.not, label %.thread64, label %.preheader, !llvm.loop !11

.thread64:                                        ; preds = %.split.us, %64, %70, %59, %.thread60.us.5, %27, %32, %37, %42, %47, %52, %57
  %74 = phi i1 [ %21, %57 ], [ %21, %52 ], [ %21, %47 ], [ %21, %42 ], [ %21, %37 ], [ %21, %32 ], [ %21, %27 ], [ false, %.thread60.us.5 ], [ false, %59 ], [ %21, %70 ], [ %21, %64 ], [ %73, %.split.us ]
  call void @llvm.lifetime.end.p0(i64 44, ptr nonnull %3)
  call void @llvm.lifetime.end.p0(i64 140, ptr nonnull %2)
  br label %.loopexit

.loopexit:                                        ; preds = %.preheader67.preheader, %.preheader67.1, %.preheader67.2, %.preheader67.3, %.preheader67.4, %.preheader67.5, %.preheader67.6, %.preheader67.7, %.preheader67.8, %.preheader67.9, %.thread64, %7
  %.8 = phi i1 [ %.not53, %7 ], [ %74, %.thread64 ], [ false, %.preheader67.9 ], [ false, %.preheader67.8 ], [ false, %.preheader67.7 ], [ false, %.preheader67.6 ], [ false, %.preheader67.5 ], [ false, %.preheader67.4 ], [ false, %.preheader67.3 ], [ false, %.preheader67.2 ], [ false, %.preheader67.1 ], [ false, %.preheader67.preheader ]
  ret i1 %.8
}

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass