; LLVM IR from AF-GRILL/DISPluginForUnreal :: Source/ThirdParty/include/dis7/AcknowledgePdu.ll (ZNK3DIS14AcknowledgePdueqERKS0_)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.DIS::AcknowledgePdu" = type { %"class.DIS::SimulationManagementFamilyPdu", %"class.DIS::EntityID", %"class.DIS::EntityID", i16, i16, i32 }
%"class.DIS::SimulationManagementFamilyPdu" = type { %"class.DIS::Pdu.base", [4 x i8], %"class.DIS::EntityID", %"class.DIS::EntityID" }
%"class.DIS::Pdu.base" = type { %"class.DIS::PduSuperclass.base", i8, i8 }
%"class.DIS::PduSuperclass.base" = type <{ ptr, i8, i8, i8, i8, i32, i16 }>
%"class.DIS::EntityID" = type <{ ptr, %"class.DIS::SimulationAddress", i16, [6 x i8] }>
%"class.DIS::SimulationAddress" = type <{ ptr, i16, i16, [4 x i8] }>

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZNK3DIS14AcknowledgePdueqERKS0_(ptr noundef nonnull align 8 dereferenceable(160) %0, ptr noundef nonnull align 8 dereferenceable(160) %1) #0 align 2 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca i8, align 1
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  %6 = load ptr, ptr %3, align 8
  call void @llvm.lifetime.start.p0(i64 1, ptr %5) #3
  store i8 1, ptr %5, align 1, !tbaa !9
  %7 = load ptr, ptr %4, align 8, !tbaa !5
  %8 = call noundef zeroext i1 @_ZNK3DIS29SimulationManagementFamilyPdueqERKS0_(ptr noundef nonnull align 8 dereferenceable(88) %6, ptr noundef nonnull align 8 dereferenceable(88) %7)
  %9 = zext i1 %8 to i8
  store i8 %9, ptr %5, align 1, !tbaa !9
  %10 = getelementptr inbounds %"class.DIS::AcknowledgePdu", ptr %6, i32 0, i32 1
  %11 = load ptr, ptr %4, align 8, !tbaa !5
  %12 = getelementptr inbounds %"class.DIS::AcknowledgePdu", ptr %11, i32 0, i32 1
  %13 = call noundef zeroext i1 @_ZNK3DIS8EntityIDeqERKS0_(ptr noundef nonnull align 8 dereferenceable(26) %10, ptr noundef nonnull align 8 dereferenceable(26) %12)
  br i1 %13, label %15, label %14

14:                                               ; preds = %2
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %15

15:                                               ; preds = %14, %2
  %16 = getelementptr inbounds %"class.DIS::AcknowledgePdu", ptr %6, i32 0, i32 2
  %17 = load ptr, ptr %4, align 8, !tbaa !5
  %18 = getelementptr inbounds %"class.DIS::AcknowledgePdu", ptr %17, i32 0, i32 2
  %19 = call noundef zeroext i1 @_ZNK3DIS8EntityIDeqERKS0_(ptr noundef nonnull align 8 dereferenceable(26) %16, ptr noundef nonnull align 8 dereferenceable(26) %18)
  br i1 %19, label %21, label %20

20:                                               ; preds = %15
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %21

21:                                               ; preds = %20, %15
  %22 = getelementptr inbounds %"class.DIS::AcknowledgePdu", ptr %6, i32 0, i32 3
  %23 = load i16, ptr %22, align 8, !tbaa !11
  %24 = zext i16 %23 to i32
  %25 = load ptr, ptr %4, align 8, !tbaa !5
  %26 = getelementptr inbounds %"class.DIS::AcknowledgePdu", ptr %25, i32 0, i32 3
  %27 = load i16, ptr %26, align 8, !tbaa !11
  %28 = zext i16 %27 to i32
  %29 = icmp eq i32 %24, %28
  br i1 %29, label %31, label %30

30:                                               ; preds = %21
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %31

31:                                               ; preds = %30, %21
  %32 = getelementptr inbounds %"class.DIS::AcknowledgePdu", ptr %6, i32 0, i32 4
  %33 = load i16, ptr %32, align 2, !tbaa !20
  %34 = zext i16 %33 to i32
  %35 = load ptr, ptr %4, align 8, !tbaa !5
  %36 = getelementptr inbounds %"class.DIS::AcknowledgePdu", ptr %35, i32 0, i32 4
  %37 = load i16, ptr %36, align 2, !tbaa !20
  %38 = zext i16 %37 to i32
  %39 = icmp eq i32 %34, %38
  br i1 %39, label %41, label %40

40:                                               ; preds = %31
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %41

41:                                               ; preds = %40, %31
  %42 = getelementptr inbounds %"class.DIS::AcknowledgePdu", ptr %6, i32 0, i32 5
  %43 = load i32, ptr %42, align 4, !tbaa !21
  %44 = load ptr, ptr %4, align 8, !tbaa !5
  %45 = getelementptr inbounds %"class.DIS::AcknowledgePdu", ptr %44, i32 0, i32 5
  %46 = load i32, ptr %45, align 4, !tbaa !21
  %47 = icmp eq i32 %43, %46
  br i1 %47, label %49, label %48

48:                                               ; preds = %41
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %49

49:                                               ; preds = %48, %41
  %50 = load i8, ptr %5, align 1, !tbaa !9, !range !22, !noundef !23
  %51 = trunc i8 %50 to i1
  call void @llvm.lifetime.end.p0(i64 1, ptr %5) #3
  ret i1 %51
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare noundef zeroext i1 @_ZNK3DIS29SimulationManagementFamilyPdueqERKS0_(ptr noundef nonnull align 8 dereferenceable(88), ptr noundef nonnull align 8 dereferenceable(88)) #2

declare noundef zeroext i1 @_ZNK3DIS8EntityIDeqERKS0_(ptr noundef nonnull align 8 dereferenceable(26), ptr noundef nonnull align 8 dereferenceable(26)) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"bool", !7, i64 0}
!11 = !{!12, !17, i64 152}
!12 = !{!"_ZTSN3DIS14AcknowledgePduE", !13, i64 0, !18, i64 88, !18, i64 120, !17, i64 152, !17, i64 154, !16, i64 156}
!13 = !{!"_ZTSN3DIS29SimulationManagementFamilyPduE", !14, i64 0, !18, i64 24, !18, i64 56}
!14 = !{!"_ZTSN3DIS3PduE", !15, i64 0, !7, i64 18, !7, i64 19}
!15 = !{!"_ZTSN3DIS13PduSuperclassE", !7, i64 8, !7, i64 9, !7, i64 10, !7, i64 11, !16, i64 12, !17, i64 16}
!16 = !{!"int", !7, i64 0}
!17 = !{!"short", !7, i64 0}
!18 = !{!"_ZTSN3DIS8EntityIDE", !19, i64 8, !17, i64 24}
!19 = !{!"_ZTSN3DIS17SimulationAddressE", !17, i64 8, !17, i64 10}
!20 = !{!12, !17, i64 154}
!21 = !{!12, !16, i64 156}
!22 = !{i8 0, i8 2}
!23 = !{}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZNK3DIS14AcknowledgePdueqERKS0_(ptr noundef nonnull align 8 dereferenceable(160) %0, ptr noundef nonnull align 8 dereferenceable(160) %1) local_unnamed_addr #0 align 2 {
  %3 = tail call noundef zeroext i1 @_ZNK3DIS29SimulationManagementFamilyPdueqERKS0_(ptr noundef nonnull align 8 dereferenceable(88) %0, ptr noundef nonnull align 8 dereferenceable(88) %1)
  %4 = getelementptr inbounds i8, ptr %0, i64 88
  %5 = getelementptr inbounds i8, ptr %1, i64 88
  %6 = tail call noundef zeroext i1 @_ZNK3DIS8EntityIDeqERKS0_(ptr noundef nonnull align 8 dereferenceable(26) %4, ptr noundef nonnull align 8 dereferenceable(26) %5)
  %spec.select = and i1 %3, %6
  %7 = getelementptr inbounds i8, ptr %0, i64 120
  %8 = getelementptr inbounds i8, ptr %1, i64 120
  %9 = tail call noundef zeroext i1 @_ZNK3DIS8EntityIDeqERKS0_(ptr noundef nonnull align 8 dereferenceable(26) %7, ptr noundef nonnull align 8 dereferenceable(26) %8)
  %spec.select9 = and i1 %9, %spec.select
  %10 = getelementptr inbounds i8, ptr %0, i64 152
  %11 = load i16, ptr %10, align 8, !tbaa !5
  %12 = getelementptr inbounds i8, ptr %1, i64 152
  %13 = load i16, ptr %12, align 8, !tbaa !5
  %14 = icmp eq i16 %11, %13
  %spec.select7 = and i1 %spec.select9, %14
  %15 = getelementptr inbounds i8, ptr %0, i64 154
  %16 = load i16, ptr %15, align 2, !tbaa !16
  %17 = getelementptr inbounds i8, ptr %1, i64 154
  %18 = load i16, ptr %17, align 2, !tbaa !16
  %19 = icmp eq i16 %16, %18
  %20 = getelementptr inbounds i8, ptr %0, i64 156
  %21 = load i32, ptr %20, align 4, !tbaa !17
  %22 = getelementptr inbounds i8, ptr %1, i64 156
  %23 = load i32, ptr %22, align 4, !tbaa !17
  %24 = icmp eq i32 %21, %23
  %25 = select i1 %24, i1 %19, i1 false
  %spec.select8 = select i1 %25, i1 %spec.select7, i1 false
  ret i1 %spec.select8
}

declare noundef zeroext i1 @_ZNK3DIS29SimulationManagementFamilyPdueqERKS0_(ptr noundef nonnull align 8 dereferenceable(88), ptr noundef nonnull align 8 dereferenceable(88)) local_unnamed_addr #1

declare noundef zeroext i1 @_ZNK3DIS8EntityIDeqERKS0_(ptr noundef nonnull align 8 dereferenceable(26), ptr noundef nonnull align 8 dereferenceable(26)) local_unnamed_addr #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !13, i64 152}
!6 = !{!"_ZTSN3DIS14AcknowledgePduE", !7, i64 0, !14, i64 88, !14, i64 120, !13, i64 152, !13, i64 154, !12, i64 156}
!7 = !{!"_ZTSN3DIS29SimulationManagementFamilyPduE", !8, i64 0, !14, i64 24, !14, i64 56}
!8 = !{!"_ZTSN3DIS3PduE", !9, i64 0, !10, i64 18, !10, i64 19}
!9 = !{!"_ZTSN3DIS13PduSuperclassE", !10, i64 8, !10, i64 9, !10, i64 10, !10, i64 11, !12, i64 12, !13, i64 16}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C++ TBAA"}
!12 = !{!"int", !10, i64 0}
!13 = !{!"short", !10, i64 0}
!14 = !{!"_ZTSN3DIS8EntityIDE", !15, i64 8, !13, i64 24}
!15 = !{!"_ZTSN3DIS17SimulationAddressE", !13, i64 8, !13, i64 10}
!16 = !{!6, !13, i64 154}
!17 = !{!6, !12, i64 156}


; Effective O3 passes: GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass