; LLVM IR from cvxgrp/scs :: linsys/external/amd (SuiteSparse_config)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.SuiteSparse_config_struct = type { ptr, ptr, ptr, ptr, ptr, ptr, ptr }

@SuiteSparse_config = external dso_local global %struct.SuiteSparse_config_struct, align 8

; Function Attrs: nounwind uwtable
declare dso_local ptr @SuiteSparse_malloc(i64 noundef, i64 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind uwtable
define dso_local ptr @SuiteSparse_realloc(i64 noundef %0, i64 noundef %1, i64 noundef %2, ptr noundef %3, ptr noundef %4) #0 {
  %6 = alloca i64, align 8
  %7 = alloca i64, align 8
  %8 = alloca i64, align 8
  %9 = alloca ptr, align 8
  %10 = alloca ptr, align 8
  %11 = alloca i64, align 8
  %12 = alloca ptr, align 8
  store i64 %0, ptr %6, align 8, !tbaa !5
  store i64 %1, ptr %7, align 8, !tbaa !5
  store i64 %2, ptr %8, align 8, !tbaa !5
  store ptr %3, ptr %9, align 8, !tbaa !9
  store ptr %4, ptr %10, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #2
  %13 = load i64, ptr %7, align 8, !tbaa !5
  %14 = icmp ult i64 %13, 1
  br i1 %14, label %15, label %16

15:                                               ; preds = %5
  store i64 1, ptr %7, align 8, !tbaa !5
  br label %16

16:                                               ; preds = %15, %5
  %17 = load i64, ptr %6, align 8, !tbaa !5
  %18 = icmp ult i64 %17, 1
  br i1 %18, label %19, label %20

19:                                               ; preds = %16
  store i64 1, ptr %6, align 8, !tbaa !5
  br label %20

20:                                               ; preds = %19, %16
  %21 = load i64, ptr %8, align 8, !tbaa !5
  %22 = icmp ult i64 %21, 1
  br i1 %22, label %23, label %24

23:                                               ; preds = %20
  store i64 1, ptr %8, align 8, !tbaa !5
  br label %24

24:                                               ; preds = %23, %20
  %25 = load i64, ptr %6, align 8, !tbaa !5
  %26 = load i64, ptr %8, align 8, !tbaa !5
  %27 = mul i64 %25, %26
  store i64 %27, ptr %11, align 8, !tbaa !5
  %28 = load i64, ptr %11, align 8, !tbaa !5
  %29 = uitofp i64 %28 to double
  %30 = load i64, ptr %6, align 8, !tbaa !5
  %31 = uitofp i64 %30 to double
  %32 = load i64, ptr %8, align 8, !tbaa !5
  %33 = uitofp i64 %32 to double
  %34 = fmul double %31, %33
  %35 = fcmp une double %29, %34
  br i1 %35, label %36, label %38

36:                                               ; preds = %24
  %37 = load ptr, ptr %10, align 8, !tbaa !9
  store i32 0, ptr %37, align 4, !tbaa !11
  br label %77

38:                                               ; preds = %24
  %39 = load ptr, ptr %9, align 8, !tbaa !9
  %40 = icmp eq ptr %39, null
  br i1 %40, label %41, label %49

41:                                               ; preds = %38
  %42 = load i64, ptr %6, align 8, !tbaa !5
  %43 = load i64, ptr %8, align 8, !tbaa !5
  %44 = call ptr @SuiteSparse_malloc(i64 noundef %42, i64 noundef %43)
  store ptr %44, ptr %9, align 8, !tbaa !9
  %45 = load ptr, ptr %9, align 8, !tbaa !9
  %46 = icmp ne ptr %45, null
  %47 = zext i1 %46 to i32
  %48 = load ptr, ptr %10, align 8, !tbaa !9
  store i32 %47, ptr %48, align 4, !tbaa !11
  br label %76

49:                                               ; preds = %38
  %50 = load i64, ptr %7, align 8, !tbaa !5
  %51 = load i64, ptr %6, align 8, !tbaa !5
  %52 = icmp eq i64 %50, %51
  br i1 %52, label %53, label %55

53:                                               ; preds = %49
  %54 = load ptr, ptr %10, align 8, !tbaa !9
  store i32 1, ptr %54, align 4, !tbaa !11
  br label %75

55:                                               ; preds = %49
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #2
  %56 = load ptr, ptr getelementptr inbounds (%struct.SuiteSparse_config_struct, ptr @SuiteSparse_config, i32 0, i32 2), align 8, !tbaa !13
  %57 = load ptr, ptr %9, align 8, !tbaa !9
  %58 = load i64, ptr %11, align 8, !tbaa !5
  %59 = call ptr %56(ptr noundef %57, i64 noundef %58)
  store ptr %59, ptr %12, align 8, !tbaa !9
  %60 = load ptr, ptr %12, align 8, !tbaa !9
  %61 = icmp eq ptr %60, null
  br i1 %61, label %62, label %71

62:                                               ; preds = %55
  %63 = load i64, ptr %6, align 8, !tbaa !5
  %64 = load i64, ptr %7, align 8, !tbaa !5
  %65 = icmp ult i64 %63, %64
  br i1 %65, label %66, label %68

66:                                               ; preds = %62
  %67 = load ptr, ptr %10, align 8, !tbaa !9
  store i32 1, ptr %67, align 4, !tbaa !11
  br label %70

68:                                               ; preds = %62
  %69 = load ptr, ptr %10, align 8, !tbaa !9
  store i32 0, ptr %69, align 4, !tbaa !11
  br label %70

70:                                               ; preds = %68, %66
  br label %74

71:                                               ; preds = %55
  %72 = load ptr, ptr %12, align 8, !tbaa !9
  store ptr %72, ptr %9, align 8, !tbaa !9
  %73 = load ptr, ptr %10, align 8, !tbaa !9
  store i32 1, ptr %73, align 4, !tbaa !11
  br label %74

74:                                               ; preds = %71, %70
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #2
  br label %75

75:                                               ; preds = %74, %53
  br label %76

76:                                               ; preds = %75, %41
  br label %77

77:                                               ; preds = %76, %36
  %78 = load ptr, ptr %9, align 8, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #2
  ret ptr %78
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!14, !10, i64 16}
!14 = !{!"SuiteSparse_config_struct", !10, i64 0, !10, i64 8, !10, i64 16, !10, i64 24, !10, i64 32, !10, i64 40, !10, i64 48}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.SuiteSparse_config_struct = type { ptr, ptr, ptr, ptr, ptr, ptr, ptr }

@SuiteSparse_config = external dso_local local_unnamed_addr global %struct.SuiteSparse_config_struct, align 8

; Function Attrs: nounwind uwtable
declare dso_local ptr @SuiteSparse_malloc(i64 noundef, i64 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local ptr @SuiteSparse_realloc(i64 noundef %0, i64 noundef %1, i64 noundef %2, ptr noundef %3, ptr nocapture noundef writeonly %4) local_unnamed_addr #0 {
  %spec.store.select = tail call i64 @llvm.umax.i64(i64 %1, i64 1)
  %spec.store.select2 = tail call i64 @llvm.umax.i64(i64 %0, i64 1)
  %spec.store.select1 = tail call i64 @llvm.umax.i64(i64 %2, i64 1)
  %6 = mul i64 %spec.store.select1, %spec.store.select2
  %7 = uitofp i64 %6 to double
  %8 = uitofp i64 %spec.store.select2 to double
  %9 = uitofp i64 %spec.store.select1 to double
  %10 = fmul double %8, %9
  %11 = fcmp une double %10, %7
  br i1 %11, label %24, label %12

12:                                               ; preds = %5
  %13 = icmp eq ptr %3, null
  br i1 %13, label %14, label %17

14:                                               ; preds = %12
  %15 = tail call ptr @SuiteSparse_malloc(i64 noundef %spec.store.select2, i64 noundef %spec.store.select1)
  %16 = icmp ne ptr %15, null
  br label %24

17:                                               ; preds = %12
  %18 = icmp eq i64 %spec.store.select, %spec.store.select2
  br i1 %18, label %24, label %19

19:                                               ; preds = %17
  %20 = load ptr, ptr getelementptr inbounds (i8, ptr @SuiteSparse_config, i64 16), align 8, !tbaa !5
  %21 = tail call ptr %20(ptr noundef nonnull %3, i64 noundef %6) #2
  %22 = icmp ne ptr %21, null
  %23 = icmp ult i64 %spec.store.select2, %1
  %spec.select = or i1 %22, %23
  %spec.select30 = select i1 %22, ptr %21, ptr %3
  br label %24

24:                                               ; preds = %19, %17, %5, %14
  %.sink.shrunk = phi i1 [ %16, %14 ], [ false, %5 ], [ true, %17 ], [ %spec.select, %19 ]
  %.1 = phi ptr [ %15, %14 ], [ %3, %5 ], [ %3, %17 ], [ %spec.select30, %19 ]
  %.sink = zext i1 %.sink.shrunk to i32
  store i32 %.sink, ptr %4, align 4, !tbaa !10
  ret ptr %.1
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.umax.i64(i64, i64) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 16}
!6 = !{!"SuiteSparse_config_struct", !7, i64 0, !7, i64 8, !7, i64 16, !7, i64 24, !7, i64 32, !7, i64 40, !7, i64 48}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}


; Effective O3 passes: GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass