; LLVM IR from huawei-noah/bolt :: compute/tensor/src/cpu/arm/clip.ll (Z8clip_arm10TensorDescPv13ClipParamSpecS_S0_)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.TensorDesc = type { i32, i32, i32, [20 x i32] }
%struct.ClipParamSpec = type { float, float }

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z8clip_arm10TensorDescPv13ClipParamSpecS_S0_(ptr noundef byval(%struct.TensorDesc) align 8 %0, ptr noundef %1, <2 x float> %2, ptr noundef byval(%struct.TensorDesc) align 8 %3, ptr noundef %4) #0 {
  %6 = alloca %struct.ClipParamSpec, align 4
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  %9 = alloca i32, align 4
  %10 = alloca %struct.TensorDesc, align 8
  store <2 x float> %2, ptr %6, align 4
  store ptr %1, ptr %7, align 8, !tbaa !5
  store ptr %4, ptr %8, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #5
  store i32 51, ptr %9, align 4, !tbaa !9
  %11 = getelementptr inbounds %struct.TensorDesc, ptr %0, i32 0, i32 0
  %12 = load i32, ptr %11, align 8, !tbaa !11
  switch i32 %12, label %24 [
    i32 3, label %13
  ]

13:                                               ; preds = %5
  %14 = load ptr, ptr %7, align 8, !tbaa !5
  %15 = load ptr, ptr %8, align 8, !tbaa !5
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %10, ptr align 8 %0, i64 92, i1 false), !tbaa.struct !16
  %16 = call noundef i32 @_Z17tensorNumElements10TensorDesc(ptr noundef byval(%struct.TensorDesc) align 8 %10)
  %17 = getelementptr inbounds %struct.ClipParamSpec, ptr %6, i32 0, i32 0
  %18 = load float, ptr %17, align 4, !tbaa !21
  %19 = fptosi float %18 to i32
  %20 = getelementptr inbounds %struct.ClipParamSpec, ptr %6, i32 0, i32 1
  %21 = load float, ptr %20, align 4, !tbaa !24
  %22 = fptosi float %21 to i32
  %23 = call noundef i32 @_Z10clip_int32PiS_iii(ptr noundef %14, ptr noundef %15, i32 noundef %16, i32 noundef %19, i32 noundef %22)
  store i32 %23, ptr %9, align 4, !tbaa !9
  br label %25

24:                                               ; preds = %5
  br label %25

25:                                               ; preds = %24, %13
  %26 = load i32, ptr %9, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #5
  ret i32 %26
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare noundef i32 @_Z10clip_int32PiS_iii(ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef) #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z17tensorNumElements10TensorDesc(ptr noundef byval(%struct.TensorDesc) align 8) #3

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #4

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="64" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"_ZTS2EE", !7, i64 0}
!11 = !{!12, !13, i64 0}
!12 = !{!"_ZTS10TensorDesc", !13, i64 0, !14, i64 4, !15, i64 8, !7, i64 12}
!13 = !{!"_ZTS8DataType", !7, i64 0}
!14 = !{!"_ZTS10DataFormat", !7, i64 0}
!15 = !{!"int", !7, i64 0}
!16 = !{i64 0, i64 4, !17, i64 4, i64 4, !18, i64 8, i64 4, !19, i64 12, i64 80, !20}
!17 = !{!13, !13, i64 0}
!18 = !{!14, !14, i64 0}
!19 = !{!15, !15, i64 0}
!20 = !{!7, !7, i64 0}
!21 = !{!22, !23, i64 0}
!22 = !{!"_ZTS13ClipParamSpec", !23, i64 0, !23, i64 4}
!23 = !{!"float", !7, i64 0}
!24 = !{!22, !23, i64 4}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.TensorDesc = type { i32, i32, i32, [20 x i32] }

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z8clip_arm10TensorDescPv13ClipParamSpecS_S0_(ptr nocapture noundef readonly byval(%struct.TensorDesc) align 8 %0, ptr noundef %1, <2 x float> %2, ptr nocapture noundef readnone byval(%struct.TensorDesc) align 8 %3, ptr noundef %4) local_unnamed_addr #0 {
  %6 = load i32, ptr %0, align 8, !tbaa !5
  %cond = icmp eq i32 %6, 3
  br i1 %cond, label %7, label %12

7:                                                ; preds = %5
  %8 = tail call noundef i32 @_Z17tensorNumElements10TensorDesc(ptr noundef nonnull byval(%struct.TensorDesc) align 8 %0)
  %.sroa.0.0.vec.extract = extractelement <2 x float> %2, i64 0
  %9 = fptosi float %.sroa.0.0.vec.extract to i32
  %.sroa.0.4.vec.extract = extractelement <2 x float> %2, i64 1
  %10 = fptosi float %.sroa.0.4.vec.extract to i32
  %11 = tail call noundef i32 @_Z10clip_int32PiS_iii(ptr noundef %1, ptr noundef %4, i32 noundef %8, i32 noundef %9, i32 noundef %10)
  br label %12

12:                                               ; preds = %5, %7
  %.0 = phi i32 [ %11, %7 ], [ 51, %5 ]
  ret i32 %.0
}

declare noundef i32 @_Z10clip_int32PiS_iii(ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z17tensorNumElements10TensorDesc(ptr noundef byval(%struct.TensorDesc) align 8) local_unnamed_addr #2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="64" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"_ZTS10TensorDesc", !7, i64 0, !10, i64 4, !11, i64 8, !8, i64 12}
!7 = !{!"_ZTS8DataType", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"_ZTS10DataFormat", !8, i64 0}
!11 = !{!"int", !8, i64 0}


; Effective O3 passes: DSEPass,EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,MemCpyOptPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass