; LLVM IR from AF-GRILL/DISPluginForUnreal :: Source/ThirdParty/include/dis6/IntercomSignalPdu.ll (ZNK3DIS17IntercomSignalPdueqERKS0_)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.DIS::IntercomSignalPdu" = type { %"class.DIS::RadioCommunicationsFamilyPdu.base", [6 x i8], %"class.DIS::EntityID", i16, i16, i16, i32, i16, i16, %"class.std::vector" }
%"class.DIS::RadioCommunicationsFamilyPdu.base" = type { %"class.DIS::Pdu.base", [4 x i8], %"class.DIS::EntityID", i16 }
%"class.DIS::Pdu.base" = type <{ ptr, i8, i8, i8, i8, i32, i16, i16 }>
%"class.DIS::EntityID" = type <{ ptr, i16, i16, i16, [2 x i8] }>
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<DIS::OneByteChunk, std::allocator<DIS::OneByteChunk>>::_Vector_impl" }
%"struct.std::_Vector_base<DIS::OneByteChunk, std::allocator<DIS::OneByteChunk>>::_Vector_impl" = type { %"struct.std::_Vector_base<DIS::OneByteChunk, std::allocator<DIS::OneByteChunk>>::_Vector_impl_data" }
%"struct.std::_Vector_base<DIS::OneByteChunk, std::allocator<DIS::OneByteChunk>>::_Vector_impl_data" = type { ptr, ptr, ptr }

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIN3DIS12OneByteChunkESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(9) ptr @_ZNKSt6vectorIN3DIS12OneByteChunkESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZNK3DIS17IntercomSignalPdueqERKS0_(ptr noundef nonnull align 8 dereferenceable(104) %0, ptr noundef nonnull align 8 dereferenceable(104) %1) #2 align 2 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca i8, align 1
  %6 = alloca i64, align 8
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  %7 = load ptr, ptr %3, align 8
  call void @llvm.lifetime.start.p0(i64 1, ptr %5) #4
  store i8 1, ptr %5, align 1, !tbaa !9
  %8 = load ptr, ptr %4, align 8, !tbaa !5
  %9 = call noundef zeroext i1 @_ZNK3DIS28RadioCommunicationsFamilyPdueqERKS0_(ptr noundef nonnull align 8 dereferenceable(42) %7, ptr noundef nonnull align 8 dereferenceable(42) %8)
  %10 = zext i1 %9 to i8
  store i8 %10, ptr %5, align 1, !tbaa !9
  %11 = getelementptr inbounds %"class.DIS::IntercomSignalPdu", ptr %7, i32 0, i32 2
  %12 = load ptr, ptr %4, align 8, !tbaa !5
  %13 = getelementptr inbounds %"class.DIS::IntercomSignalPdu", ptr %12, i32 0, i32 2
  %14 = call noundef zeroext i1 @_ZNK3DIS8EntityIDeqERKS0_(ptr noundef nonnull align 8 dereferenceable(14) %11, ptr noundef nonnull align 8 dereferenceable(14) %13)
  br i1 %14, label %16, label %15

15:                                               ; preds = %2
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %16

16:                                               ; preds = %15, %2
  %17 = getelementptr inbounds %"class.DIS::IntercomSignalPdu", ptr %7, i32 0, i32 3
  %18 = load i16, ptr %17, align 8, !tbaa !11
  %19 = zext i16 %18 to i32
  %20 = load ptr, ptr %4, align 8, !tbaa !5
  %21 = getelementptr inbounds %"class.DIS::IntercomSignalPdu", ptr %20, i32 0, i32 3
  %22 = load i16, ptr %21, align 8, !tbaa !11
  %23 = zext i16 %22 to i32
  %24 = icmp eq i32 %19, %23
  br i1 %24, label %26, label %25

25:                                               ; preds = %16
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %26

26:                                               ; preds = %25, %16
  %27 = getelementptr inbounds %"class.DIS::IntercomSignalPdu", ptr %7, i32 0, i32 4
  %28 = load i16, ptr %27, align 2, !tbaa !22
  %29 = zext i16 %28 to i32
  %30 = load ptr, ptr %4, align 8, !tbaa !5
  %31 = getelementptr inbounds %"class.DIS::IntercomSignalPdu", ptr %30, i32 0, i32 4
  %32 = load i16, ptr %31, align 2, !tbaa !22
  %33 = zext i16 %32 to i32
  %34 = icmp eq i32 %29, %33
  br i1 %34, label %36, label %35

35:                                               ; preds = %26
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %36

36:                                               ; preds = %35, %26
  %37 = getelementptr inbounds %"class.DIS::IntercomSignalPdu", ptr %7, i32 0, i32 5
  %38 = load i16, ptr %37, align 4, !tbaa !23
  %39 = zext i16 %38 to i32
  %40 = load ptr, ptr %4, align 8, !tbaa !5
  %41 = getelementptr inbounds %"class.DIS::IntercomSignalPdu", ptr %40, i32 0, i32 5
  %42 = load i16, ptr %41, align 4, !tbaa !23
  %43 = zext i16 %42 to i32
  %44 = icmp eq i32 %39, %43
  br i1 %44, label %46, label %45

45:                                               ; preds = %36
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %46

46:                                               ; preds = %45, %36
  %47 = getelementptr inbounds %"class.DIS::IntercomSignalPdu", ptr %7, i32 0, i32 6
  %48 = load i32, ptr %47, align 8, !tbaa !24
  %49 = load ptr, ptr %4, align 8, !tbaa !5
  %50 = getelementptr inbounds %"class.DIS::IntercomSignalPdu", ptr %49, i32 0, i32 6
  %51 = load i32, ptr %50, align 8, !tbaa !24
  %52 = icmp eq i32 %48, %51
  br i1 %52, label %54, label %53

53:                                               ; preds = %46
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %54

54:                                               ; preds = %53, %46
  %55 = getelementptr inbounds %"class.DIS::IntercomSignalPdu", ptr %7, i32 0, i32 8
  %56 = load i16, ptr %55, align 2, !tbaa !25
  %57 = zext i16 %56 to i32
  %58 = load ptr, ptr %4, align 8, !tbaa !5
  %59 = getelementptr inbounds %"class.DIS::IntercomSignalPdu", ptr %58, i32 0, i32 8
  %60 = load i16, ptr %59, align 2, !tbaa !25
  %61 = zext i16 %60 to i32
  %62 = icmp eq i32 %57, %61
  br i1 %62, label %64, label %63

63:                                               ; preds = %54
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %64

64:                                               ; preds = %63, %54
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #4
  store i64 0, ptr %6, align 8, !tbaa !26
  br label %65

65:                                               ; preds = %82, %64
  %66 = load i64, ptr %6, align 8, !tbaa !26
  %67 = getelementptr inbounds %"class.DIS::IntercomSignalPdu", ptr %7, i32 0, i32 9
  %68 = call noundef i64 @_ZNKSt6vectorIN3DIS12OneByteChunkESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %67) #4
  %69 = icmp ult i64 %66, %68
  br i1 %69, label %71, label %70

70:                                               ; preds = %65
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #4
  br label %85

71:                                               ; preds = %65
  %72 = getelementptr inbounds %"class.DIS::IntercomSignalPdu", ptr %7, i32 0, i32 9
  %73 = load i64, ptr %6, align 8, !tbaa !26
  %74 = call noundef nonnull align 8 dereferenceable(9) ptr @_ZNKSt6vectorIN3DIS12OneByteChunkESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %72, i64 noundef %73) #4
  %75 = load ptr, ptr %4, align 8, !tbaa !5
  %76 = getelementptr inbounds %"class.DIS::IntercomSignalPdu", ptr %75, i32 0, i32 9
  %77 = load i64, ptr %6, align 8, !tbaa !26
  %78 = call noundef nonnull align 8 dereferenceable(9) ptr @_ZNKSt6vectorIN3DIS12OneByteChunkESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %76, i64 noundef %77) #4
  %79 = call noundef zeroext i1 @_ZNK3DIS12OneByteChunkeqERKS0_(ptr noundef nonnull align 8 dereferenceable(9) %74, ptr noundef nonnull align 8 dereferenceable(9) %78)
  br i1 %79, label %81, label %80

80:                                               ; preds = %71
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %81

81:                                               ; preds = %80, %71
  br label %82

82:                                               ; preds = %81
  %83 = load i64, ptr %6, align 8, !tbaa !26
  %84 = add i64 %83, 1
  store i64 %84, ptr %6, align 8, !tbaa !26
  br label %65, !llvm.loop !28

85:                                               ; preds = %70
  %86 = load i8, ptr %5, align 1, !tbaa !9, !range !30, !noundef !31
  %87 = trunc i8 %86 to i1
  call void @llvm.lifetime.end.p0(i64 1, ptr %5) #4
  ret i1 %87
}

declare noundef zeroext i1 @_ZNK3DIS28RadioCommunicationsFamilyPdueqERKS0_(ptr noundef nonnull align 8 dereferenceable(42), ptr noundef nonnull align 8 dereferenceable(42)) #3

declare noundef zeroext i1 @_ZNK3DIS8EntityIDeqERKS0_(ptr noundef nonnull align 8 dereferenceable(14), ptr noundef nonnull align 8 dereferenceable(14)) #3

declare noundef zeroext i1 @_ZNK3DIS12OneByteChunkeqERKS0_(ptr noundef nonnull align 8 dereferenceable(9), ptr noundef nonnull align 8 dereferenceable(9)) #3

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"bool", !7, i64 0}
!11 = !{!12, !16, i64 64}
!12 = !{!"_ZTSN3DIS17IntercomSignalPduE", !13, i64 0, !17, i64 48, !16, i64 64, !16, i64 66, !16, i64 68, !15, i64 72, !16, i64 76, !16, i64 78, !18, i64 80}
!13 = !{!"_ZTSN3DIS28RadioCommunicationsFamilyPduE", !14, i64 0, !17, i64 24, !16, i64 40}
!14 = !{!"_ZTSN3DIS3PduE", !7, i64 8, !7, i64 9, !7, i64 10, !7, i64 11, !15, i64 12, !16, i64 16, !16, i64 18}
!15 = !{!"int", !7, i64 0}
!16 = !{!"short", !7, i64 0}
!17 = !{!"_ZTSN3DIS8EntityIDE", !16, i64 8, !16, i64 10, !16, i64 12}
!18 = !{!"_ZTSSt6vectorIN3DIS12OneByteChunkESaIS1_EE", !19, i64 0}
!19 = !{!"_ZTSSt12_Vector_baseIN3DIS12OneByteChunkESaIS1_EE", !20, i64 0}
!20 = !{!"_ZTSNSt12_Vector_baseIN3DIS12OneByteChunkESaIS1_EE12_Vector_implE", !21, i64 0}
!21 = !{!"_ZTSNSt12_Vector_baseIN3DIS12OneByteChunkESaIS1_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!22 = !{!12, !16, i64 66}
!23 = !{!12, !16, i64 68}
!24 = !{!12, !15, i64 72}
!25 = !{!12, !16, i64 78}
!26 = !{!27, !27, i64 0}
!27 = !{!"long", !7, i64 0}
!28 = distinct !{!28, !29}
!29 = !{!"llvm.loop.mustprogress"}
!30 = !{i8 0, i8 2}
!31 = !{}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIN3DIS12OneByteChunkESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(9) ptr @_ZNKSt6vectorIN3DIS12OneByteChunkESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZNK3DIS17IntercomSignalPdueqERKS0_(ptr noundef nonnull align 8 dereferenceable(104) %0, ptr noundef nonnull align 8 dereferenceable(104) %1) local_unnamed_addr #1 align 2 {
  %3 = tail call noundef zeroext i1 @_ZNK3DIS28RadioCommunicationsFamilyPdueqERKS0_(ptr noundef nonnull align 8 dereferenceable(42) %0, ptr noundef nonnull align 8 dereferenceable(42) %1)
  %4 = getelementptr inbounds i8, ptr %0, i64 48
  %5 = getelementptr inbounds i8, ptr %1, i64 48
  %6 = tail call noundef zeroext i1 @_ZNK3DIS8EntityIDeqERKS0_(ptr noundef nonnull align 8 dereferenceable(14) %4, ptr noundef nonnull align 8 dereferenceable(14) %5)
  %narrow = and i1 %3, %6
  %7 = getelementptr inbounds i8, ptr %0, i64 64
  %8 = load i16, ptr %7, align 8, !tbaa !5
  %9 = getelementptr inbounds i8, ptr %1, i64 64
  %10 = load i16, ptr %9, align 8, !tbaa !5
  %11 = icmp eq i16 %8, %10
  %narrow15 = and i1 %narrow, %11
  %12 = getelementptr inbounds i8, ptr %0, i64 66
  %13 = load i16, ptr %12, align 2, !tbaa !19
  %14 = getelementptr inbounds i8, ptr %1, i64 66
  %15 = load i16, ptr %14, align 2, !tbaa !19
  %16 = icmp eq i16 %13, %15
  %17 = getelementptr inbounds i8, ptr %0, i64 68
  %18 = load i16, ptr %17, align 4, !tbaa !20
  %19 = getelementptr inbounds i8, ptr %1, i64 68
  %20 = load i16, ptr %19, align 4, !tbaa !20
  %21 = icmp eq i16 %18, %20
  %22 = getelementptr inbounds i8, ptr %0, i64 72
  %23 = load i32, ptr %22, align 8, !tbaa !21
  %24 = getelementptr inbounds i8, ptr %1, i64 72
  %25 = load i32, ptr %24, align 8, !tbaa !21
  %26 = icmp eq i32 %23, %25
  %27 = getelementptr inbounds i8, ptr %0, i64 78
  %28 = load i16, ptr %27, align 2, !tbaa !22
  %29 = getelementptr inbounds i8, ptr %1, i64 78
  %30 = load i16, ptr %29, align 2, !tbaa !22
  %31 = icmp eq i16 %28, %30
  %32 = select i1 %31, i1 %26, i1 false
  %33 = select i1 %32, i1 %21, i1 false
  %34 = select i1 %33, i1 %16, i1 false
  %narrow19 = select i1 %34, i1 %narrow15, i1 false
  %35 = getelementptr inbounds i8, ptr %0, i64 80
  %36 = tail call noundef i64 @_ZNKSt6vectorIN3DIS12OneByteChunkESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %35) #3
  %.not = icmp eq i64 %36, 0
  br i1 %.not, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %2
  %37 = getelementptr inbounds i8, ptr %1, i64 80
  br label %38

._crit_edge:                                      ; preds = %38, %2
  %.6.lcssa = phi i1 [ %narrow19, %2 ], [ %spec.select14, %38 ]
  ret i1 %.6.lcssa

38:                                               ; preds = %.lr.ph, %38
  %.021 = phi i64 [ 0, %.lr.ph ], [ %42, %38 ]
  %.620 = phi i1 [ %narrow19, %.lr.ph ], [ %spec.select14, %38 ]
  %39 = tail call noundef nonnull align 8 dereferenceable(9) ptr @_ZNKSt6vectorIN3DIS12OneByteChunkESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %35, i64 noundef %.021) #3
  %40 = tail call noundef nonnull align 8 dereferenceable(9) ptr @_ZNKSt6vectorIN3DIS12OneByteChunkESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %37, i64 noundef %.021) #3
  %41 = tail call noundef zeroext i1 @_ZNK3DIS12OneByteChunkeqERKS0_(ptr noundef nonnull align 8 dereferenceable(9) %39, ptr noundef nonnull align 8 dereferenceable(9) %40)
  %spec.select14 = select i1 %41, i1 %.620, i1 false
  %42 = add nuw i64 %.021, 1
  %43 = tail call noundef i64 @_ZNKSt6vectorIN3DIS12OneByteChunkESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %35) #3
  %44 = icmp ult i64 %42, %43
  br i1 %44, label %38, label %._crit_edge, !llvm.loop !23
}

declare noundef zeroext i1 @_ZNK3DIS28RadioCommunicationsFamilyPdueqERKS0_(ptr noundef nonnull align 8 dereferenceable(42), ptr noundef nonnull align 8 dereferenceable(42)) local_unnamed_addr #2

declare noundef zeroext i1 @_ZNK3DIS8EntityIDeqERKS0_(ptr noundef nonnull align 8 dereferenceable(14), ptr noundef nonnull align 8 dereferenceable(14)) local_unnamed_addr #2

declare noundef zeroext i1 @_ZNK3DIS12OneByteChunkeqERKS0_(ptr noundef nonnull align 8 dereferenceable(9), ptr noundef nonnull align 8 dereferenceable(9)) local_unnamed_addr #2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !12, i64 64}
!6 = !{!"_ZTSN3DIS17IntercomSignalPduE", !7, i64 0, !13, i64 48, !12, i64 64, !12, i64 66, !12, i64 68, !11, i64 72, !12, i64 76, !12, i64 78, !14, i64 80}
!7 = !{!"_ZTSN3DIS28RadioCommunicationsFamilyPduE", !8, i64 0, !13, i64 24, !12, i64 40}
!8 = !{!"_ZTSN3DIS3PduE", !9, i64 8, !9, i64 9, !9, i64 10, !9, i64 11, !11, i64 12, !12, i64 16, !12, i64 18}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!"short", !9, i64 0}
!13 = !{!"_ZTSN3DIS8EntityIDE", !12, i64 8, !12, i64 10, !12, i64 12}
!14 = !{!"_ZTSSt6vectorIN3DIS12OneByteChunkESaIS1_EE", !15, i64 0}
!15 = !{!"_ZTSSt12_Vector_baseIN3DIS12OneByteChunkESaIS1_EE", !16, i64 0}
!16 = !{!"_ZTSNSt12_Vector_baseIN3DIS12OneByteChunkESaIS1_EE12_Vector_implE", !17, i64 0}
!17 = !{!"_ZTSNSt12_Vector_baseIN3DIS12OneByteChunkESaIS1_EE17_Vector_impl_dataE", !18, i64 0, !18, i64 8, !18, i64 16}
!18 = !{!"any pointer", !9, i64 0}
!19 = !{!6, !12, i64 66}
!20 = !{!6, !12, i64 68}
!21 = !{!6, !11, i64 72}
!22 = !{!6, !12, i64 78}
!23 = distinct !{!23, !24}
!24 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: AggressiveInstCombinePass,CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass