; LLVM IR from sslab-gatech/janus :: lkl/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy (phy_qmath)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local signext i16 @qm_add16(i16 noundef signext, i16 noundef signext) #1

; Function Attrs: nounwind uwtable
define dso_local signext i16 @qm_shl16(i16 noundef signext %0, i32 noundef %1) #1 {
  %3 = alloca i16, align 2
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i16, align 2
  store i16 %0, ptr %3, align 2, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  call void @llvm.lifetime.start.p0(i64 2, ptr %6) #2
  %7 = load i16, ptr %3, align 2, !tbaa !5
  store i16 %7, ptr %6, align 2, !tbaa !5
  %8 = load i32, ptr %4, align 4, !tbaa !9
  %9 = icmp sgt i32 %8, 15
  br i1 %9, label %10, label %11

10:                                               ; preds = %2
  store i32 15, ptr %4, align 4, !tbaa !9
  br label %16

11:                                               ; preds = %2
  %12 = load i32, ptr %4, align 4, !tbaa !9
  %13 = icmp slt i32 %12, -15
  br i1 %13, label %14, label %15

14:                                               ; preds = %11
  store i32 -15, ptr %4, align 4, !tbaa !9
  br label %15

15:                                               ; preds = %14, %11
  br label %16

16:                                               ; preds = %15, %10
  %17 = load i32, ptr %4, align 4, !tbaa !9
  %18 = icmp sgt i32 %17, 0
  br i1 %18, label %19, label %32

19:                                               ; preds = %16
  store i32 0, ptr %5, align 4, !tbaa !9
  br label %20

20:                                               ; preds = %28, %19
  %21 = load i32, ptr %5, align 4, !tbaa !9
  %22 = load i32, ptr %4, align 4, !tbaa !9
  %23 = icmp slt i32 %21, %22
  br i1 %23, label %24, label %31

24:                                               ; preds = %20
  %25 = load i16, ptr %6, align 2, !tbaa !5
  %26 = load i16, ptr %6, align 2, !tbaa !5
  %27 = call signext i16 @qm_add16(i16 noundef signext %25, i16 noundef signext %26)
  store i16 %27, ptr %6, align 2, !tbaa !5
  br label %28

28:                                               ; preds = %24
  %29 = load i32, ptr %5, align 4, !tbaa !9
  %30 = add nsw i32 %29, 1
  store i32 %30, ptr %5, align 4, !tbaa !9
  br label %20, !llvm.loop !11

31:                                               ; preds = %20
  br label %39

32:                                               ; preds = %16
  %33 = load i16, ptr %6, align 2, !tbaa !5
  %34 = sext i16 %33 to i32
  %35 = load i32, ptr %4, align 4, !tbaa !9
  %36 = sub nsw i32 0, %35
  %37 = ashr i32 %34, %36
  %38 = trunc i32 %37 to i16
  store i16 %38, ptr %6, align 2, !tbaa !5
  br label %39

39:                                               ; preds = %32, %31
  %40 = load i16, ptr %6, align 2, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 2, ptr %6) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  ret i16 %40
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"short", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
declare dso_local signext i16 @qm_add16(i16 noundef signext, i16 noundef signext) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local signext i16 @qm_shl16(i16 noundef signext %0, i32 noundef %1) local_unnamed_addr #0 {
  %spec.store.select = tail call i32 @llvm.smax.i32(i32 %1, i32 -15)
  %.013 = tail call i32 @llvm.smin.i32(i32 %spec.store.select, i32 15)
  %3 = icmp sgt i32 %1, 0
  br i1 %3, label %.lr.ph, label %6

.lr.ph:                                           ; preds = %2, %.lr.ph
  %.016 = phi i16 [ %4, %.lr.ph ], [ %0, %2 ]
  %.01215 = phi i32 [ %5, %.lr.ph ], [ 0, %2 ]
  %4 = tail call signext i16 @qm_add16(i16 noundef signext %.016, i16 noundef signext %.016)
  %5 = add nuw nsw i32 %.01215, 1
  %exitcond.not = icmp eq i32 %5, %.013
  br i1 %exitcond.not, label %.loopexit, label %.lr.ph, !llvm.loop !5

6:                                                ; preds = %2
  %7 = sext i16 %0 to i32
  %8 = sub nsw i32 0, %.013
  %9 = ashr i32 %7, %8
  %10 = trunc nsw i32 %9 to i16
  br label %.loopexit

.loopexit:                                        ; preds = %.lr.ph, %6
  %.1 = phi i16 [ %10, %6 ], [ %4, %.lr.ph ]
  ret i16 %.1
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smax.i32(i32, i32) #1

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smin.i32(i32, i32) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass