; LLVM IR from upupming/algorithm :: AdvancedLevel_C++/1138. Postorder Traversal (25).ll (Z9postOrderiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@pre = external dso_local global %"class.std::vector", align 8
@in = external dso_local global %"class.std::vector", align 8
@flag = external dso_local global i8, align 1
@.str = external hidden unnamed_addr constant [3 x i8], align 1

; Function Attrs: mustprogress uwtable
define dso_local void @_Z9postOrderiii(i32 noundef %0, i32 noundef %1, i32 noundef %2) #0 {
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  store i32 %0, ptr %4, align 4, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !5
  store i32 %2, ptr %6, align 4, !tbaa !5
  %8 = load i32, ptr %5, align 4, !tbaa !5
  %9 = load i32, ptr %6, align 4, !tbaa !5
  %10 = icmp sgt i32 %8, %9
  br i1 %10, label %16, label %11

11:                                               ; preds = %3
  %12 = load i8, ptr @flag, align 1, !tbaa !9, !range !11, !noundef !12
  %13 = trunc i8 %12 to i1
  %14 = zext i1 %13 to i32
  %15 = icmp eq i32 %14, 1
  br i1 %15, label %16, label %17

16:                                               ; preds = %11, %3
  br label %58

17:                                               ; preds = %11
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #4
  %18 = load i32, ptr %5, align 4, !tbaa !5
  store i32 %18, ptr %7, align 4, !tbaa !5
  br label %19

19:                                               ; preds = %29, %17
  %20 = load i32, ptr %7, align 4, !tbaa !5
  %21 = sext i32 %20 to i64
  %22 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @in, i64 noundef %21) #4
  %23 = load i32, ptr %22, align 4, !tbaa !5
  %24 = load i32, ptr %4, align 4, !tbaa !5
  %25 = sext i32 %24 to i64
  %26 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @pre, i64 noundef %25) #4
  %27 = load i32, ptr %26, align 4, !tbaa !5
  %28 = icmp ne i32 %23, %27
  br i1 %28, label %29, label %32

29:                                               ; preds = %19
  %30 = load i32, ptr %7, align 4, !tbaa !5
  %31 = add nsw i32 %30, 1
  store i32 %31, ptr %7, align 4, !tbaa !5
  br label %19, !llvm.loop !13

32:                                               ; preds = %19
  %33 = load i32, ptr %4, align 4, !tbaa !5
  %34 = add nsw i32 %33, 1
  %35 = load i32, ptr %5, align 4, !tbaa !5
  %36 = load i32, ptr %7, align 4, !tbaa !5
  %37 = sub nsw i32 %36, 1
  call void @_Z9postOrderiii(i32 noundef %34, i32 noundef %35, i32 noundef %37)
  %38 = load i32, ptr %4, align 4, !tbaa !5
  %39 = load i32, ptr %7, align 4, !tbaa !5
  %40 = add nsw i32 %38, %39
  %41 = load i32, ptr %5, align 4, !tbaa !5
  %42 = sub nsw i32 %40, %41
  %43 = add nsw i32 %42, 1
  %44 = load i32, ptr %7, align 4, !tbaa !5
  %45 = add nsw i32 %44, 1
  %46 = load i32, ptr %6, align 4, !tbaa !5
  call void @_Z9postOrderiii(i32 noundef %43, i32 noundef %45, i32 noundef %46)
  %47 = load i8, ptr @flag, align 1, !tbaa !9, !range !11, !noundef !12
  %48 = trunc i8 %47 to i1
  %49 = zext i1 %48 to i32
  %50 = icmp eq i32 %49, 0
  br i1 %50, label %51, label %57

51:                                               ; preds = %32
  %52 = load i32, ptr %7, align 4, !tbaa !5
  %53 = sext i32 %52 to i64
  %54 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @in, i64 noundef %53) #4
  %55 = load i32, ptr %54, align 4, !tbaa !5
  %56 = call i32 (ptr, ...) @printf(ptr noundef @.str, i32 noundef %55)
  store i8 1, ptr @flag, align 1, !tbaa !9
  br label %57

57:                                               ; preds = %51, %32
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #4
  br label %58

58:                                               ; preds = %57, %16
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

declare i32 @printf(ptr noundef, ...) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"bool", !7, i64 0}
!11 = !{i8 0, i8 2}
!12 = !{}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@pre = external dso_local global %"class.std::vector", align 8
@in = external dso_local global %"class.std::vector", align 8
@flag = external dso_local local_unnamed_addr global i8, align 1
@.str = external hidden unnamed_addr constant [3 x i8], align 1

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z9postOrderiii(i32 noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 {
  %4 = icmp sgt i32 %1, %2
  br i1 %4, label %28, label %5

5:                                                ; preds = %3
  %6 = load i8, ptr @flag, align 1, !tbaa !5, !range !9, !noundef !10
  %7 = trunc nuw i8 %6 to i1
  br i1 %7, label %28, label %.preheader

.preheader:                                       ; preds = %5
  %8 = sext i32 %0 to i64
  %9 = sext i32 %1 to i64
  br label %10

10:                                               ; preds = %10, %.preheader
  %indvars.iv = phi i64 [ %indvars.iv.next, %10 ], [ %9, %.preheader ]
  %11 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @in, i64 noundef %indvars.iv) #2
  %12 = load i32, ptr %11, align 4, !tbaa !11
  %13 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @pre, i64 noundef %8) #2
  %14 = load i32, ptr %13, align 4, !tbaa !11
  %.not = icmp eq i32 %12, %14
  %indvars.iv.next = add nsw i64 %indvars.iv, 1
  br i1 %.not, label %15, label %10, !llvm.loop !13

15:                                               ; preds = %10
  %16 = trunc nsw i64 %indvars.iv to i32
  %17 = add i32 %0, 1
  %18 = add nsw i32 %16, -1
  tail call void @_Z9postOrderiii(i32 noundef %17, i32 noundef %1, i32 noundef %18)
  %19 = sub i32 %17, %1
  %20 = add i32 %19, %16
  %21 = add nsw i32 %16, 1
  tail call void @_Z9postOrderiii(i32 noundef %20, i32 noundef %21, i32 noundef %2)
  %22 = load i8, ptr @flag, align 1, !tbaa !5, !range !9, !noundef !10
  %23 = icmp eq i8 %22, 0
  br i1 %23, label %24, label %28

24:                                               ; preds = %15
  %25 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @in, i64 noundef %indvars.iv) #2
  %26 = load i32, ptr %25, align 4, !tbaa !11
  %27 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str, i32 noundef %26)
  store i8 1, ptr @flag, align 1, !tbaa !5
  br label %28

28:                                               ; preds = %15, %24, %3, %5
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"bool", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{i8 0, i8 2}
!10 = !{}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass