; LLVM IR from upupming/algorithm :: AdvancedLevel_C++/1147. Heaps (30)  (main)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@m = external dso_local global i32, align 4
@n = external dso_local global i32, align 4
@v = external dso_local global %"class.std::vector", align 8
@.str.4 = external hidden unnamed_addr constant [5 x i8], align 1
@.str.5 = external hidden unnamed_addr constant [3 x i8], align 1
@.str.6 = external hidden unnamed_addr constant [10 x i8], align 1
@.str.7 = external hidden unnamed_addr constant [9 x i8], align 1
@.str.8 = external hidden unnamed_addr constant [4 x i8], align 1
@.str.9 = external hidden unnamed_addr constant [4 x i8], align 1

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z9postOrderi(i32 noundef) #0

declare i32 @printf(ptr noundef, ...) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() #3 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  store i32 0, ptr %1, align 4
  %9 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef @.str.4, ptr noundef @m, ptr noundef @n)
  %10 = load i32, ptr @n, align 4, !tbaa !5
  %11 = sext i32 %10 to i64
  call void @_ZNSt6vectorIiSaIiEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %11)
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #5
  store i32 0, ptr %2, align 4, !tbaa !5
  br label %12

12:                                               ; preds = %126, %0
  %13 = load i32, ptr %2, align 4, !tbaa !5
  %14 = load i32, ptr @m, align 4, !tbaa !5
  %15 = icmp slt i32 %13, %14
  br i1 %15, label %17, label %16

16:                                               ; preds = %12
  store i32 2, ptr %3, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #5
  br label %129

17:                                               ; preds = %12
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #5
  store i32 0, ptr %4, align 4, !tbaa !5
  br label %18

18:                                               ; preds = %28, %17
  %19 = load i32, ptr %4, align 4, !tbaa !5
  %20 = load i32, ptr @n, align 4, !tbaa !5
  %21 = icmp slt i32 %19, %20
  br i1 %21, label %23, label %22

22:                                               ; preds = %18
  store i32 5, ptr %3, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #5
  br label %31

23:                                               ; preds = %18
  %24 = load i32, ptr %4, align 4, !tbaa !5
  %25 = sext i32 %24 to i64
  %26 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %25) #5
  %27 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef @.str.5, ptr noundef %26)
  br label %28

28:                                               ; preds = %23
  %29 = load i32, ptr %4, align 4, !tbaa !5
  %30 = add nsw i32 %29, 1
  store i32 %30, ptr %4, align 4, !tbaa !5
  br label %18, !llvm.loop !9

31:                                               ; preds = %22
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #5
  %32 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef 0) #5
  %33 = load i32, ptr %32, align 4, !tbaa !5
  %34 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef 1) #5
  %35 = load i32, ptr %34, align 4, !tbaa !5
  %36 = icmp sgt i32 %33, %35
  %37 = zext i1 %36 to i64
  %38 = select i1 %36, i32 1, i32 -1
  store i32 %38, ptr %5, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #5
  store i32 0, ptr %6, align 4, !tbaa !5
  br label %39

39:                                               ; preds = %108, %31
  %40 = load i32, ptr %6, align 4, !tbaa !5
  %41 = load i32, ptr @n, align 4, !tbaa !5
  %42 = sdiv i32 %41, 2
  %43 = icmp slt i32 %40, %42
  br i1 %43, label %45, label %44

44:                                               ; preds = %39
  store i32 8, ptr %3, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #5
  br label %111

45:                                               ; preds = %39
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #5
  %46 = load i32, ptr %6, align 4, !tbaa !5
  %47 = mul nsw i32 %46, 2
  %48 = add nsw i32 %47, 1
  store i32 %48, ptr %7, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #5
  %49 = load i32, ptr %6, align 4, !tbaa !5
  %50 = mul nsw i32 %49, 2
  %51 = add nsw i32 %50, 2
  store i32 %51, ptr %8, align 4, !tbaa !5
  %52 = load i32, ptr %5, align 4, !tbaa !5
  %53 = icmp eq i32 %52, 1
  br i1 %53, label %54, label %79

54:                                               ; preds = %45
  %55 = load i32, ptr %6, align 4, !tbaa !5
  %56 = sext i32 %55 to i64
  %57 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %56) #5
  %58 = load i32, ptr %57, align 4, !tbaa !5
  %59 = load i32, ptr %7, align 4, !tbaa !5
  %60 = sext i32 %59 to i64
  %61 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %60) #5
  %62 = load i32, ptr %61, align 4, !tbaa !5
  %63 = icmp slt i32 %58, %62
  br i1 %63, label %78, label %64

64:                                               ; preds = %54
  %65 = load i32, ptr %8, align 4, !tbaa !5
  %66 = load i32, ptr @n, align 4, !tbaa !5
  %67 = icmp slt i32 %65, %66
  br i1 %67, label %68, label %79

68:                                               ; preds = %64
  %69 = load i32, ptr %6, align 4, !tbaa !5
  %70 = sext i32 %69 to i64
  %71 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %70) #5
  %72 = load i32, ptr %71, align 4, !tbaa !5
  %73 = load i32, ptr %8, align 4, !tbaa !5
  %74 = sext i32 %73 to i64
  %75 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %74) #5
  %76 = load i32, ptr %75, align 4, !tbaa !5
  %77 = icmp slt i32 %72, %76
  br i1 %77, label %78, label %79

78:                                               ; preds = %68, %54
  store i32 0, ptr %5, align 4, !tbaa !5
  br label %79

79:                                               ; preds = %78, %68, %64, %45
  %80 = load i32, ptr %5, align 4, !tbaa !5
  %81 = icmp eq i32 %80, -1
  br i1 %81, label %82, label %107

82:                                               ; preds = %79
  %83 = load i32, ptr %6, align 4, !tbaa !5
  %84 = sext i32 %83 to i64
  %85 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %84) #5
  %86 = load i32, ptr %85, align 4, !tbaa !5
  %87 = load i32, ptr %7, align 4, !tbaa !5
  %88 = sext i32 %87 to i64
  %89 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %88) #5
  %90 = load i32, ptr %89, align 4, !tbaa !5
  %91 = icmp sgt i32 %86, %90
  br i1 %91, label %106, label %92

92:                                               ; preds = %82
  %93 = load i32, ptr %8, align 4, !tbaa !5
  %94 = load i32, ptr @n, align 4, !tbaa !5
  %95 = icmp slt i32 %93, %94
  br i1 %95, label %96, label %107

96:                                               ; preds = %92
  %97 = load i32, ptr %6, align 4, !tbaa !5
  %98 = sext i32 %97 to i64
  %99 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %98) #5
  %100 = load i32, ptr %99, align 4, !tbaa !5
  %101 = load i32, ptr %8, align 4, !tbaa !5
  %102 = sext i32 %101 to i64
  %103 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %102) #5
  %104 = load i32, ptr %103, align 4, !tbaa !5
  %105 = icmp sgt i32 %100, %104
  br i1 %105, label %106, label %107

106:                                              ; preds = %96, %82
  store i32 0, ptr %5, align 4, !tbaa !5
  br label %107

107:                                              ; preds = %106, %96, %92, %79
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #5
  br label %108

108:                                              ; preds = %107
  %109 = load i32, ptr %6, align 4, !tbaa !5
  %110 = add nsw i32 %109, 1
  store i32 %110, ptr %6, align 4, !tbaa !5
  br label %39, !llvm.loop !11

111:                                              ; preds = %44
  %112 = load i32, ptr %5, align 4, !tbaa !5
  %113 = icmp eq i32 %112, 0
  br i1 %113, label %114, label %116

114:                                              ; preds = %111
  %115 = call i32 (ptr, ...) @printf(ptr noundef @.str.6)
  br label %125

116:                                              ; preds = %111
  %117 = load i32, ptr %5, align 4, !tbaa !5
  %118 = icmp eq i32 %117, 1
  br i1 %118, label %119, label %120

119:                                              ; preds = %116
  br label %121

120:                                              ; preds = %116
  br label %121

121:                                              ; preds = %120, %119
  %122 = phi ptr [ @.str.8, %119 ], [ @.str.9, %120 ]
  %123 = getelementptr inbounds [4 x i8], ptr %122, i64 0, i64 0
  %124 = call i32 (ptr, ...) @printf(ptr noundef @.str.7, ptr noundef %123)
  br label %125

125:                                              ; preds = %121, %114
  call void @_Z9postOrderi(i32 noundef 0)
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #5
  br label %126

126:                                              ; preds = %125
  %127 = load i32, ptr %2, align 4, !tbaa !5
  %128 = add nsw i32 %127, 1
  store i32 %128, ptr %2, align 4, !tbaa !5
  br label %12, !llvm.loop !12

129:                                              ; preds = %16
  ret i32 0
}

declare i32 @__isoc99_scanf(ptr noundef, ...) #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #4

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #4

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@m = external dso_local global i32, align 4
@n = external dso_local global i32, align 4
@v = external dso_local global %"class.std::vector", align 8
@.str.4 = external hidden unnamed_addr constant [5 x i8], align 1
@.str.5 = external hidden unnamed_addr constant [3 x i8], align 1
@.str.6 = external hidden unnamed_addr constant [10 x i8], align 1
@.str.7 = external hidden unnamed_addr constant [9 x i8], align 1
@.str.8 = external hidden unnamed_addr constant [4 x i8], align 1
@.str.9 = external hidden unnamed_addr constant [4 x i8], align 1

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z9postOrderi(i32 noundef) local_unnamed_addr #0

; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() local_unnamed_addr #3 {
  %1 = tail call i32 (ptr, ...) @__isoc99_scanf(ptr noundef nonnull @.str.4, ptr noundef nonnull @m, ptr noundef nonnull @n)
  %2 = load i32, ptr @n, align 4, !tbaa !5
  %3 = sext i32 %2 to i64
  tail call void @_ZNSt6vectorIiSaIiEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %3)
  %4 = load i32, ptr @m, align 4, !tbaa !5
  %5 = icmp sgt i32 %4, 0
  br i1 %5, label %.preheader, label %._crit_edge36

.preheader:                                       ; preds = %0, %67
  %.035 = phi i32 [ %68, %67 ], [ 0, %0 ]
  %6 = load i32, ptr @n, align 4, !tbaa !5
  %7 = icmp sgt i32 %6, 0
  br i1 %7, label %.lr.ph, label %._crit_edge

._crit_edge36:                                    ; preds = %67, %0
  ret i32 0

._crit_edge:                                      ; preds = %.lr.ph, %.preheader
  %8 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef 0) #4
  %9 = load i32, ptr %8, align 4, !tbaa !5
  %10 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef 1) #4
  %11 = load i32, ptr %10, align 4, !tbaa !5
  %12 = icmp sgt i32 %9, %11
  %13 = select i1 %12, i32 1, i32 -1
  %14 = load i32, ptr @n, align 4, !tbaa !5
  %15 = icmp sgt i32 %14, 1
  br i1 %15, label %.lr.ph33, label %._crit_edge34.thread

.lr.ph:                                           ; preds = %.preheader, %.lr.ph
  %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 0, %.preheader ]
  %16 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %indvars.iv) #4
  %17 = tail call i32 (ptr, ...) @__isoc99_scanf(ptr noundef nonnull @.str.5, ptr noundef nonnull %16)
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %18 = load i32, ptr @n, align 4, !tbaa !5
  %19 = sext i32 %18 to i64
  %20 = icmp slt i64 %indvars.iv.next, %19
  br i1 %20, label %.lr.ph, label %._crit_edge, !llvm.loop !9

._crit_edge34:                                    ; preds = %.thread
  %21 = icmp eq i32 %.2, 0
  br i1 %21, label %63, label %._crit_edge34.thread

.lr.ph33:                                         ; preds = %._crit_edge, %.thread
  %indvars.iv38 = phi i64 [ %indvars.iv.next39, %.thread ], [ 0, %._crit_edge ]
  %.02430 = phi i32 [ %.2, %.thread ], [ %13, %._crit_edge ]
  %22 = shl nuw nsw i64 %indvars.iv38, 1
  %23 = or disjoint i64 %22, 1
  %24 = add nuw nsw i64 %22, 2
  switch i32 %.02430, label %.thread [
    i32 1, label %25
    i32 -1, label %42
  ]

25:                                               ; preds = %.lr.ph33
  %26 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %indvars.iv38) #4
  %27 = load i32, ptr %26, align 4, !tbaa !5
  %28 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %23) #4
  %29 = load i32, ptr %28, align 4, !tbaa !5
  %30 = icmp slt i32 %27, %29
  br i1 %30, label %41, label %31

31:                                               ; preds = %25
  %32 = load i32, ptr @n, align 4, !tbaa !5
  %33 = sext i32 %32 to i64
  %34 = icmp slt i64 %24, %33
  br i1 %34, label %35, label %.thread

35:                                               ; preds = %31
  %36 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %indvars.iv38) #4
  %37 = load i32, ptr %36, align 4, !tbaa !5
  %38 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %24) #4
  %39 = load i32, ptr %38, align 4, !tbaa !5
  %40 = icmp slt i32 %37, %39
  br i1 %40, label %41, label %.thread

41:                                               ; preds = %35, %25
  br label %.thread

42:                                               ; preds = %.lr.ph33
  %43 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %indvars.iv38) #4
  %44 = load i32, ptr %43, align 4, !tbaa !5
  %45 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %23) #4
  %46 = load i32, ptr %45, align 4, !tbaa !5
  %47 = icmp sgt i32 %44, %46
  br i1 %47, label %58, label %48

48:                                               ; preds = %42
  %49 = load i32, ptr @n, align 4, !tbaa !5
  %50 = sext i32 %49 to i64
  %51 = icmp slt i64 %24, %50
  br i1 %51, label %52, label %.thread

52:                                               ; preds = %48
  %53 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %indvars.iv38) #4
  %54 = load i32, ptr %53, align 4, !tbaa !5
  %55 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %24) #4
  %56 = load i32, ptr %55, align 4, !tbaa !5
  %57 = icmp sgt i32 %54, %56
  br i1 %57, label %58, label %.thread

58:                                               ; preds = %52, %42
  br label %.thread

.thread:                                          ; preds = %.lr.ph33, %31, %35, %41, %58, %52, %48
  %.2 = phi i32 [ 0, %58 ], [ -1, %52 ], [ -1, %48 ], [ 1, %31 ], [ 1, %35 ], [ 0, %41 ], [ %.02430, %.lr.ph33 ]
  %indvars.iv.next39 = add nuw nsw i64 %indvars.iv38, 1
  %59 = load i32, ptr @n, align 4, !tbaa !5
  %60 = sdiv i32 %59, 2
  %61 = sext i32 %60 to i64
  %62 = icmp slt i64 %indvars.iv.next39, %61
  br i1 %62, label %.lr.ph33, label %._crit_edge34, !llvm.loop !11

63:                                               ; preds = %._crit_edge34
  %64 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.6)
  br label %67

._crit_edge34.thread:                             ; preds = %._crit_edge, %._crit_edge34
  %.024.lcssa42 = phi i32 [ %.2, %._crit_edge34 ], [ %13, %._crit_edge ]
  %65 = icmp eq i32 %.024.lcssa42, 1
  %.str.8..str.9 = select i1 %65, ptr @.str.8, ptr @.str.9
  %66 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.7, ptr noundef nonnull %.str.8..str.9)
  br label %67

67:                                               ; preds = %._crit_edge34.thread, %63
  tail call void @_Z9postOrderi(i32 noundef 0)
  %68 = add nuw nsw i32 %.035, 1
  %69 = load i32, ptr @m, align 4, !tbaa !5
  %70 = icmp slt i32 %68, %69
  br i1 %70, label %.preheader, label %._crit_edge36, !llvm.loop !12
}

; Function Attrs: nofree nounwind
declare noundef i32 @__isoc99_scanf(ptr nocapture noundef readonly, ...) local_unnamed_addr #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass