; LLVM IR from AdaptiveCpp/AdaptiveCpp :: src/runtime/omp/omp_backend.ll (ZN7hipsycl2rt11omp_backendC2Ev)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.hipsycl::rt::device_id" = type { %"struct.hipsycl::rt::backend_descriptor", i32 }
%"struct.hipsycl::rt::backend_descriptor" = type { i32, i32, i32 }
%class.anon = type { ptr }
%"class.hipsycl::rt::omp_backend" = type { %"class.hipsycl::rt::backend", %"class.hipsycl::rt::omp_allocator", %"class.hipsycl::rt::omp_hardware_manager", %"class.hipsycl::rt::lazily_constructed_executor" }
%"class.hipsycl::rt::backend" = type { ptr }
%"class.hipsycl::rt::omp_allocator" = type { %"class.hipsycl::rt::backend_allocator", %"class.hipsycl::rt::device_id" }
%"class.hipsycl::rt::backend_allocator" = type { ptr }
%"class.hipsycl::rt::omp_hardware_manager" = type { %"class.hipsycl::rt::backend_hardware_manager", %"class.hipsycl::rt::omp_hardware_context" }
%"class.hipsycl::rt::backend_hardware_manager" = type { ptr }
%"class.hipsycl::rt::omp_hardware_context" = type { %"class.hipsycl::rt::hardware_context" }
%"class.hipsycl::rt::hardware_context" = type { ptr }
%"class.hipsycl::rt::lazily_constructed_executor" = type { %"struct.std::atomic", %"class.std::mutex", %"class.std::function", %"class.std::unique_ptr" }
%"struct.std::atomic" = type { %"struct.std::__atomic_base" }
%"struct.std::__atomic_base" = type { i8 }
%"class.std::mutex" = type { %"class.std::__mutex_base" }
%"class.std::__mutex_base" = type { %union.pthread_mutex_t }
%union.pthread_mutex_t = type { %struct.__pthread_mutex_s }
%struct.__pthread_mutex_s = type { i32, i32, i32, i32, i32, i16, i16, %struct.__pthread_internal_list }
%struct.__pthread_internal_list = type { ptr, ptr }
%"class.std::function" = type { %"class.std::_Function_base", ptr }
%"class.std::_Function_base" = type { %"union.std::_Any_data", ptr }
%"union.std::_Any_data" = type { %"union.std::_Nocopy_types" }
%"union.std::_Nocopy_types" = type { { i64, i64 } }
%"class.std::unique_ptr" = type { %"struct.std::__uniq_ptr_data" }
%"struct.std::__uniq_ptr_data" = type { %"class.std::__uniq_ptr_impl" }
%"class.std::__uniq_ptr_impl" = type { %"class.std::tuple" }
%"class.std::tuple" = type { %"struct.std::_Tuple_impl" }
%"struct.std::_Tuple_impl" = type { %"struct.std::_Head_base.1" }
%"struct.std::_Head_base.1" = type { ptr }

@_ZTVN7hipsycl2rt11omp_backendE = external dso_local unnamed_addr constant { [12 x ptr] }, align 8

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN7hipsycl2rt11omp_backendC2Ev(ptr noundef nonnull align 8 dereferenceable(136) %0) unnamed_addr #0 align 2 personality ptr @__gxx_personality_v0 {
  %2 = alloca ptr, align 8
  %3 = alloca %"class.hipsycl::rt::device_id", align 4
  %4 = alloca %"struct.hipsycl::rt::backend_descriptor", align 4
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca { i64, i32 }, align 4
  %8 = alloca %class.anon, align 8
  store ptr %0, ptr %2, align 8, !tbaa !5
  %9 = load ptr, ptr %2, align 8
  call void @_ZN7hipsycl2rt7backendC2Ev(ptr noundef nonnull align 8 dereferenceable(8) %9) #7
  store ptr getelementptr inbounds inrange(-16, 80) ({ [12 x ptr] }, ptr @_ZTVN7hipsycl2rt11omp_backendE, i32 0, i32 0, i32 2), ptr %9, align 8, !tbaa !9
  %10 = getelementptr inbounds %"class.hipsycl::rt::omp_backend", ptr %9, i32 0, i32 1
  call void @llvm.lifetime.start.p0(i64 16, ptr %3) #7
  %11 = invoke noundef i32 @_ZNK7hipsycl2rt11omp_backend21get_hardware_platformEv(ptr noundef nonnull align 8 dereferenceable(136) %9)
          to label %12 unwind label %26

12:                                               ; preds = %1
  %13 = invoke noundef i32 @_ZNK7hipsycl2rt11omp_backend16get_api_platformEv(ptr noundef nonnull align 8 dereferenceable(136) %9)
          to label %14 unwind label %26

14:                                               ; preds = %12
  invoke void @_ZN7hipsycl2rt18backend_descriptorC2ENS0_17hardware_platformENS0_12api_platformE(ptr noundef nonnull align 4 dereferenceable(12) %4, i32 noundef %11, i32 noundef %13)
          to label %15 unwind label %26

15:                                               ; preds = %14
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %7, ptr align 4 %4, i64 12, i1 false)
  %16 = getelementptr inbounds { i64, i32 }, ptr %7, i32 0, i32 0
  %17 = load i64, ptr %16, align 4
  %18 = getelementptr inbounds { i64, i32 }, ptr %7, i32 0, i32 1
  %19 = load i32, ptr %18, align 4
  invoke void @_ZN7hipsycl2rt9device_idC1ENS0_18backend_descriptorEi(ptr noundef nonnull align 4 dereferenceable(16) %3, i64 %17, i32 %19, i32 noundef 0)
          to label %20 unwind label %26

20:                                               ; preds = %15
  invoke void @_ZN7hipsycl2rt13omp_allocatorC1ERKNS0_9device_idE(ptr noundef nonnull align 8 dereferenceable(24) %10, ptr noundef nonnull align 4 dereferenceable(16) %3)
          to label %21 unwind label %26

21:                                               ; preds = %20
  call void @llvm.lifetime.end.p0(i64 16, ptr %3) #7
  %22 = getelementptr inbounds %"class.hipsycl::rt::omp_backend", ptr %9, i32 0, i32 2
  call void @llvm.memset.p0.i64(ptr align 8 %22, i8 0, i64 16, i1 false)
  call void @_ZN7hipsycl2rt20omp_hardware_managerC2Ev(ptr noundef nonnull align 8 dereferenceable(16) %22) #7
  %23 = getelementptr inbounds %"class.hipsycl::rt::omp_backend", ptr %9, i32 0, i32 3
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #7
  %24 = getelementptr inbounds %class.anon, ptr %8, i32 0, i32 0
  store ptr %9, ptr %24, align 8, !tbaa !11
  invoke void @"_ZN7hipsycl2rt27lazily_constructed_executorINS0_20multi_queue_executorEEC2IZNS0_11omp_backendC1EvE3$_0EEOT_"(ptr noundef nonnull align 8 dereferenceable(88) %23, ptr noundef nonnull align 8 dereferenceable(8) %8)
          to label %25 unwind label %30

25:                                               ; preds = %21
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #7
  ret void

26:                                               ; preds = %20, %15, %14, %12, %1
  %27 = landingpad { ptr, i32 }
          cleanup
  %28 = extractvalue { ptr, i32 } %27, 0
  store ptr %28, ptr %5, align 8
  %29 = extractvalue { ptr, i32 } %27, 1
  store i32 %29, ptr %6, align 4
  call void @llvm.lifetime.end.p0(i64 16, ptr %3) #7
  br label %34

30:                                               ; preds = %21
  %31 = landingpad { ptr, i32 }
          cleanup
  %32 = extractvalue { ptr, i32 } %31, 0
  store ptr %32, ptr %5, align 8
  %33 = extractvalue { ptr, i32 } %31, 1
  store i32 %33, ptr %6, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #7
  call void @_ZN7hipsycl2rt20omp_hardware_managerD2Ev(ptr noundef nonnull align 8 dereferenceable(16) %22) #7
  call void @_ZN7hipsycl2rt17backend_allocatorD2Ev(ptr noundef nonnull align 8 dereferenceable(24) %10) #7
  br label %34

34:                                               ; preds = %30, %26
  call void @_ZN7hipsycl2rt7backendD2Ev(ptr noundef nonnull align 8 dereferenceable(8) %9) #7
  br label %35

35:                                               ; preds = %34
  %36 = load ptr, ptr %5, align 8
  %37 = load i32, ptr %6, align 4
  %38 = insertvalue { ptr, i32 } poison, ptr %36, 0
  %39 = insertvalue { ptr, i32 } %38, i32 %37, 1
  resume { ptr, i32 } %39
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN7hipsycl2rt7backendC2Ev(ptr noundef nonnull align 8 dereferenceable(8)) unnamed_addr #1 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK7hipsycl2rt11omp_backend21get_hardware_platformEv(ptr noundef nonnull align 8 dereferenceable(136)) unnamed_addr #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK7hipsycl2rt11omp_backend16get_api_platformEv(ptr noundef nonnull align 8 dereferenceable(136)) unnamed_addr #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN7hipsycl2rt18backend_descriptorC2ENS0_17hardware_platformENS0_12api_platformE(ptr noundef nonnull align 4 dereferenceable(12), i32 noundef, i32 noundef) unnamed_addr #3 align 2

declare void @_ZN7hipsycl2rt9device_idC1ENS0_18backend_descriptorEi(ptr noundef nonnull align 4 dereferenceable(16), i64, i32, i32 noundef) unnamed_addr #4

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #5

declare void @_ZN7hipsycl2rt13omp_allocatorC1ERKNS0_9device_idE(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 4 dereferenceable(16)) unnamed_addr #4

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #6

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN7hipsycl2rt20omp_hardware_managerC2Ev(ptr noundef nonnull align 8 dereferenceable(16)) unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare hidden void @"_ZN7hipsycl2rt27lazily_constructed_executorINS0_20multi_queue_executorEEC2IZNS0_11omp_backendC1EvE3$_0EEOT_"(ptr noundef nonnull align 8 dereferenceable(88), ptr noundef nonnull align 8 dereferenceable(8)) unnamed_addr #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN7hipsycl2rt20omp_hardware_managerD2Ev(ptr noundef nonnull align 8 dereferenceable(16)) unnamed_addr #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN7hipsycl2rt17backend_allocatorD2Ev(ptr noundef nonnull align 8 dereferenceable(8)) unnamed_addr #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN7hipsycl2rt7backendD2Ev(ptr noundef nonnull align 8 dereferenceable(8)) unnamed_addr #3 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #6 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #7 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"vtable pointer", !8, i64 0}
!11 = !{!12, !6, i64 0}
!12 = !{!"_ZTSZN7hipsycl2rt11omp_backendC1EvE3$_0", !6, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.hipsycl::rt::device_id" = type { %"struct.hipsycl::rt::backend_descriptor", i32 }
%"struct.hipsycl::rt::backend_descriptor" = type { i32, i32, i32 }
%class.anon = type { ptr }

@_ZTVN7hipsycl2rt11omp_backendE = external dso_local unnamed_addr constant { [12 x ptr] }, align 8

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN7hipsycl2rt11omp_backendC2Ev(ptr noundef nonnull align 8 dereferenceable(136) %0) unnamed_addr #0 align 2 personality ptr @__gxx_personality_v0 {
  %2 = alloca %"class.hipsycl::rt::device_id", align 4
  %3 = alloca %"struct.hipsycl::rt::backend_descriptor", align 8
  %4 = alloca %class.anon, align 8
  tail call void @_ZN7hipsycl2rt7backendC2Ev(ptr noundef nonnull align 8 dereferenceable(8) %0) #6
  store ptr getelementptr inbounds inrange(-16, 80) (i8, ptr @_ZTVN7hipsycl2rt11omp_backendE, i64 16), ptr %0, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %2) #6
  %5 = tail call noundef i32 @_ZNK7hipsycl2rt11omp_backend21get_hardware_platformEv(ptr noundef nonnull align 8 dereferenceable(136) %0)
  %6 = tail call noundef i32 @_ZNK7hipsycl2rt11omp_backend16get_api_platformEv(ptr noundef nonnull align 8 dereferenceable(136) %0)
  call void @_ZN7hipsycl2rt18backend_descriptorC2ENS0_17hardware_platformENS0_12api_platformE(ptr noundef nonnull align 4 dereferenceable(12) %3, i32 noundef %5, i32 noundef %6)
  %.sroa.0.0.copyload = load i64, ptr %3, align 8
  %.sroa.2.0..sroa_idx = getelementptr inbounds i8, ptr %3, i64 8
  %.sroa.2.0.copyload = load i32, ptr %.sroa.2.0..sroa_idx, align 8
  invoke void @_ZN7hipsycl2rt9device_idC1ENS0_18backend_descriptorEi(ptr noundef nonnull align 4 dereferenceable(16) %2, i64 %.sroa.0.0.copyload, i32 %.sroa.2.0.copyload, i32 noundef 0)
          to label %7 unwind label %12

7:                                                ; preds = %1
  %8 = getelementptr inbounds i8, ptr %0, i64 8
  invoke void @_ZN7hipsycl2rt13omp_allocatorC1ERKNS0_9device_idE(ptr noundef nonnull align 8 dereferenceable(24) %8, ptr noundef nonnull align 4 dereferenceable(16) %2)
          to label %9 unwind label %12

9:                                                ; preds = %7
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %2) #6
  %10 = getelementptr inbounds i8, ptr %0, i64 32
  call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %10, i8 0, i64 16, i1 false)
  call void @_ZN7hipsycl2rt20omp_hardware_managerC2Ev(ptr noundef nonnull align 8 dereferenceable(16) %10) #6
  %11 = getelementptr inbounds i8, ptr %0, i64 48
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #6
  store ptr %0, ptr %4, align 8, !tbaa !8
  call void @"_ZN7hipsycl2rt27lazily_constructed_executorINS0_20multi_queue_executorEEC2IZNS0_11omp_backendC1EvE3$_0EEOT_"(ptr noundef nonnull align 8 dereferenceable(88) %11, ptr noundef nonnull align 8 dereferenceable(8) %4)
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #6
  ret void

12:                                               ; preds = %7, %1
  %13 = landingpad { ptr, i32 }
          cleanup
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %2) #6
  call void @_ZN7hipsycl2rt7backendD2Ev(ptr noundef nonnull align 8 dereferenceable(8) %0) #6
  resume { ptr, i32 } %13
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN7hipsycl2rt7backendC2Ev(ptr noundef nonnull align 8 dereferenceable(8)) unnamed_addr #1 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK7hipsycl2rt11omp_backend21get_hardware_platformEv(ptr noundef nonnull align 8 dereferenceable(136)) unnamed_addr #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK7hipsycl2rt11omp_backend16get_api_platformEv(ptr noundef nonnull align 8 dereferenceable(136)) unnamed_addr #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN7hipsycl2rt18backend_descriptorC2ENS0_17hardware_platformENS0_12api_platformE(ptr noundef nonnull align 4 dereferenceable(12), i32 noundef, i32 noundef) unnamed_addr #3 align 2

declare void @_ZN7hipsycl2rt9device_idC1ENS0_18backend_descriptorEi(ptr noundef nonnull align 4 dereferenceable(16), i64, i32, i32 noundef) unnamed_addr #4

declare void @_ZN7hipsycl2rt13omp_allocatorC1ERKNS0_9device_idE(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 4 dereferenceable(16)) unnamed_addr #4

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #5

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN7hipsycl2rt20omp_hardware_managerC2Ev(ptr noundef nonnull align 8 dereferenceable(16)) unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare hidden void @"_ZN7hipsycl2rt27lazily_constructed_executorINS0_20multi_queue_executorEEC2IZNS0_11omp_backendC1EvE3$_0EEOT_"(ptr noundef nonnull align 8 dereferenceable(88), ptr noundef nonnull align 8 dereferenceable(8)) unnamed_addr #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN7hipsycl2rt7backendD2Ev(ptr noundef nonnull align 8 dereferenceable(8)) unnamed_addr #3 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"vtable pointer", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}
!8 = !{!9, !10, i64 0}
!9 = !{!"_ZTSZN7hipsycl2rt11omp_backendC1EvE3$_0", !10, i64 0}
!10 = !{!"any pointer", !11, i64 0}
!11 = !{!"omnipotent char", !7, i64 0}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass