; LLVM IR from nativeformat/NFSmartPlayer :: source/Limiter.ll (ZN7Limiter5limitEPfS0_i)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.Limiter = type { i32, i32, double, double, double, %"class.std::vector", i16, %"class.std::vector.0", %"class.std::vector.0" }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<std::vector<float>, std::allocator<std::vector<float>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<float>, std::allocator<std::vector<float>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<float>, std::allocator<std::vector<float>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<float>, std::allocator<std::vector<float>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" = type { ptr, ptr, ptr }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN7Limiter5limitEPfS0_i(ptr noundef nonnull align 8 dereferenceable(112) %0, ptr noundef %1, ptr noundef %2, i32 noundef %3) #1 align 2 {
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i16, align 2
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca double, align 8
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  store ptr %2, ptr %7, align 8, !tbaa !5
  store i32 %3, ptr %8, align 4, !tbaa !9
  %15 = load ptr, ptr %5, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  store i32 0, ptr %9, align 4, !tbaa !9
  br label %16

16:                                               ; preds = %138, %4
  %17 = load i32, ptr %9, align 4, !tbaa !9
  %18 = load i32, ptr %8, align 4, !tbaa !9
  %19 = icmp slt i32 %17, %18
  br i1 %19, label %21, label %20

20:                                               ; preds = %16
  store i32 2, ptr %10, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  br label %143

21:                                               ; preds = %16
  call void @llvm.lifetime.start.p0(i64 2, ptr %11) #3
  %22 = getelementptr inbounds %class.Limiter, ptr %15, i32 0, i32 6
  %23 = load i16, ptr %22, align 8, !tbaa !11
  store i16 %23, ptr %11, align 2, !tbaa !23
  %24 = getelementptr inbounds %class.Limiter, ptr %15, i32 0, i32 6
  %25 = load i16, ptr %24, align 8, !tbaa !11
  %26 = zext i16 %25 to i32
  %27 = add nsw i32 %26, 1
  %28 = getelementptr inbounds %class.Limiter, ptr %15, i32 0, i32 1
  %29 = load i32, ptr %28, align 4, !tbaa !24
  %30 = srem i32 %27, %29
  %31 = trunc i32 %30 to i16
  %32 = getelementptr inbounds %class.Limiter, ptr %15, i32 0, i32 6
  store i16 %31, ptr %32, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #3
  store i32 0, ptr %12, align 4, !tbaa !9
  br label %33

33:                                               ; preds = %134, %21
  %34 = load i32, ptr %12, align 4, !tbaa !9
  %35 = getelementptr inbounds %class.Limiter, ptr %15, i32 0, i32 0
  %36 = load i32, ptr %35, align 8, !tbaa !25
  %37 = icmp slt i32 %34, %36
  br i1 %37, label %39, label %38

38:                                               ; preds = %33
  store i32 5, ptr %10, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #3
  br label %137

39:                                               ; preds = %33
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #3
  %40 = load i32, ptr %12, align 4, !tbaa !9
  %41 = load i32, ptr %9, align 4, !tbaa !9
  %42 = add nsw i32 %40, %41
  store i32 %42, ptr %13, align 4, !tbaa !9
  %43 = load ptr, ptr %6, align 8, !tbaa !5
  %44 = load i32, ptr %13, align 4, !tbaa !9
  %45 = sext i32 %44 to i64
  %46 = getelementptr inbounds float, ptr %43, i64 %45
  %47 = load float, ptr %46, align 4, !tbaa !26
  %48 = getelementptr inbounds %class.Limiter, ptr %15, i32 0, i32 5
  %49 = load i32, ptr %12, align 4, !tbaa !9
  %50 = sext i32 %49 to i64
  %51 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IfSaIfEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %48, i64 noundef %50) #3
  %52 = load i16, ptr %11, align 2, !tbaa !23
  %53 = zext i16 %52 to i64
  %54 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %51, i64 noundef %53) #3
  store float %47, ptr %54, align 4, !tbaa !26
  %55 = load ptr, ptr %6, align 8, !tbaa !5
  %56 = load i32, ptr %13, align 4, !tbaa !9
  %57 = sext i32 %56 to i64
  %58 = getelementptr inbounds float, ptr %55, i64 %57
  %59 = load float, ptr %58, align 4, !tbaa !26
  %60 = fpext float %59 to double
  %61 = call double @llvm.fabs.f64(double %60)
  %62 = fptrunc double %61 to float
  %63 = getelementptr inbounds %class.Limiter, ptr %15, i32 0, i32 7
  %64 = load i32, ptr %12, align 4, !tbaa !9
  %65 = sext i32 %64 to i64
  %66 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %63, i64 noundef %65) #3
  %67 = load double, ptr %66, align 8, !tbaa !28
  %68 = getelementptr inbounds %class.Limiter, ptr %15, i32 0, i32 3
  %69 = load double, ptr %68, align 8, !tbaa !29
  %70 = fmul double %67, %69
  %71 = fptrunc double %70 to float
  %72 = call float @llvm.maxnum.f32(float %62, float %71)
  %73 = fpext float %72 to double
  %74 = getelementptr inbounds %class.Limiter, ptr %15, i32 0, i32 7
  %75 = load i32, ptr %12, align 4, !tbaa !9
  %76 = sext i32 %75 to i64
  %77 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %74, i64 noundef %76) #3
  store double %73, ptr %77, align 8, !tbaa !28
  call void @llvm.lifetime.start.p0(i64 8, ptr %14) #3
  store double 1.000000e+00, ptr %14, align 8, !tbaa !28
  %78 = getelementptr inbounds %class.Limiter, ptr %15, i32 0, i32 7
  %79 = load i32, ptr %12, align 4, !tbaa !9
  %80 = sext i32 %79 to i64
  %81 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %78, i64 noundef %80) #3
  %82 = load double, ptr %81, align 8, !tbaa !28
  %83 = getelementptr inbounds %class.Limiter, ptr %15, i32 0, i32 4
  %84 = load double, ptr %83, align 8, !tbaa !30
  %85 = fcmp ogt double %82, %84
  br i1 %85, label %86, label %95

86:                                               ; preds = %39
  %87 = getelementptr inbounds %class.Limiter, ptr %15, i32 0, i32 4
  %88 = load double, ptr %87, align 8, !tbaa !30
  %89 = getelementptr inbounds %class.Limiter, ptr %15, i32 0, i32 7
  %90 = load i32, ptr %12, align 4, !tbaa !9
  %91 = sext i32 %90 to i64
  %92 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %89, i64 noundef %91) #3
  %93 = load double, ptr %92, align 8, !tbaa !28
  %94 = fdiv double %88, %93
  store double %94, ptr %14, align 8, !tbaa !28
  br label %95

95:                                               ; preds = %86, %39
  %96 = getelementptr inbounds %class.Limiter, ptr %15, i32 0, i32 8
  %97 = load i32, ptr %12, align 4, !tbaa !9
  %98 = sext i32 %97 to i64
  %99 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %96, i64 noundef %98) #3
  %100 = load double, ptr %99, align 8, !tbaa !28
  %101 = getelementptr inbounds %class.Limiter, ptr %15, i32 0, i32 2
  %102 = load double, ptr %101, align 8, !tbaa !31
  %103 = load double, ptr %14, align 8, !tbaa !28
  %104 = getelementptr inbounds %class.Limiter, ptr %15, i32 0, i32 2
  %105 = load double, ptr %104, align 8, !tbaa !31
  %106 = fsub double 1.000000e+00, %105
  %107 = fmul double %103, %106
  %108 = call double @llvm.fmuladd.f64(double %100, double %102, double %107)
  %109 = getelementptr inbounds %class.Limiter, ptr %15, i32 0, i32 8
  %110 = load i32, ptr %12, align 4, !tbaa !9
  %111 = sext i32 %110 to i64
  %112 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %109, i64 noundef %111) #3
  store double %108, ptr %112, align 8, !tbaa !28
  %113 = getelementptr inbounds %class.Limiter, ptr %15, i32 0, i32 5
  %114 = load i32, ptr %12, align 4, !tbaa !9
  %115 = sext i32 %114 to i64
  %116 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IfSaIfEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %113, i64 noundef %115) #3
  %117 = getelementptr inbounds %class.Limiter, ptr %15, i32 0, i32 6
  %118 = load i16, ptr %117, align 8, !tbaa !11
  %119 = zext i16 %118 to i64
  %120 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %116, i64 noundef %119) #3
  %121 = load float, ptr %120, align 4, !tbaa !26
  %122 = fpext float %121 to double
  %123 = getelementptr inbounds %class.Limiter, ptr %15, i32 0, i32 8
  %124 = load i32, ptr %12, align 4, !tbaa !9
  %125 = sext i32 %124 to i64
  %126 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %123, i64 noundef %125) #3
  %127 = load double, ptr %126, align 8, !tbaa !28
  %128 = fmul double %122, %127
  %129 = fptrunc double %128 to float
  %130 = load ptr, ptr %7, align 8, !tbaa !5
  %131 = load i32, ptr %13, align 4, !tbaa !9
  %132 = sext i32 %131 to i64
  %133 = getelementptr inbounds float, ptr %130, i64 %132
  store float %129, ptr %133, align 4, !tbaa !26
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #3
  br label %134

134:                                              ; preds = %95
  %135 = load i32, ptr %12, align 4, !tbaa !9
  %136 = add nsw i32 %135, 1
  store i32 %136, ptr %12, align 4, !tbaa !9
  br label %33, !llvm.loop !32

137:                                              ; preds = %38
  call void @llvm.lifetime.end.p0(i64 2, ptr %11) #3
  br label %138

138:                                              ; preds = %137
  %139 = getelementptr inbounds %class.Limiter, ptr %15, i32 0, i32 0
  %140 = load i32, ptr %139, align 8, !tbaa !25
  %141 = load i32, ptr %9, align 4, !tbaa !9
  %142 = add nsw i32 %141, %140
  store i32 %142, ptr %9, align 4, !tbaa !9
  br label %16, !llvm.loop !34

143:                                              ; preds = %20
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IfSaIfEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fabs.f64(double) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.maxnum.f32(float, float) #2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fmuladd.f64(double, double, double) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !18, i64 56}
!12 = !{!"_ZTS7Limiter", !10, i64 0, !10, i64 4, !13, i64 8, !13, i64 16, !13, i64 24, !14, i64 32, !18, i64 56, !19, i64 64, !19, i64 88}
!13 = !{!"double", !7, i64 0}
!14 = !{!"_ZTSSt6vectorIS_IfSaIfEESaIS1_EE", !15, i64 0}
!15 = !{!"_ZTSSt12_Vector_baseISt6vectorIfSaIfEESaIS2_EE", !16, i64 0}
!16 = !{!"_ZTSNSt12_Vector_baseISt6vectorIfSaIfEESaIS2_EE12_Vector_implE", !17, i64 0}
!17 = !{!"_ZTSNSt12_Vector_baseISt6vectorIfSaIfEESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!18 = !{!"short", !7, i64 0}
!19 = !{!"_ZTSSt6vectorIdSaIdEE", !20, i64 0}
!20 = !{!"_ZTSSt12_Vector_baseIdSaIdEE", !21, i64 0}
!21 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE12_Vector_implE", !22, i64 0}
!22 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!23 = !{!18, !18, i64 0}
!24 = !{!12, !10, i64 4}
!25 = !{!12, !10, i64 0}
!26 = !{!27, !27, i64 0}
!27 = !{!"float", !7, i64 0}
!28 = !{!13, !13, i64 0}
!29 = !{!12, !13, i64 16}
!30 = !{!12, !13, i64 24}
!31 = !{!12, !13, i64 8}
!32 = distinct !{!32, !33}
!33 = !{!"llvm.loop.mustprogress"}
!34 = distinct !{!34, !33}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN7Limiter5limitEPfS0_i(ptr noundef nonnull align 8 dereferenceable(112) %0, ptr nocapture noundef readonly %1, ptr nocapture noundef writeonly %2, i32 noundef %3) local_unnamed_addr #0 align 2 {
  %5 = icmp sgt i32 %3, 0
  br i1 %5, label %.lr.ph31, label %._crit_edge32

.lr.ph31:                                         ; preds = %4
  %6 = getelementptr inbounds i8, ptr %0, i64 56
  %7 = getelementptr inbounds i8, ptr %0, i64 4
  %8 = getelementptr inbounds i8, ptr %0, i64 32
  %9 = getelementptr inbounds i8, ptr %0, i64 64
  %10 = getelementptr inbounds i8, ptr %0, i64 16
  %11 = getelementptr inbounds i8, ptr %0, i64 24
  %12 = getelementptr inbounds i8, ptr %0, i64 88
  %13 = getelementptr inbounds i8, ptr %0, i64 8
  %14 = load i32, ptr %0, align 8, !tbaa !5
  %15 = icmp sgt i32 %14, 0
  br i1 %15, label %.lr.ph31.split, label %.lr.ph31.split.us

.lr.ph31.split.us:                                ; preds = %.lr.ph31
  %16 = load i32, ptr %7, align 4, !tbaa !21
  %.promoted = load i16, ptr %6, align 8, !tbaa !22
  %17 = add nsw i32 %3, -1
  %18 = udiv i32 %17, %14
  %19 = icmp ugt i32 %14, %17
  br i1 %19, label %._crit_edge32.split.us.unr-lcssa, label %.lr.ph31.split.us.new

.lr.ph31.split.us.new:                            ; preds = %.lr.ph31.split.us
  %20 = add i32 %18, 1
  %unroll_iter = and i32 %20, -2
  br label %21

21:                                               ; preds = %21, %.lr.ph31.split.us.new
  %22 = phi i16 [ %.promoted, %.lr.ph31.split.us.new ], [ %29, %21 ]
  %niter = phi i32 [ 0, %.lr.ph31.split.us.new ], [ %niter.next.1, %21 ]
  %23 = zext i16 %22 to i32
  %24 = add nuw nsw i32 %23, 1
  %25 = srem i32 %24, %16
  %26 = and i32 %25, 65535
  %27 = add nuw nsw i32 %26, 1
  %28 = srem i32 %27, %16
  %29 = trunc i32 %28 to i16
  %niter.next.1 = add i32 %niter, 2
  %niter.ncmp.1.not = icmp eq i32 %niter.next.1, %unroll_iter
  br i1 %niter.ncmp.1.not, label %._crit_edge32.split.us.unr-lcssa, label %21, !llvm.loop !23

._crit_edge32.split.us.unr-lcssa:                 ; preds = %21, %.lr.ph31.split.us
  %.lcssa39.ph = phi i16 [ poison, %.lr.ph31.split.us ], [ %29, %21 ]
  %.unr = phi i16 [ %.promoted, %.lr.ph31.split.us ], [ %29, %21 ]
  %30 = and i32 %18, 1
  %lcmp.mod.not.not = icmp eq i32 %30, 0
  br i1 %lcmp.mod.not.not, label %._crit_edge32.split.us.epilog-lcssa, label %._crit_edge32.split.us

._crit_edge32.split.us.epilog-lcssa:              ; preds = %._crit_edge32.split.us.unr-lcssa
  %31 = zext i16 %.unr to i32
  %32 = add nuw nsw i32 %31, 1
  %33 = srem i32 %32, %16
  %34 = trunc i32 %33 to i16
  br label %._crit_edge32.split.us

._crit_edge32.split.us:                           ; preds = %._crit_edge32.split.us.unr-lcssa, %._crit_edge32.split.us.epilog-lcssa
  %.lcssa39 = phi i16 [ %.lcssa39.ph, %._crit_edge32.split.us.unr-lcssa ], [ %34, %._crit_edge32.split.us.epilog-lcssa ]
  store i16 %.lcssa39, ptr %6, align 8, !tbaa !22
  br label %._crit_edge32

._crit_edge32:                                    ; preds = %._crit_edge, %._crit_edge32.split.us, %4
  ret void

.lr.ph31.split:                                   ; preds = %.lr.ph31, %._crit_edge
  %35 = phi i32 [ %45, %._crit_edge ], [ %14, %.lr.ph31 ]
  %.02429 = phi i32 [ %46, %._crit_edge ], [ 0, %.lr.ph31 ]
  %36 = load i16, ptr %6, align 8, !tbaa !22
  %37 = zext i16 %36 to i32
  %38 = add nuw nsw i32 %37, 1
  %39 = load i32, ptr %7, align 4, !tbaa !21
  %40 = srem i32 %38, %39
  %41 = trunc i32 %40 to i16
  store i16 %41, ptr %6, align 8, !tbaa !22
  %42 = icmp sgt i32 %35, 0
  br i1 %42, label %.lr.ph, label %._crit_edge

.lr.ph:                                           ; preds = %.lr.ph31.split
  %43 = zext i16 %36 to i64
  %44 = sext i32 %.02429 to i64
  br label %48

._crit_edge:                                      ; preds = %72, %.lr.ph31.split
  %45 = phi i32 [ %35, %.lr.ph31.split ], [ %91, %72 ]
  %46 = add nsw i32 %45, %.02429
  %47 = icmp slt i32 %46, %3
  br i1 %47, label %.lr.ph31.split, label %._crit_edge32, !llvm.loop !25

48:                                               ; preds = %.lr.ph, %72
  %indvars.iv = phi i64 [ 0, %.lr.ph ], [ %indvars.iv.next, %72 ]
  %49 = add nsw i64 %indvars.iv, %44
  %50 = getelementptr inbounds float, ptr %1, i64 %49
  %51 = load float, ptr %50, align 4, !tbaa !27
  %52 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IfSaIfEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %8, i64 noundef %indvars.iv) #3
  %53 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %52, i64 noundef %43) #3
  store float %51, ptr %53, align 4, !tbaa !27
  %54 = load float, ptr %50, align 4, !tbaa !27
  %55 = tail call float @llvm.fabs.f32(float %54)
  %56 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %9, i64 noundef %indvars.iv) #3
  %57 = load double, ptr %56, align 8, !tbaa !29
  %58 = load double, ptr %10, align 8, !tbaa !30
  %59 = fmul double %57, %58
  %60 = fptrunc double %59 to float
  %61 = tail call float @llvm.maxnum.f32(float %55, float %60)
  %62 = fpext float %61 to double
  %63 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %9, i64 noundef %indvars.iv) #3
  store double %62, ptr %63, align 8, !tbaa !29
  %64 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %9, i64 noundef %indvars.iv) #3
  %65 = load double, ptr %64, align 8, !tbaa !29
  %66 = load double, ptr %11, align 8, !tbaa !31
  %67 = fcmp ogt double %65, %66
  br i1 %67, label %68, label %72

68:                                               ; preds = %48
  %69 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %9, i64 noundef %indvars.iv) #3
  %70 = load double, ptr %69, align 8, !tbaa !29
  %71 = fdiv double %66, %70
  br label %72

72:                                               ; preds = %68, %48
  %.0 = phi double [ %71, %68 ], [ 1.000000e+00, %48 ]
  %73 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %12, i64 noundef %indvars.iv) #3
  %74 = load double, ptr %73, align 8, !tbaa !29
  %75 = load double, ptr %13, align 8, !tbaa !32
  %76 = fsub double 1.000000e+00, %75
  %77 = fmul double %.0, %76
  %78 = tail call double @llvm.fmuladd.f64(double %74, double %75, double %77)
  %79 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %12, i64 noundef %indvars.iv) #3
  store double %78, ptr %79, align 8, !tbaa !29
  %80 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IfSaIfEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %8, i64 noundef %indvars.iv) #3
  %81 = load i16, ptr %6, align 8, !tbaa !22
  %82 = zext i16 %81 to i64
  %83 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %80, i64 noundef %82) #3
  %84 = load float, ptr %83, align 4, !tbaa !27
  %85 = fpext float %84 to double
  %86 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %12, i64 noundef %indvars.iv) #3
  %87 = load double, ptr %86, align 8, !tbaa !29
  %88 = fmul double %87, %85
  %89 = fptrunc double %88 to float
  %90 = getelementptr inbounds float, ptr %2, i64 %49
  store float %89, ptr %90, align 4, !tbaa !27
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %91 = load i32, ptr %0, align 8, !tbaa !5
  %92 = sext i32 %91 to i64
  %93 = icmp slt i64 %indvars.iv.next, %92
  br i1 %93, label %48, label %._crit_edge, !llvm.loop !33
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IfSaIfEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.maxnum.f32(float, float) #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fmuladd.f64(double, double, double) #1

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fabs.f32(float) #2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"_ZTS7Limiter", !7, i64 0, !7, i64 4, !10, i64 8, !10, i64 16, !10, i64 24, !11, i64 32, !16, i64 56, !17, i64 64, !17, i64 88}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"double", !8, i64 0}
!11 = !{!"_ZTSSt6vectorIS_IfSaIfEESaIS1_EE", !12, i64 0}
!12 = !{!"_ZTSSt12_Vector_baseISt6vectorIfSaIfEESaIS2_EE", !13, i64 0}
!13 = !{!"_ZTSNSt12_Vector_baseISt6vectorIfSaIfEESaIS2_EE12_Vector_implE", !14, i64 0}
!14 = !{!"_ZTSNSt12_Vector_baseISt6vectorIfSaIfEESaIS2_EE17_Vector_impl_dataE", !15, i64 0, !15, i64 8, !15, i64 16}
!15 = !{!"any pointer", !8, i64 0}
!16 = !{!"short", !8, i64 0}
!17 = !{!"_ZTSSt6vectorIdSaIdEE", !18, i64 0}
!18 = !{!"_ZTSSt12_Vector_baseIdSaIdEE", !19, i64 0}
!19 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE12_Vector_implE", !20, i64 0}
!20 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE17_Vector_impl_dataE", !15, i64 0, !15, i64 8, !15, i64 16}
!21 = !{!6, !7, i64 4}
!22 = !{!6, !16, i64 56}
!23 = distinct !{!23, !24}
!24 = !{!"llvm.loop.mustprogress"}
!25 = distinct !{!25, !24, !26}
!26 = !{!"llvm.loop.unswitch.partial.disable"}
!27 = !{!28, !28, i64 0}
!28 = !{!"float", !8, i64 0}
!29 = !{!10, !10, i64 0}
!30 = !{!6, !10, i64 16}
!31 = !{!6, !10, i64 24}
!32 = !{!6, !10, i64 8}
!33 = distinct !{!33, !24}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimpleLoopUnswitchPass,SimplifyCFGPass,TailCallElimPass