; LLVM IR from microsoft/X-Mem :: src/PowerReader.ll (ZN4xmem11PowerReader16calculateMetricsEv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.xmem::PowerReader" = type <{ %"class.xmem::Runnable", i8, [7 x i8], double, %"class.std::__cxx11::basic_string", i32, [4 x i8], %"class.std::vector", double, double, i64, i32, [4 x i8] }>
%"class.xmem::Runnable" = type { ptr, %union.pthread_mutex_t }
%union.pthread_mutex_t = type { %struct.__pthread_mutex_s }
%struct.__pthread_mutex_s = type { i32, i32, i32, i32, i32, i16, i16, %struct.__pthread_internal_list }
%struct.__pthread_internal_list = type { ptr, ptr }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" = type { ptr, ptr, ptr }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare noundef zeroext i1 @_ZN4xmem8Runnable11acquireLockEi(ptr noundef nonnull align 8 dereferenceable(48), i32 noundef) #1

declare noundef zeroext i1 @_ZN4xmem8Runnable11releaseLockEv(ptr noundef nonnull align 8 dereferenceable(48)) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZN4xmem11PowerReader16calculateMetricsEv(ptr noundef nonnull align 8 dereferenceable(156) %0) #2 align 2 {
  %2 = alloca i1, align 1
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  %5 = load ptr, ptr %3, align 8
  %6 = call noundef zeroext i1 @_ZN4xmem8Runnable11acquireLockEi(ptr noundef nonnull align 8 dereferenceable(48) %5, i32 noundef -1)
  br i1 %6, label %7, label %61

7:                                                ; preds = %1
  %8 = getelementptr inbounds %"class.xmem::PowerReader", ptr %5, i32 0, i32 8
  store double 0.000000e+00, ptr %8, align 8, !tbaa !9
  %9 = getelementptr inbounds %"class.xmem::PowerReader", ptr %5, i32 0, i32 9
  store double 0.000000e+00, ptr %9, align 8, !tbaa !22
  %10 = getelementptr inbounds %"class.xmem::PowerReader", ptr %5, i32 0, i32 7
  %11 = call noundef i64 @_ZNKSt6vectorIdSaIdEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %10) #4
  %12 = getelementptr inbounds %"class.xmem::PowerReader", ptr %5, i32 0, i32 10
  store i64 %11, ptr %12, align 8, !tbaa !23
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #4
  store i32 0, ptr %4, align 4, !tbaa !24
  br label %13

13:                                               ; preds = %45, %7
  %14 = load i32, ptr %4, align 4, !tbaa !24
  %15 = zext i32 %14 to i64
  %16 = getelementptr inbounds %"class.xmem::PowerReader", ptr %5, i32 0, i32 10
  %17 = load i64, ptr %16, align 8, !tbaa !23
  %18 = icmp ult i64 %15, %17
  br i1 %18, label %20, label %19

19:                                               ; preds = %13
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #4
  br label %48

20:                                               ; preds = %13
  %21 = getelementptr inbounds %"class.xmem::PowerReader", ptr %5, i32 0, i32 7
  %22 = load i32, ptr %4, align 4, !tbaa !24
  %23 = zext i32 %22 to i64
  %24 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %21, i64 noundef %23) #4
  %25 = load double, ptr %24, align 8, !tbaa !25
  %26 = getelementptr inbounds %"class.xmem::PowerReader", ptr %5, i32 0, i32 8
  %27 = load double, ptr %26, align 8, !tbaa !9
  %28 = fadd double %27, %25
  store double %28, ptr %26, align 8, !tbaa !9
  %29 = getelementptr inbounds %"class.xmem::PowerReader", ptr %5, i32 0, i32 7
  %30 = load i32, ptr %4, align 4, !tbaa !24
  %31 = zext i32 %30 to i64
  %32 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %29, i64 noundef %31) #4
  %33 = load double, ptr %32, align 8, !tbaa !25
  %34 = getelementptr inbounds %"class.xmem::PowerReader", ptr %5, i32 0, i32 9
  %35 = load double, ptr %34, align 8, !tbaa !22
  %36 = fcmp ogt double %33, %35
  br i1 %36, label %37, label %44

37:                                               ; preds = %20
  %38 = getelementptr inbounds %"class.xmem::PowerReader", ptr %5, i32 0, i32 7
  %39 = load i32, ptr %4, align 4, !tbaa !24
  %40 = zext i32 %39 to i64
  %41 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %38, i64 noundef %40) #4
  %42 = load double, ptr %41, align 8, !tbaa !25
  %43 = getelementptr inbounds %"class.xmem::PowerReader", ptr %5, i32 0, i32 9
  store double %42, ptr %43, align 8, !tbaa !22
  br label %44

44:                                               ; preds = %37, %20
  br label %45

45:                                               ; preds = %44
  %46 = load i32, ptr %4, align 4, !tbaa !24
  %47 = add i32 %46, 1
  store i32 %47, ptr %4, align 4, !tbaa !24
  br label %13, !llvm.loop !26

48:                                               ; preds = %19
  %49 = getelementptr inbounds %"class.xmem::PowerReader", ptr %5, i32 0, i32 10
  %50 = load i64, ptr %49, align 8, !tbaa !23
  %51 = icmp ugt i64 %50, 0
  br i1 %51, label %52, label %59

52:                                               ; preds = %48
  %53 = getelementptr inbounds %"class.xmem::PowerReader", ptr %5, i32 0, i32 10
  %54 = load i64, ptr %53, align 8, !tbaa !23
  %55 = uitofp i64 %54 to double
  %56 = getelementptr inbounds %"class.xmem::PowerReader", ptr %5, i32 0, i32 8
  %57 = load double, ptr %56, align 8, !tbaa !9
  %58 = fdiv double %57, %55
  store double %58, ptr %56, align 8, !tbaa !9
  br label %59

59:                                               ; preds = %52, %48
  %60 = call noundef zeroext i1 @_ZN4xmem8Runnable11releaseLockEv(ptr noundef nonnull align 8 dereferenceable(48) %5)
  store i1 %60, ptr %2, align 1
  br label %62

61:                                               ; preds = %1
  store i1 false, ptr %2, align 1
  br label %62

62:                                               ; preds = %61, %59
  %63 = load i1, ptr %2, align 1
  ret i1 %63
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIdSaIdEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #3 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !13, i64 128}
!10 = !{!"_ZTSN4xmem11PowerReaderE", !11, i64 0, !12, i64 48, !13, i64 56, !14, i64 64, !17, i64 96, !18, i64 104, !13, i64 128, !13, i64 136, !16, i64 144, !17, i64 152}
!11 = !{!"_ZTSN4xmem8RunnableE", !7, i64 8}
!12 = !{!"bool", !7, i64 0}
!13 = !{!"double", !7, i64 0}
!14 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !15, i64 0, !16, i64 8, !7, i64 16}
!15 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!16 = !{!"long", !7, i64 0}
!17 = !{!"int", !7, i64 0}
!18 = !{!"_ZTSSt6vectorIdSaIdEE", !19, i64 0}
!19 = !{!"_ZTSSt12_Vector_baseIdSaIdEE", !20, i64 0}
!20 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE12_Vector_implE", !21, i64 0}
!21 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!22 = !{!10, !13, i64 136}
!23 = !{!10, !16, i64 144}
!24 = !{!17, !17, i64 0}
!25 = !{!13, !13, i64 0}
!26 = distinct !{!26, !27}
!27 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

declare noundef zeroext i1 @_ZN4xmem8Runnable11acquireLockEi(ptr noundef nonnull align 8 dereferenceable(48), i32 noundef) local_unnamed_addr #0

declare noundef zeroext i1 @_ZN4xmem8Runnable11releaseLockEv(ptr noundef nonnull align 8 dereferenceable(48)) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZN4xmem11PowerReader16calculateMetricsEv(ptr noundef nonnull align 8 dereferenceable(156) %0) local_unnamed_addr #1 align 2 {
  %2 = tail call noundef zeroext i1 @_ZN4xmem8Runnable11acquireLockEi(ptr noundef nonnull align 8 dereferenceable(48) %0, i32 noundef -1)
  br i1 %2, label %3, label %30

3:                                                ; preds = %1
  %4 = getelementptr inbounds i8, ptr %0, i64 128
  %5 = getelementptr inbounds i8, ptr %0, i64 136
  %6 = getelementptr inbounds i8, ptr %0, i64 104
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %4, i8 0, i64 16, i1 false)
  %7 = tail call noundef i64 @_ZNKSt6vectorIdSaIdEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %6) #4
  %8 = getelementptr inbounds i8, ptr %0, i64 144
  store i64 %7, ptr %8, align 8, !tbaa !5
  %.not10 = icmp eq i64 %7, 0
  br i1 %.not10, label %._crit_edge.thread, label %.lr.ph

._crit_edge:                                      ; preds = %21
  %.not = icmp eq i64 %.pr, 0
  br i1 %.not, label %._crit_edge.thread, label %25

.lr.ph:                                           ; preds = %3, %21
  %9 = phi i64 [ %23, %21 ], [ 0, %3 ]
  %.09 = phi i32 [ %22, %21 ], [ 0, %3 ]
  %10 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %6, i64 noundef %9) #4
  %11 = load double, ptr %10, align 8, !tbaa !21
  %12 = load double, ptr %4, align 8, !tbaa !22
  %13 = fadd double %11, %12
  store double %13, ptr %4, align 8, !tbaa !22
  %14 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %6, i64 noundef %9) #4
  %15 = load double, ptr %14, align 8, !tbaa !21
  %16 = load double, ptr %5, align 8, !tbaa !23
  %17 = fcmp ogt double %15, %16
  br i1 %17, label %18, label %21

18:                                               ; preds = %.lr.ph
  %19 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %6, i64 noundef %9) #4
  %20 = load double, ptr %19, align 8, !tbaa !21
  store double %20, ptr %5, align 8, !tbaa !23
  br label %21

21:                                               ; preds = %.lr.ph, %18
  %22 = add i32 %.09, 1
  %.pr = load i64, ptr %8, align 8, !tbaa !5
  %23 = zext i32 %22 to i64
  %24 = icmp ugt i64 %.pr, %23
  br i1 %24, label %.lr.ph, label %._crit_edge, !llvm.loop !24

25:                                               ; preds = %._crit_edge
  %26 = uitofp nneg i64 %.pr to double
  %27 = load double, ptr %4, align 8, !tbaa !22
  %28 = fdiv double %27, %26
  store double %28, ptr %4, align 8, !tbaa !22
  br label %._crit_edge.thread

._crit_edge.thread:                               ; preds = %3, %25, %._crit_edge
  %29 = tail call noundef zeroext i1 @_ZN4xmem8Runnable11releaseLockEv(ptr noundef nonnull align 8 dereferenceable(48) %0)
  br label %30

30:                                               ; preds = %1, %._crit_edge.thread
  %.06 = phi i1 [ %29, %._crit_edge.thread ], [ false, %1 ]
  ret i1 %.06
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIdSaIdEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #2 align 2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #3

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !15, i64 144}
!6 = !{!"_ZTSN4xmem11PowerReaderE", !7, i64 0, !10, i64 48, !11, i64 56, !12, i64 64, !16, i64 96, !17, i64 104, !11, i64 128, !11, i64 136, !15, i64 144, !16, i64 152}
!7 = !{!"_ZTSN4xmem8RunnableE", !8, i64 8}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"bool", !8, i64 0}
!11 = !{!"double", !8, i64 0}
!12 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !13, i64 0, !15, i64 8, !8, i64 16}
!13 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !14, i64 0}
!14 = !{!"any pointer", !8, i64 0}
!15 = !{!"long", !8, i64 0}
!16 = !{!"int", !8, i64 0}
!17 = !{!"_ZTSSt6vectorIdSaIdEE", !18, i64 0}
!18 = !{!"_ZTSSt12_Vector_baseIdSaIdEE", !19, i64 0}
!19 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE12_Vector_implE", !20, i64 0}
!20 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE17_Vector_impl_dataE", !14, i64 0, !14, i64 8, !14, i64 16}
!21 = !{!11, !11, i64 0}
!22 = !{!6, !11, i64 128}
!23 = !{!6, !11, i64 136}
!24 = distinct !{!24, !25}
!25 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,MemCpyOptPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass