; LLVM IR from sslab-gatech/janus :: lkl/arch/h8300/lib/ashrdi3.ll_ (ashrdi3)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%union.DWunion = type { i64 }
%struct.DWstruct = type { i32, i32 }

; Function Attrs: nounwind uwtable
define dso_local i64 @__ashrdi3(i64 noundef %0, i64 noundef %1) #0 {
  %3 = alloca i64, align 8
  %4 = alloca i64, align 8
  %5 = alloca i64, align 8
  %6 = alloca %union.DWunion, align 8
  %7 = alloca i64, align 8
  %8 = alloca %union.DWunion, align 8
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  store i64 %0, ptr %4, align 8, !tbaa !5
  store i64 %1, ptr %5, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #2
  %11 = load i64, ptr %4, align 8, !tbaa !5
  store i64 %11, ptr %6, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #2
  %12 = load i64, ptr %5, align 8, !tbaa !5
  %13 = sub i64 32, %12
  store i64 %13, ptr %7, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #2
  %14 = load i64, ptr %5, align 8, !tbaa !5
  %15 = icmp eq i64 %14, 0
  br i1 %15, label %16, label %18

16:                                               ; preds = %2
  %17 = load i64, ptr %4, align 8, !tbaa !5
  store i64 %17, ptr %3, align 8
  store i32 1, ptr %9, align 4
  br label %55

18:                                               ; preds = %2
  %19 = load i64, ptr %7, align 8, !tbaa !5
  %20 = icmp sle i64 %19, 0
  br i1 %20, label %21, label %33

21:                                               ; preds = %18
  %22 = getelementptr inbounds %struct.DWstruct, ptr %6, i32 0, i32 0
  %23 = load i32, ptr %22, align 8, !tbaa !9
  %24 = ashr i32 %23, 31
  %25 = getelementptr inbounds %struct.DWstruct, ptr %8, i32 0, i32 0
  store i32 %24, ptr %25, align 8, !tbaa !9
  %26 = getelementptr inbounds %struct.DWstruct, ptr %6, i32 0, i32 0
  %27 = load i32, ptr %26, align 8, !tbaa !9
  %28 = load i64, ptr %7, align 8, !tbaa !5
  %29 = sub nsw i64 0, %28
  %30 = trunc i64 %29 to i32
  %31 = ashr i32 %27, %30
  %32 = getelementptr inbounds %struct.DWstruct, ptr %8, i32 0, i32 1
  store i32 %31, ptr %32, align 4, !tbaa !9
  br label %53

33:                                               ; preds = %18
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #2
  %34 = getelementptr inbounds %struct.DWstruct, ptr %6, i32 0, i32 0
  %35 = load i32, ptr %34, align 8, !tbaa !9
  %36 = load i64, ptr %7, align 8, !tbaa !5
  %37 = trunc i64 %36 to i32
  %38 = shl i32 %35, %37
  store i32 %38, ptr %10, align 4, !tbaa !10
  %39 = getelementptr inbounds %struct.DWstruct, ptr %6, i32 0, i32 0
  %40 = load i32, ptr %39, align 8, !tbaa !9
  %41 = load i64, ptr %5, align 8, !tbaa !5
  %42 = trunc i64 %41 to i32
  %43 = ashr i32 %40, %42
  %44 = getelementptr inbounds %struct.DWstruct, ptr %8, i32 0, i32 0
  store i32 %43, ptr %44, align 8, !tbaa !9
  %45 = getelementptr inbounds %struct.DWstruct, ptr %6, i32 0, i32 1
  %46 = load i32, ptr %45, align 4, !tbaa !9
  %47 = load i64, ptr %5, align 8, !tbaa !5
  %48 = trunc i64 %47 to i32
  %49 = lshr i32 %46, %48
  %50 = load i32, ptr %10, align 4, !tbaa !10
  %51 = or i32 %49, %50
  %52 = getelementptr inbounds %struct.DWstruct, ptr %8, i32 0, i32 1
  store i32 %51, ptr %52, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #2
  br label %53

53:                                               ; preds = %33, %21
  %54 = load i64, ptr %8, align 8, !tbaa !9
  store i64 %54, ptr %3, align 8
  store i32 1, ptr %9, align 4
  br label %55

55:                                               ; preds = %53, %16
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #2
  %56 = load i64, ptr %3, align 8
  ret i64 %56
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define dso_local i64 @__ashrdi3(i64 noundef %0, i64 noundef %1) local_unnamed_addr #0 {
  %.sroa.04.0.extract.trunc = trunc i64 %0 to i32
  %.sroa.7.0.extract.shift = lshr i64 %0, 32
  %.sroa.7.0.extract.trunc = trunc nuw i64 %.sroa.7.0.extract.shift to i32
  %3 = sub i64 32, %1
  %4 = icmp eq i64 %1, 0
  br i1 %4, label %20, label %5

5:                                                ; preds = %2
  %6 = icmp slt i64 %3, 1
  br i1 %6, label %7, label %12

7:                                                ; preds = %5
  %8 = ashr i32 %.sroa.04.0.extract.trunc, 31
  %9 = trunc i64 %1 to i32
  %10 = add i32 %9, -32
  %11 = ashr i32 %.sroa.04.0.extract.trunc, %10
  br label %19

12:                                               ; preds = %5
  %13 = trunc i64 %3 to i32
  %14 = shl i32 %.sroa.04.0.extract.trunc, %13
  %15 = trunc i64 %1 to i32
  %16 = ashr i32 %.sroa.04.0.extract.trunc, %15
  %17 = lshr i32 %.sroa.7.0.extract.trunc, %15
  %18 = or i32 %14, %17
  br label %19

19:                                               ; preds = %12, %7
  %.sroa.5.0 = phi i32 [ %11, %7 ], [ %18, %12 ]
  %.sroa.0.0 = phi i32 [ %8, %7 ], [ %16, %12 ]
  %.sroa.5.0.insert.ext = zext i32 %.sroa.5.0 to i64
  %.sroa.5.0.insert.shift = shl nuw i64 %.sroa.5.0.insert.ext, 32
  %.sroa.0.0.insert.ext = zext i32 %.sroa.0.0 to i64
  %.sroa.0.0.insert.insert = or disjoint i64 %.sroa.5.0.insert.shift, %.sroa.0.0.insert.ext
  br label %20

20:                                               ; preds = %2, %19
  %.0 = phi i64 [ %.sroa.0.0.insert.insert, %19 ], [ %0, %2 ]
  ret i64 %.0
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass