; LLVM IR from int32bit/leetcode :: algorithms/BitwiseANDofNumbersRange (solve)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local i32 @rangeBitwiseAnd(i32 noundef %0, i32 noundef %1) #0 {
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  store i32 %0, ptr %4, align 4, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !5
  %12 = load i32, ptr %4, align 4, !tbaa !5
  %13 = load i32, ptr %5, align 4, !tbaa !5
  %14 = icmp eq i32 %12, %13
  br i1 %14, label %15, label %17

15:                                               ; preds = %2
  %16 = load i32, ptr %4, align 4, !tbaa !5
  store i32 %16, ptr %3, align 4
  br label %60

17:                                               ; preds = %2
  %18 = load i32, ptr %4, align 4, !tbaa !5
  %19 = icmp eq i32 %18, 0
  br i1 %19, label %20, label %21

20:                                               ; preds = %17
  store i32 0, ptr %3, align 4
  br label %60

21:                                               ; preds = %17
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #2
  store i32 1, ptr %6, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #2
  %22 = load i32, ptr %5, align 4, !tbaa !5
  store i32 %22, ptr %7, align 4, !tbaa !5
  br label %23

23:                                               ; preds = %27, %21
  %24 = load i32, ptr %7, align 4, !tbaa !5
  %25 = ashr i32 %24, 1
  %26 = icmp ne i32 %25, 0
  br i1 %26, label %27, label %32

27:                                               ; preds = %23
  %28 = load i32, ptr %6, align 4, !tbaa !5
  %29 = shl i32 %28, 1
  store i32 %29, ptr %6, align 4, !tbaa !5
  %30 = load i32, ptr %7, align 4, !tbaa !5
  %31 = ashr i32 %30, 1
  store i32 %31, ptr %7, align 4, !tbaa !5
  br label %23, !llvm.loop !9

32:                                               ; preds = %23
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #2
  store i32 0, ptr %8, align 4, !tbaa !5
  br label %33

33:                                               ; preds = %56, %32
  %34 = load i32, ptr %6, align 4, !tbaa !5
  %35 = icmp ne i32 %34, 0
  br i1 %35, label %36, label %57

36:                                               ; preds = %33
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #2
  %37 = load i32, ptr %6, align 4, !tbaa !5
  %38 = load i32, ptr %4, align 4, !tbaa !5
  %39 = and i32 %37, %38
  store i32 %39, ptr %9, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #2
  %40 = load i32, ptr %6, align 4, !tbaa !5
  %41 = load i32, ptr %5, align 4, !tbaa !5
  %42 = and i32 %40, %41
  store i32 %42, ptr %10, align 4, !tbaa !5
  %43 = load i32, ptr %9, align 4, !tbaa !5
  %44 = load i32, ptr %10, align 4, !tbaa !5
  %45 = icmp ne i32 %43, %44
  br i1 %45, label %46, label %48

46:                                               ; preds = %36
  %47 = load i32, ptr %8, align 4, !tbaa !5
  store i32 %47, ptr %3, align 4
  store i32 1, ptr %11, align 4
  br label %54

48:                                               ; preds = %36
  %49 = load i32, ptr %9, align 4, !tbaa !5
  %50 = load i32, ptr %8, align 4, !tbaa !5
  %51 = or i32 %50, %49
  store i32 %51, ptr %8, align 4, !tbaa !5
  %52 = load i32, ptr %6, align 4, !tbaa !5
  %53 = ashr i32 %52, 1
  store i32 %53, ptr %6, align 4, !tbaa !5
  store i32 0, ptr %11, align 4
  br label %54

54:                                               ; preds = %48, %46
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #2
  %55 = load i32, ptr %11, align 4
  switch i32 %55, label %59 [
    i32 0, label %56
  ]

56:                                               ; preds = %54
  br label %33, !llvm.loop !11

57:                                               ; preds = %33
  %58 = load i32, ptr %8, align 4, !tbaa !5
  store i32 %58, ptr %3, align 4
  store i32 1, ptr %11, align 4
  br label %59

59:                                               ; preds = %57, %54
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #2
  br label %60

60:                                               ; preds = %59, %20, %15
  %61 = load i32, ptr %3, align 4
  ret i32 %61
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nofree norecurse nosync nounwind memory(none) uwtable
define dso_local i32 @rangeBitwiseAnd(i32 noundef %0, i32 noundef %1) local_unnamed_addr #0 {
  %3 = icmp eq i32 %0, %1
  br i1 %3, label %.loopexit, label %4

4:                                                ; preds = %2
  %5 = icmp eq i32 %0, 0
  br i1 %5, label %.loopexit, label %.preheader36

.preheader36:                                     ; preds = %4
  %.not37 = icmp ult i32 %1, 2
  br i1 %.not37, label %.preheader.preheader, label %.lr.ph

.lr.ph:                                           ; preds = %.preheader36, %.lr.ph
  %.02339 = phi i32 [ %7, %.lr.ph ], [ 1, %.preheader36 ]
  %.02838 = phi i32 [ %6, %.lr.ph ], [ %1, %.preheader36 ]
  %6 = ashr i32 %.02838, 1
  %7 = shl i32 %.02339, 1
  %.not = icmp ult i32 %6, 2
  br i1 %.not, label %.preheader.preheader, label %.lr.ph, !llvm.loop !5

.preheader.preheader:                             ; preds = %.lr.ph, %.preheader36
  %.124.ph = phi i32 [ 1, %.preheader36 ], [ %7, %.lr.ph ]
  br label %.preheader

.preheader:                                       ; preds = %.preheader.preheader, %8
  %.026 = phi i32 [ %11, %8 ], [ 0, %.preheader.preheader ]
  %.124 = phi i32 [ %12, %8 ], [ %.124.ph, %.preheader.preheader ]
  %.not34 = icmp eq i32 %.124, 0
  br i1 %.not34, label %.loopexit, label %8

8:                                                ; preds = %.preheader
  %9 = and i32 %.124, %0
  %10 = and i32 %.124, %1
  %.not35 = icmp eq i32 %9, %10
  %11 = or i32 %9, %.026
  %12 = ashr i32 %.124, 1
  br i1 %.not35, label %.preheader, label %.loopexit, !llvm.loop !7

.loopexit:                                        ; preds = %8, %.preheader, %4, %2
  %.3 = phi i32 [ %0, %2 ], [ 0, %4 ], [ %.026, %.preheader ], [ %.026, %8 ]
  ret i32 %.3
}

attributes #0 = { nofree norecurse nosync nounwind memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = distinct !{!7, !6}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass