; LLVM IR from AdaptiveCpp/AdaptiveCpp :: src/runtime/pcuda/pcuda_stream.ll (ZN7hipsycl2rt5pcuda6stream8wait_allENS0_9device_idE)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<hipsycl::rt::pcuda::stream *, std::allocator<hipsycl::rt::pcuda::stream *>>::_Vector_impl" }
%"struct.std::_Vector_base<hipsycl::rt::pcuda::stream *, std::allocator<hipsycl::rt::pcuda::stream *>>::_Vector_impl" = type { %"struct.std::_Vector_base<hipsycl::rt::pcuda::stream *, std::allocator<hipsycl::rt::pcuda::stream *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<hipsycl::rt::pcuda::stream *, std::allocator<hipsycl::rt::pcuda::stream *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%union.pthread_mutex_t = type { %struct.__pthread_mutex_s }
%struct.__pthread_mutex_s = type { i32, i32, i32, i32, i32, i16, i16, %struct.__pthread_internal_list }
%struct.__pthread_internal_list = type { ptr, ptr }
%"class.hipsycl::rt::device_id" = type { %"struct.hipsycl::rt::backend_descriptor", i32 }
%"struct.hipsycl::rt::backend_descriptor" = type { i32, i32, i32 }
%"class.std::vector.66" = type { %"struct.std::_Vector_base.67" }
%"struct.std::_Vector_base.67" = type { %"struct.std::_Vector_base<hipsycl::rt::pcuda::stream, std::allocator<hipsycl::rt::pcuda::stream>>::_Vector_impl" }
%"struct.std::_Vector_base<hipsycl::rt::pcuda::stream, std::allocator<hipsycl::rt::pcuda::stream>>::_Vector_impl" = type { %"struct.std::_Vector_base<hipsycl::rt::pcuda::stream, std::allocator<hipsycl::rt::pcuda::stream>>::_Vector_impl_data" }
%"struct.std::_Vector_base<hipsycl::rt::pcuda::stream, std::allocator<hipsycl::rt::pcuda::stream>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::lock_guard" = type { ptr }
%"class.__gnu_cxx::__normal_iterator.71" = type { ptr }
%"class.hipsycl::rt::result" = type { %"class.std::unique_ptr.72" }
%"class.std::unique_ptr.72" = type { %"struct.std::__uniq_ptr_data.73" }
%"struct.std::__uniq_ptr_data.73" = type { %"class.std::__uniq_ptr_impl.74" }
%"class.std::__uniq_ptr_impl.74" = type { %"class.std::tuple.75" }
%"class.std::tuple.75" = type { %"struct.std::_Tuple_impl.76" }
%"struct.std::_Tuple_impl.76" = type { %"struct.std::_Head_base.79" }
%"struct.std::_Head_base.79" = type { ptr }

@_ZN7hipsycl2rt5pcuda12_GLOBAL__N_115stream_registryE = external hidden global %"class.std::vector", align 8
@_ZN7hipsycl2rt5pcuda12_GLOBAL__N_120stream_registry_lockE = external hidden global { %union.pthread_mutex_t }, align 8

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare i32 @__gxx_personality_v0(...)

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt10lock_guardISt5mutexEC2ERS0_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(40)) unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt10lock_guardISt5mutexED2Ev(ptr noundef nonnull align 8 dereferenceable(8)) unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIPN7hipsycl2rt5pcuda6streamESaIS4_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN7hipsycl2rt5pcuda6streamESaIS4_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef ptr @_ZNK7hipsycl2rt5pcuda6stream9get_queueEv(ptr noundef nonnull align 8 dereferenceable(16)) #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_ZN7hipsycl2rt5pcuda6stream8wait_allENS0_9device_idE(i64 %0, i64 %1) #1 align 2 personality ptr @__gxx_personality_v0 {
  %3 = alloca %"class.hipsycl::rt::device_id", align 4
  %4 = alloca %"class.std::vector.66", align 8
  %5 = alloca %"class.std::lock_guard", align 8
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca %"class.hipsycl::rt::device_id", align 4
  %10 = alloca ptr, align 8
  %11 = alloca %"class.__gnu_cxx::__normal_iterator.71", align 8
  %12 = alloca %"class.__gnu_cxx::__normal_iterator.71", align 8
  %13 = alloca ptr, align 8
  %14 = alloca %"class.hipsycl::rt::result", align 8
  %15 = getelementptr inbounds { i64, i64 }, ptr %3, i32 0, i32 0
  store i64 %0, ptr %15, align 4
  %16 = getelementptr inbounds { i64, i64 }, ptr %3, i32 0, i32 1
  store i64 %1, ptr %16, align 4
  call void @llvm.lifetime.start.p0(i64 24, ptr %4) #4
  call void @_ZNSt6vectorIN7hipsycl2rt5pcuda6streamESaIS3_EEC2Ev(ptr noundef nonnull align 8 dereferenceable(24) %4) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #4
  invoke void @_ZNSt10lock_guardISt5mutexEC2ERS0_(ptr noundef nonnull align 8 dereferenceable(8) %5, ptr noundef nonnull align 8 dereferenceable(40) @_ZN7hipsycl2rt5pcuda12_GLOBAL__N_120stream_registry_lockE)
          to label %17 unwind label %24

17:                                               ; preds = %2
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #4
  store i32 0, ptr %8, align 4, !tbaa !5
  br label %18

18:                                               ; preds = %61, %17
  %19 = load i32, ptr %8, align 4, !tbaa !5
  %20 = sext i32 %19 to i64
  %21 = call noundef i64 @_ZNKSt6vectorIPN7hipsycl2rt5pcuda6streamESaIS4_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) @_ZN7hipsycl2rt5pcuda12_GLOBAL__N_115stream_registryE) #4
  %22 = icmp ult i64 %20, %21
  br i1 %22, label %28, label %23

23:                                               ; preds = %18
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #4
  br label %65

24:                                               ; preds = %2
  %25 = landingpad { ptr, i32 }
          cleanup
  %26 = extractvalue { ptr, i32 } %25, 0
  store ptr %26, ptr %6, align 8
  %27 = extractvalue { ptr, i32 } %25, 1
  store i32 %27, ptr %7, align 4
  br label %75

28:                                               ; preds = %18
  call void @llvm.lifetime.start.p0(i64 16, ptr %9) #4
  %29 = load i32, ptr %8, align 4, !tbaa !5
  %30 = sext i32 %29 to i64
  %31 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN7hipsycl2rt5pcuda6streamESaIS4_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @_ZN7hipsycl2rt5pcuda12_GLOBAL__N_115stream_registryE, i64 noundef %30) #4
  %32 = load ptr, ptr %31, align 8, !tbaa !9
  %33 = invoke noundef ptr @_ZNK7hipsycl2rt5pcuda6stream9get_queueEv(ptr noundef nonnull align 8 dereferenceable(16) %32)
          to label %34 unwind label %52

34:                                               ; preds = %28
  %35 = load ptr, ptr %33, align 8, !tbaa !11
  %36 = getelementptr inbounds ptr, ptr %35, i64 9
  %37 = load ptr, ptr %36, align 8
  %38 = invoke { i64, i64 } %37(ptr noundef nonnull align 8 dereferenceable(8) %33)
          to label %39 unwind label %52

39:                                               ; preds = %34
  %40 = getelementptr inbounds { i64, i64 }, ptr %9, i32 0, i32 0
  %41 = extractvalue { i64, i64 } %38, 0
  store i64 %41, ptr %40, align 4
  %42 = getelementptr inbounds { i64, i64 }, ptr %9, i32 0, i32 1
  %43 = extractvalue { i64, i64 } %38, 1
  store i64 %43, ptr %42, align 4
  %44 = invoke noundef zeroext i1 @_ZN7hipsycl2rteqERKNS0_9device_idES3_(ptr noundef nonnull align 4 dereferenceable(16) %9, ptr noundef nonnull align 4 dereferenceable(16) %3)
          to label %45 unwind label %52

45:                                               ; preds = %39
  call void @llvm.lifetime.end.p0(i64 16, ptr %9) #4
  br i1 %44, label %46, label %60

46:                                               ; preds = %45
  %47 = load i32, ptr %8, align 4, !tbaa !5
  %48 = sext i32 %47 to i64
  %49 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN7hipsycl2rt5pcuda6streamESaIS4_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @_ZN7hipsycl2rt5pcuda12_GLOBAL__N_115stream_registryE, i64 noundef %48) #4
  %50 = load ptr, ptr %49, align 8, !tbaa !9
  invoke void @_ZNSt6vectorIN7hipsycl2rt5pcuda6streamESaIS3_EE9push_backERKS3_(ptr noundef nonnull align 8 dereferenceable(24) %4, ptr noundef nonnull align 8 dereferenceable(16) %50)
          to label %51 unwind label %56

51:                                               ; preds = %46
  br label %60

52:                                               ; preds = %39, %34, %28
  %53 = landingpad { ptr, i32 }
          cleanup
  %54 = extractvalue { ptr, i32 } %53, 0
  store ptr %54, ptr %6, align 8
  %55 = extractvalue { ptr, i32 } %53, 1
  store i32 %55, ptr %7, align 4
  call void @llvm.lifetime.end.p0(i64 16, ptr %9) #4
  br label %64

56:                                               ; preds = %46
  %57 = landingpad { ptr, i32 }
          cleanup
  %58 = extractvalue { ptr, i32 } %57, 0
  store ptr %58, ptr %6, align 8
  %59 = extractvalue { ptr, i32 } %57, 1
  store i32 %59, ptr %7, align 4
  br label %64

60:                                               ; preds = %51, %45
  br label %61

61:                                               ; preds = %60
  %62 = load i32, ptr %8, align 4, !tbaa !5
  %63 = add nsw i32 %62, 1
  store i32 %63, ptr %8, align 4, !tbaa !5
  br label %18, !llvm.loop !13

64:                                               ; preds = %56, %52
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #4
  call void @_ZNSt10lock_guardISt5mutexED2Ev(ptr noundef nonnull align 8 dereferenceable(8) %5) #4
  br label %75

65:                                               ; preds = %23
  call void @_ZNSt10lock_guardISt5mutexED2Ev(ptr noundef nonnull align 8 dereferenceable(8) %5) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #4
  store ptr %4, ptr %10, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #4
  %66 = load ptr, ptr %10, align 8, !tbaa !9
  %67 = call ptr @_ZNSt6vectorIN7hipsycl2rt5pcuda6streamESaIS3_EE5beginEv(ptr noundef nonnull align 8 dereferenceable(24) %66) #4
  %68 = getelementptr inbounds %"class.__gnu_cxx::__normal_iterator.71", ptr %11, i32 0, i32 0
  store ptr %67, ptr %68, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #4
  %69 = load ptr, ptr %10, align 8, !tbaa !9
  %70 = call ptr @_ZNSt6vectorIN7hipsycl2rt5pcuda6streamESaIS3_EE3endEv(ptr noundef nonnull align 8 dereferenceable(24) %69) #4
  %71 = getelementptr inbounds %"class.__gnu_cxx::__normal_iterator.71", ptr %12, i32 0, i32 0
  store ptr %70, ptr %71, align 8
  br label %72

72:                                               ; preds = %85, %65
  %73 = call noundef zeroext i1 @_ZN9__gnu_cxxneIPN7hipsycl2rt5pcuda6streamESt6vectorIS4_SaIS4_EEEEbRKNS_17__normal_iteratorIT_T0_EESE_(ptr noundef nonnull align 8 dereferenceable(8) %11, ptr noundef nonnull align 8 dereferenceable(8) %12) #4
  br i1 %73, label %76, label %74

74:                                               ; preds = %72
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #4
  br label %91

75:                                               ; preds = %64, %24
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #4
  br label %92

76:                                               ; preds = %72
  call void @llvm.lifetime.start.p0(i64 8, ptr %13) #4
  %77 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNK9__gnu_cxx17__normal_iteratorIPN7hipsycl2rt5pcuda6streamESt6vectorIS4_SaIS4_EEEdeEv(ptr noundef nonnull align 8 dereferenceable(8) %11) #4
  store ptr %77, ptr %13, align 8, !tbaa !9
  %78 = load ptr, ptr %13, align 8, !tbaa !9
  %79 = invoke noundef ptr @_ZNK7hipsycl2rt5pcuda6stream9get_queueEv(ptr noundef nonnull align 8 dereferenceable(16) %78)
          to label %80 unwind label %87

80:                                               ; preds = %76
  %81 = load ptr, ptr %79, align 8, !tbaa !11
  %82 = getelementptr inbounds ptr, ptr %81, i64 8
  %83 = load ptr, ptr %82, align 8
  invoke void %83(ptr dead_on_unwind writable sret(%"class.hipsycl::rt::result") align 8 %14, ptr noundef nonnull align 8 dereferenceable(8) %79)
          to label %84 unwind label %87

84:                                               ; preds = %80
  call void @_ZN7hipsycl2rt6resultD2Ev(ptr noundef nonnull align 8 dereferenceable(8) %14) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #4
  br label %85

85:                                               ; preds = %84
  %86 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZN9__gnu_cxx17__normal_iteratorIPN7hipsycl2rt5pcuda6streamESt6vectorIS4_SaIS4_EEEppEv(ptr noundef nonnull align 8 dereferenceable(8) %11) #4
  br label %72

87:                                               ; preds = %80, %76
  %88 = landingpad { ptr, i32 }
          cleanup
  %89 = extractvalue { ptr, i32 } %88, 0
  store ptr %89, ptr %6, align 8
  %90 = extractvalue { ptr, i32 } %88, 1
  store i32 %90, ptr %7, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #4
  br label %92

91:                                               ; preds = %74
  call void @_ZNSt6vectorIN7hipsycl2rt5pcuda6streamESaIS3_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %4) #4
  call void @llvm.lifetime.end.p0(i64 24, ptr %4) #4
  ret i32 0

92:                                               ; preds = %87, %75
  call void @_ZNSt6vectorIN7hipsycl2rt5pcuda6streamESaIS3_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %4) #4
  call void @llvm.lifetime.end.p0(i64 24, ptr %4) #4
  br label %93

93:                                               ; preds = %92
  %94 = load ptr, ptr %6, align 8
  %95 = load i32, ptr %7, align 4
  %96 = insertvalue { ptr, i32 } poison, ptr %94, 0
  %97 = insertvalue { ptr, i32 } %96, i32 %95, 1
  resume { ptr, i32 } %97
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIN7hipsycl2rt5pcuda6streamESaIS3_EEC2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZN7hipsycl2rteqERKNS0_9device_idES3_(ptr noundef nonnull align 4 dereferenceable(16), ptr noundef nonnull align 4 dereferenceable(16)) #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIN7hipsycl2rt5pcuda6streamESaIS3_EE9push_backERKS3_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(16)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local ptr @_ZNSt6vectorIN7hipsycl2rt5pcuda6streamESaIS3_EE5beginEv(ptr noundef nonnull align 8 dereferenceable(24)) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local ptr @_ZNSt6vectorIN7hipsycl2rt5pcuda6streamESaIS3_EE3endEv(ptr noundef nonnull align 8 dereferenceable(24)) #2 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZN9__gnu_cxxneIPN7hipsycl2rt5pcuda6streamESt6vectorIS4_SaIS4_EEEEbRKNS_17__normal_iteratorIT_T0_EESE_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(16) ptr @_ZNK9__gnu_cxx17__normal_iteratorIPN7hipsycl2rt5pcuda6streamESt6vectorIS4_SaIS4_EEEdeEv(ptr noundef nonnull align 8 dereferenceable(8)) #2 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN7hipsycl2rt6resultD2Ev(ptr noundef nonnull align 8 dereferenceable(8)) unnamed_addr #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZN9__gnu_cxx17__normal_iteratorIPN7hipsycl2rt5pcuda6streamESt6vectorIS4_SaIS4_EEEppEv(ptr noundef nonnull align 8 dereferenceable(8)) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIN7hipsycl2rt5pcuda6streamESaIS3_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #2 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"vtable pointer", !8, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<hipsycl::rt::pcuda::stream *, std::allocator<hipsycl::rt::pcuda::stream *>>::_Vector_impl" }
%"struct.std::_Vector_base<hipsycl::rt::pcuda::stream *, std::allocator<hipsycl::rt::pcuda::stream *>>::_Vector_impl" = type { %"struct.std::_Vector_base<hipsycl::rt::pcuda::stream *, std::allocator<hipsycl::rt::pcuda::stream *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<hipsycl::rt::pcuda::stream *, std::allocator<hipsycl::rt::pcuda::stream *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%union.pthread_mutex_t = type { %struct.__pthread_mutex_s }
%struct.__pthread_mutex_s = type { i32, i32, i32, i32, i32, i16, i16, %struct.__pthread_internal_list }
%struct.__pthread_internal_list = type { ptr, ptr }
%"class.hipsycl::rt::device_id" = type { %"struct.hipsycl::rt::backend_descriptor", i32 }
%"struct.hipsycl::rt::backend_descriptor" = type { i32, i32, i32 }
%"class.std::vector.66" = type { %"struct.std::_Vector_base.67" }
%"struct.std::_Vector_base.67" = type { %"struct.std::_Vector_base<hipsycl::rt::pcuda::stream, std::allocator<hipsycl::rt::pcuda::stream>>::_Vector_impl" }
%"struct.std::_Vector_base<hipsycl::rt::pcuda::stream, std::allocator<hipsycl::rt::pcuda::stream>>::_Vector_impl" = type { %"struct.std::_Vector_base<hipsycl::rt::pcuda::stream, std::allocator<hipsycl::rt::pcuda::stream>>::_Vector_impl_data" }
%"struct.std::_Vector_base<hipsycl::rt::pcuda::stream, std::allocator<hipsycl::rt::pcuda::stream>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::lock_guard" = type { ptr }
%"class.__gnu_cxx::__normal_iterator.71" = type { ptr }
%"class.hipsycl::rt::result" = type { %"class.std::unique_ptr.72" }
%"class.std::unique_ptr.72" = type { %"struct.std::__uniq_ptr_data.73" }
%"struct.std::__uniq_ptr_data.73" = type { %"class.std::__uniq_ptr_impl.74" }
%"class.std::__uniq_ptr_impl.74" = type { %"class.std::tuple.75" }
%"class.std::tuple.75" = type { %"struct.std::_Tuple_impl.76" }
%"struct.std::_Tuple_impl.76" = type { %"struct.std::_Head_base.79" }
%"struct.std::_Head_base.79" = type { ptr }

@_ZN7hipsycl2rt5pcuda12_GLOBAL__N_115stream_registryE = external hidden global %"class.std::vector", align 8
@_ZN7hipsycl2rt5pcuda12_GLOBAL__N_120stream_registry_lockE = external hidden global { %union.pthread_mutex_t }, align 8

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt10lock_guardISt5mutexEC2ERS0_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(40)) unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt10lock_guardISt5mutexED2Ev(ptr noundef nonnull align 8 dereferenceable(8)) unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIPN7hipsycl2rt5pcuda6streamESaIS4_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN7hipsycl2rt5pcuda6streamESaIS4_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef ptr @_ZNK7hipsycl2rt5pcuda6stream9get_queueEv(ptr noundef nonnull align 8 dereferenceable(16)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_ZN7hipsycl2rt5pcuda6stream8wait_allENS0_9device_idE(i64 %0, i64 %1) local_unnamed_addr #1 align 2 personality ptr @__gxx_personality_v0 {
  %3 = alloca %"class.hipsycl::rt::device_id", align 8
  %4 = alloca %"class.std::vector.66", align 8
  %5 = alloca %"class.std::lock_guard", align 8
  %6 = alloca %"class.hipsycl::rt::device_id", align 8
  %7 = alloca %"class.__gnu_cxx::__normal_iterator.71", align 8
  %8 = alloca %"class.__gnu_cxx::__normal_iterator.71", align 8
  %9 = alloca %"class.hipsycl::rt::result", align 8
  store i64 %0, ptr %3, align 8
  %10 = getelementptr inbounds i8, ptr %3, i64 8
  store i64 %1, ptr %10, align 8
  call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %4) #4
  call void @_ZNSt6vectorIN7hipsycl2rt5pcuda6streamESaIS3_EEC2Ev(ptr noundef nonnull align 8 dereferenceable(24) %4) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #4
  invoke void @_ZNSt10lock_guardISt5mutexEC2ERS0_(ptr noundef nonnull align 8 dereferenceable(8) %5, ptr noundef nonnull align 8 dereferenceable(40) @_ZN7hipsycl2rt5pcuda12_GLOBAL__N_120stream_registry_lockE)
          to label %.preheader unwind label %16

.preheader:                                       ; preds = %2
  %11 = call noundef i64 @_ZNKSt6vectorIPN7hipsycl2rt5pcuda6streamESaIS4_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) @_ZN7hipsycl2rt5pcuda12_GLOBAL__N_115stream_registryE) #4
  %.not = icmp eq i64 %11, 0
  br i1 %.not, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %.preheader
  %12 = getelementptr inbounds i8, ptr %6, i64 8
  br label %18

._crit_edge:                                      ; preds = %39, %.preheader
  call void @_ZNSt10lock_guardISt5mutexED2Ev(ptr noundef nonnull align 8 dereferenceable(8) %5) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %7) #4
  %13 = call ptr @_ZNSt6vectorIN7hipsycl2rt5pcuda6streamESaIS3_EE5beginEv(ptr noundef nonnull align 8 dereferenceable(24) %4) #4
  store ptr %13, ptr %7, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %8) #4
  %14 = call ptr @_ZNSt6vectorIN7hipsycl2rt5pcuda6streamESaIS3_EE3endEv(ptr noundef nonnull align 8 dereferenceable(24) %4) #4
  store ptr %14, ptr %8, align 8
  %15 = call noundef zeroext i1 @_ZN9__gnu_cxxneIPN7hipsycl2rt5pcuda6streamESt6vectorIS4_SaIS4_EEEEbRKNS_17__normal_iteratorIT_T0_EESE_(ptr noundef nonnull align 8 dereferenceable(8) %7, ptr noundef nonnull align 8 dereferenceable(8) %8) #4
  br i1 %15, label %.lr.ph18, label %._crit_edge19

16:                                               ; preds = %2
  %17 = landingpad { ptr, i32 }
          cleanup
  br label %43

18:                                               ; preds = %.lr.ph, %39
  %indvars.iv = phi i64 [ 0, %.lr.ph ], [ %indvars.iv.next, %39 ]
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %6) #4
  %19 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN7hipsycl2rt5pcuda6streamESaIS4_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @_ZN7hipsycl2rt5pcuda12_GLOBAL__N_115stream_registryE, i64 noundef %indvars.iv) #4
  %20 = load ptr, ptr %19, align 8, !tbaa !5
  %21 = invoke noundef ptr @_ZNK7hipsycl2rt5pcuda6stream9get_queueEv(ptr noundef nonnull align 8 dereferenceable(16) %20)
          to label %22 unwind label %35

22:                                               ; preds = %18
  %23 = load ptr, ptr %21, align 8, !tbaa !9
  %24 = getelementptr inbounds i8, ptr %23, i64 72
  %25 = load ptr, ptr %24, align 8
  %26 = invoke { i64, i64 } %25(ptr noundef nonnull align 8 dereferenceable(8) %21)
          to label %27 unwind label %35

27:                                               ; preds = %22
  %28 = extractvalue { i64, i64 } %26, 0
  store i64 %28, ptr %6, align 8
  %29 = extractvalue { i64, i64 } %26, 1
  store i64 %29, ptr %12, align 8
  %30 = invoke noundef zeroext i1 @_ZN7hipsycl2rteqERKNS0_9device_idES3_(ptr noundef nonnull align 4 dereferenceable(16) %6, ptr noundef nonnull align 4 dereferenceable(16) %3)
          to label %31 unwind label %35

31:                                               ; preds = %27
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %6) #4
  br i1 %30, label %32, label %39

32:                                               ; preds = %31
  %33 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN7hipsycl2rt5pcuda6streamESaIS4_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @_ZN7hipsycl2rt5pcuda12_GLOBAL__N_115stream_registryE, i64 noundef %indvars.iv) #4
  %34 = load ptr, ptr %33, align 8, !tbaa !5
  invoke void @_ZNSt6vectorIN7hipsycl2rt5pcuda6streamESaIS3_EE9push_backERKS3_(ptr noundef nonnull align 8 dereferenceable(24) %4, ptr noundef nonnull align 8 dereferenceable(16) %34)
          to label %39 unwind label %37

35:                                               ; preds = %27, %22, %18
  %36 = landingpad { ptr, i32 }
          cleanup
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %6) #4
  br label %42

37:                                               ; preds = %32
  %38 = landingpad { ptr, i32 }
          cleanup
  br label %42

39:                                               ; preds = %31, %32
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %40 = call noundef i64 @_ZNKSt6vectorIPN7hipsycl2rt5pcuda6streamESaIS4_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) @_ZN7hipsycl2rt5pcuda12_GLOBAL__N_115stream_registryE) #4
  %41 = icmp ugt i64 %40, %indvars.iv.next
  br i1 %41, label %18, label %._crit_edge, !llvm.loop !11

42:                                               ; preds = %37, %35
  %.pn = phi { ptr, i32 } [ %38, %37 ], [ %36, %35 ]
  call void @_ZNSt10lock_guardISt5mutexED2Ev(ptr noundef nonnull align 8 dereferenceable(8) %5) #4
  br label %43

._crit_edge19:                                    ; preds = %50, %._crit_edge
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %8) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %7) #4
  call void @_ZNSt6vectorIN7hipsycl2rt5pcuda6streamESaIS3_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %4) #4
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %4) #4
  ret i32 0

43:                                               ; preds = %42, %16
  %.pn.pn = phi { ptr, i32 } [ %.pn, %42 ], [ %17, %16 ]
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #4
  br label %55

.lr.ph18:                                         ; preds = %._crit_edge, %50
  %44 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNK9__gnu_cxx17__normal_iteratorIPN7hipsycl2rt5pcuda6streamESt6vectorIS4_SaIS4_EEEdeEv(ptr noundef nonnull align 8 dereferenceable(8) %7) #4
  %45 = invoke noundef ptr @_ZNK7hipsycl2rt5pcuda6stream9get_queueEv(ptr noundef nonnull align 8 dereferenceable(16) %44)
          to label %46 unwind label %53

46:                                               ; preds = %.lr.ph18
  %47 = load ptr, ptr %45, align 8, !tbaa !9
  %48 = getelementptr inbounds i8, ptr %47, i64 64
  %49 = load ptr, ptr %48, align 8
  invoke void %49(ptr dead_on_unwind nonnull writable sret(%"class.hipsycl::rt::result") align 8 %9, ptr noundef nonnull align 8 dereferenceable(8) %45)
          to label %50 unwind label %53

50:                                               ; preds = %46
  call void @_ZN7hipsycl2rt6resultD2Ev(ptr noundef nonnull align 8 dereferenceable(8) %9) #4
  %51 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZN9__gnu_cxx17__normal_iteratorIPN7hipsycl2rt5pcuda6streamESt6vectorIS4_SaIS4_EEEppEv(ptr noundef nonnull align 8 dereferenceable(8) %7) #4
  %52 = call noundef zeroext i1 @_ZN9__gnu_cxxneIPN7hipsycl2rt5pcuda6streamESt6vectorIS4_SaIS4_EEEEbRKNS_17__normal_iteratorIT_T0_EESE_(ptr noundef nonnull align 8 dereferenceable(8) %7, ptr noundef nonnull align 8 dereferenceable(8) %8) #4
  br i1 %52, label %.lr.ph18, label %._crit_edge19

53:                                               ; preds = %46, %.lr.ph18
  %54 = landingpad { ptr, i32 }
          cleanup
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %8) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %7) #4
  br label %55

55:                                               ; preds = %53, %43
  %.pn.pn.pn = phi { ptr, i32 } [ %.pn.pn, %43 ], [ %54, %53 ]
  call void @_ZNSt6vectorIN7hipsycl2rt5pcuda6streamESaIS3_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %4) #4
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %4) #4
  resume { ptr, i32 } %.pn.pn.pn
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIN7hipsycl2rt5pcuda6streamESaIS3_EEC2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZN7hipsycl2rteqERKNS0_9device_idES3_(ptr noundef nonnull align 4 dereferenceable(16), ptr noundef nonnull align 4 dereferenceable(16)) local_unnamed_addr #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIN7hipsycl2rt5pcuda6streamESaIS3_EE9push_backERKS3_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(16)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local ptr @_ZNSt6vectorIN7hipsycl2rt5pcuda6streamESaIS3_EE5beginEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local ptr @_ZNSt6vectorIN7hipsycl2rt5pcuda6streamESaIS3_EE3endEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #2 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZN9__gnu_cxxneIPN7hipsycl2rt5pcuda6streamESt6vectorIS4_SaIS4_EEEEbRKNS_17__normal_iteratorIT_T0_EESE_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(16) ptr @_ZNK9__gnu_cxx17__normal_iteratorIPN7hipsycl2rt5pcuda6streamESt6vectorIS4_SaIS4_EEEdeEv(ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #2 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN7hipsycl2rt6resultD2Ev(ptr noundef nonnull align 8 dereferenceable(8)) unnamed_addr #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZN9__gnu_cxx17__normal_iteratorIPN7hipsycl2rt5pcuda6streamESt6vectorIS4_SaIS4_EEEppEv(ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIN7hipsycl2rt5pcuda6streamESaIS3_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #2 align 2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"vtable pointer", !8, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass