; LLVM IR from drken1215/book_algorithm_solution :: codes/chap06/code_6_1.ll (Z13binary_searchi)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@_ZL1a = external hidden global %"class.std::vector", align 8

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z13binary_searchi(i32 noundef %0) #1 {
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  store i32 %0, ptr %3, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #2
  store i32 0, ptr %4, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  %8 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) @_ZL1a) #2
  %9 = trunc i64 %8 to i32
  %10 = sub nsw i32 %9, 1
  store i32 %10, ptr %5, align 4, !tbaa !5
  br label %11

11:                                               ; preds = %55, %1
  %12 = load i32, ptr %5, align 4, !tbaa !5
  %13 = load i32, ptr %4, align 4, !tbaa !5
  %14 = icmp sge i32 %12, %13
  br i1 %14, label %15, label %56

15:                                               ; preds = %11
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #2
  %16 = load i32, ptr %4, align 4, !tbaa !5
  %17 = load i32, ptr %5, align 4, !tbaa !5
  %18 = load i32, ptr %4, align 4, !tbaa !5
  %19 = sub nsw i32 %17, %18
  %20 = sdiv i32 %19, 2
  %21 = add nsw i32 %16, %20
  store i32 %21, ptr %6, align 4, !tbaa !5
  %22 = load i32, ptr %6, align 4, !tbaa !5
  %23 = sext i32 %22 to i64
  %24 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @_ZL1a, i64 noundef %23) #2
  %25 = load i32, ptr %24, align 4, !tbaa !5
  %26 = load i32, ptr %3, align 4, !tbaa !5
  %27 = icmp eq i32 %25, %26
  br i1 %27, label %28, label %30

28:                                               ; preds = %15
  %29 = load i32, ptr %6, align 4, !tbaa !5
  store i32 %29, ptr %2, align 4
  store i32 1, ptr %7, align 4
  br label %53

30:                                               ; preds = %15
  %31 = load i32, ptr %6, align 4, !tbaa !5
  %32 = sext i32 %31 to i64
  %33 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @_ZL1a, i64 noundef %32) #2
  %34 = load i32, ptr %33, align 4, !tbaa !5
  %35 = load i32, ptr %3, align 4, !tbaa !5
  %36 = icmp sgt i32 %34, %35
  br i1 %36, label %37, label %40

37:                                               ; preds = %30
  %38 = load i32, ptr %6, align 4, !tbaa !5
  %39 = sub nsw i32 %38, 1
  store i32 %39, ptr %5, align 4, !tbaa !5
  br label %51

40:                                               ; preds = %30
  %41 = load i32, ptr %6, align 4, !tbaa !5
  %42 = sext i32 %41 to i64
  %43 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @_ZL1a, i64 noundef %42) #2
  %44 = load i32, ptr %43, align 4, !tbaa !5
  %45 = load i32, ptr %3, align 4, !tbaa !5
  %46 = icmp slt i32 %44, %45
  br i1 %46, label %47, label %50

47:                                               ; preds = %40
  %48 = load i32, ptr %6, align 4, !tbaa !5
  %49 = add nsw i32 %48, 1
  store i32 %49, ptr %4, align 4, !tbaa !5
  br label %50

50:                                               ; preds = %47, %40
  br label %51

51:                                               ; preds = %50, %37
  br label %52

52:                                               ; preds = %51
  store i32 0, ptr %7, align 4
  br label %53

53:                                               ; preds = %52, %28
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #2
  %54 = load i32, ptr %7, align 4
  switch i32 %54, label %57 [
    i32 0, label %55
  ]

55:                                               ; preds = %53
  br label %11, !llvm.loop !9

56:                                               ; preds = %11
  store i32 -1, ptr %2, align 4
  store i32 1, ptr %7, align 4
  br label %57

57:                                               ; preds = %56, %53
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #2
  %58 = load i32, ptr %2, align 4
  ret i32 %58
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@_ZL1a = external hidden global %"class.std::vector", align 8

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z13binary_searchi(i32 noundef %0) local_unnamed_addr #0 {
  %2 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) @_ZL1a) #1
  %3 = trunc i64 %2 to i32
  %.not28 = icmp slt i32 %3, 1
  br i1 %.not28, label %.thread, label %.lr.ph.preheader

.lr.ph.preheader:                                 ; preds = %1
  %4 = add nsw i32 %3, -1
  br label %.lr.ph

.lr.ph:                                           ; preds = %.lr.ph.preheader, %22
  %.01730 = phi i32 [ %.219, %22 ], [ %4, %.lr.ph.preheader ]
  %.02029 = phi i32 [ %.222, %22 ], [ 0, %.lr.ph.preheader ]
  %5 = sub nsw i32 %.01730, %.02029
  %6 = sdiv i32 %5, 2
  %7 = add nsw i32 %6, %.02029
  %8 = sext i32 %7 to i64
  %9 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @_ZL1a, i64 noundef %8) #1
  %10 = load i32, ptr %9, align 4, !tbaa !5
  %.not24 = icmp eq i32 %10, %0
  br i1 %.not24, label %.thread, label %11

11:                                               ; preds = %.lr.ph
  %12 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @_ZL1a, i64 noundef %8) #1
  %13 = load i32, ptr %12, align 4, !tbaa !5
  %14 = icmp sgt i32 %13, %0
  br i1 %14, label %15, label %17

15:                                               ; preds = %11
  %16 = add nsw i32 %7, -1
  br label %22

17:                                               ; preds = %11
  %18 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @_ZL1a, i64 noundef %8) #1
  %19 = load i32, ptr %18, align 4, !tbaa !5
  %20 = icmp slt i32 %19, %0
  %21 = add nsw i32 %7, 1
  %spec.select = select i1 %20, i32 %21, i32 %.02029
  br label %22

22:                                               ; preds = %17, %15
  %.222 = phi i32 [ %.02029, %15 ], [ %spec.select, %17 ]
  %.219 = phi i32 [ %16, %15 ], [ %.01730, %17 ]
  %.not = icmp slt i32 %.219, %.222
  br i1 %.not, label %.thread, label %.lr.ph

.thread:                                          ; preds = %22, %.lr.ph, %1
  %.2 = phi i32 [ -1, %1 ], [ %7, %.lr.ph ], [ -1, %22 ]
  ret i32 %.2
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass