; LLVM IR from facebookresearch/habitat-sim :: src/deps/basis-universal/encoder/basisu_etc.ll (ZN6basisu9etc_block13unpack_color5Etbj)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.basisu::color_rgba" = type { %union.anon }
%union.anon = type { [4 x i8] }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN6basisu7minimumIjEET_S1_S1_(i32 noundef, i32 noundef) #1

; Function Attrs: mustprogress uwtable
define dso_local i32 @_ZN6basisu9etc_block13unpack_color5Etbj(i16 noundef zeroext %0, i1 noundef zeroext %1, i32 noundef %2) #2 align 2 {
  %4 = alloca %"class.basisu::color_rgba", align 1
  %5 = alloca i16, align 2
  %6 = alloca i8, align 1
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  store i16 %0, ptr %5, align 2, !tbaa !5
  %11 = zext i1 %1 to i8
  store i8 %11, ptr %6, align 1, !tbaa !9
  store i32 %2, ptr %7, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #4
  %12 = load i16, ptr %5, align 2, !tbaa !5
  %13 = zext i16 %12 to i32
  %14 = and i32 %13, 31
  store i32 %14, ptr %8, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #4
  %15 = load i16, ptr %5, align 2, !tbaa !5
  %16 = zext i16 %15 to i32
  %17 = ashr i32 %16, 5
  %18 = and i32 %17, 31
  store i32 %18, ptr %9, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #4
  %19 = load i16, ptr %5, align 2, !tbaa !5
  %20 = zext i16 %19 to i32
  %21 = ashr i32 %20, 10
  %22 = and i32 %21, 31
  store i32 %22, ptr %10, align 4, !tbaa !11
  %23 = load i8, ptr %6, align 1, !tbaa !9, !range !13, !noundef !14
  %24 = trunc i8 %23 to i1
  br i1 %24, label %25, label %41

25:                                               ; preds = %3
  %26 = load i32, ptr %8, align 4, !tbaa !11
  %27 = shl i32 %26, 3
  %28 = load i32, ptr %8, align 4, !tbaa !11
  %29 = lshr i32 %28, 2
  %30 = or i32 %27, %29
  store i32 %30, ptr %8, align 4, !tbaa !11
  %31 = load i32, ptr %9, align 4, !tbaa !11
  %32 = shl i32 %31, 3
  %33 = load i32, ptr %9, align 4, !tbaa !11
  %34 = lshr i32 %33, 2
  %35 = or i32 %32, %34
  store i32 %35, ptr %9, align 4, !tbaa !11
  %36 = load i32, ptr %10, align 4, !tbaa !11
  %37 = shl i32 %36, 3
  %38 = load i32, ptr %10, align 4, !tbaa !11
  %39 = lshr i32 %38, 2
  %40 = or i32 %37, %39
  store i32 %40, ptr %10, align 4, !tbaa !11
  br label %41

41:                                               ; preds = %25, %3
  %42 = load i32, ptr %10, align 4, !tbaa !11
  %43 = load i32, ptr %9, align 4, !tbaa !11
  %44 = load i32, ptr %8, align 4, !tbaa !11
  %45 = load i32, ptr %7, align 4, !tbaa !11
  %46 = call noundef i32 @_ZN6basisu7minimumIjEET_S1_S1_(i32 noundef %45, i32 noundef 255)
  call void @_ZN6basisu10color_rgbaC2ENS_8eNoClampEiiii(ptr noundef nonnull align 1 dereferenceable(4) %4, i32 noundef 0, i32 noundef %42, i32 noundef %43, i32 noundef %44, i32 noundef %46)
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #4
  %47 = getelementptr inbounds %"class.basisu::color_rgba", ptr %4, i32 0, i32 0
  %48 = getelementptr inbounds %union.anon, ptr %47, i32 0, i32 0
  %49 = load i32, ptr %48, align 1
  ret i32 %49
}

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN6basisu10color_rgbaC2ENS_8eNoClampEiiii(ptr noundef nonnull align 1 dereferenceable(4), i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) unnamed_addr #3 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"short", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"bool", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{i8 0, i8 2}
!14 = !{}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.basisu::color_rgba" = type { %union.anon }
%union.anon = type { [4 x i8] }

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN6basisu7minimumIjEET_S1_S1_(i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
define dso_local i32 @_ZN6basisu9etc_block13unpack_color5Etbj(i16 noundef zeroext %0, i1 noundef zeroext %1, i32 noundef %2) local_unnamed_addr #1 align 2 {
  %4 = alloca %"class.basisu::color_rgba", align 4
  %5 = zext i16 %0 to i32
  %6 = and i32 %5, 31
  %7 = lshr i32 %5, 5
  %8 = and i32 %7, 31
  %9 = lshr i32 %5, 10
  %10 = and i32 %9, 31
  br i1 %1, label %11, label %21

11:                                               ; preds = %3
  %12 = shl nuw nsw i32 %6, 3
  %13 = lshr i32 %6, 2
  %14 = or disjoint i32 %12, %13
  %15 = shl nuw nsw i32 %8, 3
  %16 = lshr i32 %8, 2
  %17 = or disjoint i32 %15, %16
  %18 = shl nuw nsw i32 %10, 3
  %19 = lshr i32 %10, 2
  %20 = or disjoint i32 %18, %19
  br label %21

21:                                               ; preds = %11, %3
  %.015 = phi i32 [ %14, %11 ], [ %6, %3 ]
  %.014 = phi i32 [ %17, %11 ], [ %8, %3 ]
  %.0 = phi i32 [ %20, %11 ], [ %10, %3 ]
  %22 = tail call noundef i32 @_ZN6basisu7minimumIjEET_S1_S1_(i32 noundef %2, i32 noundef 255)
  call void @_ZN6basisu10color_rgbaC2ENS_8eNoClampEiiii(ptr noundef nonnull align 1 dereferenceable(4) %4, i32 noundef 0, i32 noundef %.0, i32 noundef %.014, i32 noundef %.015, i32 noundef %22)
  %23 = load i32, ptr %4, align 4
  ret i32 %23
}

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN6basisu10color_rgbaC2ENS_8eNoClampEiiii(ptr noundef nonnull align 1 dereferenceable(4), i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) unnamed_addr #2 align 2

attributes #0 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,TailCallElimPass