; LLVM IR from huawei-noah/bolt :: compute/tensor/src/cpu (gather)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.TensorDesc = type { i32, i32, i32, [20 x i32] }
%struct.GatherParamSpec = type { i32, i8, i32 }

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z10gather_cpu10TensorDescPKvS_S1_15GatherParamSpecPvS_S3_(ptr noundef byval(%struct.TensorDesc) align 8 %0, ptr noundef %1, ptr noundef byval(%struct.TensorDesc) align 8 %2, ptr noundef %3, i64 %4, i32 %5, ptr noundef %6, ptr noundef byval(%struct.TensorDesc) align 8 %7, ptr noundef %8) #0 {
  %10 = alloca %struct.GatherParamSpec, align 4
  %11 = alloca { i64, i32 }, align 4
  %12 = alloca ptr, align 8
  %13 = alloca ptr, align 8
  %14 = alloca ptr, align 8
  %15 = alloca ptr, align 8
  %16 = alloca %struct.TensorDesc, align 4
  %17 = alloca %struct.TensorDesc, align 8
  %18 = alloca %struct.TensorDesc, align 8
  %19 = alloca i32, align 4
  %20 = getelementptr inbounds { i64, i32 }, ptr %11, i32 0, i32 0
  store i64 %4, ptr %20, align 4
  %21 = getelementptr inbounds { i64, i32 }, ptr %11, i32 0, i32 1
  store i32 %5, ptr %21, align 4
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %10, ptr align 4 %11, i64 12, i1 false)
  store ptr %1, ptr %12, align 8, !tbaa !5
  store ptr %3, ptr %13, align 8, !tbaa !5
  store ptr %6, ptr %14, align 8, !tbaa !5
  store ptr %8, ptr %15, align 8, !tbaa !5
  %22 = getelementptr inbounds %struct.TensorDesc, ptr %0, i32 0, i32 1
  %23 = load i32, ptr %22, align 4, !tbaa !9
  %24 = icmp eq i32 %23, 2
  br i1 %24, label %25, label %32

25:                                               ; preds = %9
  call void @llvm.lifetime.start.p0(i64 92, ptr %16) #5
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %16, ptr align 8 %0, i64 92, i1 false), !tbaa.struct !14
  %26 = getelementptr inbounds %struct.TensorDesc, ptr %16, i32 0, i32 1
  store i32 0, ptr %26, align 4, !tbaa !9
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %17, ptr align 8 %0, i64 92, i1 false), !tbaa.struct !14
  %27 = load ptr, ptr %12, align 8, !tbaa !5
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %18, ptr align 4 %16, i64 92, i1 false), !tbaa.struct !14
  %28 = load ptr, ptr %14, align 8, !tbaa !5
  %29 = call noundef i32 @_Z15transformToNCHW10TensorDescPKvS_Pv(ptr noundef byval(%struct.TensorDesc) align 8 %17, ptr noundef %27, ptr noundef byval(%struct.TensorDesc) align 8 %18, ptr noundef %28)
  %30 = load ptr, ptr %14, align 8, !tbaa !5
  store ptr %30, ptr %12, align 8, !tbaa !5
  %31 = getelementptr inbounds %struct.TensorDesc, ptr %0, i32 0, i32 1
  store i32 0, ptr %31, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 92, ptr %16) #5
  br label %32

32:                                               ; preds = %25, %9
  call void @llvm.lifetime.start.p0(i64 4, ptr %19) #5
  store i32 0, ptr %19, align 4, !tbaa !19
  %33 = getelementptr inbounds %struct.TensorDesc, ptr %0, i32 0, i32 0
  %34 = load i32, ptr %33, align 8, !tbaa !21
  switch i32 %34, label %43 [
    i32 3, label %35
    i32 2, label %35
    i32 0, label %39
  ]

35:                                               ; preds = %32, %32
  %36 = load ptr, ptr %12, align 8, !tbaa !5
  %37 = load ptr, ptr %13, align 8, !tbaa !5
  %38 = load ptr, ptr %15, align 8, !tbaa !5
  call void @_ZL13gather_kernelIiEvRK10TensorDescPKT_S2_PKiRK15GatherParamSpecS2_PS3_(ptr noundef nonnull align 4 dereferenceable(92) %0, ptr noundef %36, ptr noundef nonnull align 4 dereferenceable(92) %2, ptr noundef %37, ptr noundef nonnull align 4 dereferenceable(12) %10, ptr noundef nonnull align 4 dereferenceable(92) %7, ptr noundef %38)
  br label %44

39:                                               ; preds = %32
  %40 = load ptr, ptr %12, align 8, !tbaa !5
  %41 = load ptr, ptr %13, align 8, !tbaa !5
  %42 = load ptr, ptr %15, align 8, !tbaa !5
  call void @_ZL13gather_kernelIhEvRK10TensorDescPKT_S2_PKiRK15GatherParamSpecS2_PS3_(ptr noundef nonnull align 4 dereferenceable(92) %0, ptr noundef %40, ptr noundef nonnull align 4 dereferenceable(92) %2, ptr noundef %41, ptr noundef nonnull align 4 dereferenceable(12) %10, ptr noundef nonnull align 4 dereferenceable(92) %7, ptr noundef %42)
  br label %44

43:                                               ; preds = %32
  store i32 51, ptr %19, align 4, !tbaa !19
  br label %44

44:                                               ; preds = %43, %39, %35
  %45 = load i32, ptr %19, align 4, !tbaa !19
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #5
  ret i32 %45
}

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

declare noundef i32 @_Z15transformToNCHW10TensorDescPKvS_Pv(ptr noundef byval(%struct.TensorDesc) align 8, ptr noundef, ptr noundef byval(%struct.TensorDesc) align 8, ptr noundef) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: inlinehint mustprogress uwtable
declare hidden void @_ZL13gather_kernelIiEvRK10TensorDescPKT_S2_PKiRK15GatherParamSpecS2_PS3_(ptr noundef nonnull align 4 dereferenceable(92), ptr noundef, ptr noundef nonnull align 4 dereferenceable(92), ptr noundef, ptr noundef nonnull align 4 dereferenceable(12), ptr noundef nonnull align 4 dereferenceable(92), ptr noundef) #4

; Function Attrs: inlinehint mustprogress uwtable
declare hidden void @_ZL13gather_kernelIhEvRK10TensorDescPKT_S2_PKiRK15GatherParamSpecS2_PS3_(ptr noundef nonnull align 4 dereferenceable(92), ptr noundef, ptr noundef nonnull align 4 dereferenceable(92), ptr noundef, ptr noundef nonnull align 4 dereferenceable(12), ptr noundef nonnull align 4 dereferenceable(92), ptr noundef) #4

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !12, i64 4}
!10 = !{!"_ZTS10TensorDesc", !11, i64 0, !12, i64 4, !13, i64 8, !7, i64 12}
!11 = !{!"_ZTS8DataType", !7, i64 0}
!12 = !{!"_ZTS10DataFormat", !7, i64 0}
!13 = !{!"int", !7, i64 0}
!14 = !{i64 0, i64 4, !15, i64 4, i64 4, !16, i64 8, i64 4, !17, i64 12, i64 80, !18}
!15 = !{!11, !11, i64 0}
!16 = !{!12, !12, i64 0}
!17 = !{!13, !13, i64 0}
!18 = !{!7, !7, i64 0}
!19 = !{!20, !20, i64 0}
!20 = !{!"_ZTS2EE", !7, i64 0}
!21 = !{!10, !11, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.TensorDesc = type { i32, i32, i32, [20 x i32] }
%struct.GatherParamSpec = type { i32, i8, i32 }

; Function Attrs: mustprogress uwtable
define dso_local noundef range(i32 0, 52) i32 @_Z10gather_cpu10TensorDescPKvS_S1_15GatherParamSpecPvS_S3_(ptr noundef byval(%struct.TensorDesc) align 8 %0, ptr noundef %1, ptr noundef byval(%struct.TensorDesc) align 8 %2, ptr noundef %3, i64 %4, i32 %5, ptr noundef %6, ptr noundef byval(%struct.TensorDesc) align 8 %7, ptr noundef %8) local_unnamed_addr #0 {
  %10 = alloca %struct.GatherParamSpec, align 8
  %11 = alloca %struct.TensorDesc, align 8
  store i64 %4, ptr %10, align 8
  %.sroa.2.0..sroa_idx = getelementptr inbounds i8, ptr %10, i64 8
  store i32 %5, ptr %.sroa.2.0..sroa_idx, align 8
  %12 = getelementptr inbounds i8, ptr %0, i64 4
  %13 = load i32, ptr %12, align 4, !tbaa !5
  %14 = icmp eq i32 %13, 2
  %.pre = load i32, ptr %0, align 8, !tbaa !12
  br i1 %14, label %15, label %17

15:                                               ; preds = %9
  %.sroa.5.0..sroa_idx = getelementptr inbounds i8, ptr %0, i64 8
  %.sroa.5.0..sroa_idx4 = getelementptr inbounds i8, ptr %11, i64 8
  call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 8 dereferenceable(84) %.sroa.5.0..sroa_idx4, ptr noundef nonnull align 8 dereferenceable(84) %.sroa.5.0..sroa_idx, i64 84, i1 false)
  store i32 %.pre, ptr %11, align 8, !tbaa !12
  %.sroa.4.0..sroa_idx2 = getelementptr inbounds i8, ptr %11, i64 4
  store i32 0, ptr %.sroa.4.0..sroa_idx2, align 4, !tbaa !13
  %16 = tail call noundef i32 @_Z15transformToNCHW10TensorDescPKvS_Pv(ptr noundef nonnull byval(%struct.TensorDesc) align 8 %0, ptr noundef %1, ptr noundef nonnull byval(%struct.TensorDesc) align 8 %11, ptr noundef %6)
  store i32 0, ptr %12, align 4, !tbaa !5
  br label %17

17:                                               ; preds = %15, %9
  %.014 = phi ptr [ %6, %15 ], [ %1, %9 ]
  switch i32 %.pre, label %20 [
    i32 3, label %18
    i32 2, label %18
    i32 0, label %19
  ]

18:                                               ; preds = %17, %17
  call void @_ZL13gather_kernelIiEvRK10TensorDescPKT_S2_PKiRK15GatherParamSpecS2_PS3_(ptr noundef nonnull align 4 dereferenceable(92) %0, ptr noundef %.014, ptr noundef nonnull align 4 dereferenceable(92) %2, ptr noundef %3, ptr noundef nonnull align 4 dereferenceable(12) %10, ptr noundef nonnull align 4 dereferenceable(92) %7, ptr noundef %8)
  br label %20

19:                                               ; preds = %17
  call void @_ZL13gather_kernelIhEvRK10TensorDescPKT_S2_PKiRK15GatherParamSpecS2_PS3_(ptr noundef nonnull align 4 dereferenceable(92) %0, ptr noundef %.014, ptr noundef nonnull align 4 dereferenceable(92) %2, ptr noundef %3, ptr noundef nonnull align 4 dereferenceable(12) %10, ptr noundef nonnull align 4 dereferenceable(92) %7, ptr noundef %8)
  br label %20

20:                                               ; preds = %17, %19, %18
  %.0 = phi i32 [ 0, %19 ], [ 0, %18 ], [ 51, %17 ]
  ret i32 %.0
}

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #1

declare noundef i32 @_Z15transformToNCHW10TensorDescPKvS_Pv(ptr noundef byval(%struct.TensorDesc) align 8, ptr noundef, ptr noundef byval(%struct.TensorDesc) align 8, ptr noundef) local_unnamed_addr #2

; Function Attrs: inlinehint mustprogress uwtable
declare hidden void @_ZL13gather_kernelIiEvRK10TensorDescPKT_S2_PKiRK15GatherParamSpecS2_PS3_(ptr noundef nonnull align 4 dereferenceable(92), ptr noundef, ptr noundef nonnull align 4 dereferenceable(92), ptr noundef, ptr noundef nonnull align 4 dereferenceable(12), ptr noundef nonnull align 4 dereferenceable(92), ptr noundef) local_unnamed_addr #3

; Function Attrs: inlinehint mustprogress uwtable
declare hidden void @_ZL13gather_kernelIhEvRK10TensorDescPKT_S2_PKiRK15GatherParamSpecS2_PS3_(ptr noundef nonnull align 4 dereferenceable(92), ptr noundef, ptr noundef nonnull align 4 dereferenceable(92), ptr noundef, ptr noundef nonnull align 4 dereferenceable(12), ptr noundef nonnull align 4 dereferenceable(92), ptr noundef) local_unnamed_addr #3

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 4}
!6 = !{!"_ZTS10TensorDesc", !7, i64 0, !10, i64 4, !11, i64 8, !8, i64 12}
!7 = !{!"_ZTS8DataType", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"_ZTS10DataFormat", !8, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!7, !7, i64 0}
!13 = !{!10, !10, i64 0}


; Effective O3 passes: CorrelatedValuePropagationPass,DSEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,MemCpyOptPass,SROAPass,SimplifyCFGPass,TailCallElimPass