; LLVM IR from AF-GRILL/DISPluginForUnreal :: Source/ThirdParty/include/dis6/CommentPdu.ll (ZNK3DIS10CommentPdueqERKS0_)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.DIS::CommentPdu" = type { %"class.DIS::SimulationManagementFamilyPdu", i32, i32, %"class.std::vector", %"class.std::vector.0" }
%"class.DIS::SimulationManagementFamilyPdu" = type { %"class.DIS::Pdu.base", [4 x i8], %"class.DIS::EntityID", %"class.DIS::EntityID" }
%"class.DIS::Pdu.base" = type <{ ptr, i8, i8, i8, i8, i32, i16, i16 }>
%"class.DIS::EntityID" = type <{ ptr, i16, i16, i16, [2 x i8] }>
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<DIS::FixedDatum, std::allocator<DIS::FixedDatum>>::_Vector_impl" }
%"struct.std::_Vector_base<DIS::FixedDatum, std::allocator<DIS::FixedDatum>>::_Vector_impl" = type { %"struct.std::_Vector_base<DIS::FixedDatum, std::allocator<DIS::FixedDatum>>::_Vector_impl_data" }
%"struct.std::_Vector_base<DIS::FixedDatum, std::allocator<DIS::FixedDatum>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<DIS::VariableDatum, std::allocator<DIS::VariableDatum>>::_Vector_impl" }
%"struct.std::_Vector_base<DIS::VariableDatum, std::allocator<DIS::VariableDatum>>::_Vector_impl" = type { %"struct.std::_Vector_base<DIS::VariableDatum, std::allocator<DIS::VariableDatum>>::_Vector_impl_data" }
%"struct.std::_Vector_base<DIS::VariableDatum, std::allocator<DIS::VariableDatum>>::_Vector_impl_data" = type { ptr, ptr, ptr }

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIN3DIS10FixedDatumESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIN3DIS13VariableDatumESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(16) ptr @_ZNKSt6vectorIN3DIS10FixedDatumESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(44) ptr @_ZNKSt6vectorIN3DIS13VariableDatumESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZNK3DIS10CommentPdueqERKS0_(ptr noundef nonnull align 8 dereferenceable(112) %0, ptr noundef nonnull align 8 dereferenceable(112) %1) #2 align 2 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca i8, align 1
  %6 = alloca i64, align 8
  %7 = alloca i64, align 8
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  %8 = load ptr, ptr %3, align 8
  call void @llvm.lifetime.start.p0(i64 1, ptr %5) #4
  store i8 1, ptr %5, align 1, !tbaa !9
  %9 = load ptr, ptr %4, align 8, !tbaa !5
  %10 = call noundef zeroext i1 @_ZNK3DIS29SimulationManagementFamilyPdueqERKS0_(ptr noundef nonnull align 8 dereferenceable(56) %8, ptr noundef nonnull align 8 dereferenceable(56) %9)
  %11 = zext i1 %10 to i8
  store i8 %11, ptr %5, align 1, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #4
  store i64 0, ptr %6, align 8, !tbaa !11
  br label %12

12:                                               ; preds = %29, %2
  %13 = load i64, ptr %6, align 8, !tbaa !11
  %14 = getelementptr inbounds %"class.DIS::CommentPdu", ptr %8, i32 0, i32 3
  %15 = call noundef i64 @_ZNKSt6vectorIN3DIS10FixedDatumESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %14) #4
  %16 = icmp ult i64 %13, %15
  br i1 %16, label %18, label %17

17:                                               ; preds = %12
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #4
  br label %32

18:                                               ; preds = %12
  %19 = getelementptr inbounds %"class.DIS::CommentPdu", ptr %8, i32 0, i32 3
  %20 = load i64, ptr %6, align 8, !tbaa !11
  %21 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNKSt6vectorIN3DIS10FixedDatumESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %19, i64 noundef %20) #4
  %22 = load ptr, ptr %4, align 8, !tbaa !5
  %23 = getelementptr inbounds %"class.DIS::CommentPdu", ptr %22, i32 0, i32 3
  %24 = load i64, ptr %6, align 8, !tbaa !11
  %25 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNKSt6vectorIN3DIS10FixedDatumESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %23, i64 noundef %24) #4
  %26 = call noundef zeroext i1 @_ZNK3DIS10FixedDatumeqERKS0_(ptr noundef nonnull align 8 dereferenceable(16) %21, ptr noundef nonnull align 8 dereferenceable(16) %25)
  br i1 %26, label %28, label %27

27:                                               ; preds = %18
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %28

28:                                               ; preds = %27, %18
  br label %29

29:                                               ; preds = %28
  %30 = load i64, ptr %6, align 8, !tbaa !11
  %31 = add i64 %30, 1
  store i64 %31, ptr %6, align 8, !tbaa !11
  br label %12, !llvm.loop !13

32:                                               ; preds = %17
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #4
  store i64 0, ptr %7, align 8, !tbaa !11
  br label %33

33:                                               ; preds = %50, %32
  %34 = load i64, ptr %7, align 8, !tbaa !11
  %35 = getelementptr inbounds %"class.DIS::CommentPdu", ptr %8, i32 0, i32 4
  %36 = call noundef i64 @_ZNKSt6vectorIN3DIS13VariableDatumESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %35) #4
  %37 = icmp ult i64 %34, %36
  br i1 %37, label %39, label %38

38:                                               ; preds = %33
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #4
  br label %53

39:                                               ; preds = %33
  %40 = getelementptr inbounds %"class.DIS::CommentPdu", ptr %8, i32 0, i32 4
  %41 = load i64, ptr %7, align 8, !tbaa !11
  %42 = call noundef nonnull align 8 dereferenceable(44) ptr @_ZNKSt6vectorIN3DIS13VariableDatumESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %40, i64 noundef %41) #4
  %43 = load ptr, ptr %4, align 8, !tbaa !5
  %44 = getelementptr inbounds %"class.DIS::CommentPdu", ptr %43, i32 0, i32 4
  %45 = load i64, ptr %7, align 8, !tbaa !11
  %46 = call noundef nonnull align 8 dereferenceable(44) ptr @_ZNKSt6vectorIN3DIS13VariableDatumESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %44, i64 noundef %45) #4
  %47 = call noundef zeroext i1 @_ZNK3DIS13VariableDatumeqERKS0_(ptr noundef nonnull align 8 dereferenceable(44) %42, ptr noundef nonnull align 8 dereferenceable(44) %46)
  br i1 %47, label %49, label %48

48:                                               ; preds = %39
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %49

49:                                               ; preds = %48, %39
  br label %50

50:                                               ; preds = %49
  %51 = load i64, ptr %7, align 8, !tbaa !11
  %52 = add i64 %51, 1
  store i64 %52, ptr %7, align 8, !tbaa !11
  br label %33, !llvm.loop !15

53:                                               ; preds = %38
  %54 = load i8, ptr %5, align 1, !tbaa !9, !range !16, !noundef !17
  %55 = trunc i8 %54 to i1
  call void @llvm.lifetime.end.p0(i64 1, ptr %5) #4
  ret i1 %55
}

declare noundef zeroext i1 @_ZNK3DIS29SimulationManagementFamilyPdueqERKS0_(ptr noundef nonnull align 8 dereferenceable(56), ptr noundef nonnull align 8 dereferenceable(56)) #3

declare noundef zeroext i1 @_ZNK3DIS10FixedDatumeqERKS0_(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 8 dereferenceable(16)) #3

declare noundef zeroext i1 @_ZNK3DIS13VariableDatumeqERKS0_(ptr noundef nonnull align 8 dereferenceable(44), ptr noundef nonnull align 8 dereferenceable(44)) #3

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"bool", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = distinct !{!15, !14}
!16 = !{i8 0, i8 2}
!17 = !{}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIN3DIS10FixedDatumESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIN3DIS13VariableDatumESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(16) ptr @_ZNKSt6vectorIN3DIS10FixedDatumESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(44) ptr @_ZNKSt6vectorIN3DIS13VariableDatumESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZNK3DIS10CommentPdueqERKS0_(ptr noundef nonnull align 8 dereferenceable(112) %0, ptr noundef nonnull align 8 dereferenceable(112) %1) local_unnamed_addr #1 align 2 {
  %3 = tail call noundef zeroext i1 @_ZNK3DIS29SimulationManagementFamilyPdueqERKS0_(ptr noundef nonnull align 8 dereferenceable(56) %0, ptr noundef nonnull align 8 dereferenceable(56) %1)
  %4 = getelementptr inbounds i8, ptr %0, i64 64
  %5 = tail call noundef i64 @_ZNKSt6vectorIN3DIS10FixedDatumESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %4) #3
  %.not = icmp eq i64 %5, 0
  br i1 %.not, label %.preheader, label %.lr.ph

.lr.ph:                                           ; preds = %2
  %6 = getelementptr inbounds i8, ptr %1, i64 64
  br label %10

.preheader:                                       ; preds = %10, %2
  %.013.lcssa = phi i1 [ %3, %2 ], [ %spec.select, %10 ]
  %7 = getelementptr inbounds i8, ptr %0, i64 88
  %8 = tail call noundef i64 @_ZNKSt6vectorIN3DIS13VariableDatumESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %7) #3
  %.not21 = icmp eq i64 %8, 0
  br i1 %.not21, label %._crit_edge, label %.lr.ph19

.lr.ph19:                                         ; preds = %.preheader
  %9 = getelementptr inbounds i8, ptr %1, i64 88
  br label %17

10:                                               ; preds = %.lr.ph, %10
  %.01216 = phi i64 [ 0, %.lr.ph ], [ %14, %10 ]
  %.01315 = phi i1 [ %3, %.lr.ph ], [ %spec.select, %10 ]
  %11 = tail call noundef nonnull align 8 dereferenceable(16) ptr @_ZNKSt6vectorIN3DIS10FixedDatumESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %4, i64 noundef %.01216) #3
  %12 = tail call noundef nonnull align 8 dereferenceable(16) ptr @_ZNKSt6vectorIN3DIS10FixedDatumESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %6, i64 noundef %.01216) #3
  %13 = tail call noundef zeroext i1 @_ZNK3DIS10FixedDatumeqERKS0_(ptr noundef nonnull align 8 dereferenceable(16) %11, ptr noundef nonnull align 8 dereferenceable(16) %12)
  %spec.select = select i1 %13, i1 %.01315, i1 false
  %14 = add nuw i64 %.01216, 1
  %15 = tail call noundef i64 @_ZNKSt6vectorIN3DIS10FixedDatumESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %4) #3
  %16 = icmp ult i64 %14, %15
  br i1 %16, label %10, label %.preheader, !llvm.loop !5

._crit_edge:                                      ; preds = %17, %.preheader
  %.2.lcssa = phi i1 [ %.013.lcssa, %.preheader ], [ %spec.select14, %17 ]
  ret i1 %.2.lcssa

17:                                               ; preds = %.lr.ph19, %17
  %.018 = phi i64 [ 0, %.lr.ph19 ], [ %21, %17 ]
  %.217 = phi i1 [ %.013.lcssa, %.lr.ph19 ], [ %spec.select14, %17 ]
  %18 = tail call noundef nonnull align 8 dereferenceable(44) ptr @_ZNKSt6vectorIN3DIS13VariableDatumESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %7, i64 noundef %.018) #3
  %19 = tail call noundef nonnull align 8 dereferenceable(44) ptr @_ZNKSt6vectorIN3DIS13VariableDatumESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %9, i64 noundef %.018) #3
  %20 = tail call noundef zeroext i1 @_ZNK3DIS13VariableDatumeqERKS0_(ptr noundef nonnull align 8 dereferenceable(44) %18, ptr noundef nonnull align 8 dereferenceable(44) %19)
  %spec.select14 = select i1 %20, i1 %.217, i1 false
  %21 = add nuw i64 %.018, 1
  %22 = tail call noundef i64 @_ZNKSt6vectorIN3DIS13VariableDatumESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %7) #3
  %23 = icmp ult i64 %21, %22
  br i1 %23, label %17, label %._crit_edge, !llvm.loop !7
}

declare noundef zeroext i1 @_ZNK3DIS29SimulationManagementFamilyPdueqERKS0_(ptr noundef nonnull align 8 dereferenceable(56), ptr noundef nonnull align 8 dereferenceable(56)) local_unnamed_addr #2

declare noundef zeroext i1 @_ZNK3DIS10FixedDatumeqERKS0_(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 8 dereferenceable(16)) local_unnamed_addr #2

declare noundef zeroext i1 @_ZNK3DIS13VariableDatumeqERKS0_(ptr noundef nonnull align 8 dereferenceable(44), ptr noundef nonnull align 8 dereferenceable(44)) local_unnamed_addr #2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = distinct !{!7, !6}


; Effective O3 passes: AggressiveInstCombinePass,CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass