; LLVM IR from eclipse-threadx/threadx :: ports_smp/mips32_interaptiv_smp/gnu/example_build (demo_threadx)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@lcd_counter = external dso_local global i64, align 8

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local void @lcd_thread_entry(i64 noundef %0) #1 {
  %2 = alloca i64, align 8
  %3 = alloca i32, align 4
  store i64 %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #3
  store i32 0, ptr %3, align 4, !tbaa !9
  br label %4

4:                                                ; preds = %22, %1
  br label %5

5:                                                ; preds = %4
  %6 = call i32 @_tx_thread_sleep(i64 noundef 100)
  %7 = load i64, ptr @lcd_counter, align 8, !tbaa !5
  %8 = add i64 %7, 1
  store i64 %8, ptr @lcd_counter, align 8, !tbaa !5
  %9 = load i32, ptr %3, align 4, !tbaa !9
  switch i32 %9, label %15 [
    i32 0, label %10
    i32 1, label %11
    i32 2, label %12
    i32 3, label %13
    i32 7, label %14
  ]

10:                                               ; preds = %5
  store i64 84, ptr inttoptr (i64 3204449304 to ptr), align 8, !tbaa !5
  store i64 72, ptr inttoptr (i64 3204449312 to ptr), align 8, !tbaa !5
  store i64 82, ptr inttoptr (i64 3204449320 to ptr), align 8, !tbaa !5
  store i64 69, ptr inttoptr (i64 3204449328 to ptr), align 8, !tbaa !5
  store i64 65, ptr inttoptr (i64 3204449336 to ptr), align 8, !tbaa !5
  store i64 68, ptr inttoptr (i64 3204449344 to ptr), align 8, !tbaa !5
  store i64 88, ptr inttoptr (i64 3204449352 to ptr), align 8, !tbaa !5
  store i64 32, ptr inttoptr (i64 3204449360 to ptr), align 8, !tbaa !5
  br label %16

11:                                               ; preds = %5
  store i64 68, ptr inttoptr (i64 3204449304 to ptr), align 8, !tbaa !5
  store i64 101, ptr inttoptr (i64 3204449312 to ptr), align 8, !tbaa !5
  store i64 109, ptr inttoptr (i64 3204449320 to ptr), align 8, !tbaa !5
  store i64 111, ptr inttoptr (i64 3204449328 to ptr), align 8, !tbaa !5
  store i64 32, ptr inttoptr (i64 3204449336 to ptr), align 8, !tbaa !5
  store i64 70, ptr inttoptr (i64 3204449344 to ptr), align 8, !tbaa !5
  store i64 111, ptr inttoptr (i64 3204449352 to ptr), align 8, !tbaa !5
  store i64 114, ptr inttoptr (i64 3204449360 to ptr), align 8, !tbaa !5
  br label %16

12:                                               ; preds = %5
  store i64 77, ptr inttoptr (i64 3204449304 to ptr), align 8, !tbaa !5
  store i64 73, ptr inttoptr (i64 3204449312 to ptr), align 8, !tbaa !5
  store i64 80, ptr inttoptr (i64 3204449320 to ptr), align 8, !tbaa !5
  store i64 83, ptr inttoptr (i64 3204449328 to ptr), align 8, !tbaa !5
  store i64 32, ptr inttoptr (i64 3204449336 to ptr), align 8, !tbaa !5
  store i64 71, ptr inttoptr (i64 3204449344 to ptr), align 8, !tbaa !5
  store i64 78, ptr inttoptr (i64 3204449352 to ptr), align 8, !tbaa !5
  store i64 85, ptr inttoptr (i64 3204449360 to ptr), align 8, !tbaa !5
  br label %16

13:                                               ; preds = %5
  store i64 105, ptr inttoptr (i64 3204449304 to ptr), align 8, !tbaa !5
  store i64 110, ptr inttoptr (i64 3204449312 to ptr), align 8, !tbaa !5
  store i64 116, ptr inttoptr (i64 3204449320 to ptr), align 8, !tbaa !5
  store i64 65, ptr inttoptr (i64 3204449328 to ptr), align 8, !tbaa !5
  store i64 112, ptr inttoptr (i64 3204449336 to ptr), align 8, !tbaa !5
  store i64 116, ptr inttoptr (i64 3204449344 to ptr), align 8, !tbaa !5
  store i64 105, ptr inttoptr (i64 3204449352 to ptr), align 8, !tbaa !5
  store i64 118, ptr inttoptr (i64 3204449360 to ptr), align 8, !tbaa !5
  br label %16

14:                                               ; preds = %5
  store i64 69, ptr inttoptr (i64 3204449304 to ptr), align 8, !tbaa !5
  store i64 82, ptr inttoptr (i64 3204449312 to ptr), align 8, !tbaa !5
  store i64 82, ptr inttoptr (i64 3204449320 to ptr), align 8, !tbaa !5
  store i64 79, ptr inttoptr (i64 3204449328 to ptr), align 8, !tbaa !5
  store i64 82, ptr inttoptr (i64 3204449336 to ptr), align 8, !tbaa !5
  store i64 32, ptr inttoptr (i64 3204449344 to ptr), align 8, !tbaa !5
  store i64 32, ptr inttoptr (i64 3204449352 to ptr), align 8, !tbaa !5
  store i64 32, ptr inttoptr (i64 3204449360 to ptr), align 8, !tbaa !5
  br label %16

15:                                               ; preds = %5
  br label %16

16:                                               ; preds = %15, %14, %13, %12, %11, %10
  %17 = load i32, ptr %3, align 4, !tbaa !9
  %18 = add i32 %17, 1
  store i32 %18, ptr %3, align 4, !tbaa !9
  %19 = load i32, ptr %3, align 4, !tbaa !9
  %20 = icmp ugt i32 %19, 3
  br i1 %20, label %21, label %22

21:                                               ; preds = %16
  store i32 0, ptr %3, align 4, !tbaa !9
  br label %22

22:                                               ; preds = %21, %16
  br label %4
}

declare i32 @_tx_thread_sleep(i64 noundef) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@lcd_counter = external dso_local local_unnamed_addr global i64, align 8

; Function Attrs: noreturn nounwind uwtable
define dso_local void @lcd_thread_entry(i64 noundef %0) local_unnamed_addr #0 {
  br label %.backedge

default.unreachable:                              ; preds = %.backedge
  unreachable

.backedge:                                        ; preds = %.backedge.backedge, %1
  %.0 = phi i32 [ 0, %1 ], [ %.0.be, %.backedge.backedge ]
  %2 = tail call i32 @_tx_thread_sleep(i64 noundef 100) #2
  %3 = load i64, ptr @lcd_counter, align 8, !tbaa !5
  %4 = add i64 %3, 1
  store i64 %4, ptr @lcd_counter, align 8, !tbaa !5
  switch i32 %.0, label %default.unreachable [
    i32 0, label %7
    i32 1, label %5
    i32 2, label %6
    i32 3, label %select.unfold
  ]

5:                                                ; preds = %.backedge
  br label %7

6:                                                ; preds = %.backedge
  br label %7

select.unfold:                                    ; preds = %.backedge
  store i64 105, ptr inttoptr (i64 3204449304 to ptr), align 8, !tbaa !5
  store i64 110, ptr inttoptr (i64 3204449312 to ptr), align 32, !tbaa !5
  store i64 116, ptr inttoptr (i64 3204449320 to ptr), align 8, !tbaa !5
  store i64 65, ptr inttoptr (i64 3204449328 to ptr), align 16, !tbaa !5
  store i64 112, ptr inttoptr (i64 3204449336 to ptr), align 8, !tbaa !5
  store i64 116, ptr inttoptr (i64 3204449344 to ptr), align 64, !tbaa !5
  store i64 105, ptr inttoptr (i64 3204449352 to ptr), align 8, !tbaa !5
  store i64 118, ptr inttoptr (i64 3204449360 to ptr), align 16, !tbaa !5
  br label %.backedge.backedge

.backedge.backedge:                               ; preds = %select.unfold, %7
  %.0.be = phi i32 [ %8, %7 ], [ 0, %select.unfold ]
  br label %.backedge

7:                                                ; preds = %.backedge, %6, %5
  %.sink9 = phi i64 [ 77, %6 ], [ 68, %5 ], [ 84, %.backedge ]
  %.sink8 = phi i64 [ 73, %6 ], [ 101, %5 ], [ 72, %.backedge ]
  %.sink7 = phi i64 [ 80, %6 ], [ 109, %5 ], [ 82, %.backedge ]
  %.sink6 = phi i64 [ 83, %6 ], [ 111, %5 ], [ 69, %.backedge ]
  %.sink5 = phi i64 [ 32, %6 ], [ 32, %5 ], [ 65, %.backedge ]
  %.sink4 = phi i64 [ 71, %6 ], [ 70, %5 ], [ 68, %.backedge ]
  %.sink3 = phi i64 [ 78, %6 ], [ 111, %5 ], [ 88, %.backedge ]
  %.sink = phi i64 [ 85, %6 ], [ 114, %5 ], [ 32, %.backedge ]
  store i64 %.sink9, ptr inttoptr (i64 3204449304 to ptr), align 8, !tbaa !5
  store i64 %.sink8, ptr inttoptr (i64 3204449312 to ptr), align 32, !tbaa !5
  store i64 %.sink7, ptr inttoptr (i64 3204449320 to ptr), align 8, !tbaa !5
  store i64 %.sink6, ptr inttoptr (i64 3204449328 to ptr), align 16, !tbaa !5
  store i64 %.sink5, ptr inttoptr (i64 3204449336 to ptr), align 8, !tbaa !5
  store i64 %.sink4, ptr inttoptr (i64 3204449344 to ptr), align 64, !tbaa !5
  store i64 %.sink3, ptr inttoptr (i64 3204449352 to ptr), align 8, !tbaa !5
  store i64 %.sink, ptr inttoptr (i64 3204449360 to ptr), align 16, !tbaa !5
  %8 = add nuw nsw i32 %.0, 1
  br label %.backedge.backedge
}

declare i32 @_tx_thread_sleep(i64 noundef) local_unnamed_addr #1

attributes #0 = { noreturn nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: CorrelatedValuePropagationPass,GlobalOptPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass