; LLVM IR from huawei-noah/bolt :: compute/tensor/src (power)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.PowerParamSpec = type { float, float, float }
%struct.TensorDesc = type { i32, i32, i32, [20 x i32] }
%struct.ArchInfo = type { i32, ptr }

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z23power_infer_output_sizeP6Tensor14PowerParamSpec8DataTypeS0_P8ArchInfo(ptr noundef %0, <2 x float> %1, float %2, i32 noundef %3, ptr noundef %4, ptr noundef %5) #0 {
  %7 = alloca i32, align 4
  %8 = alloca %struct.PowerParamSpec, align 4
  %9 = alloca { <2 x float>, float }, align 4
  %10 = alloca ptr, align 8
  %11 = alloca i32, align 4
  %12 = alloca ptr, align 8
  %13 = alloca ptr, align 8
  %14 = alloca %struct.TensorDesc, align 4
  %15 = alloca %struct.TensorDesc, align 4
  %16 = alloca i32, align 4
  %17 = alloca %struct.TensorDesc, align 8
  %18 = alloca %struct.PowerParamSpec, align 4
  %19 = alloca { <2 x float>, float }, align 4
  %20 = alloca %struct.TensorDesc, align 8
  %21 = getelementptr inbounds { <2 x float>, float }, ptr %9, i32 0, i32 0
  store <2 x float> %1, ptr %21, align 4
  %22 = getelementptr inbounds { <2 x float>, float }, ptr %9, i32 0, i32 1
  store float %2, ptr %22, align 4
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %8, ptr align 4 %9, i64 12, i1 false)
  store ptr %0, ptr %10, align 8, !tbaa !5
  store i32 %3, ptr %11, align 4, !tbaa !9
  store ptr %4, ptr %12, align 8, !tbaa !5
  store ptr %5, ptr %13, align 8, !tbaa !5
  %23 = load ptr, ptr %10, align 8, !tbaa !5
  %24 = icmp eq ptr %23, null
  br i1 %24, label %28, label %25

25:                                               ; preds = %6
  %26 = load ptr, ptr %12, align 8, !tbaa !5
  %27 = icmp eq ptr %26, null
  br i1 %27, label %28, label %29

28:                                               ; preds = %25, %6
  store i32 1, ptr %7, align 4
  br label %43

29:                                               ; preds = %25
  call void @llvm.lifetime.start.p0(i64 92, ptr %14) #5
  %30 = load ptr, ptr %10, align 8, !tbaa !5
  call void @_ZN6Tensor8get_descEv(ptr dead_on_unwind writable sret(%struct.TensorDesc) align 4 %14, ptr noundef nonnull align 8 dereferenceable(32) %30)
  call void @llvm.lifetime.start.p0(i64 92, ptr %15) #5
  %31 = load ptr, ptr %12, align 8, !tbaa !5
  call void @_ZN6Tensor8get_descEv(ptr dead_on_unwind writable sret(%struct.TensorDesc) align 4 %15, ptr noundef nonnull align 8 dereferenceable(32) %31)
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #5
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %17, ptr align 4 %14, i64 92, i1 false), !tbaa.struct !11
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %18, ptr align 4 %8, i64 12, i1 false), !tbaa.struct !17
  %32 = load i32, ptr %11, align 4, !tbaa !9
  %33 = load ptr, ptr %13, align 8, !tbaa !5
  %34 = getelementptr inbounds %struct.ArchInfo, ptr %33, i32 0, i32 0
  %35 = load i32, ptr %34, align 8, !tbaa !20
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %19, ptr align 4 %18, i64 12, i1 false)
  %36 = getelementptr inbounds { <2 x float>, float }, ptr %19, i32 0, i32 0
  %37 = load <2 x float>, ptr %36, align 4
  %38 = getelementptr inbounds { <2 x float>, float }, ptr %19, i32 0, i32 1
  %39 = load float, ptr %38, align 4
  %40 = call noundef i32 @_Z27power_infer_output_size_cpu10TensorDesc14PowerParamSpec8DataTypePS_4Arch(ptr noundef byval(%struct.TensorDesc) align 8 %17, <2 x float> %37, float %39, i32 noundef %32, ptr noundef %15, i32 noundef %35)
  store i32 %40, ptr %16, align 4, !tbaa !23
  %41 = load ptr, ptr %12, align 8, !tbaa !5
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %20, ptr align 4 %15, i64 92, i1 false), !tbaa.struct !11
  call void @_ZN6Tensor6resizeE10TensorDesc(ptr noundef nonnull align 8 dereferenceable(32) %41, ptr noundef byval(%struct.TensorDesc) align 8 %20)
  %42 = load i32, ptr %16, align 4, !tbaa !23
  store i32 %42, ptr %7, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #5
  call void @llvm.lifetime.end.p0(i64 92, ptr %15) #5
  call void @llvm.lifetime.end.p0(i64 92, ptr %14) #5
  br label %43

43:                                               ; preds = %29, %28
  %44 = load i32, ptr %7, align 4
  ret i32 %44
}

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN6Tensor8get_descEv(ptr dead_on_unwind noalias writable sret(%struct.TensorDesc) align 4, ptr noundef nonnull align 8 dereferenceable(32)) #3 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z27power_infer_output_size_cpu10TensorDesc14PowerParamSpec8DataTypePS_4Arch(ptr noundef byval(%struct.TensorDesc) align 8, <2 x float>, float, i32 noundef, ptr noundef, i32 noundef) #4

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN6Tensor6resizeE10TensorDesc(ptr noundef nonnull align 8 dereferenceable(32), ptr noundef byval(%struct.TensorDesc) align 8) #3 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="64" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="64" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"_ZTS8DataType", !7, i64 0}
!11 = !{i64 0, i64 4, !9, i64 4, i64 4, !12, i64 8, i64 4, !14, i64 12, i64 80, !16}
!12 = !{!13, !13, i64 0}
!13 = !{!"_ZTS10DataFormat", !7, i64 0}
!14 = !{!15, !15, i64 0}
!15 = !{!"int", !7, i64 0}
!16 = !{!7, !7, i64 0}
!17 = !{i64 0, i64 4, !18, i64 4, i64 4, !18, i64 8, i64 4, !18}
!18 = !{!19, !19, i64 0}
!19 = !{!"float", !7, i64 0}
!20 = !{!21, !22, i64 0}
!21 = !{!"_ZTS8ArchInfo", !22, i64 0, !6, i64 8}
!22 = !{!"_ZTS4Arch", !7, i64 0}
!23 = !{!24, !24, i64 0}
!24 = !{!"_ZTS2EE", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.TensorDesc = type { i32, i32, i32, [20 x i32] }

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z23power_infer_output_sizeP6Tensor14PowerParamSpec8DataTypeS0_P8ArchInfo(ptr noundef %0, <2 x float> %1, float %2, i32 noundef %3, ptr noundef %4, ptr nocapture noundef readonly %5) local_unnamed_addr #0 {
  %7 = alloca %struct.TensorDesc, align 8
  %8 = alloca %struct.TensorDesc, align 8
  %9 = icmp eq ptr %0, null
  %10 = icmp eq ptr %4, null
  %or.cond = or i1 %9, %10
  br i1 %or.cond, label %14, label %11

11:                                               ; preds = %6
  call void @llvm.lifetime.start.p0(i64 92, ptr nonnull %7) #4
  call void @_ZN6Tensor8get_descEv(ptr dead_on_unwind nonnull writable sret(%struct.TensorDesc) align 4 %7, ptr noundef nonnull align 8 dereferenceable(32) %0)
  call void @llvm.lifetime.start.p0(i64 92, ptr nonnull %8) #4
  call void @_ZN6Tensor8get_descEv(ptr dead_on_unwind nonnull writable sret(%struct.TensorDesc) align 4 %8, ptr noundef nonnull align 8 dereferenceable(32) %4)
  %12 = load i32, ptr %5, align 8, !tbaa !5
  %13 = call noundef i32 @_Z27power_infer_output_size_cpu10TensorDesc14PowerParamSpec8DataTypePS_4Arch(ptr noundef nonnull byval(%struct.TensorDesc) align 8 %7, <2 x float> %1, float %2, i32 noundef %3, ptr noundef nonnull %8, i32 noundef %12)
  call void @_ZN6Tensor6resizeE10TensorDesc(ptr noundef nonnull align 8 dereferenceable(32) %4, ptr noundef nonnull byval(%struct.TensorDesc) align 8 %8)
  call void @llvm.lifetime.end.p0(i64 92, ptr nonnull %8) #4
  call void @llvm.lifetime.end.p0(i64 92, ptr nonnull %7) #4
  br label %14

14:                                               ; preds = %6, %11
  %.0 = phi i32 [ %13, %11 ], [ 1, %6 ]
  ret i32 %.0
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN6Tensor8get_descEv(ptr dead_on_unwind noalias writable sret(%struct.TensorDesc) align 4, ptr noundef nonnull align 8 dereferenceable(32)) local_unnamed_addr #2 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z27power_infer_output_size_cpu10TensorDesc14PowerParamSpec8DataTypePS_4Arch(ptr noundef byval(%struct.TensorDesc) align 8, <2 x float>, float, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #3

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN6Tensor6resizeE10TensorDesc(ptr noundef nonnull align 8 dereferenceable(32), ptr noundef byval(%struct.TensorDesc) align 8) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="64" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="64" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"_ZTS8ArchInfo", !7, i64 0, !10, i64 8}
!7 = !{!"_ZTS4Arch", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}


; Effective O3 passes: DSEPass,EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,MemCpyOptPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass