; LLVM IR from huawei-noah/bolt :: compute/tensor/src (detectionoutput)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.DetectionOutputParamSpec = type { i32, float, i32, i32, float }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<TensorDesc, std::allocator<TensorDesc>>::_Vector_impl" }
%"struct.std::_Vector_base<TensorDesc, std::allocator<TensorDesc>>::_Vector_impl" = type { %"struct.std::_Vector_base<TensorDesc, std::allocator<TensorDesc>>::_Vector_impl_data" }
%"struct.std::_Vector_base<TensorDesc, std::allocator<TensorDesc>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<Tensor *, std::allocator<Tensor *>>::_Vector_impl" }
%"struct.std::_Vector_base<Tensor *, std::allocator<Tensor *>>::_Vector_impl" = type { %"struct.std::_Vector_base<Tensor *, std::allocator<Tensor *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Tensor *, std::allocator<Tensor *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%struct.TensorDesc = type { i32, i32, i32, [20 x i32] }

@.str = external hidden unnamed_addr constant [20 x i8], align 1
@stdout = external global ptr, align 8
@.str.1 = external hidden unnamed_addr constant [18 x i8], align 1

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z33detectionoutput_infer_output_sizeSt6vectorIP6TensorSaIS1_EE24DetectionOutputParamSpecS1_P8ArchInfo(ptr noundef %0, ptr noundef byval(%struct.DetectionOutputParamSpec) align 8 %1, ptr noundef %2, ptr noundef %3) #0 personality ptr @__gxx_personality_v0 {
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca %"class.std::vector.0", align 8
  %11 = alloca %"class.std::vector", align 8
  %12 = alloca ptr, align 8
  %13 = alloca i32, align 4
  %14 = alloca %struct.TensorDesc, align 4
  %15 = alloca i32, align 4
  %16 = alloca %"class.std::vector.0", align 8
  %17 = alloca %struct.DetectionOutputParamSpec, align 8
  %18 = alloca i32, align 4
  %19 = alloca %struct.TensorDesc, align 8
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %2, ptr %6, align 8, !tbaa !5
  store ptr %3, ptr %7, align 8, !tbaa !5
  %20 = load ptr, ptr %6, align 8, !tbaa !5
  %21 = icmp eq ptr %20, null
  br i1 %21, label %22, label %38

22:                                               ; preds = %4
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #9
  store i32 1, ptr %8, align 4, !tbaa !9
  %23 = load i32, ptr %8, align 4, !tbaa !9
  %24 = icmp ne i32 %23, 0
  br i1 %24, label %25, label %37

25:                                               ; preds = %22
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #9
  %26 = call i64 (i64, ...) @syscall(i64 noundef 186) #9
  %27 = trunc i64 %26 to i32
  store i32 %27, ptr %9, align 4, !tbaa !11
  %28 = load i32, ptr %9, align 4, !tbaa !11
  %29 = call i32 (ptr, ...) @printf(ptr noundef @.str, i32 noundef %28)
  %30 = load ptr, ptr @stdout, align 8, !tbaa !5
  %31 = call i32 @fflush(ptr noundef %30)
  %32 = load i32, ptr %8, align 4, !tbaa !9
  %33 = call ptr @ee2str(i32 noundef %32)
  %34 = call i32 (ptr, ...) @printf(ptr noundef @.str.1, ptr noundef %33)
  %35 = load ptr, ptr @stdout, align 8, !tbaa !5
  %36 = call i32 @fflush(ptr noundef %35)
  call void @exit(i32 noundef 1) #10
  unreachable

37:                                               ; preds = %22
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #9
  br label %38

38:                                               ; preds = %37, %4
  call void @llvm.lifetime.start.p0(i64 24, ptr %10) #9
  call void @_ZNSt6vectorIP6TensorSaIS1_EEC2ERKS3_(ptr noundef nonnull align 8 dereferenceable(24) %11, ptr noundef nonnull align 8 dereferenceable(24) %0)
  invoke void @_Z25get_desc_from_tensor_ptrsSt6vectorIP6TensorSaIS1_EE(ptr dead_on_unwind writable sret(%"class.std::vector.0") align 8 %10, ptr noundef %11)
          to label %39 unwind label %64

39:                                               ; preds = %38
  call void @_ZNSt6vectorIP6TensorSaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %11) #9
  call void @llvm.lifetime.start.p0(i64 92, ptr %14) #9
  %40 = load ptr, ptr %6, align 8, !tbaa !5
  invoke void @_ZN6Tensor8get_descEv(ptr dead_on_unwind writable sret(%struct.TensorDesc) align 4 %14, ptr noundef nonnull align 8 dereferenceable(32) %40)
          to label %41 unwind label %68

41:                                               ; preds = %39
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #9
  invoke void @_ZNSt6vectorI10TensorDescSaIS0_EEC2ERKS2_(ptr noundef nonnull align 8 dereferenceable(24) %16, ptr noundef nonnull align 8 dereferenceable(24) %10)
          to label %42 unwind label %72

42:                                               ; preds = %41
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %17, ptr align 8 %1, i64 20, i1 false), !tbaa.struct !13
  %43 = invoke noundef i32 @_Z37detectionoutput_infer_output_size_cpuSt6vectorI10TensorDescSaIS0_EE24DetectionOutputParamSpecPS0_(ptr noundef %16, ptr noundef byval(%struct.DetectionOutputParamSpec) align 8 %17, ptr noundef %14)
          to label %44 unwind label %76

44:                                               ; preds = %42
  call void @_ZNSt6vectorI10TensorDescSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %16) #9
  store i32 %43, ptr %15, align 4, !tbaa !9
  %45 = load i32, ptr %15, align 4, !tbaa !9
  %46 = icmp ne i32 %45, 0
  br i1 %46, label %47, label %84

47:                                               ; preds = %44
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #9
  %48 = call i64 (i64, ...) @syscall(i64 noundef 186) #9
  %49 = trunc i64 %48 to i32
  store i32 %49, ptr %18, align 4, !tbaa !11
  %50 = load i32, ptr %18, align 4, !tbaa !11
  %51 = invoke i32 (ptr, ...) @printf(ptr noundef @.str, i32 noundef %50)
          to label %52 unwind label %80

52:                                               ; preds = %47
  %53 = load ptr, ptr @stdout, align 8, !tbaa !5
  %54 = invoke i32 @fflush(ptr noundef %53)
          to label %55 unwind label %80

55:                                               ; preds = %52
  %56 = load i32, ptr %15, align 4, !tbaa !9
  %57 = invoke ptr @ee2str(i32 noundef %56)
          to label %58 unwind label %80

58:                                               ; preds = %55
  %59 = invoke i32 (ptr, ...) @printf(ptr noundef @.str.1, ptr noundef %57)
          to label %60 unwind label %80

60:                                               ; preds = %58
  %61 = load ptr, ptr @stdout, align 8, !tbaa !5
  %62 = invoke i32 @fflush(ptr noundef %61)
          to label %63 unwind label %80

63:                                               ; preds = %60
  call void @exit(i32 noundef 1) #10
  unreachable

64:                                               ; preds = %38
  %65 = landingpad { ptr, i32 }
          cleanup
  %66 = extractvalue { ptr, i32 } %65, 0
  store ptr %66, ptr %12, align 8
  %67 = extractvalue { ptr, i32 } %65, 1
  store i32 %67, ptr %13, align 4
  call void @_ZNSt6vectorIP6TensorSaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %11) #9
  br label %89

68:                                               ; preds = %84, %39
  %69 = landingpad { ptr, i32 }
          cleanup
  %70 = extractvalue { ptr, i32 } %69, 0
  store ptr %70, ptr %12, align 8
  %71 = extractvalue { ptr, i32 } %69, 1
  store i32 %71, ptr %13, align 4
  br label %88

72:                                               ; preds = %41
  %73 = landingpad { ptr, i32 }
          cleanup
  %74 = extractvalue { ptr, i32 } %73, 0
  store ptr %74, ptr %12, align 8
  %75 = extractvalue { ptr, i32 } %73, 1
  store i32 %75, ptr %13, align 4
  br label %87

76:                                               ; preds = %42
  %77 = landingpad { ptr, i32 }
          cleanup
  %78 = extractvalue { ptr, i32 } %77, 0
  store ptr %78, ptr %12, align 8
  %79 = extractvalue { ptr, i32 } %77, 1
  store i32 %79, ptr %13, align 4
  call void @_ZNSt6vectorI10TensorDescSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %16) #9
  br label %87

80:                                               ; preds = %60, %58, %55, %52, %47
  %81 = landingpad { ptr, i32 }
          cleanup
  %82 = extractvalue { ptr, i32 } %81, 0
  store ptr %82, ptr %12, align 8
  %83 = extractvalue { ptr, i32 } %81, 1
  store i32 %83, ptr %13, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #9
  br label %87

84:                                               ; preds = %44
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #9
  %85 = load ptr, ptr %6, align 8, !tbaa !5
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %19, ptr align 4 %14, i64 92, i1 false), !tbaa.struct !16
  invoke void @_ZN6Tensor6resizeE10TensorDesc(ptr noundef nonnull align 8 dereferenceable(32) %85, ptr noundef byval(%struct.TensorDesc) align 8 %19)
          to label %86 unwind label %68

86:                                               ; preds = %84
  call void @llvm.lifetime.end.p0(i64 92, ptr %14) #9
  call void @_ZNSt6vectorI10TensorDescSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %10) #9
  call void @llvm.lifetime.end.p0(i64 24, ptr %10) #9
  ret i32 0

87:                                               ; preds = %80, %76, %72
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #9
  br label %88

88:                                               ; preds = %87, %68
  call void @llvm.lifetime.end.p0(i64 92, ptr %14) #9
  call void @_ZNSt6vectorI10TensorDescSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %10) #9
  br label %89

89:                                               ; preds = %88, %64
  call void @llvm.lifetime.end.p0(i64 24, ptr %10) #9
  br label %90

90:                                               ; preds = %89
  %91 = load ptr, ptr %12, align 8
  %92 = load i32, ptr %13, align 4
  %93 = insertvalue { ptr, i32 } poison, ptr %91, 0
  %94 = insertvalue { ptr, i32 } %93, i32 %92, 1
  resume { ptr, i32 } %94
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind
declare i64 @syscall(i64 noundef, ...) #2

declare i32 @printf(ptr noundef, ...) #3

declare i32 @fflush(ptr noundef) #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local ptr @ee2str(i32 noundef) #4

; Function Attrs: noreturn nounwind
declare void @exit(i32 noundef) #5

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_Z25get_desc_from_tensor_ptrsSt6vectorIP6TensorSaIS1_EE(ptr dead_on_unwind noalias writable sret(%"class.std::vector.0") align 8, ptr noundef) #6

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIP6TensorSaIS1_EEC2ERKS3_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #0 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIP6TensorSaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #7 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN6Tensor8get_descEv(ptr dead_on_unwind noalias writable sret(%struct.TensorDesc) align 4, ptr noundef nonnull align 8 dereferenceable(32)) #0 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef i32 @_Z37detectionoutput_infer_output_size_cpuSt6vectorI10TensorDescSaIS0_EE24DetectionOutputParamSpecPS0_(ptr noundef, ptr noundef byval(%struct.DetectionOutputParamSpec) align 8, ptr noundef) #6

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorI10TensorDescSaIS0_EEC2ERKS2_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #0 align 2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #8

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorI10TensorDescSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #7 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN6Tensor6resizeE10TensorDesc(ptr noundef nonnull align 8 dereferenceable(32), ptr noundef byval(%struct.TensorDesc) align 8) #0 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #8 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #9 = { nounwind }
attributes #10 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"_ZTS2EE", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{i64 0, i64 4, !11, i64 4, i64 4, !14, i64 8, i64 4, !11, i64 12, i64 4, !11, i64 16, i64 4, !14}
!14 = !{!15, !15, i64 0}
!15 = !{!"float", !7, i64 0}
!16 = !{i64 0, i64 4, !17, i64 4, i64 4, !19, i64 8, i64 4, !11, i64 12, i64 80, !21}
!17 = !{!18, !18, i64 0}
!18 = !{!"_ZTS8DataType", !7, i64 0}
!19 = !{!20, !20, i64 0}
!20 = !{!"_ZTS10DataFormat", !7, i64 0}
!21 = !{!7, !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.DetectionOutputParamSpec = type { i32, float, i32, i32, float }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<TensorDesc, std::allocator<TensorDesc>>::_Vector_impl" }
%"struct.std::_Vector_base<TensorDesc, std::allocator<TensorDesc>>::_Vector_impl" = type { %"struct.std::_Vector_base<TensorDesc, std::allocator<TensorDesc>>::_Vector_impl_data" }
%"struct.std::_Vector_base<TensorDesc, std::allocator<TensorDesc>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<Tensor *, std::allocator<Tensor *>>::_Vector_impl" }
%"struct.std::_Vector_base<Tensor *, std::allocator<Tensor *>>::_Vector_impl" = type { %"struct.std::_Vector_base<Tensor *, std::allocator<Tensor *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Tensor *, std::allocator<Tensor *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%struct.TensorDesc = type { i32, i32, i32, [20 x i32] }

@.str = external hidden unnamed_addr constant [20 x i8], align 1
@stdout = external local_unnamed_addr global ptr, align 8
@.str.1 = external hidden unnamed_addr constant [18 x i8], align 1

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z33detectionoutput_infer_output_sizeSt6vectorIP6TensorSaIS1_EE24DetectionOutputParamSpecS1_P8ArchInfo(ptr noundef %0, ptr nocapture noundef readonly byval(%struct.DetectionOutputParamSpec) align 8 %1, ptr noundef %2, ptr nocapture noundef readnone %3) local_unnamed_addr #0 personality ptr @__gxx_personality_v0 {
  %5 = alloca %"class.std::vector.0", align 8
  %6 = alloca %"class.std::vector", align 8
  %7 = alloca %struct.TensorDesc, align 8
  %8 = alloca %"class.std::vector.0", align 8
  %9 = icmp eq ptr %2, null
  br i1 %9, label %10, label %20

10:                                               ; preds = %4
  %11 = tail call i64 (i64, ...) @syscall(i64 noundef 186) #8
  %12 = trunc i64 %11 to i32
  %13 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str, i32 noundef %12)
  %14 = load ptr, ptr @stdout, align 8, !tbaa !5
  %15 = tail call i32 @fflush(ptr noundef %14)
  %16 = tail call ptr @ee2str(i32 noundef 1)
  %17 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.1, ptr noundef %16)
  %18 = load ptr, ptr @stdout, align 8, !tbaa !5
  %19 = tail call i32 @fflush(ptr noundef %18)
  tail call void @exit(i32 noundef 1) #9
  unreachable

20:                                               ; preds = %4
  call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %5) #8
  call void @_ZNSt6vectorIP6TensorSaIS1_EEC2ERKS3_(ptr noundef nonnull align 8 dereferenceable(24) %6, ptr noundef nonnull align 8 dereferenceable(24) %0)
  invoke void @_Z25get_desc_from_tensor_ptrsSt6vectorIP6TensorSaIS1_EE(ptr dead_on_unwind nonnull writable sret(%"class.std::vector.0") align 8 %5, ptr noundef nonnull %6)
          to label %21 unwind label %36

21:                                               ; preds = %20
  call void @_ZNSt6vectorIP6TensorSaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %6) #8
  call void @llvm.lifetime.start.p0(i64 92, ptr nonnull %7) #8
  invoke void @_ZN6Tensor8get_descEv(ptr dead_on_unwind nonnull writable sret(%struct.TensorDesc) align 4 %7, ptr noundef nonnull align 8 dereferenceable(32) %2)
          to label %22 unwind label %38

22:                                               ; preds = %21
  invoke void @_ZNSt6vectorI10TensorDescSaIS0_EEC2ERKS2_(ptr noundef nonnull align 8 dereferenceable(24) %8, ptr noundef nonnull align 8 dereferenceable(24) %5)
          to label %23 unwind label %40

23:                                               ; preds = %22
  %24 = invoke noundef i32 @_Z37detectionoutput_infer_output_size_cpuSt6vectorI10TensorDescSaIS0_EE24DetectionOutputParamSpecPS0_(ptr noundef nonnull %8, ptr noundef nonnull byval(%struct.DetectionOutputParamSpec) align 8 %1, ptr noundef nonnull %7)
          to label %25 unwind label %42

25:                                               ; preds = %23
  call void @_ZNSt6vectorI10TensorDescSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %8) #8
  %.not = icmp eq i32 %24, 0
  br i1 %.not, label %44, label %26

26:                                               ; preds = %25
  %27 = call i64 (i64, ...) @syscall(i64 noundef 186) #8
  %28 = trunc i64 %27 to i32
  %29 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str, i32 noundef %28)
  %30 = load ptr, ptr @stdout, align 8, !tbaa !5
  %31 = call i32 @fflush(ptr noundef %30)
  %32 = call ptr @ee2str(i32 noundef %24)
  %33 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.1, ptr noundef %32)
  %34 = load ptr, ptr @stdout, align 8, !tbaa !5
  %35 = call i32 @fflush(ptr noundef %34)
  call void @exit(i32 noundef 1) #9
  unreachable

36:                                               ; preds = %20
  %37 = landingpad { ptr, i32 }
          cleanup
  call void @_ZNSt6vectorIP6TensorSaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %6) #8
  br label %47

38:                                               ; preds = %44, %21
  %39 = landingpad { ptr, i32 }
          cleanup
  br label %46

40:                                               ; preds = %22
  %41 = landingpad { ptr, i32 }
          cleanup
  br label %46

42:                                               ; preds = %23
  %43 = landingpad { ptr, i32 }
          cleanup
  call void @_ZNSt6vectorI10TensorDescSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %8) #8
  br label %46

44:                                               ; preds = %25
  invoke void @_ZN6Tensor6resizeE10TensorDesc(ptr noundef nonnull align 8 dereferenceable(32) %2, ptr noundef nonnull byval(%struct.TensorDesc) align 8 %7)
          to label %45 unwind label %38

45:                                               ; preds = %44
  call void @llvm.lifetime.end.p0(i64 92, ptr nonnull %7) #8
  call void @_ZNSt6vectorI10TensorDescSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %5) #8
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %5) #8
  ret i32 0

46:                                               ; preds = %40, %42, %38
  %.pn15 = phi { ptr, i32 } [ %39, %38 ], [ %43, %42 ], [ %41, %40 ]
  call void @llvm.lifetime.end.p0(i64 92, ptr nonnull %7) #8
  call void @_ZNSt6vectorI10TensorDescSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %5) #8
  br label %47

47:                                               ; preds = %46, %36
  %.pn15.pn = phi { ptr, i32 } [ %.pn15, %46 ], [ %37, %36 ]
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %5) #8
  resume { ptr, i32 } %.pn15.pn
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind
declare i64 @syscall(i64 noundef, ...) local_unnamed_addr #2

; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #3

; Function Attrs: nofree nounwind
declare noundef i32 @fflush(ptr nocapture noundef) local_unnamed_addr #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local ptr @ee2str(i32 noundef) local_unnamed_addr #4

; Function Attrs: noreturn nounwind
declare void @exit(i32 noundef) local_unnamed_addr #5

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_Z25get_desc_from_tensor_ptrsSt6vectorIP6TensorSaIS1_EE(ptr dead_on_unwind noalias writable sret(%"class.std::vector.0") align 8, ptr noundef) local_unnamed_addr #6

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIP6TensorSaIS1_EEC2ERKS3_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #0 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIP6TensorSaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #7 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN6Tensor8get_descEv(ptr dead_on_unwind noalias writable sret(%struct.TensorDesc) align 4, ptr noundef nonnull align 8 dereferenceable(32)) local_unnamed_addr #0 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef i32 @_Z37detectionoutput_infer_output_size_cpuSt6vectorI10TensorDescSaIS0_EE24DetectionOutputParamSpecPS0_(ptr noundef, ptr noundef byval(%struct.DetectionOutputParamSpec) align 8, ptr noundef) local_unnamed_addr #6

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorI10TensorDescSaIS0_EEC2ERKS2_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorI10TensorDescSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #7 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN6Tensor6resizeE10TensorDesc(ptr noundef nonnull align 8 dereferenceable(32), ptr noundef byval(%struct.TensorDesc) align 8) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #8 = { nounwind }
attributes #9 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: DSEPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,MemCpyOptPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass