; LLVM IR from trustwallet/wallet-core :: trezor-crypto/crypto (slip39)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.anon = type { i16, i16 }

@words_button_seq = external hidden constant [1024 x %struct.anon], align 16

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare hidden zeroext i16 @find_sequence(i16 noundef zeroext) #1

; Function Attrs: nounwind uwtable
define dso_local zeroext i16 @slip39_word_completion_mask(i16 noundef zeroext %0) #1 {
  %2 = alloca i16, align 2
  %3 = alloca i16, align 2
  %4 = alloca i16, align 2
  %5 = alloca i16, align 2
  %6 = alloca i16, align 2
  %7 = alloca i16, align 2
  %8 = alloca i16, align 2
  %9 = alloca i8, align 1
  store i16 %0, ptr %3, align 2, !tbaa !5
  %10 = load i16, ptr %3, align 2, !tbaa !5
  %11 = zext i16 %10 to i32
  %12 = icmp sge i32 %11, 1000
  br i1 %12, label %13, label %14

13:                                               ; preds = %1
  store i16 0, ptr %2, align 2
  br label %79

14:                                               ; preds = %1
  call void @llvm.lifetime.start.p0(i64 2, ptr %4) #2
  %15 = load i16, ptr %3, align 2, !tbaa !5
  store i16 %15, ptr %4, align 2, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 2, ptr %5) #2
  %16 = load i16, ptr %3, align 2, !tbaa !5
  %17 = zext i16 %16 to i32
  %18 = add nsw i32 %17, 1
  %19 = trunc i32 %18 to i16
  store i16 %19, ptr %5, align 2, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 2, ptr %6) #2
  store i16 1, ptr %6, align 2, !tbaa !5
  br label %20

20:                                               ; preds = %24, %14
  %21 = load i16, ptr %5, align 2, !tbaa !5
  %22 = zext i16 %21 to i32
  %23 = icmp sle i32 %22, 1000
  br i1 %23, label %24, label %37

24:                                               ; preds = %20
  %25 = load i16, ptr %4, align 2, !tbaa !5
  %26 = zext i16 %25 to i32
  %27 = mul nsw i32 %26, 10
  %28 = trunc i32 %27 to i16
  store i16 %28, ptr %4, align 2, !tbaa !5
  %29 = load i16, ptr %5, align 2, !tbaa !5
  %30 = zext i16 %29 to i32
  %31 = mul nsw i32 %30, 10
  %32 = trunc i32 %31 to i16
  store i16 %32, ptr %5, align 2, !tbaa !5
  %33 = load i16, ptr %6, align 2, !tbaa !5
  %34 = zext i16 %33 to i32
  %35 = mul nsw i32 %34, 10
  %36 = trunc i32 %35 to i16
  store i16 %36, ptr %6, align 2, !tbaa !5
  br label %20, !llvm.loop !9

37:                                               ; preds = %20
  %38 = load i16, ptr %6, align 2, !tbaa !5
  %39 = zext i16 %38 to i32
  %40 = sdiv i32 %39, 10
  %41 = trunc i32 %40 to i16
  store i16 %41, ptr %6, align 2, !tbaa !5
  %42 = load i16, ptr %4, align 2, !tbaa !5
  %43 = call zeroext i16 @find_sequence(i16 noundef zeroext %42)
  store i16 %43, ptr %4, align 2, !tbaa !5
  %44 = load i16, ptr %5, align 2, !tbaa !5
  %45 = call zeroext i16 @find_sequence(i16 noundef zeroext %44)
  store i16 %45, ptr %5, align 2, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 2, ptr %7) #2
  store i16 0, ptr %7, align 2, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 2, ptr %8) #2
  %46 = load i16, ptr %4, align 2, !tbaa !5
  store i16 %46, ptr %8, align 2, !tbaa !5
  br label %47

47:                                               ; preds = %74, %37
  %48 = load i16, ptr %8, align 2, !tbaa !5
  %49 = zext i16 %48 to i32
  %50 = load i16, ptr %5, align 2, !tbaa !5
  %51 = zext i16 %50 to i32
  %52 = icmp slt i32 %49, %51
  br i1 %52, label %54, label %53

53:                                               ; preds = %47
  call void @llvm.lifetime.end.p0(i64 2, ptr %8) #2
  br label %77

54:                                               ; preds = %47
  call void @llvm.lifetime.start.p0(i64 1, ptr %9) #2
  %55 = load i16, ptr %8, align 2, !tbaa !5
  %56 = zext i16 %55 to i64
  %57 = getelementptr inbounds [1024 x %struct.anon], ptr @words_button_seq, i64 0, i64 %56
  %58 = getelementptr inbounds %struct.anon, ptr %57, i32 0, i32 0
  %59 = load i16, ptr %58, align 4, !tbaa !11
  %60 = zext i16 %59 to i32
  %61 = load i16, ptr %6, align 2, !tbaa !5
  %62 = zext i16 %61 to i32
  %63 = sdiv i32 %60, %62
  %64 = srem i32 %63, 10
  %65 = trunc i32 %64 to i8
  store i8 %65, ptr %9, align 1, !tbaa !13
  %66 = load i8, ptr %9, align 1, !tbaa !13
  %67 = zext i8 %66 to i32
  %68 = sub nsw i32 %67, 1
  %69 = shl i32 1, %68
  %70 = load i16, ptr %7, align 2, !tbaa !5
  %71 = zext i16 %70 to i32
  %72 = or i32 %71, %69
  %73 = trunc i32 %72 to i16
  store i16 %73, ptr %7, align 2, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 1, ptr %9) #2
  br label %74

74:                                               ; preds = %54
  %75 = load i16, ptr %8, align 2, !tbaa !5
  %76 = add i16 %75, 1
  store i16 %76, ptr %8, align 2, !tbaa !5
  br label %47, !llvm.loop !14

77:                                               ; preds = %53
  %78 = load i16, ptr %7, align 2, !tbaa !5
  store i16 %78, ptr %2, align 2
  call void @llvm.lifetime.end.p0(i64 2, ptr %7) #2
  call void @llvm.lifetime.end.p0(i64 2, ptr %6) #2
  call void @llvm.lifetime.end.p0(i64 2, ptr %5) #2
  call void @llvm.lifetime.end.p0(i64 2, ptr %4) #2
  br label %79

79:                                               ; preds = %77, %13
  %80 = load i16, ptr %2, align 2
  ret i16 %80
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"short", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!12, !6, i64 0}
!12 = !{!"", !6, i64 0, !6, i64 2}
!13 = !{!7, !7, i64 0}
!14 = distinct !{!14, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.anon = type { i16, i16 }

@words_button_seq = external hidden local_unnamed_addr constant [1024 x %struct.anon], align 16

; Function Attrs: nounwind uwtable
declare hidden zeroext i16 @find_sequence(i16 noundef zeroext) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local zeroext i16 @slip39_word_completion_mask(i16 noundef zeroext %0) local_unnamed_addr #0 {
  %2 = icmp ugt i16 %0, 999
  br i1 %2, label %.loopexit, label %.lr.ph.preheader

.lr.ph.preheader:                                 ; preds = %1
  %narrow = add nuw nsw i16 %0, 1
  br label %.lr.ph

.lr.ph:                                           ; preds = %.lr.ph.preheader, %.lr.ph
  %.02230 = phi i16 [ %4, %.lr.ph ], [ 1, %.lr.ph.preheader ]
  %.02329 = phi i16 [ %narrow27, %.lr.ph ], [ %narrow, %.lr.ph.preheader ]
  %.02428 = phi i16 [ %3, %.lr.ph ], [ %0, %.lr.ph.preheader ]
  %3 = mul i16 %.02428, 10
  %narrow27 = mul nuw nsw i16 %.02329, 10
  %4 = mul i16 %.02230, 10
  %5 = icmp ult i16 %.02329, 101
  br i1 %5, label %.lr.ph, label %._crit_edge, !llvm.loop !5

._crit_edge:                                      ; preds = %.lr.ph
  %6 = udiv i16 %4, 10
  %7 = tail call zeroext i16 @find_sequence(i16 noundef zeroext %3)
  %8 = tail call zeroext i16 @find_sequence(i16 noundef zeroext %narrow27)
  %9 = icmp ult i16 %7, %8
  br i1 %9, label %.lr.ph36.preheader, label %.loopexit

.lr.ph36.preheader:                               ; preds = %._crit_edge
  %10 = zext i16 %7 to i64
  %wide.trip.count = zext i16 %8 to i64
  br label %.lr.ph36

.lr.ph36:                                         ; preds = %.lr.ph36.preheader, %.lr.ph36
  %indvars.iv = phi i64 [ %10, %.lr.ph36.preheader ], [ %indvars.iv.next, %.lr.ph36 ]
  %.02133 = phi i16 [ 0, %.lr.ph36.preheader ], [ %19, %.lr.ph36 ]
  %11 = getelementptr inbounds [1024 x %struct.anon], ptr @words_button_seq, i64 0, i64 %indvars.iv
  %12 = load i16, ptr %11, align 4, !tbaa !7
  %13 = udiv i16 %12, %6
  %14 = urem i16 %13, 10
  %15 = zext nneg i16 %14 to i32
  %16 = add nsw i32 %15, -1
  %17 = shl nuw nsw i32 1, %16
  %18 = trunc i32 %17 to i16
  %19 = or i16 %.02133, %18
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
  br i1 %exitcond.not, label %.loopexit, label %.lr.ph36, !llvm.loop !12

.loopexit:                                        ; preds = %.lr.ph36, %._crit_edge, %1
  %.0 = phi i16 [ 0, %1 ], [ 0, %._crit_edge ], [ %19, %.lr.ph36 ]
  ret i16 %.0
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = !{!8, !9, i64 0}
!8 = !{!"", !9, i64 0, !9, i64 2}
!9 = !{!"short", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = distinct !{!12, !6}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass