; LLVM IR from AF-GRILL/DISPluginForUnreal :: Source/ThirdParty/include/dis7/ActionRequestPdu.ll (ZNK3DIS16ActionRequestPdueqERKS0_)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.DIS::ActionRequestPdu" = type { %"class.DIS::SimulationManagementFamilyPdu", %"class.DIS::EntityID", %"class.DIS::EntityID", i32, i32, i32, i32, %"class.std::vector", %"class.std::vector.0" }
%"class.DIS::SimulationManagementFamilyPdu" = type { %"class.DIS::Pdu.base", [4 x i8], %"class.DIS::EntityID", %"class.DIS::EntityID" }
%"class.DIS::Pdu.base" = type { %"class.DIS::PduSuperclass.base", i8, i8 }
%"class.DIS::PduSuperclass.base" = type <{ ptr, i8, i8, i8, i8, i32, i16 }>
%"class.DIS::EntityID" = type <{ ptr, %"class.DIS::SimulationAddress", i16, [6 x i8] }>
%"class.DIS::SimulationAddress" = type <{ ptr, i16, i16, [4 x i8] }>
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<DIS::FixedDatum, std::allocator<DIS::FixedDatum>>::_Vector_impl" }
%"struct.std::_Vector_base<DIS::FixedDatum, std::allocator<DIS::FixedDatum>>::_Vector_impl" = type { %"struct.std::_Vector_base<DIS::FixedDatum, std::allocator<DIS::FixedDatum>>::_Vector_impl_data" }
%"struct.std::_Vector_base<DIS::FixedDatum, std::allocator<DIS::FixedDatum>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<DIS::VariableDatum, std::allocator<DIS::VariableDatum>>::_Vector_impl" }
%"struct.std::_Vector_base<DIS::VariableDatum, std::allocator<DIS::VariableDatum>>::_Vector_impl" = type { %"struct.std::_Vector_base<DIS::VariableDatum, std::allocator<DIS::VariableDatum>>::_Vector_impl_data" }
%"struct.std::_Vector_base<DIS::VariableDatum, std::allocator<DIS::VariableDatum>>::_Vector_impl_data" = type { ptr, ptr, ptr }

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIN3DIS10FixedDatumESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIN3DIS13VariableDatumESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(16) ptr @_ZNKSt6vectorIN3DIS10FixedDatumESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(48) ptr @_ZNKSt6vectorIN3DIS13VariableDatumESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZNK3DIS16ActionRequestPdueqERKS0_(ptr noundef nonnull align 8 dereferenceable(216) %0, ptr noundef nonnull align 8 dereferenceable(216) %1) #2 align 2 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca i8, align 1
  %6 = alloca i64, align 8
  %7 = alloca i64, align 8
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  %8 = load ptr, ptr %3, align 8
  call void @llvm.lifetime.start.p0(i64 1, ptr %5) #4
  store i8 1, ptr %5, align 1, !tbaa !9
  %9 = load ptr, ptr %4, align 8, !tbaa !5
  %10 = call noundef zeroext i1 @_ZNK3DIS29SimulationManagementFamilyPdueqERKS0_(ptr noundef nonnull align 8 dereferenceable(88) %8, ptr noundef nonnull align 8 dereferenceable(88) %9)
  %11 = zext i1 %10 to i8
  store i8 %11, ptr %5, align 1, !tbaa !9
  %12 = getelementptr inbounds %"class.DIS::ActionRequestPdu", ptr %8, i32 0, i32 1
  %13 = load ptr, ptr %4, align 8, !tbaa !5
  %14 = getelementptr inbounds %"class.DIS::ActionRequestPdu", ptr %13, i32 0, i32 1
  %15 = call noundef zeroext i1 @_ZNK3DIS8EntityIDeqERKS0_(ptr noundef nonnull align 8 dereferenceable(26) %12, ptr noundef nonnull align 8 dereferenceable(26) %14)
  br i1 %15, label %17, label %16

16:                                               ; preds = %2
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %17

17:                                               ; preds = %16, %2
  %18 = getelementptr inbounds %"class.DIS::ActionRequestPdu", ptr %8, i32 0, i32 2
  %19 = load ptr, ptr %4, align 8, !tbaa !5
  %20 = getelementptr inbounds %"class.DIS::ActionRequestPdu", ptr %19, i32 0, i32 2
  %21 = call noundef zeroext i1 @_ZNK3DIS8EntityIDeqERKS0_(ptr noundef nonnull align 8 dereferenceable(26) %18, ptr noundef nonnull align 8 dereferenceable(26) %20)
  br i1 %21, label %23, label %22

22:                                               ; preds = %17
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %23

23:                                               ; preds = %22, %17
  %24 = getelementptr inbounds %"class.DIS::ActionRequestPdu", ptr %8, i32 0, i32 3
  %25 = load i32, ptr %24, align 8, !tbaa !11
  %26 = load ptr, ptr %4, align 8, !tbaa !5
  %27 = getelementptr inbounds %"class.DIS::ActionRequestPdu", ptr %26, i32 0, i32 3
  %28 = load i32, ptr %27, align 8, !tbaa !11
  %29 = icmp eq i32 %25, %28
  br i1 %29, label %31, label %30

30:                                               ; preds = %23
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %31

31:                                               ; preds = %30, %23
  %32 = getelementptr inbounds %"class.DIS::ActionRequestPdu", ptr %8, i32 0, i32 4
  %33 = load i32, ptr %32, align 4, !tbaa !28
  %34 = load ptr, ptr %4, align 8, !tbaa !5
  %35 = getelementptr inbounds %"class.DIS::ActionRequestPdu", ptr %34, i32 0, i32 4
  %36 = load i32, ptr %35, align 4, !tbaa !28
  %37 = icmp eq i32 %33, %36
  br i1 %37, label %39, label %38

38:                                               ; preds = %31
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %39

39:                                               ; preds = %38, %31
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #4
  store i64 0, ptr %6, align 8, !tbaa !29
  br label %40

40:                                               ; preds = %57, %39
  %41 = load i64, ptr %6, align 8, !tbaa !29
  %42 = getelementptr inbounds %"class.DIS::ActionRequestPdu", ptr %8, i32 0, i32 7
  %43 = call noundef i64 @_ZNKSt6vectorIN3DIS10FixedDatumESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %42) #4
  %44 = icmp ult i64 %41, %43
  br i1 %44, label %46, label %45

45:                                               ; preds = %40
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #4
  br label %60

46:                                               ; preds = %40
  %47 = getelementptr inbounds %"class.DIS::ActionRequestPdu", ptr %8, i32 0, i32 7
  %48 = load i64, ptr %6, align 8, !tbaa !29
  %49 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNKSt6vectorIN3DIS10FixedDatumESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %47, i64 noundef %48) #4
  %50 = load ptr, ptr %4, align 8, !tbaa !5
  %51 = getelementptr inbounds %"class.DIS::ActionRequestPdu", ptr %50, i32 0, i32 7
  %52 = load i64, ptr %6, align 8, !tbaa !29
  %53 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNKSt6vectorIN3DIS10FixedDatumESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %51, i64 noundef %52) #4
  %54 = call noundef zeroext i1 @_ZNK3DIS10FixedDatumeqERKS0_(ptr noundef nonnull align 8 dereferenceable(16) %49, ptr noundef nonnull align 8 dereferenceable(16) %53)
  br i1 %54, label %56, label %55

55:                                               ; preds = %46
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %56

56:                                               ; preds = %55, %46
  br label %57

57:                                               ; preds = %56
  %58 = load i64, ptr %6, align 8, !tbaa !29
  %59 = add i64 %58, 1
  store i64 %59, ptr %6, align 8, !tbaa !29
  br label %40, !llvm.loop !31

60:                                               ; preds = %45
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #4
  store i64 0, ptr %7, align 8, !tbaa !29
  br label %61

61:                                               ; preds = %78, %60
  %62 = load i64, ptr %7, align 8, !tbaa !29
  %63 = getelementptr inbounds %"class.DIS::ActionRequestPdu", ptr %8, i32 0, i32 8
  %64 = call noundef i64 @_ZNKSt6vectorIN3DIS13VariableDatumESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %63) #4
  %65 = icmp ult i64 %62, %64
  br i1 %65, label %67, label %66

66:                                               ; preds = %61
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #4
  br label %81

67:                                               ; preds = %61
  %68 = getelementptr inbounds %"class.DIS::ActionRequestPdu", ptr %8, i32 0, i32 8
  %69 = load i64, ptr %7, align 8, !tbaa !29
  %70 = call noundef nonnull align 8 dereferenceable(48) ptr @_ZNKSt6vectorIN3DIS13VariableDatumESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %68, i64 noundef %69) #4
  %71 = load ptr, ptr %4, align 8, !tbaa !5
  %72 = getelementptr inbounds %"class.DIS::ActionRequestPdu", ptr %71, i32 0, i32 8
  %73 = load i64, ptr %7, align 8, !tbaa !29
  %74 = call noundef nonnull align 8 dereferenceable(48) ptr @_ZNKSt6vectorIN3DIS13VariableDatumESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %72, i64 noundef %73) #4
  %75 = call noundef zeroext i1 @_ZNK3DIS13VariableDatumeqERKS0_(ptr noundef nonnull align 8 dereferenceable(48) %70, ptr noundef nonnull align 8 dereferenceable(48) %74)
  br i1 %75, label %77, label %76

76:                                               ; preds = %67
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %77

77:                                               ; preds = %76, %67
  br label %78

78:                                               ; preds = %77
  %79 = load i64, ptr %7, align 8, !tbaa !29
  %80 = add i64 %79, 1
  store i64 %80, ptr %7, align 8, !tbaa !29
  br label %61, !llvm.loop !33

81:                                               ; preds = %66
  %82 = load i8, ptr %5, align 1, !tbaa !9, !range !34, !noundef !35
  %83 = trunc i8 %82 to i1
  call void @llvm.lifetime.end.p0(i64 1, ptr %5) #4
  ret i1 %83
}

declare noundef zeroext i1 @_ZNK3DIS29SimulationManagementFamilyPdueqERKS0_(ptr noundef nonnull align 8 dereferenceable(88), ptr noundef nonnull align 8 dereferenceable(88)) #3

declare noundef zeroext i1 @_ZNK3DIS8EntityIDeqERKS0_(ptr noundef nonnull align 8 dereferenceable(26), ptr noundef nonnull align 8 dereferenceable(26)) #3

declare noundef zeroext i1 @_ZNK3DIS10FixedDatumeqERKS0_(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 8 dereferenceable(16)) #3

declare noundef zeroext i1 @_ZNK3DIS13VariableDatumeqERKS0_(ptr noundef nonnull align 8 dereferenceable(48), ptr noundef nonnull align 8 dereferenceable(48)) #3

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"bool", !7, i64 0}
!11 = !{!12, !16, i64 152}
!12 = !{!"_ZTSN3DIS16ActionRequestPduE", !13, i64 0, !18, i64 88, !18, i64 120, !16, i64 152, !16, i64 156, !16, i64 160, !16, i64 164, !20, i64 168, !24, i64 192}
!13 = !{!"_ZTSN3DIS29SimulationManagementFamilyPduE", !14, i64 0, !18, i64 24, !18, i64 56}
!14 = !{!"_ZTSN3DIS3PduE", !15, i64 0, !7, i64 18, !7, i64 19}
!15 = !{!"_ZTSN3DIS13PduSuperclassE", !7, i64 8, !7, i64 9, !7, i64 10, !7, i64 11, !16, i64 12, !17, i64 16}
!16 = !{!"int", !7, i64 0}
!17 = !{!"short", !7, i64 0}
!18 = !{!"_ZTSN3DIS8EntityIDE", !19, i64 8, !17, i64 24}
!19 = !{!"_ZTSN3DIS17SimulationAddressE", !17, i64 8, !17, i64 10}
!20 = !{!"_ZTSSt6vectorIN3DIS10FixedDatumESaIS1_EE", !21, i64 0}
!21 = !{!"_ZTSSt12_Vector_baseIN3DIS10FixedDatumESaIS1_EE", !22, i64 0}
!22 = !{!"_ZTSNSt12_Vector_baseIN3DIS10FixedDatumESaIS1_EE12_Vector_implE", !23, i64 0}
!23 = !{!"_ZTSNSt12_Vector_baseIN3DIS10FixedDatumESaIS1_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!24 = !{!"_ZTSSt6vectorIN3DIS13VariableDatumESaIS1_EE", !25, i64 0}
!25 = !{!"_ZTSSt12_Vector_baseIN3DIS13VariableDatumESaIS1_EE", !26, i64 0}
!26 = !{!"_ZTSNSt12_Vector_baseIN3DIS13VariableDatumESaIS1_EE12_Vector_implE", !27, i64 0}
!27 = !{!"_ZTSNSt12_Vector_baseIN3DIS13VariableDatumESaIS1_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!28 = !{!12, !16, i64 156}
!29 = !{!30, !30, i64 0}
!30 = !{!"long", !7, i64 0}
!31 = distinct !{!31, !32}
!32 = !{!"llvm.loop.mustprogress"}
!33 = distinct !{!33, !32}
!34 = !{i8 0, i8 2}
!35 = !{}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIN3DIS10FixedDatumESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIN3DIS13VariableDatumESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(16) ptr @_ZNKSt6vectorIN3DIS10FixedDatumESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(48) ptr @_ZNKSt6vectorIN3DIS13VariableDatumESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZNK3DIS16ActionRequestPdueqERKS0_(ptr noundef nonnull align 8 dereferenceable(216) %0, ptr noundef nonnull align 8 dereferenceable(216) %1) local_unnamed_addr #1 align 2 {
  %3 = tail call noundef zeroext i1 @_ZNK3DIS29SimulationManagementFamilyPdueqERKS0_(ptr noundef nonnull align 8 dereferenceable(88) %0, ptr noundef nonnull align 8 dereferenceable(88) %1)
  %4 = getelementptr inbounds i8, ptr %0, i64 88
  %5 = getelementptr inbounds i8, ptr %1, i64 88
  %6 = tail call noundef zeroext i1 @_ZNK3DIS8EntityIDeqERKS0_(ptr noundef nonnull align 8 dereferenceable(26) %4, ptr noundef nonnull align 8 dereferenceable(26) %5)
  %narrow = and i1 %3, %6
  %7 = getelementptr inbounds i8, ptr %0, i64 120
  %8 = getelementptr inbounds i8, ptr %1, i64 120
  %9 = tail call noundef zeroext i1 @_ZNK3DIS8EntityIDeqERKS0_(ptr noundef nonnull align 8 dereferenceable(26) %7, ptr noundef nonnull align 8 dereferenceable(26) %8)
  %narrow20 = and i1 %9, %narrow
  %10 = getelementptr inbounds i8, ptr %0, i64 152
  %11 = getelementptr inbounds i8, ptr %1, i64 152
  %12 = load <2 x i32>, ptr %10, align 8, !tbaa !5
  %13 = load <2 x i32>, ptr %11, align 8, !tbaa !5
  %14 = icmp eq <2 x i32> %12, %13
  %15 = extractelement <2 x i1> %14, i64 0
  %narrow21 = and i1 %narrow20, %15
  %16 = extractelement <2 x i1> %14, i64 1
  %narrow22 = select i1 %16, i1 %narrow21, i1 false
  %17 = getelementptr inbounds i8, ptr %0, i64 168
  %18 = tail call noundef i64 @_ZNKSt6vectorIN3DIS10FixedDatumESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %17) #3
  %.not = icmp eq i64 %18, 0
  br i1 %.not, label %.preheader, label %.lr.ph

.lr.ph:                                           ; preds = %2
  %19 = getelementptr inbounds i8, ptr %1, i64 168
  br label %23

.preheader:                                       ; preds = %23, %2
  %.4.lcssa = phi i1 [ %narrow22, %2 ], [ %spec.select18, %23 ]
  %20 = getelementptr inbounds i8, ptr %0, i64 192
  %21 = tail call noundef i64 @_ZNKSt6vectorIN3DIS13VariableDatumESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %20) #3
  %.not29 = icmp eq i64 %21, 0
  br i1 %.not29, label %._crit_edge, label %.lr.ph27

.lr.ph27:                                         ; preds = %.preheader
  %22 = getelementptr inbounds i8, ptr %1, i64 192
  br label %30

23:                                               ; preds = %.lr.ph, %23
  %.01624 = phi i64 [ 0, %.lr.ph ], [ %27, %23 ]
  %.423 = phi i1 [ %narrow22, %.lr.ph ], [ %spec.select18, %23 ]
  %24 = tail call noundef nonnull align 8 dereferenceable(16) ptr @_ZNKSt6vectorIN3DIS10FixedDatumESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %17, i64 noundef %.01624) #3
  %25 = tail call noundef nonnull align 8 dereferenceable(16) ptr @_ZNKSt6vectorIN3DIS10FixedDatumESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %19, i64 noundef %.01624) #3
  %26 = tail call noundef zeroext i1 @_ZNK3DIS10FixedDatumeqERKS0_(ptr noundef nonnull align 8 dereferenceable(16) %24, ptr noundef nonnull align 8 dereferenceable(16) %25)
  %spec.select18 = select i1 %26, i1 %.423, i1 false
  %27 = add nuw i64 %.01624, 1
  %28 = tail call noundef i64 @_ZNKSt6vectorIN3DIS10FixedDatumESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %17) #3
  %29 = icmp ult i64 %27, %28
  br i1 %29, label %23, label %.preheader, !llvm.loop !9

._crit_edge:                                      ; preds = %30, %.preheader
  %.6.lcssa = phi i1 [ %.4.lcssa, %.preheader ], [ %spec.select19, %30 ]
  ret i1 %.6.lcssa

30:                                               ; preds = %.lr.ph27, %30
  %.026 = phi i64 [ 0, %.lr.ph27 ], [ %34, %30 ]
  %.625 = phi i1 [ %.4.lcssa, %.lr.ph27 ], [ %spec.select19, %30 ]
  %31 = tail call noundef nonnull align 8 dereferenceable(48) ptr @_ZNKSt6vectorIN3DIS13VariableDatumESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %20, i64 noundef %.026) #3
  %32 = tail call noundef nonnull align 8 dereferenceable(48) ptr @_ZNKSt6vectorIN3DIS13VariableDatumESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %22, i64 noundef %.026) #3
  %33 = tail call noundef zeroext i1 @_ZNK3DIS13VariableDatumeqERKS0_(ptr noundef nonnull align 8 dereferenceable(48) %31, ptr noundef nonnull align 8 dereferenceable(48) %32)
  %spec.select19 = select i1 %33, i1 %.625, i1 false
  %34 = add nuw i64 %.026, 1
  %35 = tail call noundef i64 @_ZNKSt6vectorIN3DIS13VariableDatumESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %20) #3
  %36 = icmp ult i64 %34, %35
  br i1 %36, label %30, label %._crit_edge, !llvm.loop !11
}

declare noundef zeroext i1 @_ZNK3DIS29SimulationManagementFamilyPdueqERKS0_(ptr noundef nonnull align 8 dereferenceable(88), ptr noundef nonnull align 8 dereferenceable(88)) local_unnamed_addr #2

declare noundef zeroext i1 @_ZNK3DIS8EntityIDeqERKS0_(ptr noundef nonnull align 8 dereferenceable(26), ptr noundef nonnull align 8 dereferenceable(26)) local_unnamed_addr #2

declare noundef zeroext i1 @_ZNK3DIS10FixedDatumeqERKS0_(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 8 dereferenceable(16)) local_unnamed_addr #2

declare noundef zeroext i1 @_ZNK3DIS13VariableDatumeqERKS0_(ptr noundef nonnull align 8 dereferenceable(48), ptr noundef nonnull align 8 dereferenceable(48)) local_unnamed_addr #2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Effective O3 passes: AggressiveInstCombinePass,CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SLPVectorizerPass,SROAPass,SimplifyCFGPass,TailCallElimPass