; LLVM IR from huawei-noah/bolt :: compute/tensor/src/cpu/general/cum.ll (Z11cum_general10TensorDescPKv12CumParamSpecS_Pv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.TensorDesc = type { i32, i32, i32, [20 x i32] }
%struct.CumParamSpec = type { i32, i8, i8, i32 }

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z11cum_general10TensorDescPKv12CumParamSpecS_Pv(ptr noundef byval(%struct.TensorDesc) align 8 %0, ptr noundef %1, i64 %2, i32 %3, ptr noundef byval(%struct.TensorDesc) align 8 %4, ptr noundef %5) #0 {
  %7 = alloca %struct.CumParamSpec, align 4
  %8 = alloca { i64, i32 }, align 4
  %9 = alloca ptr, align 8
  %10 = alloca ptr, align 8
  %11 = alloca i32, align 4
  %12 = alloca %struct.TensorDesc, align 8
  %13 = alloca %struct.CumParamSpec, align 4
  %14 = alloca %struct.TensorDesc, align 8
  %15 = alloca { i64, i32 }, align 4
  %16 = getelementptr inbounds { i64, i32 }, ptr %8, i32 0, i32 0
  store i64 %2, ptr %16, align 4
  %17 = getelementptr inbounds { i64, i32 }, ptr %8, i32 0, i32 1
  store i32 %3, ptr %17, align 4
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %7, ptr align 4 %8, i64 12, i1 false)
  store ptr %1, ptr %9, align 8, !tbaa !5
  store ptr %5, ptr %10, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #3
  store i32 51, ptr %11, align 4, !tbaa !9
  %18 = getelementptr inbounds %struct.TensorDesc, ptr %0, i32 0, i32 0
  %19 = load i32, ptr %18, align 8, !tbaa !11
  switch i32 %19, label %28 [
    i32 3, label %20
  ]

20:                                               ; preds = %6
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %12, ptr align 8 %0, i64 92, i1 false), !tbaa.struct !16
  %21 = load ptr, ptr %9, align 8, !tbaa !5
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %13, ptr align 4 %7, i64 12, i1 false), !tbaa.struct !21
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %14, ptr align 8 %4, i64 92, i1 false), !tbaa.struct !16
  %22 = load ptr, ptr %10, align 8, !tbaa !5
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %15, ptr align 4 %13, i64 12, i1 false)
  %23 = getelementptr inbounds { i64, i32 }, ptr %15, i32 0, i32 0
  %24 = load i64, ptr %23, align 4
  %25 = getelementptr inbounds { i64, i32 }, ptr %15, i32 0, i32 1
  %26 = load i32, ptr %25, align 4
  %27 = call noundef i32 @_ZL3cumIiE2EE10TensorDescPKT_12CumParamSpecS1_Pv(ptr noundef byval(%struct.TensorDesc) align 8 %12, ptr noundef %21, i64 %24, i32 %26, ptr noundef byval(%struct.TensorDesc) align 8 %14, ptr noundef %22)
  store i32 %27, ptr %11, align 4, !tbaa !9
  br label %29

28:                                               ; preds = %6
  br label %29

29:                                               ; preds = %28, %20
  %30 = load i32, ptr %11, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #3
  ret i32 %30
}

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress uwtable
declare hidden noundef i32 @_ZL3cumIiE2EE10TensorDescPKT_12CumParamSpecS1_Pv(ptr noundef byval(%struct.TensorDesc) align 8, ptr noundef, i64, i32, ptr noundef byval(%struct.TensorDesc) align 8, ptr noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"_ZTS2EE", !7, i64 0}
!11 = !{!12, !13, i64 0}
!12 = !{!"_ZTS10TensorDesc", !13, i64 0, !14, i64 4, !15, i64 8, !7, i64 12}
!13 = !{!"_ZTS8DataType", !7, i64 0}
!14 = !{!"_ZTS10DataFormat", !7, i64 0}
!15 = !{!"int", !7, i64 0}
!16 = !{i64 0, i64 4, !17, i64 4, i64 4, !18, i64 8, i64 4, !19, i64 12, i64 80, !20}
!17 = !{!13, !13, i64 0}
!18 = !{!14, !14, i64 0}
!19 = !{!15, !15, i64 0}
!20 = !{!7, !7, i64 0}
!21 = !{i64 0, i64 4, !22, i64 4, i64 1, !24, i64 5, i64 1, !24, i64 8, i64 4, !19}
!22 = !{!23, !23, i64 0}
!23 = !{!"_ZTS11EltwiseMode", !7, i64 0}
!24 = !{!25, !25, i64 0}
!25 = !{!"bool", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.TensorDesc = type { i32, i32, i32, [20 x i32] }

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z11cum_general10TensorDescPKv12CumParamSpecS_Pv(ptr nocapture noundef readonly byval(%struct.TensorDesc) align 8 %0, ptr noundef %1, i64 %2, i32 %3, ptr nocapture noundef readonly byval(%struct.TensorDesc) align 8 %4, ptr noundef %5) local_unnamed_addr #0 {
  %7 = load i32, ptr %0, align 8, !tbaa !5
  %cond = icmp eq i32 %7, 3
  br i1 %cond, label %8, label %10

8:                                                ; preds = %6
  %9 = tail call noundef i32 @_ZL3cumIiE2EE10TensorDescPKT_12CumParamSpecS1_Pv(ptr noundef nonnull byval(%struct.TensorDesc) align 8 %0, ptr noundef %1, i64 %2, i32 %3, ptr noundef nonnull byval(%struct.TensorDesc) align 8 %4, ptr noundef %5)
  br label %10

10:                                               ; preds = %6, %8
  %.0 = phi i32 [ %9, %8 ], [ 51, %6 ]
  ret i32 %.0
}

; Function Attrs: mustprogress uwtable
declare hidden noundef i32 @_ZL3cumIiE2EE10TensorDescPKT_12CumParamSpecS1_Pv(ptr noundef byval(%struct.TensorDesc) align 8, ptr noundef, i64, i32, ptr noundef byval(%struct.TensorDesc) align 8, ptr noundef) local_unnamed_addr #0

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"_ZTS10TensorDesc", !7, i64 0, !10, i64 4, !11, i64 8, !8, i64 12}
!7 = !{!"_ZTS8DataType", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"_ZTS10DataFormat", !8, i64 0}
!11 = !{!"int", !8, i64 0}


; Effective O3 passes: DSEPass,EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,MemCpyOptPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass