; LLVM IR from huawei-noah/bolt :: compute/tensor/src/cpu (rnn)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.TensorDesc = type { i32, i32, i32, [20 x i32] }
%struct.RNNParamSpec = type { i32, i32, i32, i32, float, float, i8, float, i32 }

@.str = external hidden unnamed_addr constant [20 x i8], align 1
@stdout = external global ptr, align 8
@.str.1 = external hidden unnamed_addr constant [18 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #1

; Function Attrs: nounwind
declare i64 @syscall(i64 noundef, ...) #2

declare i32 @printf(ptr noundef, ...) #3

declare i32 @fflush(ptr noundef) #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local ptr @ee2str(i32 noundef) #4

; Function Attrs: noreturn nounwind
declare void @exit(i32 noundef) #5

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef i32 @_Z7bytesOf8DataType(i32 noundef) #6

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z35rnncell_infer_forward_tmp_bytes_cpu10TensorDescS_S_12RNNParamSpecPj4Arch(ptr noundef byval(%struct.TensorDesc) align 8 %0, ptr noundef byval(%struct.TensorDesc) align 8 %1, ptr noundef byval(%struct.TensorDesc) align 8 %2, ptr noundef byval(%struct.RNNParamSpec) align 8 %3, ptr noundef %4, i32 noundef %5) #7 {
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca %struct.TensorDesc, align 8
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  %19 = alloca i32, align 4
  %20 = alloca i32, align 4
  %21 = alloca i32, align 4
  store ptr %4, ptr %7, align 8, !tbaa !5
  store i32 %5, ptr %8, align 4, !tbaa !9
  %22 = load ptr, ptr %7, align 8, !tbaa !5
  %23 = icmp eq ptr null, %22
  br i1 %23, label %24, label %40

24:                                               ; preds = %6
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #8
  store i32 1, ptr %9, align 4, !tbaa !11
  %25 = load i32, ptr %9, align 4, !tbaa !11
  %26 = icmp ne i32 %25, 0
  br i1 %26, label %27, label %39

27:                                               ; preds = %24
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #8
  %28 = call i64 (i64, ...) @syscall(i64 noundef 186) #8
  %29 = trunc i64 %28 to i32
  store i32 %29, ptr %10, align 4, !tbaa !13
  %30 = load i32, ptr %10, align 4, !tbaa !13
  %31 = call i32 (ptr, ...) @printf(ptr noundef @.str, i32 noundef %30)
  %32 = load ptr, ptr @stdout, align 8, !tbaa !5
  %33 = call i32 @fflush(ptr noundef %32)
  %34 = load i32, ptr %9, align 4, !tbaa !11
  %35 = call ptr @ee2str(i32 noundef %34)
  %36 = call i32 (ptr, ...) @printf(ptr noundef @.str.1, ptr noundef %35)
  %37 = load ptr, ptr @stdout, align 8, !tbaa !5
  %38 = call i32 @fflush(ptr noundef %37)
  call void @exit(i32 noundef 1) #9
  unreachable

39:                                               ; preds = %24
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #8
  br label %40

40:                                               ; preds = %39, %6
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #8
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #8
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #8
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #8
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #8
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %16, ptr align 8 %0, i64 92, i1 false), !tbaa.struct !15
  %41 = call noundef i32 @_Z11tensor2dGet10TensorDescP8DataTypeP10DataFormatPjS4_(ptr noundef byval(%struct.TensorDesc) align 8 %16, ptr noundef %11, ptr noundef %12, ptr noundef %13, ptr noundef %14)
  store i32 %41, ptr %15, align 4, !tbaa !11
  %42 = load i32, ptr %15, align 4, !tbaa !11
  %43 = icmp ne i32 %42, 0
  br i1 %43, label %44, label %56

44:                                               ; preds = %40
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #8
  %45 = call i64 (i64, ...) @syscall(i64 noundef 186) #8
  %46 = trunc i64 %45 to i32
  store i32 %46, ptr %17, align 4, !tbaa !13
  %47 = load i32, ptr %17, align 4, !tbaa !13
  %48 = call i32 (ptr, ...) @printf(ptr noundef @.str, i32 noundef %47)
  %49 = load ptr, ptr @stdout, align 8, !tbaa !5
  %50 = call i32 @fflush(ptr noundef %49)
  %51 = load i32, ptr %15, align 4, !tbaa !11
  %52 = call ptr @ee2str(i32 noundef %51)
  %53 = call i32 (ptr, ...) @printf(ptr noundef @.str.1, ptr noundef %52)
  %54 = load ptr, ptr @stdout, align 8, !tbaa !5
  %55 = call i32 @fflush(ptr noundef %54)
  call void @exit(i32 noundef 1) #9
  unreachable

56:                                               ; preds = %40
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #8
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #8
  %57 = getelementptr inbounds %struct.RNNParamSpec, ptr %3, i32 0, i32 1
  %58 = load i32, ptr %57, align 4, !tbaa !21
  store i32 %58, ptr %18, align 4, !tbaa !13
  call void @llvm.lifetime.start.p0(i64 4, ptr %19) #8
  %59 = getelementptr inbounds %struct.RNNParamSpec, ptr %3, i32 0, i32 3
  %60 = load i32, ptr %59, align 4, !tbaa !27
  %61 = icmp sgt i32 %60, 0
  br i1 %61, label %62, label %65

62:                                               ; preds = %56
  %63 = getelementptr inbounds %struct.RNNParamSpec, ptr %3, i32 0, i32 3
  %64 = load i32, ptr %63, align 4, !tbaa !27
  br label %68

65:                                               ; preds = %56
  %66 = getelementptr inbounds %struct.RNNParamSpec, ptr %3, i32 0, i32 1
  %67 = load i32, ptr %66, align 4, !tbaa !21
  br label %68

68:                                               ; preds = %65, %62
  %69 = phi i32 [ %64, %62 ], [ %67, %65 ]
  store i32 %69, ptr %19, align 4, !tbaa !13
  call void @llvm.lifetime.start.p0(i64 4, ptr %20) #8
  store i32 0, ptr %20, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %21) #8
  store i32 0, ptr %21, align 4, !tbaa !13
  %70 = getelementptr inbounds %struct.RNNParamSpec, ptr %3, i32 0, i32 0
  %71 = load i32, ptr %70, align 8, !tbaa !28
  switch i32 %71, label %75 [
    i32 1, label %72
    i32 2, label %73
    i32 3, label %74
  ]

72:                                               ; preds = %68
  store i32 4, ptr %21, align 4, !tbaa !13
  br label %76

73:                                               ; preds = %68
  store i32 3, ptr %21, align 4, !tbaa !13
  br label %76

74:                                               ; preds = %68
  store i32 3, ptr %21, align 4, !tbaa !13
  br label %76

75:                                               ; preds = %68
  store i32 51, ptr %20, align 4, !tbaa !11
  br label %76

76:                                               ; preds = %75, %74, %73, %72
  %77 = load i32, ptr %18, align 4, !tbaa !13
  %78 = load i32, ptr %14, align 4, !tbaa !13
  %79 = add i32 %77, %78
  %80 = load i32, ptr %19, align 4, !tbaa !13
  %81 = load i32, ptr %21, align 4, !tbaa !13
  %82 = mul i32 %80, %81
  %83 = add i32 %79, %82
  %84 = load i32, ptr %11, align 4, !tbaa !16
  %85 = call noundef i32 @_Z7bytesOf8DataType(i32 noundef %84)
  %86 = mul i32 %83, %85
  %87 = load ptr, ptr %7, align 8, !tbaa !5
  store i32 %86, ptr %87, align 4, !tbaa !13
  %88 = load i32, ptr %18, align 4, !tbaa !13
  %89 = load i32, ptr %14, align 4, !tbaa !13
  %90 = add i32 %88, %89
  %91 = call noundef i32 @_Z7bytesOf8DataType(i32 noundef 1)
  %92 = mul i32 %90, %91
  %93 = load ptr, ptr %7, align 8, !tbaa !5
  %94 = load i32, ptr %93, align 4, !tbaa !13
  %95 = add i32 %94, %92
  store i32 %95, ptr %93, align 4, !tbaa !13
  %96 = load i32, ptr %20, align 4, !tbaa !11
  call void @llvm.lifetime.end.p0(i64 4, ptr %21) #8
  call void @llvm.lifetime.end.p0(i64 4, ptr %20) #8
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #8
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #8
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #8
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #8
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #8
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #8
  ret i32 %96
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z11tensor2dGet10TensorDescP8DataTypeP10DataFormatPjS4_(ptr noundef byval(%struct.TensorDesc) align 8, ptr noundef, ptr noundef, ptr noundef, ptr noundef) #4

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #8 = { nounwind }
attributes #9 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"_ZTS4Arch", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"_ZTS2EE", !7, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"int", !7, i64 0}
!15 = !{i64 0, i64 4, !16, i64 4, i64 4, !18, i64 8, i64 4, !13, i64 12, i64 80, !20}
!16 = !{!17, !17, i64 0}
!17 = !{!"_ZTS8DataType", !7, i64 0}
!18 = !{!19, !19, i64 0}
!19 = !{!"_ZTS10DataFormat", !7, i64 0}
!20 = !{!7, !7, i64 0}
!21 = !{!22, !14, i64 4}
!22 = !{!"_ZTS12RNNParamSpec", !23, i64 0, !14, i64 4, !14, i64 8, !14, i64 12, !24, i64 16, !24, i64 20, !25, i64 24, !24, i64 28, !26, i64 32}
!23 = !{!"_ZTS7RNNMode", !7, i64 0}
!24 = !{!"float", !7, i64 0}
!25 = !{!"bool", !7, i64 0}
!26 = !{!"_ZTS14ActivationMode", !7, i64 0}
!27 = !{!22, !14, i64 12}
!28 = !{!22, !23, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.TensorDesc = type { i32, i32, i32, [20 x i32] }
%struct.RNNParamSpec = type { i32, i32, i32, i32, float, float, i8, float, i32 }

@.str = external hidden unnamed_addr constant [20 x i8], align 1
@stdout = external local_unnamed_addr global ptr, align 8
@.str.1 = external hidden unnamed_addr constant [18 x i8], align 1
@switch.table._Z35rnncell_infer_forward_tmp_bytes_cpu10TensorDescS_S_12RNNParamSpecPj4Arch = private unnamed_addr constant [3 x i32] [i32 4, i32 3, i32 3], align 4

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind
declare i64 @syscall(i64 noundef, ...) local_unnamed_addr #1

; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #2

; Function Attrs: nofree nounwind
declare noundef i32 @fflush(ptr nocapture noundef) local_unnamed_addr #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local ptr @ee2str(i32 noundef) local_unnamed_addr #3

; Function Attrs: noreturn nounwind
declare void @exit(i32 noundef) local_unnamed_addr #4

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef i32 @_Z7bytesOf8DataType(i32 noundef) local_unnamed_addr #5

; Function Attrs: mustprogress uwtable
define dso_local noundef range(i32 0, 52) i32 @_Z35rnncell_infer_forward_tmp_bytes_cpu10TensorDescS_S_12RNNParamSpecPj4Arch(ptr nocapture noundef readonly byval(%struct.TensorDesc) align 8 %0, ptr nocapture noundef readnone byval(%struct.TensorDesc) align 8 %1, ptr nocapture noundef readnone byval(%struct.TensorDesc) align 8 %2, ptr nocapture noundef readonly byval(%struct.RNNParamSpec) align 8 %3, ptr noundef %4, i32 noundef %5) local_unnamed_addr #6 {
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = icmp eq ptr %4, null
  br i1 %11, label %12, label %22

12:                                               ; preds = %6
  %13 = tail call i64 (i64, ...) @syscall(i64 noundef 186) #7
  %14 = trunc i64 %13 to i32
  %15 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str, i32 noundef %14)
  %16 = load ptr, ptr @stdout, align 8, !tbaa !5
  %17 = tail call i32 @fflush(ptr noundef %16)
  %18 = tail call ptr @ee2str(i32 noundef 1)
  %19 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.1, ptr noundef %18)
  %20 = load ptr, ptr @stdout, align 8, !tbaa !5
  %21 = tail call i32 @fflush(ptr noundef %20)
  tail call void @exit(i32 noundef 1) #8
  unreachable

22:                                               ; preds = %6
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %7) #7
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %8) #7
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %9) #7
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %10) #7
  %23 = call noundef i32 @_Z11tensor2dGet10TensorDescP8DataTypeP10DataFormatPjS4_(ptr noundef nonnull byval(%struct.TensorDesc) align 8 %0, ptr noundef nonnull %7, ptr noundef nonnull %8, ptr noundef nonnull %9, ptr noundef nonnull %10)
  %.not = icmp eq i32 %23, 0
  br i1 %.not, label %34, label %24

24:                                               ; preds = %22
  %25 = call i64 (i64, ...) @syscall(i64 noundef 186) #7
  %26 = trunc i64 %25 to i32
  %27 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str, i32 noundef %26)
  %28 = load ptr, ptr @stdout, align 8, !tbaa !5
  %29 = call i32 @fflush(ptr noundef %28)
  %30 = call ptr @ee2str(i32 noundef %23)
  %31 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.1, ptr noundef %30)
  %32 = load ptr, ptr @stdout, align 8, !tbaa !5
  %33 = call i32 @fflush(ptr noundef %32)
  call void @exit(i32 noundef 1) #8
  unreachable

34:                                               ; preds = %22
  %35 = getelementptr inbounds i8, ptr %3, i64 4
  %36 = load i32, ptr %35, align 4
  %37 = getelementptr inbounds i8, ptr %3, i64 12
  %38 = load i32, ptr %37, align 4
  %39 = load i32, ptr %3, align 8, !tbaa !9
  %switch.tableidx = add i32 %39, -1
  %40 = icmp ult i32 %switch.tableidx, 3
  br i1 %40, label %switch.lookup, label %42

switch.lookup:                                    ; preds = %34
  %41 = zext nneg i32 %switch.tableidx to i64
  %switch.gep = getelementptr inbounds [3 x i32], ptr @switch.table._Z35rnncell_infer_forward_tmp_bytes_cpu10TensorDescS_S_12RNNParamSpecPj4Arch, i64 0, i64 %41
  %switch.load = load i32, ptr %switch.gep, align 4
  br label %42

42:                                               ; preds = %34, %switch.lookup
  %.013 = phi i32 [ 0, %switch.lookup ], [ 51, %34 ]
  %.0 = phi i32 [ %switch.load, %switch.lookup ], [ 0, %34 ]
  %43 = icmp sgt i32 %38, 0
  %44 = select i1 %43, i32 %38, i32 %36
  %45 = load i32, ptr %10, align 4, !tbaa !16
  %46 = add i32 %45, %36
  %47 = mul i32 %.0, %44
  %48 = add i32 %46, %47
  %49 = load i32, ptr %7, align 4, !tbaa !17
  %50 = call noundef i32 @_Z7bytesOf8DataType(i32 noundef %49)
  %51 = mul i32 %48, %50
  store i32 %51, ptr %4, align 4, !tbaa !16
  %52 = load i32, ptr %10, align 4, !tbaa !16
  %53 = add i32 %52, %36
  %54 = call noundef i32 @_Z7bytesOf8DataType(i32 noundef 1)
  %55 = mul i32 %53, %54
  %56 = load i32, ptr %4, align 4, !tbaa !16
  %57 = add i32 %56, %55
  store i32 %57, ptr %4, align 4, !tbaa !16
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %10) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %9) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %8) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %7) #7
  ret i32 %.013
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z11tensor2dGet10TensorDescP8DataTypeP10DataFormatPjS4_(ptr noundef byval(%struct.TensorDesc) align 8, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #3

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { nounwind }
attributes #8 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"_ZTS12RNNParamSpec", !11, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !13, i64 16, !13, i64 20, !14, i64 24, !13, i64 28, !15, i64 32}
!11 = !{!"_ZTS7RNNMode", !7, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!"float", !7, i64 0}
!14 = !{!"bool", !7, i64 0}
!15 = !{!"_ZTS14ActivationMode", !7, i64 0}
!16 = !{!12, !12, i64 0}
!17 = !{!18, !18, i64 0}
!18 = !{!"_ZTS8DataType", !7, i64 0}


; Effective O3 passes: DSEPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,MemCpyOptPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass