; LLVM IR from AF-GRILL/DISPluginForUnreal :: Source/ThirdParty/include/dis6 (StartResumeReliablePdu)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.DIS::StartResumeReliablePdu" = type <{ %"class.DIS::SimulationManagementWithReliabilityFamilyPdu", %"class.DIS::ClockTime", %"class.DIS::ClockTime", i8, i8, i16, i8, [3 x i8], i32, [4 x i8] }>
%"class.DIS::SimulationManagementWithReliabilityFamilyPdu" = type { %"class.DIS::Pdu.base", [4 x i8], %"class.DIS::EntityID", %"class.DIS::EntityID" }
%"class.DIS::Pdu.base" = type <{ ptr, i8, i8, i8, i8, i32, i16, i16 }>
%"class.DIS::EntityID" = type <{ ptr, i16, i16, i16, [2 x i8] }>
%"class.DIS::ClockTime" = type { ptr, i32, i32 }

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZNK3DIS22StartResumeReliablePdueqERKS0_(ptr noundef nonnull align 8 dereferenceable(100) %0, ptr noundef nonnull align 8 dereferenceable(100) %1) #0 align 2 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca i8, align 1
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  %6 = load ptr, ptr %3, align 8
  call void @llvm.lifetime.start.p0(i64 1, ptr %5) #3
  store i8 1, ptr %5, align 1, !tbaa !9
  %7 = load ptr, ptr %4, align 8, !tbaa !5
  %8 = call noundef zeroext i1 @_ZNK3DIS44SimulationManagementWithReliabilityFamilyPdueqERKS0_(ptr noundef nonnull align 8 dereferenceable(56) %6, ptr noundef nonnull align 8 dereferenceable(56) %7)
  %9 = zext i1 %8 to i8
  store i8 %9, ptr %5, align 1, !tbaa !9
  %10 = getelementptr inbounds %"class.DIS::StartResumeReliablePdu", ptr %6, i32 0, i32 1
  %11 = load ptr, ptr %4, align 8, !tbaa !5
  %12 = getelementptr inbounds %"class.DIS::StartResumeReliablePdu", ptr %11, i32 0, i32 1
  %13 = call noundef zeroext i1 @_ZNK3DIS9ClockTimeeqERKS0_(ptr noundef nonnull align 8 dereferenceable(16) %10, ptr noundef nonnull align 8 dereferenceable(16) %12)
  br i1 %13, label %15, label %14

14:                                               ; preds = %2
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %15

15:                                               ; preds = %14, %2
  %16 = getelementptr inbounds %"class.DIS::StartResumeReliablePdu", ptr %6, i32 0, i32 2
  %17 = load ptr, ptr %4, align 8, !tbaa !5
  %18 = getelementptr inbounds %"class.DIS::StartResumeReliablePdu", ptr %17, i32 0, i32 2
  %19 = call noundef zeroext i1 @_ZNK3DIS9ClockTimeeqERKS0_(ptr noundef nonnull align 8 dereferenceable(16) %16, ptr noundef nonnull align 8 dereferenceable(16) %18)
  br i1 %19, label %21, label %20

20:                                               ; preds = %15
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %21

21:                                               ; preds = %20, %15
  %22 = getelementptr inbounds %"class.DIS::StartResumeReliablePdu", ptr %6, i32 0, i32 3
  %23 = load i8, ptr %22, align 8, !tbaa !11
  %24 = zext i8 %23 to i32
  %25 = load ptr, ptr %4, align 8, !tbaa !5
  %26 = getelementptr inbounds %"class.DIS::StartResumeReliablePdu", ptr %25, i32 0, i32 3
  %27 = load i8, ptr %26, align 8, !tbaa !11
  %28 = zext i8 %27 to i32
  %29 = icmp eq i32 %24, %28
  br i1 %29, label %31, label %30

30:                                               ; preds = %21
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %31

31:                                               ; preds = %30, %21
  %32 = getelementptr inbounds %"class.DIS::StartResumeReliablePdu", ptr %6, i32 0, i32 5
  %33 = load i16, ptr %32, align 2, !tbaa !19
  %34 = zext i16 %33 to i32
  %35 = load ptr, ptr %4, align 8, !tbaa !5
  %36 = getelementptr inbounds %"class.DIS::StartResumeReliablePdu", ptr %35, i32 0, i32 5
  %37 = load i16, ptr %36, align 2, !tbaa !19
  %38 = zext i16 %37 to i32
  %39 = icmp eq i32 %34, %38
  br i1 %39, label %41, label %40

40:                                               ; preds = %31
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %41

41:                                               ; preds = %40, %31
  %42 = getelementptr inbounds %"class.DIS::StartResumeReliablePdu", ptr %6, i32 0, i32 6
  %43 = load i8, ptr %42, align 4, !tbaa !20
  %44 = zext i8 %43 to i32
  %45 = load ptr, ptr %4, align 8, !tbaa !5
  %46 = getelementptr inbounds %"class.DIS::StartResumeReliablePdu", ptr %45, i32 0, i32 6
  %47 = load i8, ptr %46, align 4, !tbaa !20
  %48 = zext i8 %47 to i32
  %49 = icmp eq i32 %44, %48
  br i1 %49, label %51, label %50

50:                                               ; preds = %41
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %51

51:                                               ; preds = %50, %41
  %52 = getelementptr inbounds %"class.DIS::StartResumeReliablePdu", ptr %6, i32 0, i32 8
  %53 = load i32, ptr %52, align 8, !tbaa !21
  %54 = load ptr, ptr %4, align 8, !tbaa !5
  %55 = getelementptr inbounds %"class.DIS::StartResumeReliablePdu", ptr %54, i32 0, i32 8
  %56 = load i32, ptr %55, align 8, !tbaa !21
  %57 = icmp eq i32 %53, %56
  br i1 %57, label %59, label %58

58:                                               ; preds = %51
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %59

59:                                               ; preds = %58, %51
  %60 = load i8, ptr %5, align 1, !tbaa !9, !range !22, !noundef !23
  %61 = trunc i8 %60 to i1
  call void @llvm.lifetime.end.p0(i64 1, ptr %5) #3
  ret i1 %61
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare noundef zeroext i1 @_ZNK3DIS44SimulationManagementWithReliabilityFamilyPdueqERKS0_(ptr noundef nonnull align 8 dereferenceable(56), ptr noundef nonnull align 8 dereferenceable(56)) #2

declare noundef zeroext i1 @_ZNK3DIS9ClockTimeeqERKS0_(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 8 dereferenceable(16)) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"bool", !7, i64 0}
!11 = !{!12, !7, i64 88}
!12 = !{!"_ZTSN3DIS22StartResumeReliablePduE", !13, i64 0, !18, i64 56, !18, i64 72, !7, i64 88, !16, i64 90, !7, i64 92, !15, i64 96}
!13 = !{!"_ZTSN3DIS44SimulationManagementWithReliabilityFamilyPduE", !14, i64 0, !17, i64 24, !17, i64 40}
!14 = !{!"_ZTSN3DIS3PduE", !7, i64 8, !7, i64 9, !7, i64 10, !7, i64 11, !15, i64 12, !16, i64 16, !16, i64 18}
!15 = !{!"int", !7, i64 0}
!16 = !{!"short", !7, i64 0}
!17 = !{!"_ZTSN3DIS8EntityIDE", !16, i64 8, !16, i64 10, !16, i64 12}
!18 = !{!"_ZTSN3DIS9ClockTimeE", !15, i64 8, !15, i64 12}
!19 = !{!12, !16, i64 90}
!20 = !{!12, !7, i64 92}
!21 = !{!12, !15, i64 96}
!22 = !{i8 0, i8 2}
!23 = !{}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZNK3DIS22StartResumeReliablePdueqERKS0_(ptr noundef nonnull align 8 dereferenceable(100) %0, ptr noundef nonnull align 8 dereferenceable(100) %1) local_unnamed_addr #0 align 2 {
  %3 = tail call noundef zeroext i1 @_ZNK3DIS44SimulationManagementWithReliabilityFamilyPdueqERKS0_(ptr noundef nonnull align 8 dereferenceable(56) %0, ptr noundef nonnull align 8 dereferenceable(56) %1)
  %4 = getelementptr inbounds i8, ptr %0, i64 56
  %5 = getelementptr inbounds i8, ptr %1, i64 56
  %6 = tail call noundef zeroext i1 @_ZNK3DIS9ClockTimeeqERKS0_(ptr noundef nonnull align 8 dereferenceable(16) %4, ptr noundef nonnull align 8 dereferenceable(16) %5)
  %spec.select = and i1 %3, %6
  %7 = getelementptr inbounds i8, ptr %0, i64 72
  %8 = getelementptr inbounds i8, ptr %1, i64 72
  %9 = tail call noundef zeroext i1 @_ZNK3DIS9ClockTimeeqERKS0_(ptr noundef nonnull align 8 dereferenceable(16) %7, ptr noundef nonnull align 8 dereferenceable(16) %8)
  %spec.select10 = and i1 %9, %spec.select
  %10 = getelementptr inbounds i8, ptr %0, i64 88
  %11 = load i8, ptr %10, align 8, !tbaa !5
  %12 = getelementptr inbounds i8, ptr %1, i64 88
  %13 = load i8, ptr %12, align 8, !tbaa !5
  %14 = icmp eq i8 %11, %13
  %spec.select8 = and i1 %spec.select10, %14
  %15 = getelementptr inbounds i8, ptr %0, i64 90
  %16 = load i16, ptr %15, align 2, !tbaa !15
  %17 = getelementptr inbounds i8, ptr %1, i64 90
  %18 = load i16, ptr %17, align 2, !tbaa !15
  %19 = icmp eq i16 %16, %18
  %20 = getelementptr inbounds i8, ptr %0, i64 92
  %21 = load i8, ptr %20, align 4, !tbaa !16
  %22 = getelementptr inbounds i8, ptr %1, i64 92
  %23 = load i8, ptr %22, align 4, !tbaa !16
  %24 = icmp eq i8 %21, %23
  %25 = getelementptr inbounds i8, ptr %0, i64 96
  %26 = load i32, ptr %25, align 8, !tbaa !17
  %27 = getelementptr inbounds i8, ptr %1, i64 96
  %28 = load i32, ptr %27, align 8, !tbaa !17
  %29 = icmp eq i32 %26, %28
  %30 = select i1 %29, i1 %24, i1 false
  %31 = select i1 %30, i1 %19, i1 false
  %spec.select11 = select i1 %31, i1 %spec.select8, i1 false
  ret i1 %spec.select11
}

declare noundef zeroext i1 @_ZNK3DIS44SimulationManagementWithReliabilityFamilyPdueqERKS0_(ptr noundef nonnull align 8 dereferenceable(56), ptr noundef nonnull align 8 dereferenceable(56)) local_unnamed_addr #1

declare noundef zeroext i1 @_ZNK3DIS9ClockTimeeqERKS0_(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 8 dereferenceable(16)) local_unnamed_addr #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !9, i64 88}
!6 = !{!"_ZTSN3DIS22StartResumeReliablePduE", !7, i64 0, !14, i64 56, !14, i64 72, !9, i64 88, !12, i64 90, !9, i64 92, !11, i64 96}
!7 = !{!"_ZTSN3DIS44SimulationManagementWithReliabilityFamilyPduE", !8, i64 0, !13, i64 24, !13, i64 40}
!8 = !{!"_ZTSN3DIS3PduE", !9, i64 8, !9, i64 9, !9, i64 10, !9, i64 11, !11, i64 12, !12, i64 16, !12, i64 18}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!"short", !9, i64 0}
!13 = !{!"_ZTSN3DIS8EntityIDE", !12, i64 8, !12, i64 10, !12, i64 12}
!14 = !{!"_ZTSN3DIS9ClockTimeE", !11, i64 8, !11, i64 12}
!15 = !{!6, !12, i64 90}
!16 = !{!6, !9, i64 92}
!17 = !{!6, !11, i64 96}


; Effective O3 passes: GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass