; LLVM IR from facebookresearch/habitat-sim :: src/deps/basis-universal/encoder (basisu_resampler)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_ZN6basisu9Resampler7reflectEiiNS0_11Boundary_OpE(i32 noundef %0, i32 noundef %1, i32 noundef %2) #0 align 2 {
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  store i32 %0, ptr %4, align 4, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !5
  store i32 %2, ptr %6, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  %8 = load i32, ptr %4, align 4, !tbaa !5
  %9 = icmp slt i32 %8, 0
  br i1 %9, label %10, label %33

10:                                               ; preds = %3
  %11 = load i32, ptr %6, align 4, !tbaa !9
  %12 = icmp eq i32 %11, 1
  br i1 %12, label %13, label %23

13:                                               ; preds = %10
  %14 = load i32, ptr %4, align 4, !tbaa !5
  %15 = sub nsw i32 0, %14
  store i32 %15, ptr %7, align 4, !tbaa !5
  %16 = load i32, ptr %7, align 4, !tbaa !5
  %17 = load i32, ptr %5, align 4, !tbaa !5
  %18 = icmp sge i32 %16, %17
  br i1 %18, label %19, label %22

19:                                               ; preds = %13
  %20 = load i32, ptr %5, align 4, !tbaa !5
  %21 = sub nsw i32 %20, 1
  store i32 %21, ptr %7, align 4, !tbaa !5
  br label %22

22:                                               ; preds = %19, %13
  br label %32

23:                                               ; preds = %10
  %24 = load i32, ptr %6, align 4, !tbaa !9
  %25 = icmp eq i32 %24, 0
  br i1 %25, label %26, label %30

26:                                               ; preds = %23
  %27 = load i32, ptr %4, align 4, !tbaa !5
  %28 = load i32, ptr %5, align 4, !tbaa !5
  %29 = call noundef i32 @_ZN6basisu6posmodEii(i32 noundef %27, i32 noundef %28)
  store i32 %29, ptr %7, align 4, !tbaa !5
  br label %31

30:                                               ; preds = %23
  store i32 0, ptr %7, align 4, !tbaa !5
  br label %31

31:                                               ; preds = %30, %26
  br label %32

32:                                               ; preds = %31, %22
  br label %66

33:                                               ; preds = %3
  %34 = load i32, ptr %4, align 4, !tbaa !5
  %35 = load i32, ptr %5, align 4, !tbaa !5
  %36 = icmp sge i32 %34, %35
  br i1 %36, label %37, label %63

37:                                               ; preds = %33
  %38 = load i32, ptr %6, align 4, !tbaa !9
  %39 = icmp eq i32 %38, 1
  br i1 %39, label %40, label %51

40:                                               ; preds = %37
  %41 = load i32, ptr %5, align 4, !tbaa !5
  %42 = load i32, ptr %4, align 4, !tbaa !5
  %43 = sub nsw i32 %41, %42
  %44 = load i32, ptr %5, align 4, !tbaa !5
  %45 = sub nsw i32 %44, 1
  %46 = add nsw i32 %43, %45
  store i32 %46, ptr %7, align 4, !tbaa !5
  %47 = load i32, ptr %7, align 4, !tbaa !5
  %48 = icmp slt i32 %47, 0
  br i1 %48, label %49, label %50

49:                                               ; preds = %40
  store i32 0, ptr %7, align 4, !tbaa !5
  br label %50

50:                                               ; preds = %49, %40
  br label %62

51:                                               ; preds = %37
  %52 = load i32, ptr %6, align 4, !tbaa !9
  %53 = icmp eq i32 %52, 0
  br i1 %53, label %54, label %58

54:                                               ; preds = %51
  %55 = load i32, ptr %4, align 4, !tbaa !5
  %56 = load i32, ptr %5, align 4, !tbaa !5
  %57 = call noundef i32 @_ZN6basisu6posmodEii(i32 noundef %55, i32 noundef %56)
  store i32 %57, ptr %7, align 4, !tbaa !5
  br label %61

58:                                               ; preds = %51
  %59 = load i32, ptr %5, align 4, !tbaa !5
  %60 = sub nsw i32 %59, 1
  store i32 %60, ptr %7, align 4, !tbaa !5
  br label %61

61:                                               ; preds = %58, %54
  br label %62

62:                                               ; preds = %61, %50
  br label %65

63:                                               ; preds = %33
  %64 = load i32, ptr %4, align 4, !tbaa !5
  store i32 %64, ptr %7, align 4, !tbaa !5
  br label %65

65:                                               ; preds = %63, %62
  br label %66

66:                                               ; preds = %65, %32
  %67 = load i32, ptr %7, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  ret i32 %67
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN6basisu6posmodEii(i32 noundef, i32 noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"_ZTSN6basisu9Resampler11Boundary_OpE", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_ZN6basisu9Resampler7reflectEiiNS0_11Boundary_OpE(i32 noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 align 2 {
  %4 = sub i32 0, %0
  %5 = icmp slt i32 %0, 0
  br i1 %5, label %6, label %11

6:                                                ; preds = %3
  switch i32 %2, label %20 [
    i32 1, label %7
    i32 0, label %9
  ]

7:                                                ; preds = %6
  %.not28 = icmp slt i32 %4, %1
  %8 = add nsw i32 %1, -1
  %spec.select = select i1 %.not28, i32 %4, i32 %8
  br label %20

9:                                                ; preds = %6
  %10 = tail call noundef i32 @_ZN6basisu6posmodEii(i32 noundef %0, i32 noundef %1)
  br label %20

11:                                               ; preds = %3
  %.not = icmp slt i32 %0, %1
  br i1 %.not, label %20, label %12

12:                                               ; preds = %11
  switch i32 %2, label %18 [
    i32 1, label %13
    i32 0, label %16
  ]

13:                                               ; preds = %12
  %factor = shl i32 %1, 1
  %14 = xor i32 %0, -1
  %15 = add i32 %factor, %14
  %spec.store.select = tail call i32 @llvm.smax.i32(i32 %15, i32 0)
  br label %20

16:                                               ; preds = %12
  %17 = tail call noundef i32 @_ZN6basisu6posmodEii(i32 noundef %0, i32 noundef %1)
  br label %20

18:                                               ; preds = %12
  %19 = add nsw i32 %1, -1
  br label %20

20:                                               ; preds = %7, %11, %6, %16, %18, %13, %9
  %.0 = phi i32 [ %10, %9 ], [ %spec.store.select, %13 ], [ %17, %16 ], [ %19, %18 ], [ %spec.select, %7 ], [ 0, %6 ], [ %0, %11 ]
  ret i32 %.0
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN6basisu6posmodEii(i32 noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smax.i32(i32, i32) #2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass