; LLVM IR from huawei-noah/bolt :: compute/tensor/src/cpu/x86 (depthwise_pointwise_convolution)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.TensorDesc = type { i32, i32, i32, [20 x i32] }
%struct.ConvolutionParamSpec = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %union.ActivationSpec, i32, i32, i32, i32 }
%union.ActivationSpec = type { %struct.ClipParamSpec }
%struct.ClipParamSpec = type { float, float }
%struct.ActivationParamSpec = type { i32, [4 x float] }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z35depthwise_pointwise_convolution_x8610TensorDescPvS0_S_PKvS_S2_20ConvolutionParamSpec36DepthwiseConvolutionForwardAlgorithmS0_S_S2_S_S2_jS0_S_S0_19ActivationParamSpecS5_4Arch(ptr noundef byval(%struct.TensorDesc) align 8 %0, ptr noundef %1, ptr noundef %2, ptr noundef byval(%struct.TensorDesc) align 8 %3, ptr noundef %4, ptr noundef byval(%struct.TensorDesc) align 8 %5, ptr noundef %6, ptr noundef byval(%struct.ConvolutionParamSpec) align 8 %7, i32 noundef %8, ptr noundef %9, ptr noundef byval(%struct.TensorDesc) align 8 %10, ptr noundef %11, ptr noundef byval(%struct.TensorDesc) align 8 %12, ptr noundef %13, i32 noundef %14, ptr noundef %15, ptr noundef byval(%struct.TensorDesc) align 8 %16, ptr noundef %17, ptr noundef byval(%struct.ActivationParamSpec) align 8 %18, ptr noundef byval(%struct.ActivationParamSpec) align 8 %19, i32 noundef %20) #1 {
  %22 = alloca ptr, align 8
  %23 = alloca ptr, align 8
  %24 = alloca ptr, align 8
  %25 = alloca ptr, align 8
  %26 = alloca i32, align 4
  %27 = alloca ptr, align 8
  %28 = alloca ptr, align 8
  %29 = alloca ptr, align 8
  %30 = alloca i32, align 4
  %31 = alloca ptr, align 8
  %32 = alloca ptr, align 8
  %33 = alloca i32, align 4
  %34 = alloca %struct.TensorDesc, align 4
  %35 = alloca ptr, align 8
  %36 = alloca i32, align 4
  %37 = alloca %struct.TensorDesc, align 8
  %38 = alloca %struct.TensorDesc, align 8
  %39 = alloca %struct.TensorDesc, align 8
  %40 = alloca %struct.TensorDesc, align 8
  %41 = alloca i32, align 4
  store ptr %1, ptr %22, align 8, !tbaa !5
  store ptr %2, ptr %23, align 8, !tbaa !5
  store ptr %4, ptr %24, align 8, !tbaa !5
  store ptr %6, ptr %25, align 8, !tbaa !5
  store i32 %8, ptr %26, align 4, !tbaa !9
  store ptr %9, ptr %27, align 8, !tbaa !5
  store ptr %11, ptr %28, align 8, !tbaa !5
  store ptr %13, ptr %29, align 8, !tbaa !5
  store i32 %14, ptr %30, align 4, !tbaa !11
  store ptr %15, ptr %31, align 8, !tbaa !5
  store ptr %17, ptr %32, align 8, !tbaa !5
  store i32 %20, ptr %33, align 4, !tbaa !13
  call void @llvm.lifetime.start.p0(i64 92, ptr %34) #5
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %34, ptr align 8 %0, i64 92, i1 false), !tbaa.struct !15
  call void @llvm.lifetime.start.p0(i64 8, ptr %35) #5
  %42 = load ptr, ptr %22, align 8, !tbaa !5
  store ptr %42, ptr %35, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %36) #5
  %43 = getelementptr inbounds %struct.TensorDesc, ptr %0, i32 0, i32 1
  %44 = load i32, ptr %43, align 4, !tbaa !21
  store i32 %44, ptr %36, align 4, !tbaa !18
  %45 = getelementptr inbounds %struct.TensorDesc, ptr %0, i32 0, i32 0
  %46 = load i32, ptr %45, align 8, !tbaa !23
  %47 = icmp eq i32 %46, 10
  br i1 %47, label %52, label %48

48:                                               ; preds = %21
  %49 = getelementptr inbounds %struct.TensorDesc, ptr %0, i32 0, i32 1
  %50 = load i32, ptr %49, align 4, !tbaa !21
  %51 = icmp eq i32 %50, 41
  br i1 %51, label %52, label %53

52:                                               ; preds = %48, %21
  store i32 41, ptr %36, align 4, !tbaa !18
  br label %54

53:                                               ; preds = %48
  store i32 2, ptr %36, align 4, !tbaa !18
  br label %54

54:                                               ; preds = %53, %52
  %55 = getelementptr inbounds %struct.TensorDesc, ptr %0, i32 0, i32 1
  %56 = load i32, ptr %55, align 4, !tbaa !21
  %57 = load i32, ptr %36, align 4, !tbaa !18
  %58 = icmp ne i32 %56, %57
  br i1 %58, label %59, label %73

59:                                               ; preds = %54
  %60 = load i32, ptr %36, align 4, !tbaa !18
  %61 = getelementptr inbounds %struct.TensorDesc, ptr %34, i32 0, i32 1
  store i32 %60, ptr %61, align 4, !tbaa !21
  %62 = load ptr, ptr %31, align 8, !tbaa !5
  store ptr %62, ptr %35, align 8, !tbaa !5
  %63 = load ptr, ptr %31, align 8, !tbaa !5
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %37, ptr align 8 %0, i64 92, i1 false), !tbaa.struct !15
  %64 = call noundef i32 @_Z14tensorNumBytes10TensorDesc(ptr noundef byval(%struct.TensorDesc) align 8 %37)
  %65 = zext i32 %64 to i64
  %66 = getelementptr inbounds i8, ptr %63, i64 %65
  store ptr %66, ptr %31, align 8, !tbaa !5
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %38, ptr align 8 %0, i64 92, i1 false), !tbaa.struct !15
  %67 = call noundef i32 @_Z14tensorNumBytes10TensorDesc(ptr noundef byval(%struct.TensorDesc) align 8 %38)
  %68 = load i32, ptr %30, align 4, !tbaa !11
  %69 = sub i32 %68, %67
  store i32 %69, ptr %30, align 4, !tbaa !11
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %39, ptr align 8 %0, i64 92, i1 false), !tbaa.struct !15
  %70 = load ptr, ptr %22, align 8, !tbaa !5
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %40, ptr align 4 %34, i64 92, i1 false), !tbaa.struct !15
  %71 = load ptr, ptr %35, align 8, !tbaa !5
  %72 = call noundef i32 @_Z15transformFormat10TensorDescPKvS_Pv(ptr noundef byval(%struct.TensorDesc) align 8 %39, ptr noundef %70, ptr noundef byval(%struct.TensorDesc) align 8 %40, ptr noundef %71)
  br label %73

73:                                               ; preds = %59, %54
  call void @llvm.lifetime.start.p0(i64 4, ptr %41) #5
  store i32 0, ptr %41, align 4, !tbaa !24
  %74 = getelementptr inbounds %struct.TensorDesc, ptr %3, i32 0, i32 0
  %75 = load i32, ptr %74, align 8, !tbaa !23
  switch i32 %75, label %76 [
  ]

76:                                               ; preds = %73
  store i32 51, ptr %41, align 4, !tbaa !24
  br label %77

77:                                               ; preds = %76
  %78 = load i32, ptr %41, align 4, !tbaa !24
  call void @llvm.lifetime.end.p0(i64 4, ptr %41) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %36) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %35) #5
  call void @llvm.lifetime.end.p0(i64 92, ptr %34) #5
  ret i32 %78
}

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef i32 @_Z14tensorNumBytes10TensorDesc(ptr noundef byval(%struct.TensorDesc) align 8) #3

declare noundef i32 @_Z15transformFormat10TensorDescPKvS_Pv(ptr noundef byval(%struct.TensorDesc) align 8, ptr noundef, ptr noundef byval(%struct.TensorDesc) align 8, ptr noundef) #4

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"_ZTS36DepthwiseConvolutionForwardAlgorithm", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"_ZTS4Arch", !7, i64 0}
!15 = !{i64 0, i64 4, !16, i64 4, i64 4, !18, i64 8, i64 4, !11, i64 12, i64 80, !20}
!16 = !{!17, !17, i64 0}
!17 = !{!"_ZTS8DataType", !7, i64 0}
!18 = !{!19, !19, i64 0}
!19 = !{!"_ZTS10DataFormat", !7, i64 0}
!20 = !{!7, !7, i64 0}
!21 = !{!22, !19, i64 4}
!22 = !{!"_ZTS10TensorDesc", !17, i64 0, !19, i64 4, !12, i64 8, !7, i64 12}
!23 = !{!22, !17, i64 0}
!24 = !{!25, !25, i64 0}
!25 = !{!"_ZTS2EE", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.TensorDesc = type { i32, i32, i32, [20 x i32] }
%struct.ConvolutionParamSpec = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %union.ActivationSpec, i32, i32, i32, i32 }
%union.ActivationSpec = type { %struct.ClipParamSpec }
%struct.ClipParamSpec = type { float, float }
%struct.ActivationParamSpec = type { i32, [4 x float] }

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z35depthwise_pointwise_convolution_x8610TensorDescPvS0_S_PKvS_S2_20ConvolutionParamSpec36DepthwiseConvolutionForwardAlgorithmS0_S_S2_S_S2_jS0_S_S0_19ActivationParamSpecS5_4Arch(ptr nocapture noundef readonly byval(%struct.TensorDesc) align 8 %0, ptr noundef %1, ptr nocapture noundef readnone %2, ptr nocapture noundef readnone byval(%struct.TensorDesc) align 8 %3, ptr nocapture noundef readnone %4, ptr nocapture noundef readnone byval(%struct.TensorDesc) align 8 %5, ptr nocapture noundef readnone %6, ptr nocapture noundef readnone byval(%struct.ConvolutionParamSpec) align 8 %7, i32 noundef %8, ptr nocapture noundef readnone %9, ptr nocapture noundef readnone byval(%struct.TensorDesc) align 8 %10, ptr nocapture noundef readnone %11, ptr nocapture noundef readnone byval(%struct.TensorDesc) align 8 %12, ptr nocapture noundef readnone %13, i32 noundef %14, ptr noundef %15, ptr nocapture noundef readnone byval(%struct.TensorDesc) align 8 %16, ptr nocapture noundef readnone %17, ptr nocapture noundef readnone byval(%struct.ActivationParamSpec) align 8 %18, ptr nocapture noundef readnone byval(%struct.ActivationParamSpec) align 8 %19, i32 noundef %20) local_unnamed_addr #1 {
  %.sroa.5 = alloca { i32, [20 x i32] }, align 8
  %22 = alloca %struct.TensorDesc, align 8
  call void @llvm.lifetime.start.p0(i64 84, ptr nonnull %.sroa.5)
  %.sroa.0.0.copyload = load i32, ptr %0, align 8, !tbaa !5
  %.sroa.4.0..sroa_idx = getelementptr inbounds i8, ptr %0, i64 4
  %.sroa.5.0..sroa_idx = getelementptr inbounds i8, ptr %0, i64 8
  call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 8 dereferenceable(84) %.sroa.5, ptr noundef nonnull align 8 dereferenceable(84) %.sroa.5.0..sroa_idx, i64 84, i1 false), !tbaa.struct !9
  %23 = icmp eq i32 %.sroa.0.0.copyload, 10
  %24 = load i32, ptr %.sroa.4.0..sroa_idx, align 4
  %25 = icmp eq i32 %24, 41
  %or.cond = or i1 %23, %25
  %. = select i1 %or.cond, i32 41, i32 2
  %.not = icmp eq i32 %24, %.
  br i1 %.not, label %30, label %26

26:                                               ; preds = %21
  %27 = tail call noundef i32 @_Z14tensorNumBytes10TensorDesc(ptr noundef nonnull byval(%struct.TensorDesc) align 8 %0)
  %28 = tail call noundef i32 @_Z14tensorNumBytes10TensorDesc(ptr noundef nonnull byval(%struct.TensorDesc) align 8 %0)
  store i32 %.sroa.0.0.copyload, ptr %22, align 8, !tbaa !5
  %.sroa.4.0..sroa_idx6 = getelementptr inbounds i8, ptr %22, i64 4
  store i32 %., ptr %.sroa.4.0..sroa_idx6, align 4, !tbaa !13
  %.sroa.5.0..sroa_idx8 = getelementptr inbounds i8, ptr %22, i64 8
  call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 8 dereferenceable(84) %.sroa.5.0..sroa_idx8, ptr noundef nonnull align 8 dereferenceable(84) %.sroa.5, i64 84, i1 false), !tbaa.struct !9
  %29 = tail call noundef i32 @_Z15transformFormat10TensorDescPKvS_Pv(ptr noundef nonnull byval(%struct.TensorDesc) align 8 %0, ptr noundef %1, ptr noundef nonnull byval(%struct.TensorDesc) align 8 %22, ptr noundef %15)
  br label %30

30:                                               ; preds = %26, %21
  call void @llvm.lifetime.end.p0(i64 84, ptr nonnull %.sroa.5)
  ret i32 51
}

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef i32 @_Z14tensorNumBytes10TensorDesc(ptr noundef byval(%struct.TensorDesc) align 8) local_unnamed_addr #3

declare noundef i32 @_Z15transformFormat10TensorDescPKvS_Pv(ptr noundef byval(%struct.TensorDesc) align 8, ptr noundef, ptr noundef byval(%struct.TensorDesc) align 8, ptr noundef) local_unnamed_addr #4

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"_ZTS8DataType", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{i64 0, i64 4, !10, i64 4, i64 80, !12}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !7, i64 0}
!12 = !{!7, !7, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"_ZTS10DataFormat", !7, i64 0}


; Effective O3 passes: CorrelatedValuePropagationPass,DSEPass,EarlyCSEPass,GlobalOptPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,MemCpyOptPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass