; LLVM IR from huawei-noah/bolt :: compute/tensor/src (non_max_suppression)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.NonMaxSuppressionParamSpec = type { i32, i32, float, float }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<TensorDesc, std::allocator<TensorDesc>>::_Vector_impl" }
%"struct.std::_Vector_base<TensorDesc, std::allocator<TensorDesc>>::_Vector_impl" = type { %"struct.std::_Vector_base<TensorDesc, std::allocator<TensorDesc>>::_Vector_impl_data" }
%"struct.std::_Vector_base<TensorDesc, std::allocator<TensorDesc>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<Tensor *, std::allocator<Tensor *>>::_Vector_impl" }
%"struct.std::_Vector_base<Tensor *, std::allocator<Tensor *>>::_Vector_impl" = type { %"struct.std::_Vector_base<Tensor *, std::allocator<Tensor *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Tensor *, std::allocator<Tensor *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%struct.TensorDesc = type { i32, i32, i32, [20 x i32] }

@.str = external hidden unnamed_addr constant [20 x i8], align 1
@stdout = external global ptr, align 8
@.str.1 = external hidden unnamed_addr constant [18 x i8], align 1

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z37non_max_suppression_infer_output_sizeSt6vectorIP6TensorSaIS1_EE26NonMaxSuppressionParamSpecS1_P8ArchInfo(ptr noundef %0, i64 %1, <2 x float> %2, ptr noundef %3, ptr noundef %4) #0 personality ptr @__gxx_personality_v0 {
  %6 = alloca %struct.NonMaxSuppressionParamSpec, align 4
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  %9 = alloca ptr, align 8
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca %"class.std::vector.0", align 8
  %13 = alloca %"class.std::vector", align 8
  %14 = alloca ptr, align 8
  %15 = alloca i32, align 4
  %16 = alloca %struct.TensorDesc, align 4
  %17 = alloca i32, align 4
  %18 = alloca %"class.std::vector.0", align 8
  %19 = alloca %struct.NonMaxSuppressionParamSpec, align 4
  %20 = alloca i32, align 4
  %21 = alloca %struct.TensorDesc, align 8
  %22 = getelementptr inbounds { i64, <2 x float> }, ptr %6, i32 0, i32 0
  store i64 %1, ptr %22, align 4
  %23 = getelementptr inbounds { i64, <2 x float> }, ptr %6, i32 0, i32 1
  store <2 x float> %2, ptr %23, align 4
  store ptr %0, ptr %7, align 8, !tbaa !5
  store ptr %3, ptr %8, align 8, !tbaa !5
  store ptr %4, ptr %9, align 8, !tbaa !5
  %24 = load ptr, ptr %8, align 8, !tbaa !5
  %25 = icmp eq ptr %24, null
  br i1 %25, label %26, label %42

26:                                               ; preds = %5
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #11
  store i32 1, ptr %10, align 4, !tbaa !9
  %27 = load i32, ptr %10, align 4, !tbaa !9
  %28 = icmp ne i32 %27, 0
  br i1 %28, label %29, label %41

29:                                               ; preds = %26
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #11
  %30 = call i64 (i64, ...) @syscall(i64 noundef 186) #11
  %31 = trunc i64 %30 to i32
  store i32 %31, ptr %11, align 4, !tbaa !11
  %32 = load i32, ptr %11, align 4, !tbaa !11
  %33 = call i32 (ptr, ...) @printf(ptr noundef @.str, i32 noundef %32)
  %34 = load ptr, ptr @stdout, align 8, !tbaa !5
  %35 = call i32 @fflush(ptr noundef %34)
  %36 = load i32, ptr %10, align 4, !tbaa !9
  %37 = call ptr @ee2str(i32 noundef %36)
  %38 = call i32 (ptr, ...) @printf(ptr noundef @.str.1, ptr noundef %37)
  %39 = load ptr, ptr @stdout, align 8, !tbaa !5
  %40 = call i32 @fflush(ptr noundef %39)
  call void @exit(i32 noundef 1) #12
  unreachable

41:                                               ; preds = %26
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #11
  br label %42

42:                                               ; preds = %41, %5
  call void @llvm.lifetime.start.p0(i64 24, ptr %12) #11
  call void @_ZNSt6vectorIP6TensorSaIS1_EEC2ERKS3_(ptr noundef nonnull align 8 dereferenceable(24) %13, ptr noundef nonnull align 8 dereferenceable(24) %0)
  invoke void @_Z25get_desc_from_tensor_ptrsSt6vectorIP6TensorSaIS1_EE(ptr dead_on_unwind writable sret(%"class.std::vector.0") align 8 %12, ptr noundef %13)
          to label %43 unwind label %72

43:                                               ; preds = %42
  call void @_ZNSt6vectorIP6TensorSaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %13) #11
  call void @llvm.lifetime.start.p0(i64 92, ptr %16) #11
  %44 = load ptr, ptr %8, align 8, !tbaa !5
  invoke void @_ZN6Tensor8get_descEv(ptr dead_on_unwind writable sret(%struct.TensorDesc) align 4 %16, ptr noundef nonnull align 8 dereferenceable(32) %44)
          to label %45 unwind label %76

45:                                               ; preds = %43
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #11
  invoke void @_ZNSt6vectorI10TensorDescSaIS0_EEC2ERKS2_(ptr noundef nonnull align 8 dereferenceable(24) %18, ptr noundef nonnull align 8 dereferenceable(24) %12)
          to label %46 unwind label %80

46:                                               ; preds = %45
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %19, ptr align 4 %6, i64 16, i1 false), !tbaa.struct !13
  %47 = getelementptr inbounds { i64, <2 x float> }, ptr %19, i32 0, i32 0
  %48 = load i64, ptr %47, align 4
  %49 = getelementptr inbounds { i64, <2 x float> }, ptr %19, i32 0, i32 1
  %50 = load <2 x float>, ptr %49, align 4
  %51 = invoke noundef i32 @_Z41non_max_suppression_infer_output_size_cpuSt6vectorI10TensorDescSaIS0_EE26NonMaxSuppressionParamSpecPS0_(ptr noundef %18, i64 %48, <2 x float> %50, ptr noundef %16)
          to label %52 unwind label %84

52:                                               ; preds = %46
  call void @_ZNSt6vectorI10TensorDescSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %18) #11
  store i32 %51, ptr %17, align 4, !tbaa !9
  %53 = load i32, ptr %17, align 4, !tbaa !9
  %54 = icmp ne i32 %53, 0
  br i1 %54, label %55, label %92

55:                                               ; preds = %52
  call void @llvm.lifetime.start.p0(i64 4, ptr %20) #11
  %56 = call i64 (i64, ...) @syscall(i64 noundef 186) #11
  %57 = trunc i64 %56 to i32
  store i32 %57, ptr %20, align 4, !tbaa !11
  %58 = load i32, ptr %20, align 4, !tbaa !11
  %59 = invoke i32 (ptr, ...) @printf(ptr noundef @.str, i32 noundef %58)
          to label %60 unwind label %88

60:                                               ; preds = %55
  %61 = load ptr, ptr @stdout, align 8, !tbaa !5
  %62 = invoke i32 @fflush(ptr noundef %61)
          to label %63 unwind label %88

63:                                               ; preds = %60
  %64 = load i32, ptr %17, align 4, !tbaa !9
  %65 = invoke ptr @ee2str(i32 noundef %64)
          to label %66 unwind label %88

66:                                               ; preds = %63
  %67 = invoke i32 (ptr, ...) @printf(ptr noundef @.str.1, ptr noundef %65)
          to label %68 unwind label %88

68:                                               ; preds = %66
  %69 = load ptr, ptr @stdout, align 8, !tbaa !5
  %70 = invoke i32 @fflush(ptr noundef %69)
          to label %71 unwind label %88

71:                                               ; preds = %68
  call void @exit(i32 noundef 1) #12
  unreachable

72:                                               ; preds = %42
  %73 = landingpad { ptr, i32 }
          cleanup
  %74 = extractvalue { ptr, i32 } %73, 0
  store ptr %74, ptr %14, align 8
  %75 = extractvalue { ptr, i32 } %73, 1
  store i32 %75, ptr %15, align 4
  call void @_ZNSt6vectorIP6TensorSaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %13) #11
  br label %97

76:                                               ; preds = %92, %43
  %77 = landingpad { ptr, i32 }
          cleanup
  %78 = extractvalue { ptr, i32 } %77, 0
  store ptr %78, ptr %14, align 8
  %79 = extractvalue { ptr, i32 } %77, 1
  store i32 %79, ptr %15, align 4
  br label %96

80:                                               ; preds = %45
  %81 = landingpad { ptr, i32 }
          cleanup
  %82 = extractvalue { ptr, i32 } %81, 0
  store ptr %82, ptr %14, align 8
  %83 = extractvalue { ptr, i32 } %81, 1
  store i32 %83, ptr %15, align 4
  br label %95

84:                                               ; preds = %46
  %85 = landingpad { ptr, i32 }
          cleanup
  %86 = extractvalue { ptr, i32 } %85, 0
  store ptr %86, ptr %14, align 8
  %87 = extractvalue { ptr, i32 } %85, 1
  store i32 %87, ptr %15, align 4
  call void @_ZNSt6vectorI10TensorDescSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %18) #11
  br label %95

88:                                               ; preds = %68, %66, %63, %60, %55
  %89 = landingpad { ptr, i32 }
          cleanup
  %90 = extractvalue { ptr, i32 } %89, 0
  store ptr %90, ptr %14, align 8
  %91 = extractvalue { ptr, i32 } %89, 1
  store i32 %91, ptr %15, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %20) #11
  br label %95

92:                                               ; preds = %52
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #11
  %93 = load ptr, ptr %8, align 8, !tbaa !5
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %21, ptr align 4 %16, i64 92, i1 false), !tbaa.struct !16
  invoke void @_ZN6Tensor6resizeE10TensorDesc(ptr noundef nonnull align 8 dereferenceable(32) %93, ptr noundef byval(%struct.TensorDesc) align 8 %21)
          to label %94 unwind label %76

94:                                               ; preds = %92
  call void @llvm.lifetime.end.p0(i64 92, ptr %16) #11
  call void @_ZNSt6vectorI10TensorDescSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %12) #11
  call void @llvm.lifetime.end.p0(i64 24, ptr %12) #11
  ret i32 0

95:                                               ; preds = %88, %84, %80
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #11
  br label %96

96:                                               ; preds = %95, %76
  call void @llvm.lifetime.end.p0(i64 92, ptr %16) #11
  call void @_ZNSt6vectorI10TensorDescSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %12) #11
  br label %97

97:                                               ; preds = %96, %72
  call void @llvm.lifetime.end.p0(i64 24, ptr %12) #11
  br label %98

98:                                               ; preds = %97
  %99 = load ptr, ptr %14, align 8
  %100 = load i32, ptr %15, align 4
  %101 = insertvalue { ptr, i32 } poison, ptr %99, 0
  %102 = insertvalue { ptr, i32 } %101, i32 %100, 1
  resume { ptr, i32 } %102
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind
declare i64 @syscall(i64 noundef, ...) #2

declare i32 @printf(ptr noundef, ...) #3

declare i32 @fflush(ptr noundef) #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local ptr @ee2str(i32 noundef) #4

; Function Attrs: noreturn nounwind
declare void @exit(i32 noundef) #5

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_Z25get_desc_from_tensor_ptrsSt6vectorIP6TensorSaIS1_EE(ptr dead_on_unwind noalias writable sret(%"class.std::vector.0") align 8, ptr noundef) #6

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIP6TensorSaIS1_EEC2ERKS3_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #7 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIP6TensorSaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #8 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN6Tensor8get_descEv(ptr dead_on_unwind noalias writable sret(%struct.TensorDesc) align 4, ptr noundef nonnull align 8 dereferenceable(32)) #7 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef i32 @_Z41non_max_suppression_infer_output_size_cpuSt6vectorI10TensorDescSaIS0_EE26NonMaxSuppressionParamSpecPS0_(ptr noundef, i64, <2 x float>, ptr noundef) #9

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorI10TensorDescSaIS0_EEC2ERKS2_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #7 align 2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #10

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorI10TensorDescSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #8 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN6Tensor6resizeE10TensorDesc(ptr noundef nonnull align 8 dereferenceable(32), ptr noundef byval(%struct.TensorDesc) align 8) #7 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="64" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #8 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #9 = { inlinehint mustprogress uwtable "min-legal-vector-width"="64" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #10 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #11 = { nounwind }
attributes #12 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"_ZTS2EE", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{i64 0, i64 4, !11, i64 4, i64 4, !11, i64 8, i64 4, !14, i64 12, i64 4, !14}
!14 = !{!15, !15, i64 0}
!15 = !{!"float", !7, i64 0}
!16 = !{i64 0, i64 4, !17, i64 4, i64 4, !19, i64 8, i64 4, !11, i64 12, i64 80, !21}
!17 = !{!18, !18, i64 0}
!18 = !{!"_ZTS8DataType", !7, i64 0}
!19 = !{!20, !20, i64 0}
!20 = !{!"_ZTS10DataFormat", !7, i64 0}
!21 = !{!7, !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<TensorDesc, std::allocator<TensorDesc>>::_Vector_impl" }
%"struct.std::_Vector_base<TensorDesc, std::allocator<TensorDesc>>::_Vector_impl" = type { %"struct.std::_Vector_base<TensorDesc, std::allocator<TensorDesc>>::_Vector_impl_data" }
%"struct.std::_Vector_base<TensorDesc, std::allocator<TensorDesc>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<Tensor *, std::allocator<Tensor *>>::_Vector_impl" }
%"struct.std::_Vector_base<Tensor *, std::allocator<Tensor *>>::_Vector_impl" = type { %"struct.std::_Vector_base<Tensor *, std::allocator<Tensor *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Tensor *, std::allocator<Tensor *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%struct.TensorDesc = type { i32, i32, i32, [20 x i32] }

@.str = external hidden unnamed_addr constant [20 x i8], align 1
@stdout = external local_unnamed_addr global ptr, align 8
@.str.1 = external hidden unnamed_addr constant [18 x i8], align 1

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z37non_max_suppression_infer_output_sizeSt6vectorIP6TensorSaIS1_EE26NonMaxSuppressionParamSpecS1_P8ArchInfo(ptr noundef %0, i64 %1, <2 x float> %2, ptr noundef %3, ptr nocapture noundef readnone %4) local_unnamed_addr #0 personality ptr @__gxx_personality_v0 {
  %6 = alloca %"class.std::vector.0", align 8
  %7 = alloca %"class.std::vector", align 8
  %8 = alloca %struct.TensorDesc, align 8
  %9 = alloca %"class.std::vector.0", align 8
  %10 = icmp eq ptr %3, null
  br i1 %10, label %11, label %21

11:                                               ; preds = %5
  %12 = tail call i64 (i64, ...) @syscall(i64 noundef 186) #10
  %13 = trunc i64 %12 to i32
  %14 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str, i32 noundef %13)
  %15 = load ptr, ptr @stdout, align 8, !tbaa !5
  %16 = tail call i32 @fflush(ptr noundef %15)
  %17 = tail call ptr @ee2str(i32 noundef 1)
  %18 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.1, ptr noundef %17)
  %19 = load ptr, ptr @stdout, align 8, !tbaa !5
  %20 = tail call i32 @fflush(ptr noundef %19)
  tail call void @exit(i32 noundef 1) #11
  unreachable

21:                                               ; preds = %5
  call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %6) #10
  call void @_ZNSt6vectorIP6TensorSaIS1_EEC2ERKS3_(ptr noundef nonnull align 8 dereferenceable(24) %7, ptr noundef nonnull align 8 dereferenceable(24) %0)
  invoke void @_Z25get_desc_from_tensor_ptrsSt6vectorIP6TensorSaIS1_EE(ptr dead_on_unwind nonnull writable sret(%"class.std::vector.0") align 8 %6, ptr noundef nonnull %7)
          to label %22 unwind label %37

22:                                               ; preds = %21
  call void @_ZNSt6vectorIP6TensorSaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %7) #10
  call void @llvm.lifetime.start.p0(i64 92, ptr nonnull %8) #10
  invoke void @_ZN6Tensor8get_descEv(ptr dead_on_unwind nonnull writable sret(%struct.TensorDesc) align 4 %8, ptr noundef nonnull align 8 dereferenceable(32) %3)
          to label %23 unwind label %39

23:                                               ; preds = %22
  invoke void @_ZNSt6vectorI10TensorDescSaIS0_EEC2ERKS2_(ptr noundef nonnull align 8 dereferenceable(24) %9, ptr noundef nonnull align 8 dereferenceable(24) %6)
          to label %24 unwind label %41

24:                                               ; preds = %23
  %25 = invoke noundef i32 @_Z41non_max_suppression_infer_output_size_cpuSt6vectorI10TensorDescSaIS0_EE26NonMaxSuppressionParamSpecPS0_(ptr noundef nonnull %9, i64 %1, <2 x float> %2, ptr noundef nonnull %8)
          to label %26 unwind label %43

26:                                               ; preds = %24
  call void @_ZNSt6vectorI10TensorDescSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %9) #10
  %.not = icmp eq i32 %25, 0
  br i1 %.not, label %45, label %27

27:                                               ; preds = %26
  %28 = call i64 (i64, ...) @syscall(i64 noundef 186) #10
  %29 = trunc i64 %28 to i32
  %30 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str, i32 noundef %29)
  %31 = load ptr, ptr @stdout, align 8, !tbaa !5
  %32 = call i32 @fflush(ptr noundef %31)
  %33 = call ptr @ee2str(i32 noundef %25)
  %34 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.1, ptr noundef %33)
  %35 = load ptr, ptr @stdout, align 8, !tbaa !5
  %36 = call i32 @fflush(ptr noundef %35)
  call void @exit(i32 noundef 1) #11
  unreachable

37:                                               ; preds = %21
  %38 = landingpad { ptr, i32 }
          cleanup
  call void @_ZNSt6vectorIP6TensorSaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %7) #10
  br label %48

39:                                               ; preds = %45, %22
  %40 = landingpad { ptr, i32 }
          cleanup
  br label %47

41:                                               ; preds = %23
  %42 = landingpad { ptr, i32 }
          cleanup
  br label %47

43:                                               ; preds = %24
  %44 = landingpad { ptr, i32 }
          cleanup
  call void @_ZNSt6vectorI10TensorDescSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %9) #10
  br label %47

45:                                               ; preds = %26
  invoke void @_ZN6Tensor6resizeE10TensorDesc(ptr noundef nonnull align 8 dereferenceable(32) %3, ptr noundef nonnull byval(%struct.TensorDesc) align 8 %8)
          to label %46 unwind label %39

46:                                               ; preds = %45
  call void @llvm.lifetime.end.p0(i64 92, ptr nonnull %8) #10
  call void @_ZNSt6vectorI10TensorDescSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %6) #10
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %6) #10
  ret i32 0

47:                                               ; preds = %41, %43, %39
  %.pn17 = phi { ptr, i32 } [ %40, %39 ], [ %44, %43 ], [ %42, %41 ]
  call void @llvm.lifetime.end.p0(i64 92, ptr nonnull %8) #10
  call void @_ZNSt6vectorI10TensorDescSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %6) #10
  br label %48

48:                                               ; preds = %47, %37
  %.pn17.pn = phi { ptr, i32 } [ %.pn17, %47 ], [ %38, %37 ]
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %6) #10
  resume { ptr, i32 } %.pn17.pn
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind
declare i64 @syscall(i64 noundef, ...) local_unnamed_addr #2

; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #3

; Function Attrs: nofree nounwind
declare noundef i32 @fflush(ptr nocapture noundef) local_unnamed_addr #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local ptr @ee2str(i32 noundef) local_unnamed_addr #4

; Function Attrs: noreturn nounwind
declare void @exit(i32 noundef) local_unnamed_addr #5

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_Z25get_desc_from_tensor_ptrsSt6vectorIP6TensorSaIS1_EE(ptr dead_on_unwind noalias writable sret(%"class.std::vector.0") align 8, ptr noundef) local_unnamed_addr #6

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIP6TensorSaIS1_EEC2ERKS3_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #7 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIP6TensorSaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #8 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN6Tensor8get_descEv(ptr dead_on_unwind noalias writable sret(%struct.TensorDesc) align 4, ptr noundef nonnull align 8 dereferenceable(32)) local_unnamed_addr #7 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef i32 @_Z41non_max_suppression_infer_output_size_cpuSt6vectorI10TensorDescSaIS0_EE26NonMaxSuppressionParamSpecPS0_(ptr noundef, i64, <2 x float>, ptr noundef) local_unnamed_addr #9

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorI10TensorDescSaIS0_EEC2ERKS2_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #7 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorI10TensorDescSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #8 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN6Tensor6resizeE10TensorDesc(ptr noundef nonnull align 8 dereferenceable(32), ptr noundef byval(%struct.TensorDesc) align 8) local_unnamed_addr #7 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="64" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #8 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #9 = { inlinehint mustprogress uwtable "min-legal-vector-width"="64" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #10 = { nounwind }
attributes #11 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: DSEPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,MemCpyOptPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass