; LLVM IR from huawei-noah/bolt :: compute/tensor/src/cpu/check.ll (Z9check_cpu10TensorDescPvS_S0_14CheckParamSpecS_S0_)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.TensorDesc = type { i32, i32, i32, [20 x i32] }
%struct.CheckParamSpec = type { i32 }

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z9check_cpu10TensorDescPvS_S0_14CheckParamSpecS_S0_(ptr noundef byval(%struct.TensorDesc) align 8 %0, ptr noundef %1, ptr noundef byval(%struct.TensorDesc) align 8 %2, ptr noundef %3, i32 %4, ptr noundef byval(%struct.TensorDesc) align 8 %5, ptr noundef %6) #0 {
  %8 = alloca %struct.CheckParamSpec, align 4
  %9 = alloca ptr, align 8
  %10 = alloca ptr, align 8
  %11 = alloca ptr, align 8
  %12 = alloca i32, align 4
  %13 = alloca %struct.TensorDesc, align 8
  %14 = alloca %struct.TensorDesc, align 8
  %15 = alloca %struct.CheckParamSpec, align 4
  %16 = alloca %struct.TensorDesc, align 8
  %17 = alloca %struct.TensorDesc, align 8
  %18 = alloca %struct.TensorDesc, align 8
  %19 = alloca %struct.CheckParamSpec, align 4
  %20 = alloca %struct.TensorDesc, align 8
  %21 = getelementptr inbounds %struct.CheckParamSpec, ptr %8, i32 0, i32 0
  store i32 %4, ptr %21, align 4
  store ptr %1, ptr %9, align 8, !tbaa !5
  store ptr %3, ptr %10, align 8, !tbaa !5
  store ptr %6, ptr %11, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #3
  store i32 51, ptr %12, align 4, !tbaa !9
  %22 = getelementptr inbounds %struct.TensorDesc, ptr %0, i32 0, i32 0
  %23 = load i32, ptr %22, align 8, !tbaa !11
  switch i32 %23, label %38 [
    i32 2, label %24
    i32 3, label %31
  ]

24:                                               ; preds = %7
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %13, ptr align 8 %0, i64 92, i1 false), !tbaa.struct !16
  %25 = load ptr, ptr %9, align 8, !tbaa !5
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %14, ptr align 8 %2, i64 92, i1 false), !tbaa.struct !16
  %26 = load ptr, ptr %10, align 8, !tbaa !5
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %15, ptr align 4 %8, i64 4, i1 false), !tbaa.struct !21
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %16, ptr align 8 %5, i64 92, i1 false), !tbaa.struct !16
  %27 = load ptr, ptr %11, align 8, !tbaa !5
  %28 = getelementptr inbounds %struct.CheckParamSpec, ptr %15, i32 0, i32 0
  %29 = load i32, ptr %28, align 4
  %30 = call noundef i32 @_Z13check_wrapperIjE2EE10TensorDescPT_S1_Pv14CheckParamSpecS1_Ph(ptr noundef byval(%struct.TensorDesc) align 8 %13, ptr noundef %25, ptr noundef byval(%struct.TensorDesc) align 8 %14, ptr noundef %26, i32 %29, ptr noundef byval(%struct.TensorDesc) align 8 %16, ptr noundef %27)
  store i32 %30, ptr %12, align 4, !tbaa !9
  br label %39

31:                                               ; preds = %7
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %17, ptr align 8 %0, i64 92, i1 false), !tbaa.struct !16
  %32 = load ptr, ptr %9, align 8, !tbaa !5
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %18, ptr align 8 %2, i64 92, i1 false), !tbaa.struct !16
  %33 = load ptr, ptr %10, align 8, !tbaa !5
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %19, ptr align 4 %8, i64 4, i1 false), !tbaa.struct !21
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %20, ptr align 8 %5, i64 92, i1 false), !tbaa.struct !16
  %34 = load ptr, ptr %11, align 8, !tbaa !5
  %35 = getelementptr inbounds %struct.CheckParamSpec, ptr %19, i32 0, i32 0
  %36 = load i32, ptr %35, align 4
  %37 = call noundef i32 @_Z13check_wrapperIiE2EE10TensorDescPT_S1_Pv14CheckParamSpecS1_Ph(ptr noundef byval(%struct.TensorDesc) align 8 %17, ptr noundef %32, ptr noundef byval(%struct.TensorDesc) align 8 %18, ptr noundef %33, i32 %36, ptr noundef byval(%struct.TensorDesc) align 8 %20, ptr noundef %34)
  store i32 %37, ptr %12, align 4, !tbaa !9
  br label %39

38:                                               ; preds = %7
  br label %39

39:                                               ; preds = %38, %31, %24
  %40 = load i32, ptr %12, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #3
  ret i32 %40
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_Z13check_wrapperIjE2EE10TensorDescPT_S1_Pv14CheckParamSpecS1_Ph(ptr noundef byval(%struct.TensorDesc) align 8, ptr noundef, ptr noundef byval(%struct.TensorDesc) align 8, ptr noundef, i32, ptr noundef byval(%struct.TensorDesc) align 8, ptr noundef) #0

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_Z13check_wrapperIiE2EE10TensorDescPT_S1_Pv14CheckParamSpecS1_Ph(ptr noundef byval(%struct.TensorDesc) align 8, ptr noundef, ptr noundef byval(%struct.TensorDesc) align 8, ptr noundef, i32, ptr noundef byval(%struct.TensorDesc) align 8, ptr noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"_ZTS2EE", !7, i64 0}
!11 = !{!12, !13, i64 0}
!12 = !{!"_ZTS10TensorDesc", !13, i64 0, !14, i64 4, !15, i64 8, !7, i64 12}
!13 = !{!"_ZTS8DataType", !7, i64 0}
!14 = !{!"_ZTS10DataFormat", !7, i64 0}
!15 = !{!"int", !7, i64 0}
!16 = !{i64 0, i64 4, !17, i64 4, i64 4, !18, i64 8, i64 4, !19, i64 12, i64 80, !20}
!17 = !{!13, !13, i64 0}
!18 = !{!14, !14, i64 0}
!19 = !{!15, !15, i64 0}
!20 = !{!7, !7, i64 0}
!21 = !{i64 0, i64 4, !22}
!22 = !{!23, !23, i64 0}
!23 = !{!"_ZTS9CheckMode", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.TensorDesc = type { i32, i32, i32, [20 x i32] }

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z9check_cpu10TensorDescPvS_S0_14CheckParamSpecS_S0_(ptr nocapture noundef readonly byval(%struct.TensorDesc) align 8 %0, ptr noundef %1, ptr nocapture noundef readonly byval(%struct.TensorDesc) align 8 %2, ptr noundef %3, i32 %4, ptr nocapture noundef readonly byval(%struct.TensorDesc) align 8 %5, ptr noundef %6) local_unnamed_addr #0 {
  %8 = load i32, ptr %0, align 8, !tbaa !5
  switch i32 %8, label %13 [
    i32 2, label %9
    i32 3, label %11
  ]

9:                                                ; preds = %7
  %10 = tail call noundef i32 @_Z13check_wrapperIjE2EE10TensorDescPT_S1_Pv14CheckParamSpecS1_Ph(ptr noundef nonnull byval(%struct.TensorDesc) align 8 %0, ptr noundef %1, ptr noundef nonnull byval(%struct.TensorDesc) align 8 %2, ptr noundef %3, i32 %4, ptr noundef nonnull byval(%struct.TensorDesc) align 8 %5, ptr noundef %6)
  br label %13

11:                                               ; preds = %7
  %12 = tail call noundef i32 @_Z13check_wrapperIiE2EE10TensorDescPT_S1_Pv14CheckParamSpecS1_Ph(ptr noundef nonnull byval(%struct.TensorDesc) align 8 %0, ptr noundef %1, ptr noundef nonnull byval(%struct.TensorDesc) align 8 %2, ptr noundef %3, i32 %4, ptr noundef nonnull byval(%struct.TensorDesc) align 8 %5, ptr noundef %6)
  br label %13

13:                                               ; preds = %7, %11, %9
  %.0 = phi i32 [ 51, %7 ], [ %12, %11 ], [ %10, %9 ]
  ret i32 %.0
}

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_Z13check_wrapperIjE2EE10TensorDescPT_S1_Pv14CheckParamSpecS1_Ph(ptr noundef byval(%struct.TensorDesc) align 8, ptr noundef, ptr noundef byval(%struct.TensorDesc) align 8, ptr noundef, i32, ptr noundef byval(%struct.TensorDesc) align 8, ptr noundef) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_Z13check_wrapperIiE2EE10TensorDescPT_S1_Pv14CheckParamSpecS1_Ph(ptr noundef byval(%struct.TensorDesc) align 8, ptr noundef, ptr noundef byval(%struct.TensorDesc) align 8, ptr noundef, i32, ptr noundef byval(%struct.TensorDesc) align 8, ptr noundef) local_unnamed_addr #0

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"_ZTS10TensorDesc", !7, i64 0, !10, i64 4, !11, i64 8, !8, i64 12}
!7 = !{!"_ZTS8DataType", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"_ZTS10DataFormat", !8, i64 0}
!11 = !{!"int", !8, i64 0}


; Effective O3 passes: DSEPass,EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,MemCpyOptPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass