; LLVM IR from upupming/algorithm :: acwing/算法基础课/第一讲 基础算法/快速排序/785. 快速排序.ll (Z10quick_sortPiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local void @_Z10quick_sortPiii(ptr noundef %0, i32 noundef %1, i32 noundef %2) #0 {
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !9
  store i32 %2, ptr %6, align 4, !tbaa !9
  %10 = load i32, ptr %5, align 4, !tbaa !9
  %11 = load i32, ptr %6, align 4, !tbaa !9
  %12 = icmp sge i32 %10, %11
  br i1 %12, label %13, label %14

13:                                               ; preds = %3
  br label %77

14:                                               ; preds = %3
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  %15 = load i32, ptr %5, align 4, !tbaa !9
  %16 = sub nsw i32 %15, 1
  store i32 %16, ptr %7, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  %17 = load i32, ptr %6, align 4, !tbaa !9
  %18 = add nsw i32 %17, 1
  store i32 %18, ptr %8, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  %19 = load ptr, ptr %4, align 8, !tbaa !5
  %20 = load i32, ptr %5, align 4, !tbaa !9
  %21 = load i32, ptr %6, align 4, !tbaa !9
  %22 = add nsw i32 %20, %21
  %23 = ashr i32 %22, 1
  %24 = sext i32 %23 to i64
  %25 = getelementptr inbounds i32, ptr %19, i64 %24
  %26 = load i32, ptr %25, align 4, !tbaa !9
  store i32 %26, ptr %9, align 4, !tbaa !9
  br label %27

27:                                               ; preds = %68, %14
  %28 = load i32, ptr %7, align 4, !tbaa !9
  %29 = load i32, ptr %8, align 4, !tbaa !9
  %30 = icmp slt i32 %28, %29
  br i1 %30, label %31, label %69

31:                                               ; preds = %27
  br label %32

32:                                               ; preds = %35, %31
  %33 = load i32, ptr %7, align 4, !tbaa !9
  %34 = add nsw i32 %33, 1
  store i32 %34, ptr %7, align 4, !tbaa !9
  br label %35

35:                                               ; preds = %32
  %36 = load ptr, ptr %4, align 8, !tbaa !5
  %37 = load i32, ptr %7, align 4, !tbaa !9
  %38 = sext i32 %37 to i64
  %39 = getelementptr inbounds i32, ptr %36, i64 %38
  %40 = load i32, ptr %39, align 4, !tbaa !9
  %41 = load i32, ptr %9, align 4, !tbaa !9
  %42 = icmp slt i32 %40, %41
  br i1 %42, label %32, label %43, !llvm.loop !11

43:                                               ; preds = %35
  br label %44

44:                                               ; preds = %47, %43
  %45 = load i32, ptr %8, align 4, !tbaa !9
  %46 = add nsw i32 %45, -1
  store i32 %46, ptr %8, align 4, !tbaa !9
  br label %47

47:                                               ; preds = %44
  %48 = load ptr, ptr %4, align 8, !tbaa !5
  %49 = load i32, ptr %8, align 4, !tbaa !9
  %50 = sext i32 %49 to i64
  %51 = getelementptr inbounds i32, ptr %48, i64 %50
  %52 = load i32, ptr %51, align 4, !tbaa !9
  %53 = load i32, ptr %9, align 4, !tbaa !9
  %54 = icmp sgt i32 %52, %53
  br i1 %54, label %44, label %55, !llvm.loop !13

55:                                               ; preds = %47
  %56 = load i32, ptr %7, align 4, !tbaa !9
  %57 = load i32, ptr %8, align 4, !tbaa !9
  %58 = icmp slt i32 %56, %57
  br i1 %58, label %59, label %68

59:                                               ; preds = %55
  %60 = load ptr, ptr %4, align 8, !tbaa !5
  %61 = load i32, ptr %7, align 4, !tbaa !9
  %62 = sext i32 %61 to i64
  %63 = getelementptr inbounds i32, ptr %60, i64 %62
  %64 = load ptr, ptr %4, align 8, !tbaa !5
  %65 = load i32, ptr %8, align 4, !tbaa !9
  %66 = sext i32 %65 to i64
  %67 = getelementptr inbounds i32, ptr %64, i64 %66
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %63, ptr noundef nonnull align 4 dereferenceable(4) %67) #3
  br label %68

68:                                               ; preds = %59, %55
  br label %27, !llvm.loop !14

69:                                               ; preds = %27
  %70 = load ptr, ptr %4, align 8, !tbaa !5
  %71 = load i32, ptr %5, align 4, !tbaa !9
  %72 = load i32, ptr %8, align 4, !tbaa !9
  call void @_Z10quick_sortPiii(ptr noundef %70, i32 noundef %71, i32 noundef %72)
  %73 = load ptr, ptr %4, align 8, !tbaa !5
  %74 = load i32, ptr %8, align 4, !tbaa !9
  %75 = add nsw i32 %74, 1
  %76 = load i32, ptr %6, align 4, !tbaa !9
  call void @_Z10quick_sortPiii(ptr noundef %73, i32 noundef %75, i32 noundef %76)
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  br label %77

77:                                               ; preds = %69, %13
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}
!14 = distinct !{!14, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z10quick_sortPiii(ptr noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 {
  %.not41 = icmp slt i32 %1, %2
  br i1 %.not41, label %.lr.ph, label %tailrecurse._crit_edge

.lr.ph:                                           ; preds = %3
  %4 = add nsw i32 %2, 1
  br label %5

5:                                                ; preds = %.lr.ph, %tailrecurse
  %.tr3242 = phi i32 [ %1, %.lr.ph ], [ %29, %tailrecurse ]
  %6 = add nsw i32 %.tr3242, %2
  %7 = ashr i32 %6, 1
  %8 = sext i32 %7 to i64
  %9 = getelementptr inbounds i32, ptr %0, i64 %8
  %10 = load i32, ptr %9, align 4, !tbaa !5
  %.not44 = icmp sgt i32 %.tr3242, %4
  br i1 %.not44, label %tailrecurse, label %.preheader34.preheader

.preheader34.preheader:                           ; preds = %5
  %11 = add nsw i32 %.tr3242, -1
  br label %.preheader34

.preheader34:                                     ; preds = %27, %.preheader34.preheader
  %.040 = phi i32 [ %18, %27 ], [ %11, %.preheader34.preheader ]
  %.02839 = phi i32 [ %25, %27 ], [ %4, %.preheader34.preheader ]
  %12 = sext i32 %.040 to i64
  br label %13

13:                                               ; preds = %.preheader34, %13
  %indvars.iv = phi i64 [ %12, %.preheader34 ], [ %indvars.iv.next, %13 ]
  %indvars.iv.next = add nsw i64 %indvars.iv, 1
  %14 = getelementptr inbounds i32, ptr %0, i64 %indvars.iv.next
  %15 = load i32, ptr %14, align 4, !tbaa !5
  %16 = icmp slt i32 %15, %10
  br i1 %16, label %13, label %.preheader, !llvm.loop !9

.preheader:                                       ; preds = %13
  %17 = getelementptr inbounds i32, ptr %0, i64 %indvars.iv.next
  %18 = trunc nsw i64 %indvars.iv.next to i32
  %19 = sext i32 %.02839 to i64
  br label %20

20:                                               ; preds = %.preheader, %20
  %indvars.iv49 = phi i64 [ %19, %.preheader ], [ %indvars.iv.next50, %20 ]
  %indvars.iv.next50 = add nsw i64 %indvars.iv49, -1
  %21 = getelementptr inbounds i32, ptr %0, i64 %indvars.iv.next50
  %22 = load i32, ptr %21, align 4, !tbaa !5
  %23 = icmp sgt i32 %22, %10
  br i1 %23, label %20, label %24, !llvm.loop !11

24:                                               ; preds = %20
  %25 = trunc nsw i64 %indvars.iv.next50 to i32
  %26 = icmp slt i64 %indvars.iv.next, %indvars.iv.next50
  br i1 %26, label %27, label %tailrecurse

27:                                               ; preds = %24
  %28 = getelementptr inbounds i32, ptr %0, i64 %indvars.iv.next50
  tail call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %17, ptr noundef nonnull align 4 dereferenceable(4) %28) #2
  br label %.preheader34

tailrecurse:                                      ; preds = %24, %5
  %.028.lcssa = phi i32 [ %4, %5 ], [ %25, %24 ]
  tail call void @_Z10quick_sortPiii(ptr noundef nonnull %0, i32 noundef %.tr3242, i32 noundef %.028.lcssa)
  %29 = add nsw i32 %.028.lcssa, 1
  %.not = icmp slt i32 %29, %2
  br i1 %.not, label %5, label %tailrecurse._crit_edge

tailrecurse._crit_edge:                           ; preds = %tailrecurse, %3
  ret void
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass