; LLVM IR from AF-GRILL/DISPluginForUnreal :: Source/ThirdParty/include/dis7/SeparationVP.ll (ZNK3DIS12SeparationVPeqERKS0_)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.DIS::SeparationVP" = type { ptr, i8, i8, i8, i8, [4 x i8], %"class.DIS::EntityID", i16, i32 }
%"class.DIS::EntityID" = type <{ ptr, %"class.DIS::SimulationAddress", i16, [6 x i8] }>
%"class.DIS::SimulationAddress" = type <{ ptr, i16, i16, [4 x i8] }>

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZNK3DIS12SeparationVPeqERKS0_(ptr noundef nonnull align 8 dereferenceable(56) %0, ptr noundef nonnull align 8 dereferenceable(56) %1) #0 align 2 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca i8, align 1
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  %6 = load ptr, ptr %3, align 8
  call void @llvm.lifetime.start.p0(i64 1, ptr %5) #3
  store i8 1, ptr %5, align 1, !tbaa !9
  %7 = getelementptr inbounds %"class.DIS::SeparationVP", ptr %6, i32 0, i32 1
  %8 = load i8, ptr %7, align 8, !tbaa !11
  %9 = zext i8 %8 to i32
  %10 = load ptr, ptr %4, align 8, !tbaa !5
  %11 = getelementptr inbounds %"class.DIS::SeparationVP", ptr %10, i32 0, i32 1
  %12 = load i8, ptr %11, align 8, !tbaa !11
  %13 = zext i8 %12 to i32
  %14 = icmp eq i32 %9, %13
  br i1 %14, label %16, label %15

15:                                               ; preds = %2
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %16

16:                                               ; preds = %15, %2
  %17 = getelementptr inbounds %"class.DIS::SeparationVP", ptr %6, i32 0, i32 2
  %18 = load i8, ptr %17, align 1, !tbaa !17
  %19 = zext i8 %18 to i32
  %20 = load ptr, ptr %4, align 8, !tbaa !5
  %21 = getelementptr inbounds %"class.DIS::SeparationVP", ptr %20, i32 0, i32 2
  %22 = load i8, ptr %21, align 1, !tbaa !17
  %23 = zext i8 %22 to i32
  %24 = icmp eq i32 %19, %23
  br i1 %24, label %26, label %25

25:                                               ; preds = %16
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %26

26:                                               ; preds = %25, %16
  %27 = getelementptr inbounds %"class.DIS::SeparationVP", ptr %6, i32 0, i32 3
  %28 = load i8, ptr %27, align 2, !tbaa !18
  %29 = zext i8 %28 to i32
  %30 = load ptr, ptr %4, align 8, !tbaa !5
  %31 = getelementptr inbounds %"class.DIS::SeparationVP", ptr %30, i32 0, i32 3
  %32 = load i8, ptr %31, align 2, !tbaa !18
  %33 = zext i8 %32 to i32
  %34 = icmp eq i32 %29, %33
  br i1 %34, label %36, label %35

35:                                               ; preds = %26
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %36

36:                                               ; preds = %35, %26
  %37 = getelementptr inbounds %"class.DIS::SeparationVP", ptr %6, i32 0, i32 4
  %38 = load i8, ptr %37, align 1, !tbaa !19
  %39 = zext i8 %38 to i32
  %40 = load ptr, ptr %4, align 8, !tbaa !5
  %41 = getelementptr inbounds %"class.DIS::SeparationVP", ptr %40, i32 0, i32 4
  %42 = load i8, ptr %41, align 1, !tbaa !19
  %43 = zext i8 %42 to i32
  %44 = icmp eq i32 %39, %43
  br i1 %44, label %46, label %45

45:                                               ; preds = %36
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %46

46:                                               ; preds = %45, %36
  %47 = getelementptr inbounds %"class.DIS::SeparationVP", ptr %6, i32 0, i32 6
  %48 = load ptr, ptr %4, align 8, !tbaa !5
  %49 = getelementptr inbounds %"class.DIS::SeparationVP", ptr %48, i32 0, i32 6
  %50 = call noundef zeroext i1 @_ZNK3DIS8EntityIDeqERKS0_(ptr noundef nonnull align 8 dereferenceable(26) %47, ptr noundef nonnull align 8 dereferenceable(26) %49)
  br i1 %50, label %52, label %51

51:                                               ; preds = %46
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %52

52:                                               ; preds = %51, %46
  %53 = getelementptr inbounds %"class.DIS::SeparationVP", ptr %6, i32 0, i32 7
  %54 = load i16, ptr %53, align 8, !tbaa !20
  %55 = zext i16 %54 to i32
  %56 = load ptr, ptr %4, align 8, !tbaa !5
  %57 = getelementptr inbounds %"class.DIS::SeparationVP", ptr %56, i32 0, i32 7
  %58 = load i16, ptr %57, align 8, !tbaa !20
  %59 = zext i16 %58 to i32
  %60 = icmp eq i32 %55, %59
  br i1 %60, label %62, label %61

61:                                               ; preds = %52
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %62

62:                                               ; preds = %61, %52
  %63 = getelementptr inbounds %"class.DIS::SeparationVP", ptr %6, i32 0, i32 8
  %64 = load i32, ptr %63, align 4, !tbaa !21
  %65 = load ptr, ptr %4, align 8, !tbaa !5
  %66 = getelementptr inbounds %"class.DIS::SeparationVP", ptr %65, i32 0, i32 8
  %67 = load i32, ptr %66, align 4, !tbaa !21
  %68 = icmp eq i32 %64, %67
  br i1 %68, label %70, label %69

69:                                               ; preds = %62
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %70

70:                                               ; preds = %69, %62
  %71 = load i8, ptr %5, align 1, !tbaa !9, !range !22, !noundef !23
  %72 = trunc i8 %71 to i1
  call void @llvm.lifetime.end.p0(i64 1, ptr %5) #3
  ret i1 %72
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare noundef zeroext i1 @_ZNK3DIS8EntityIDeqERKS0_(ptr noundef nonnull align 8 dereferenceable(26), ptr noundef nonnull align 8 dereferenceable(26)) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"bool", !7, i64 0}
!11 = !{!12, !7, i64 8}
!12 = !{!"_ZTSN3DIS12SeparationVPE", !7, i64 8, !7, i64 9, !7, i64 10, !7, i64 11, !13, i64 16, !15, i64 48, !16, i64 52}
!13 = !{!"_ZTSN3DIS8EntityIDE", !14, i64 8, !15, i64 24}
!14 = !{!"_ZTSN3DIS17SimulationAddressE", !15, i64 8, !15, i64 10}
!15 = !{!"short", !7, i64 0}
!16 = !{!"int", !7, i64 0}
!17 = !{!12, !7, i64 9}
!18 = !{!12, !7, i64 10}
!19 = !{!12, !7, i64 11}
!20 = !{!12, !15, i64 48}
!21 = !{!12, !16, i64 52}
!22 = !{i8 0, i8 2}
!23 = !{}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZNK3DIS12SeparationVPeqERKS0_(ptr noundef nonnull align 8 dereferenceable(56) %0, ptr noundef nonnull align 8 dereferenceable(56) %1) local_unnamed_addr #0 align 2 {
  %3 = getelementptr inbounds i8, ptr %0, i64 8
  %4 = getelementptr inbounds i8, ptr %1, i64 8
  %5 = load <4 x i8>, ptr %3, align 8, !tbaa !5
  %6 = load <4 x i8>, ptr %4, align 8, !tbaa !5
  %7 = icmp eq <4 x i8> %5, %6
  %8 = getelementptr inbounds i8, ptr %0, i64 16
  %9 = getelementptr inbounds i8, ptr %1, i64 16
  %10 = tail call noundef zeroext i1 @_ZNK3DIS8EntityIDeqERKS0_(ptr noundef nonnull align 8 dereferenceable(26) %8, ptr noundef nonnull align 8 dereferenceable(26) %9)
  %11 = getelementptr inbounds i8, ptr %0, i64 48
  %12 = load i16, ptr %11, align 8, !tbaa !8
  %13 = getelementptr inbounds i8, ptr %1, i64 48
  %14 = load i16, ptr %13, align 8, !tbaa !8
  %15 = icmp eq i16 %12, %14
  %16 = getelementptr inbounds i8, ptr %0, i64 52
  %17 = load i32, ptr %16, align 4, !tbaa !14
  %18 = getelementptr inbounds i8, ptr %1, i64 52
  %19 = load i32, ptr %18, align 4, !tbaa !14
  %20 = icmp eq i32 %17, %19
  %21 = freeze <4 x i1> %7
  %22 = bitcast <4 x i1> %21 to i4
  %23 = icmp eq i4 %22, -1
  %.fr = freeze i1 %20
  %op.rdx = and i1 %.fr, %23
  %24 = freeze i1 %15
  %op.rdx12 = and i1 %24, %10
  %op.rdx13 = and i1 %op.rdx, %op.rdx12
  ret i1 %op.rdx13
}

declare noundef zeroext i1 @_ZNK3DIS8EntityIDeqERKS0_(ptr noundef nonnull align 8 dereferenceable(26), ptr noundef nonnull align 8 dereferenceable(26)) local_unnamed_addr #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}
!8 = !{!9, !12, i64 48}
!9 = !{!"_ZTSN3DIS12SeparationVPE", !6, i64 8, !6, i64 9, !6, i64 10, !6, i64 11, !10, i64 16, !12, i64 48, !13, i64 52}
!10 = !{!"_ZTSN3DIS8EntityIDE", !11, i64 8, !12, i64 24}
!11 = !{!"_ZTSN3DIS17SimulationAddressE", !12, i64 8, !12, i64 10}
!12 = !{!"short", !6, i64 0}
!13 = !{!"int", !6, i64 0}
!14 = !{!9, !13, i64 52}


; Effective O3 passes: GlobalDCEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SLPVectorizerPass,SROAPass,SimplifyCFGPass,TailCallElimPass