; LLVM IR from AF-GRILL/DISPluginForUnreal :: Source/ThirdParty/include/dis6 (TransferControlRequestPdu)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.DIS::TransferControlRequestPdu" = type { %"class.DIS::EntityManagementFamilyPdu.base", [4 x i8], %"class.DIS::EntityID", %"class.DIS::EntityID", i32, i8, i8, [2 x i8], %"class.DIS::EntityID", i8, %"class.std::vector" }
%"class.DIS::EntityManagementFamilyPdu.base" = type { %"class.DIS::Pdu.base" }
%"class.DIS::Pdu.base" = type <{ ptr, i8, i8, i8, i8, i32, i16, i16 }>
%"class.DIS::EntityID" = type <{ ptr, i16, i16, i16, [2 x i8] }>
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<DIS::RecordSet, std::allocator<DIS::RecordSet>>::_Vector_impl" }
%"struct.std::_Vector_base<DIS::RecordSet, std::allocator<DIS::RecordSet>>::_Vector_impl" = type { %"struct.std::_Vector_base<DIS::RecordSet, std::allocator<DIS::RecordSet>>::_Vector_impl_data" }
%"struct.std::_Vector_base<DIS::RecordSet, std::allocator<DIS::RecordSet>>::_Vector_impl_data" = type { ptr, ptr, ptr }

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIN3DIS9RecordSetESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(23) ptr @_ZNKSt6vectorIN3DIS9RecordSetESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZNK3DIS25TransferControlRequestPdueqERKS0_(ptr noundef nonnull align 8 dereferenceable(112) %0, ptr noundef nonnull align 8 dereferenceable(112) %1) #2 align 2 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca i8, align 1
  %6 = alloca i64, align 8
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  %7 = load ptr, ptr %3, align 8
  call void @llvm.lifetime.start.p0(i64 1, ptr %5) #4
  store i8 1, ptr %5, align 1, !tbaa !9
  %8 = load ptr, ptr %4, align 8, !tbaa !5
  %9 = call noundef zeroext i1 @_ZNK3DIS25EntityManagementFamilyPdueqERKS0_(ptr noundef nonnull align 8 dereferenceable(20) %7, ptr noundef nonnull align 8 dereferenceable(20) %8)
  %10 = zext i1 %9 to i8
  store i8 %10, ptr %5, align 1, !tbaa !9
  %11 = getelementptr inbounds %"class.DIS::TransferControlRequestPdu", ptr %7, i32 0, i32 2
  %12 = load ptr, ptr %4, align 8, !tbaa !5
  %13 = getelementptr inbounds %"class.DIS::TransferControlRequestPdu", ptr %12, i32 0, i32 2
  %14 = call noundef zeroext i1 @_ZNK3DIS8EntityIDeqERKS0_(ptr noundef nonnull align 8 dereferenceable(14) %11, ptr noundef nonnull align 8 dereferenceable(14) %13)
  br i1 %14, label %16, label %15

15:                                               ; preds = %2
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %16

16:                                               ; preds = %15, %2
  %17 = getelementptr inbounds %"class.DIS::TransferControlRequestPdu", ptr %7, i32 0, i32 3
  %18 = load ptr, ptr %4, align 8, !tbaa !5
  %19 = getelementptr inbounds %"class.DIS::TransferControlRequestPdu", ptr %18, i32 0, i32 3
  %20 = call noundef zeroext i1 @_ZNK3DIS8EntityIDeqERKS0_(ptr noundef nonnull align 8 dereferenceable(14) %17, ptr noundef nonnull align 8 dereferenceable(14) %19)
  br i1 %20, label %22, label %21

21:                                               ; preds = %16
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %22

22:                                               ; preds = %21, %16
  %23 = getelementptr inbounds %"class.DIS::TransferControlRequestPdu", ptr %7, i32 0, i32 4
  %24 = load i32, ptr %23, align 8, !tbaa !11
  %25 = load ptr, ptr %4, align 8, !tbaa !5
  %26 = getelementptr inbounds %"class.DIS::TransferControlRequestPdu", ptr %25, i32 0, i32 4
  %27 = load i32, ptr %26, align 8, !tbaa !11
  %28 = icmp eq i32 %24, %27
  br i1 %28, label %30, label %29

29:                                               ; preds = %22
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %30

30:                                               ; preds = %29, %22
  %31 = getelementptr inbounds %"class.DIS::TransferControlRequestPdu", ptr %7, i32 0, i32 5
  %32 = load i8, ptr %31, align 4, !tbaa !22
  %33 = zext i8 %32 to i32
  %34 = load ptr, ptr %4, align 8, !tbaa !5
  %35 = getelementptr inbounds %"class.DIS::TransferControlRequestPdu", ptr %34, i32 0, i32 5
  %36 = load i8, ptr %35, align 4, !tbaa !22
  %37 = zext i8 %36 to i32
  %38 = icmp eq i32 %33, %37
  br i1 %38, label %40, label %39

39:                                               ; preds = %30
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %40

40:                                               ; preds = %39, %30
  %41 = getelementptr inbounds %"class.DIS::TransferControlRequestPdu", ptr %7, i32 0, i32 6
  %42 = load i8, ptr %41, align 1, !tbaa !23
  %43 = zext i8 %42 to i32
  %44 = load ptr, ptr %4, align 8, !tbaa !5
  %45 = getelementptr inbounds %"class.DIS::TransferControlRequestPdu", ptr %44, i32 0, i32 6
  %46 = load i8, ptr %45, align 1, !tbaa !23
  %47 = zext i8 %46 to i32
  %48 = icmp eq i32 %43, %47
  br i1 %48, label %50, label %49

49:                                               ; preds = %40
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %50

50:                                               ; preds = %49, %40
  %51 = getelementptr inbounds %"class.DIS::TransferControlRequestPdu", ptr %7, i32 0, i32 8
  %52 = load ptr, ptr %4, align 8, !tbaa !5
  %53 = getelementptr inbounds %"class.DIS::TransferControlRequestPdu", ptr %52, i32 0, i32 8
  %54 = call noundef zeroext i1 @_ZNK3DIS8EntityIDeqERKS0_(ptr noundef nonnull align 8 dereferenceable(14) %51, ptr noundef nonnull align 8 dereferenceable(14) %53)
  br i1 %54, label %56, label %55

55:                                               ; preds = %50
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %56

56:                                               ; preds = %55, %50
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #4
  store i64 0, ptr %6, align 8, !tbaa !24
  br label %57

57:                                               ; preds = %74, %56
  %58 = load i64, ptr %6, align 8, !tbaa !24
  %59 = getelementptr inbounds %"class.DIS::TransferControlRequestPdu", ptr %7, i32 0, i32 10
  %60 = call noundef i64 @_ZNKSt6vectorIN3DIS9RecordSetESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %59) #4
  %61 = icmp ult i64 %58, %60
  br i1 %61, label %63, label %62

62:                                               ; preds = %57
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #4
  br label %77

63:                                               ; preds = %57
  %64 = getelementptr inbounds %"class.DIS::TransferControlRequestPdu", ptr %7, i32 0, i32 10
  %65 = load i64, ptr %6, align 8, !tbaa !24
  %66 = call noundef nonnull align 8 dereferenceable(23) ptr @_ZNKSt6vectorIN3DIS9RecordSetESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %64, i64 noundef %65) #4
  %67 = load ptr, ptr %4, align 8, !tbaa !5
  %68 = getelementptr inbounds %"class.DIS::TransferControlRequestPdu", ptr %67, i32 0, i32 10
  %69 = load i64, ptr %6, align 8, !tbaa !24
  %70 = call noundef nonnull align 8 dereferenceable(23) ptr @_ZNKSt6vectorIN3DIS9RecordSetESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %68, i64 noundef %69) #4
  %71 = call noundef zeroext i1 @_ZNK3DIS9RecordSeteqERKS0_(ptr noundef nonnull align 8 dereferenceable(23) %66, ptr noundef nonnull align 8 dereferenceable(23) %70)
  br i1 %71, label %73, label %72

72:                                               ; preds = %63
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %73

73:                                               ; preds = %72, %63
  br label %74

74:                                               ; preds = %73
  %75 = load i64, ptr %6, align 8, !tbaa !24
  %76 = add i64 %75, 1
  store i64 %76, ptr %6, align 8, !tbaa !24
  br label %57, !llvm.loop !26

77:                                               ; preds = %62
  %78 = load i8, ptr %5, align 1, !tbaa !9, !range !28, !noundef !29
  %79 = trunc i8 %78 to i1
  call void @llvm.lifetime.end.p0(i64 1, ptr %5) #4
  ret i1 %79
}

declare noundef zeroext i1 @_ZNK3DIS25EntityManagementFamilyPdueqERKS0_(ptr noundef nonnull align 8 dereferenceable(20), ptr noundef nonnull align 8 dereferenceable(20)) #3

declare noundef zeroext i1 @_ZNK3DIS8EntityIDeqERKS0_(ptr noundef nonnull align 8 dereferenceable(14), ptr noundef nonnull align 8 dereferenceable(14)) #3

declare noundef zeroext i1 @_ZNK3DIS9RecordSeteqERKS0_(ptr noundef nonnull align 8 dereferenceable(23), ptr noundef nonnull align 8 dereferenceable(23)) #3

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"bool", !7, i64 0}
!11 = !{!12, !15, i64 56}
!12 = !{!"_ZTSN3DIS25TransferControlRequestPduE", !13, i64 0, !17, i64 24, !17, i64 40, !15, i64 56, !7, i64 60, !7, i64 61, !17, i64 64, !7, i64 80, !18, i64 88}
!13 = !{!"_ZTSN3DIS25EntityManagementFamilyPduE", !14, i64 0}
!14 = !{!"_ZTSN3DIS3PduE", !7, i64 8, !7, i64 9, !7, i64 10, !7, i64 11, !15, i64 12, !16, i64 16, !16, i64 18}
!15 = !{!"int", !7, i64 0}
!16 = !{!"short", !7, i64 0}
!17 = !{!"_ZTSN3DIS8EntityIDE", !16, i64 8, !16, i64 10, !16, i64 12}
!18 = !{!"_ZTSSt6vectorIN3DIS9RecordSetESaIS1_EE", !19, i64 0}
!19 = !{!"_ZTSSt12_Vector_baseIN3DIS9RecordSetESaIS1_EE", !20, i64 0}
!20 = !{!"_ZTSNSt12_Vector_baseIN3DIS9RecordSetESaIS1_EE12_Vector_implE", !21, i64 0}
!21 = !{!"_ZTSNSt12_Vector_baseIN3DIS9RecordSetESaIS1_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!22 = !{!12, !7, i64 60}
!23 = !{!12, !7, i64 61}
!24 = !{!25, !25, i64 0}
!25 = !{!"long", !7, i64 0}
!26 = distinct !{!26, !27}
!27 = !{!"llvm.loop.mustprogress"}
!28 = !{i8 0, i8 2}
!29 = !{}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIN3DIS9RecordSetESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(23) ptr @_ZNKSt6vectorIN3DIS9RecordSetESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZNK3DIS25TransferControlRequestPdueqERKS0_(ptr noundef nonnull align 8 dereferenceable(112) %0, ptr noundef nonnull align 8 dereferenceable(112) %1) local_unnamed_addr #1 align 2 {
  %3 = tail call noundef zeroext i1 @_ZNK3DIS25EntityManagementFamilyPdueqERKS0_(ptr noundef nonnull align 8 dereferenceable(20) %0, ptr noundef nonnull align 8 dereferenceable(20) %1)
  %4 = getelementptr inbounds i8, ptr %0, i64 24
  %5 = getelementptr inbounds i8, ptr %1, i64 24
  %6 = tail call noundef zeroext i1 @_ZNK3DIS8EntityIDeqERKS0_(ptr noundef nonnull align 8 dereferenceable(14) %4, ptr noundef nonnull align 8 dereferenceable(14) %5)
  %narrow = and i1 %3, %6
  %7 = getelementptr inbounds i8, ptr %0, i64 40
  %8 = getelementptr inbounds i8, ptr %1, i64 40
  %9 = tail call noundef zeroext i1 @_ZNK3DIS8EntityIDeqERKS0_(ptr noundef nonnull align 8 dereferenceable(14) %7, ptr noundef nonnull align 8 dereferenceable(14) %8)
  %narrow15 = and i1 %9, %narrow
  %10 = getelementptr inbounds i8, ptr %0, i64 56
  %11 = load i32, ptr %10, align 8, !tbaa !5
  %12 = getelementptr inbounds i8, ptr %1, i64 56
  %13 = load i32, ptr %12, align 8, !tbaa !5
  %14 = icmp eq i32 %11, %13
  %narrow16 = and i1 %narrow15, %14
  %15 = getelementptr inbounds i8, ptr %0, i64 60
  %16 = load i8, ptr %15, align 4, !tbaa !19
  %17 = getelementptr inbounds i8, ptr %1, i64 60
  %18 = load i8, ptr %17, align 4, !tbaa !19
  %19 = icmp eq i8 %16, %18
  %20 = getelementptr inbounds i8, ptr %0, i64 61
  %21 = load i8, ptr %20, align 1, !tbaa !20
  %22 = getelementptr inbounds i8, ptr %1, i64 61
  %23 = load i8, ptr %22, align 1, !tbaa !20
  %24 = icmp eq i8 %21, %23
  %25 = getelementptr inbounds i8, ptr %0, i64 64
  %26 = getelementptr inbounds i8, ptr %1, i64 64
  %27 = tail call noundef zeroext i1 @_ZNK3DIS8EntityIDeqERKS0_(ptr noundef nonnull align 8 dereferenceable(14) %25, ptr noundef nonnull align 8 dereferenceable(14) %26)
  %28 = select i1 %27, i1 %24, i1 false
  %29 = select i1 %28, i1 %19, i1 false
  %narrow19 = select i1 %29, i1 %narrow16, i1 false
  %30 = getelementptr inbounds i8, ptr %0, i64 88
  %31 = tail call noundef i64 @_ZNKSt6vectorIN3DIS9RecordSetESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %30) #3
  %.not = icmp eq i64 %31, 0
  br i1 %.not, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %2
  %32 = getelementptr inbounds i8, ptr %1, i64 88
  br label %33

._crit_edge:                                      ; preds = %33, %2
  %.6.lcssa = phi i1 [ %narrow19, %2 ], [ %spec.select14, %33 ]
  ret i1 %.6.lcssa

33:                                               ; preds = %.lr.ph, %33
  %.021 = phi i64 [ 0, %.lr.ph ], [ %37, %33 ]
  %.620 = phi i1 [ %narrow19, %.lr.ph ], [ %spec.select14, %33 ]
  %34 = tail call noundef nonnull align 8 dereferenceable(23) ptr @_ZNKSt6vectorIN3DIS9RecordSetESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %30, i64 noundef %.021) #3
  %35 = tail call noundef nonnull align 8 dereferenceable(23) ptr @_ZNKSt6vectorIN3DIS9RecordSetESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %32, i64 noundef %.021) #3
  %36 = tail call noundef zeroext i1 @_ZNK3DIS9RecordSeteqERKS0_(ptr noundef nonnull align 8 dereferenceable(23) %34, ptr noundef nonnull align 8 dereferenceable(23) %35)
  %spec.select14 = select i1 %36, i1 %.620, i1 false
  %37 = add nuw i64 %.021, 1
  %38 = tail call noundef i64 @_ZNKSt6vectorIN3DIS9RecordSetESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %30) #3
  %39 = icmp ult i64 %37, %38
  br i1 %39, label %33, label %._crit_edge, !llvm.loop !21
}

declare noundef zeroext i1 @_ZNK3DIS25EntityManagementFamilyPdueqERKS0_(ptr noundef nonnull align 8 dereferenceable(20), ptr noundef nonnull align 8 dereferenceable(20)) local_unnamed_addr #2

declare noundef zeroext i1 @_ZNK3DIS8EntityIDeqERKS0_(ptr noundef nonnull align 8 dereferenceable(14), ptr noundef nonnull align 8 dereferenceable(14)) local_unnamed_addr #2

declare noundef zeroext i1 @_ZNK3DIS9RecordSeteqERKS0_(ptr noundef nonnull align 8 dereferenceable(23), ptr noundef nonnull align 8 dereferenceable(23)) local_unnamed_addr #2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 56}
!6 = !{!"_ZTSN3DIS25TransferControlRequestPduE", !7, i64 0, !13, i64 24, !13, i64 40, !11, i64 56, !9, i64 60, !9, i64 61, !13, i64 64, !9, i64 80, !14, i64 88}
!7 = !{!"_ZTSN3DIS25EntityManagementFamilyPduE", !8, i64 0}
!8 = !{!"_ZTSN3DIS3PduE", !9, i64 8, !9, i64 9, !9, i64 10, !9, i64 11, !11, i64 12, !12, i64 16, !12, i64 18}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!"short", !9, i64 0}
!13 = !{!"_ZTSN3DIS8EntityIDE", !12, i64 8, !12, i64 10, !12, i64 12}
!14 = !{!"_ZTSSt6vectorIN3DIS9RecordSetESaIS1_EE", !15, i64 0}
!15 = !{!"_ZTSSt12_Vector_baseIN3DIS9RecordSetESaIS1_EE", !16, i64 0}
!16 = !{!"_ZTSNSt12_Vector_baseIN3DIS9RecordSetESaIS1_EE12_Vector_implE", !17, i64 0}
!17 = !{!"_ZTSNSt12_Vector_baseIN3DIS9RecordSetESaIS1_EE17_Vector_impl_dataE", !18, i64 0, !18, i64 8, !18, i64 16}
!18 = !{!"any pointer", !9, i64 0}
!19 = !{!6, !9, i64 60}
!20 = !{!6, !9, i64 61}
!21 = distinct !{!21, !22}
!22 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: AggressiveInstCombinePass,CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass