; LLVM IR from AF-GRILL/DISPluginForUnreal :: Source/ThirdParty/include/dis6 (GridAxisRecordRepresentation1)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.DIS::GridAxisRecordRepresentation1" = type { %"class.DIS::GridAxisRecord.base", float, float, i16, %"class.std::vector" }
%"class.DIS::GridAxisRecord.base" = type <{ ptr, i16, i16 }>
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<DIS::TwoByteChunk, std::allocator<DIS::TwoByteChunk>>::_Vector_impl" }
%"struct.std::_Vector_base<DIS::TwoByteChunk, std::allocator<DIS::TwoByteChunk>>::_Vector_impl" = type { %"struct.std::_Vector_base<DIS::TwoByteChunk, std::allocator<DIS::TwoByteChunk>>::_Vector_impl_data" }
%"struct.std::_Vector_base<DIS::TwoByteChunk, std::allocator<DIS::TwoByteChunk>>::_Vector_impl_data" = type { ptr, ptr, ptr }

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIN3DIS12TwoByteChunkESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(10) ptr @_ZNKSt6vectorIN3DIS12TwoByteChunkESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZNK3DIS29GridAxisRecordRepresentation1eqERKS0_(ptr noundef nonnull align 8 dereferenceable(48) %0, ptr noundef nonnull align 8 dereferenceable(48) %1) #2 align 2 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca i8, align 1
  %6 = alloca i64, align 8
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  %7 = load ptr, ptr %3, align 8
  call void @llvm.lifetime.start.p0(i64 1, ptr %5) #4
  store i8 1, ptr %5, align 1, !tbaa !9
  %8 = load ptr, ptr %4, align 8, !tbaa !5
  %9 = call noundef zeroext i1 @_ZNK3DIS14GridAxisRecordeqERKS0_(ptr noundef nonnull align 8 dereferenceable(12) %7, ptr noundef nonnull align 8 dereferenceable(12) %8)
  %10 = zext i1 %9 to i8
  store i8 %10, ptr %5, align 1, !tbaa !9
  %11 = getelementptr inbounds %"class.DIS::GridAxisRecordRepresentation1", ptr %7, i32 0, i32 1
  %12 = load float, ptr %11, align 4, !tbaa !11
  %13 = load ptr, ptr %4, align 8, !tbaa !5
  %14 = getelementptr inbounds %"class.DIS::GridAxisRecordRepresentation1", ptr %13, i32 0, i32 1
  %15 = load float, ptr %14, align 4, !tbaa !11
  %16 = fcmp oeq float %12, %15
  br i1 %16, label %18, label %17

17:                                               ; preds = %2
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %18

18:                                               ; preds = %17, %2
  %19 = getelementptr inbounds %"class.DIS::GridAxisRecordRepresentation1", ptr %7, i32 0, i32 2
  %20 = load float, ptr %19, align 8, !tbaa !20
  %21 = load ptr, ptr %4, align 8, !tbaa !5
  %22 = getelementptr inbounds %"class.DIS::GridAxisRecordRepresentation1", ptr %21, i32 0, i32 2
  %23 = load float, ptr %22, align 8, !tbaa !20
  %24 = fcmp oeq float %20, %23
  br i1 %24, label %26, label %25

25:                                               ; preds = %18
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %26

26:                                               ; preds = %25, %18
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #4
  store i64 0, ptr %6, align 8, !tbaa !21
  br label %27

27:                                               ; preds = %44, %26
  %28 = load i64, ptr %6, align 8, !tbaa !21
  %29 = getelementptr inbounds %"class.DIS::GridAxisRecordRepresentation1", ptr %7, i32 0, i32 4
  %30 = call noundef i64 @_ZNKSt6vectorIN3DIS12TwoByteChunkESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %29) #4
  %31 = icmp ult i64 %28, %30
  br i1 %31, label %33, label %32

32:                                               ; preds = %27
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #4
  br label %47

33:                                               ; preds = %27
  %34 = getelementptr inbounds %"class.DIS::GridAxisRecordRepresentation1", ptr %7, i32 0, i32 4
  %35 = load i64, ptr %6, align 8, !tbaa !21
  %36 = call noundef nonnull align 8 dereferenceable(10) ptr @_ZNKSt6vectorIN3DIS12TwoByteChunkESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %34, i64 noundef %35) #4
  %37 = load ptr, ptr %4, align 8, !tbaa !5
  %38 = getelementptr inbounds %"class.DIS::GridAxisRecordRepresentation1", ptr %37, i32 0, i32 4
  %39 = load i64, ptr %6, align 8, !tbaa !21
  %40 = call noundef nonnull align 8 dereferenceable(10) ptr @_ZNKSt6vectorIN3DIS12TwoByteChunkESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %38, i64 noundef %39) #4
  %41 = call noundef zeroext i1 @_ZNK3DIS12TwoByteChunkeqERKS0_(ptr noundef nonnull align 8 dereferenceable(10) %36, ptr noundef nonnull align 8 dereferenceable(10) %40)
  br i1 %41, label %43, label %42

42:                                               ; preds = %33
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %43

43:                                               ; preds = %42, %33
  br label %44

44:                                               ; preds = %43
  %45 = load i64, ptr %6, align 8, !tbaa !21
  %46 = add i64 %45, 1
  store i64 %46, ptr %6, align 8, !tbaa !21
  br label %27, !llvm.loop !23

47:                                               ; preds = %32
  %48 = load i8, ptr %5, align 1, !tbaa !9, !range !25, !noundef !26
  %49 = trunc i8 %48 to i1
  call void @llvm.lifetime.end.p0(i64 1, ptr %5) #4
  ret i1 %49
}

declare noundef zeroext i1 @_ZNK3DIS14GridAxisRecordeqERKS0_(ptr noundef nonnull align 8 dereferenceable(12), ptr noundef nonnull align 8 dereferenceable(12)) #3

declare noundef zeroext i1 @_ZNK3DIS12TwoByteChunkeqERKS0_(ptr noundef nonnull align 8 dereferenceable(10), ptr noundef nonnull align 8 dereferenceable(10)) #3

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"bool", !7, i64 0}
!11 = !{!12, !15, i64 12}
!12 = !{!"_ZTSN3DIS29GridAxisRecordRepresentation1E", !13, i64 0, !15, i64 12, !15, i64 16, !14, i64 20, !16, i64 24}
!13 = !{!"_ZTSN3DIS14GridAxisRecordE", !14, i64 8, !14, i64 10}
!14 = !{!"short", !7, i64 0}
!15 = !{!"float", !7, i64 0}
!16 = !{!"_ZTSSt6vectorIN3DIS12TwoByteChunkESaIS1_EE", !17, i64 0}
!17 = !{!"_ZTSSt12_Vector_baseIN3DIS12TwoByteChunkESaIS1_EE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseIN3DIS12TwoByteChunkESaIS1_EE12_Vector_implE", !19, i64 0}
!19 = !{!"_ZTSNSt12_Vector_baseIN3DIS12TwoByteChunkESaIS1_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!20 = !{!12, !15, i64 16}
!21 = !{!22, !22, i64 0}
!22 = !{!"long", !7, i64 0}
!23 = distinct !{!23, !24}
!24 = !{!"llvm.loop.mustprogress"}
!25 = !{i8 0, i8 2}
!26 = !{}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIN3DIS12TwoByteChunkESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(10) ptr @_ZNKSt6vectorIN3DIS12TwoByteChunkESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZNK3DIS29GridAxisRecordRepresentation1eqERKS0_(ptr noundef nonnull align 8 dereferenceable(48) %0, ptr noundef nonnull align 8 dereferenceable(48) %1) local_unnamed_addr #1 align 2 {
  %3 = tail call noundef zeroext i1 @_ZNK3DIS14GridAxisRecordeqERKS0_(ptr noundef nonnull align 8 dereferenceable(12) %0, ptr noundef nonnull align 8 dereferenceable(12) %1)
  %4 = getelementptr inbounds i8, ptr %0, i64 12
  %5 = load float, ptr %4, align 4, !tbaa !5
  %6 = getelementptr inbounds i8, ptr %1, i64 12
  %7 = load float, ptr %6, align 4, !tbaa !5
  %8 = fcmp oeq float %5, %7
  %narrow = and i1 %3, %8
  %9 = getelementptr inbounds i8, ptr %0, i64 16
  %10 = load float, ptr %9, align 8, !tbaa !17
  %11 = getelementptr inbounds i8, ptr %1, i64 16
  %12 = load float, ptr %11, align 8, !tbaa !17
  %13 = fcmp oeq float %10, %12
  %narrow10 = select i1 %13, i1 %narrow, i1 false
  %14 = getelementptr inbounds i8, ptr %0, i64 24
  %15 = tail call noundef i64 @_ZNKSt6vectorIN3DIS12TwoByteChunkESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %14) #3
  %.not = icmp eq i64 %15, 0
  br i1 %.not, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %2
  %16 = getelementptr inbounds i8, ptr %1, i64 24
  br label %17

._crit_edge:                                      ; preds = %17, %2
  %.2.lcssa = phi i1 [ %narrow10, %2 ], [ %spec.select, %17 ]
  ret i1 %.2.lcssa

17:                                               ; preds = %.lr.ph, %17
  %.012 = phi i64 [ 0, %.lr.ph ], [ %21, %17 ]
  %.211 = phi i1 [ %narrow10, %.lr.ph ], [ %spec.select, %17 ]
  %18 = tail call noundef nonnull align 8 dereferenceable(10) ptr @_ZNKSt6vectorIN3DIS12TwoByteChunkESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %14, i64 noundef %.012) #3
  %19 = tail call noundef nonnull align 8 dereferenceable(10) ptr @_ZNKSt6vectorIN3DIS12TwoByteChunkESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %16, i64 noundef %.012) #3
  %20 = tail call noundef zeroext i1 @_ZNK3DIS12TwoByteChunkeqERKS0_(ptr noundef nonnull align 8 dereferenceable(10) %18, ptr noundef nonnull align 8 dereferenceable(10) %19)
  %spec.select = select i1 %20, i1 %.211, i1 false
  %21 = add nuw i64 %.012, 1
  %22 = tail call noundef i64 @_ZNKSt6vectorIN3DIS12TwoByteChunkESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %14) #3
  %23 = icmp ult i64 %21, %22
  br i1 %23, label %17, label %._crit_edge, !llvm.loop !18
}

declare noundef zeroext i1 @_ZNK3DIS14GridAxisRecordeqERKS0_(ptr noundef nonnull align 8 dereferenceable(12), ptr noundef nonnull align 8 dereferenceable(12)) local_unnamed_addr #2

declare noundef zeroext i1 @_ZNK3DIS12TwoByteChunkeqERKS0_(ptr noundef nonnull align 8 dereferenceable(10), ptr noundef nonnull align 8 dereferenceable(10)) local_unnamed_addr #2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 12}
!6 = !{!"_ZTSN3DIS29GridAxisRecordRepresentation1E", !7, i64 0, !11, i64 12, !11, i64 16, !8, i64 20, !12, i64 24}
!7 = !{!"_ZTSN3DIS14GridAxisRecordE", !8, i64 8, !8, i64 10}
!8 = !{!"short", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C++ TBAA"}
!11 = !{!"float", !9, i64 0}
!12 = !{!"_ZTSSt6vectorIN3DIS12TwoByteChunkESaIS1_EE", !13, i64 0}
!13 = !{!"_ZTSSt12_Vector_baseIN3DIS12TwoByteChunkESaIS1_EE", !14, i64 0}
!14 = !{!"_ZTSNSt12_Vector_baseIN3DIS12TwoByteChunkESaIS1_EE12_Vector_implE", !15, i64 0}
!15 = !{!"_ZTSNSt12_Vector_baseIN3DIS12TwoByteChunkESaIS1_EE17_Vector_impl_dataE", !16, i64 0, !16, i64 8, !16, i64 16}
!16 = !{!"any pointer", !9, i64 0}
!17 = !{!6, !11, i64 16}
!18 = distinct !{!18, !19}
!19 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: AggressiveInstCombinePass,CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass