; LLVM IR from huawei-noah/bolt :: compute/tensor/src (slice)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.SliceParamSpec = type { [8 x i32], i32, i32 }
%struct.TensorDesc = type { i32, i32, i32, [20 x i32] }
%"class.std::vector.3" = type { %"struct.std::_Vector_base.4" }
%"struct.std::_Vector_base.4" = type { %"struct.std::_Vector_base<TensorDesc, std::allocator<TensorDesc>>::_Vector_impl" }
%"struct.std::_Vector_base<TensorDesc, std::allocator<TensorDesc>>::_Vector_impl" = type { %"struct.std::_Vector_base<TensorDesc, std::allocator<TensorDesc>>::_Vector_impl_data" }
%"struct.std::_Vector_base<TensorDesc, std::allocator<TensorDesc>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<Tensor *, std::allocator<Tensor *>>::_Vector_impl" }
%"struct.std::_Vector_base<Tensor *, std::allocator<Tensor *>>::_Vector_impl" = type { %"struct.std::_Vector_base<Tensor *, std::allocator<Tensor *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Tensor *, std::allocator<Tensor *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%struct.ArchInfo = type { i32, ptr }

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z23slice_infer_output_sizeP6Tensor14SliceParamSpecSt6vectorIS0_SaIS0_EEP8ArchInfo(ptr noundef %0, ptr noundef byval(%struct.SliceParamSpec) align 8 %1, ptr noundef %2, ptr noundef %3) #0 personality ptr @__gxx_personality_v0 {
  %5 = alloca i32, align 4
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  %9 = alloca %struct.TensorDesc, align 4
  %10 = alloca %"class.std::vector.3", align 8
  %11 = alloca %"class.std::vector", align 8
  %12 = alloca ptr, align 8
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca %struct.TensorDesc, align 8
  %17 = alloca %struct.SliceParamSpec, align 8
  %18 = alloca i32, align 4
  %19 = alloca %struct.TensorDesc, align 8
  store ptr %0, ptr %6, align 8, !tbaa !5
  store ptr %2, ptr %7, align 8, !tbaa !5
  store ptr %3, ptr %8, align 8, !tbaa !5
  %20 = load ptr, ptr %6, align 8, !tbaa !5
  %21 = icmp eq ptr %20, null
  br i1 %21, label %22, label %23

22:                                               ; preds = %4
  store i32 1, ptr %5, align 4
  br label %66

23:                                               ; preds = %4
  call void @llvm.lifetime.start.p0(i64 92, ptr %9) #5
  %24 = load ptr, ptr %6, align 8, !tbaa !5
  call void @_ZN6Tensor8get_descEv(ptr dead_on_unwind writable sret(%struct.TensorDesc) align 4 %9, ptr noundef nonnull align 8 dereferenceable(32) %24)
  call void @llvm.lifetime.start.p0(i64 24, ptr %10) #5
  call void @_ZNSt6vectorIP6TensorSaIS1_EEC2ERKS3_(ptr noundef nonnull align 8 dereferenceable(24) %11, ptr noundef nonnull align 8 dereferenceable(24) %2)
  invoke void @_Z25get_desc_from_tensor_ptrsSt6vectorIP6TensorSaIS1_EE(ptr dead_on_unwind writable sret(%"class.std::vector.3") align 8 %10, ptr noundef %11)
          to label %25 unwind label %38

25:                                               ; preds = %23
  call void @_ZNSt6vectorIP6TensorSaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %11) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #5
  %26 = load ptr, ptr %8, align 8, !tbaa !5
  %27 = getelementptr inbounds %struct.ArchInfo, ptr %26, i32 0, i32 0
  %28 = load i32, ptr %27, align 8, !tbaa !9
  store i32 %28, ptr %14, align 4, !tbaa !12
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #5
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %16, ptr align 4 %9, i64 92, i1 false), !tbaa.struct !13
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %17, ptr align 8 %1, i64 40, i1 false), !tbaa.struct !21
  %29 = load i32, ptr %14, align 4, !tbaa !12
  %30 = invoke noundef i32 @_Z30slice_infer_output_size_kernel10TensorDesc14SliceParamSpecRSt6vectorIS_SaIS_EE4Arch(ptr noundef byval(%struct.TensorDesc) align 8 %16, ptr noundef byval(%struct.SliceParamSpec) align 8 %17, ptr noundef nonnull align 8 dereferenceable(24) %10, i32 noundef %29)
          to label %31 unwind label %42

31:                                               ; preds = %25
  store i32 %30, ptr %15, align 4, !tbaa !22
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #5
  store i32 0, ptr %18, align 4, !tbaa !18
  br label %32

32:                                               ; preds = %55, %31
  %33 = load i32, ptr %18, align 4, !tbaa !18
  %34 = zext i32 %33 to i64
  %35 = call noundef i64 @_ZNKSt6vectorIP6TensorSaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %2) #5
  %36 = icmp ult i64 %34, %35
  br i1 %36, label %46, label %37

37:                                               ; preds = %32
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #5
  br label %62

38:                                               ; preds = %23
  %39 = landingpad { ptr, i32 }
          cleanup
  %40 = extractvalue { ptr, i32 } %39, 0
  store ptr %40, ptr %12, align 8
  %41 = extractvalue { ptr, i32 } %39, 1
  store i32 %41, ptr %13, align 4
  call void @_ZNSt6vectorIP6TensorSaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %11) #5
  br label %65

42:                                               ; preds = %25
  %43 = landingpad { ptr, i32 }
          cleanup
  %44 = extractvalue { ptr, i32 } %43, 0
  store ptr %44, ptr %12, align 8
  %45 = extractvalue { ptr, i32 } %43, 1
  store i32 %45, ptr %13, align 4
  br label %64

46:                                               ; preds = %32
  %47 = load i32, ptr %18, align 4, !tbaa !18
  %48 = zext i32 %47 to i64
  %49 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP6TensorSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %48) #5
  %50 = load ptr, ptr %49, align 8, !tbaa !5
  %51 = load i32, ptr %18, align 4, !tbaa !18
  %52 = zext i32 %51 to i64
  %53 = call noundef nonnull align 4 dereferenceable(92) ptr @_ZNSt6vectorI10TensorDescSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %10, i64 noundef %52) #5
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %19, ptr align 4 %53, i64 92, i1 false), !tbaa.struct !13
  invoke void @_ZN6Tensor6resizeE10TensorDesc(ptr noundef nonnull align 8 dereferenceable(32) %50, ptr noundef byval(%struct.TensorDesc) align 8 %19)
          to label %54 unwind label %58

54:                                               ; preds = %46
  br label %55

55:                                               ; preds = %54
  %56 = load i32, ptr %18, align 4, !tbaa !18
  %57 = add i32 %56, 1
  store i32 %57, ptr %18, align 4, !tbaa !18
  br label %32, !llvm.loop !24

58:                                               ; preds = %46
  %59 = landingpad { ptr, i32 }
          cleanup
  %60 = extractvalue { ptr, i32 } %59, 0
  store ptr %60, ptr %12, align 8
  %61 = extractvalue { ptr, i32 } %59, 1
  store i32 %61, ptr %13, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #5
  br label %64

62:                                               ; preds = %37
  %63 = load i32, ptr %15, align 4, !tbaa !22
  store i32 %63, ptr %5, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #5
  call void @_ZNSt6vectorI10TensorDescSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %10) #5
  call void @llvm.lifetime.end.p0(i64 24, ptr %10) #5
  call void @llvm.lifetime.end.p0(i64 92, ptr %9) #5
  br label %66

64:                                               ; preds = %58, %42
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #5
  call void @_ZNSt6vectorI10TensorDescSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %10) #5
  br label %65

65:                                               ; preds = %64, %38
  call void @llvm.lifetime.end.p0(i64 24, ptr %10) #5
  call void @llvm.lifetime.end.p0(i64 92, ptr %9) #5
  br label %68

66:                                               ; preds = %62, %22
  %67 = load i32, ptr %5, align 4
  ret i32 %67

68:                                               ; preds = %65
  %69 = load ptr, ptr %12, align 8
  %70 = load i32, ptr %13, align 4
  %71 = insertvalue { ptr, i32 } poison, ptr %69, 0
  %72 = insertvalue { ptr, i32 } %71, i32 %70, 1
  resume { ptr, i32 } %72
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN6Tensor8get_descEv(ptr dead_on_unwind noalias writable sret(%struct.TensorDesc) align 4, ptr noundef nonnull align 8 dereferenceable(32)) #0 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_Z25get_desc_from_tensor_ptrsSt6vectorIP6TensorSaIS1_EE(ptr dead_on_unwind noalias writable sret(%"class.std::vector.3") align 8, ptr noundef) #2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIP6TensorSaIS1_EEC2ERKS3_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #0 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIP6TensorSaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #3 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef i32 @_Z30slice_infer_output_size_kernel10TensorDesc14SliceParamSpecRSt6vectorIS_SaIS_EE4Arch(ptr noundef byval(%struct.TensorDesc) align 8, ptr noundef byval(%struct.SliceParamSpec) align 8, ptr noundef nonnull align 8 dereferenceable(24), i32 noundef) #2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #4

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIP6TensorSaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP6TensorSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #3 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN6Tensor6resizeE10TensorDesc(ptr noundef nonnull align 8 dereferenceable(32), ptr noundef byval(%struct.TensorDesc) align 8) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(92) ptr @_ZNSt6vectorI10TensorDescSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #3 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorI10TensorDescSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #3 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"_ZTS8ArchInfo", !11, i64 0, !6, i64 8}
!11 = !{!"_ZTS4Arch", !7, i64 0}
!12 = !{!11, !11, i64 0}
!13 = !{i64 0, i64 4, !14, i64 4, i64 4, !16, i64 8, i64 4, !18, i64 12, i64 80, !20}
!14 = !{!15, !15, i64 0}
!15 = !{!"_ZTS8DataType", !7, i64 0}
!16 = !{!17, !17, i64 0}
!17 = !{!"_ZTS10DataFormat", !7, i64 0}
!18 = !{!19, !19, i64 0}
!19 = !{!"int", !7, i64 0}
!20 = !{!7, !7, i64 0}
!21 = !{i64 0, i64 32, !20, i64 32, i64 4, !18, i64 36, i64 4, !18}
!22 = !{!23, !23, i64 0}
!23 = !{!"_ZTS2EE", !7, i64 0}
!24 = distinct !{!24, !25}
!25 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.SliceParamSpec = type { [8 x i32], i32, i32 }
%struct.TensorDesc = type { i32, i32, i32, [20 x i32] }
%"class.std::vector.3" = type { %"struct.std::_Vector_base.4" }
%"struct.std::_Vector_base.4" = type { %"struct.std::_Vector_base<TensorDesc, std::allocator<TensorDesc>>::_Vector_impl" }
%"struct.std::_Vector_base<TensorDesc, std::allocator<TensorDesc>>::_Vector_impl" = type { %"struct.std::_Vector_base<TensorDesc, std::allocator<TensorDesc>>::_Vector_impl_data" }
%"struct.std::_Vector_base<TensorDesc, std::allocator<TensorDesc>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<Tensor *, std::allocator<Tensor *>>::_Vector_impl" }
%"struct.std::_Vector_base<Tensor *, std::allocator<Tensor *>>::_Vector_impl" = type { %"struct.std::_Vector_base<Tensor *, std::allocator<Tensor *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Tensor *, std::allocator<Tensor *>>::_Vector_impl_data" = type { ptr, ptr, ptr }

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z23slice_infer_output_sizeP6Tensor14SliceParamSpecSt6vectorIS0_SaIS0_EEP8ArchInfo(ptr noundef %0, ptr nocapture noundef readonly byval(%struct.SliceParamSpec) align 8 %1, ptr noundef %2, ptr nocapture noundef readonly %3) local_unnamed_addr #0 personality ptr @__gxx_personality_v0 {
  %5 = alloca %struct.TensorDesc, align 8
  %6 = alloca %"class.std::vector.3", align 8
  %7 = alloca %"class.std::vector", align 8
  %8 = alloca %struct.TensorDesc, align 8
  %9 = icmp eq ptr %0, null
  br i1 %9, label %32, label %10

10:                                               ; preds = %4
  call void @llvm.lifetime.start.p0(i64 92, ptr nonnull %5) #5
  call void @_ZN6Tensor8get_descEv(ptr dead_on_unwind nonnull writable sret(%struct.TensorDesc) align 4 %5, ptr noundef nonnull align 8 dereferenceable(32) %0)
  call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %6) #5
  call void @_ZNSt6vectorIP6TensorSaIS1_EEC2ERKS3_(ptr noundef nonnull align 8 dereferenceable(24) %7, ptr noundef nonnull align 8 dereferenceable(24) %2)
  invoke void @_Z25get_desc_from_tensor_ptrsSt6vectorIP6TensorSaIS1_EE(ptr dead_on_unwind nonnull writable sret(%"class.std::vector.3") align 8 %6, ptr noundef nonnull %7)
          to label %11 unwind label %15

11:                                               ; preds = %10
  call void @_ZNSt6vectorIP6TensorSaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %7) #5
  %12 = load i32, ptr %3, align 8, !tbaa !5
  %13 = invoke noundef i32 @_Z30slice_infer_output_size_kernel10TensorDesc14SliceParamSpecRSt6vectorIS_SaIS_EE4Arch(ptr noundef nonnull byval(%struct.TensorDesc) align 8 %5, ptr noundef nonnull byval(%struct.SliceParamSpec) align 8 %1, ptr noundef nonnull align 8 dereferenceable(24) %6, i32 noundef %12)
          to label %.preheader unwind label %17

.preheader:                                       ; preds = %11
  %14 = call noundef i64 @_ZNKSt6vectorIP6TensorSaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %2) #5
  %.not = icmp eq i64 %14, 0
  br i1 %.not, label %._crit_edge, label %.lr.ph

._crit_edge:                                      ; preds = %23, %.preheader
  call void @_ZNSt6vectorI10TensorDescSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %6) #5
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %6) #5
  call void @llvm.lifetime.end.p0(i64 92, ptr nonnull %5) #5
  br label %32

15:                                               ; preds = %10
  %16 = landingpad { ptr, i32 }
          cleanup
  call void @_ZNSt6vectorIP6TensorSaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %7) #5
  br label %31

17:                                               ; preds = %11
  %18 = landingpad { ptr, i32 }
          cleanup
  br label %30

.lr.ph:                                           ; preds = %.preheader, %23
  %19 = phi i64 [ %25, %23 ], [ 0, %.preheader ]
  %.019 = phi i32 [ %24, %23 ], [ 0, %.preheader ]
  %20 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP6TensorSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %19) #5
  %21 = load ptr, ptr %20, align 8, !tbaa !11
  %22 = call noundef nonnull align 4 dereferenceable(92) ptr @_ZNSt6vectorI10TensorDescSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %6, i64 noundef %19) #5
  call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 8 dereferenceable(92) %8, ptr noundef nonnull align 4 dereferenceable(92) %22, i64 92, i1 false), !tbaa.struct !12
  invoke void @_ZN6Tensor6resizeE10TensorDesc(ptr noundef nonnull align 8 dereferenceable(32) %21, ptr noundef nonnull byval(%struct.TensorDesc) align 8 %8)
          to label %23 unwind label %28

23:                                               ; preds = %.lr.ph
  %24 = add i32 %.019, 1
  %25 = zext i32 %24 to i64
  %26 = call noundef i64 @_ZNKSt6vectorIP6TensorSaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %2) #5
  %27 = icmp ugt i64 %26, %25
  br i1 %27, label %.lr.ph, label %._crit_edge, !llvm.loop !20

28:                                               ; preds = %.lr.ph
  %29 = landingpad { ptr, i32 }
          cleanup
  br label %30

30:                                               ; preds = %28, %17
  %.pn = phi { ptr, i32 } [ %29, %28 ], [ %18, %17 ]
  call void @_ZNSt6vectorI10TensorDescSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %6) #5
  br label %31

31:                                               ; preds = %30, %15
  %.pn.pn = phi { ptr, i32 } [ %.pn, %30 ], [ %16, %15 ]
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %6) #5
  call void @llvm.lifetime.end.p0(i64 92, ptr nonnull %5) #5
  resume { ptr, i32 } %.pn.pn

32:                                               ; preds = %4, %._crit_edge
  %.011 = phi i32 [ %13, %._crit_edge ], [ 1, %4 ]
  ret i32 %.011
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN6Tensor8get_descEv(ptr dead_on_unwind noalias writable sret(%struct.TensorDesc) align 4, ptr noundef nonnull align 8 dereferenceable(32)) local_unnamed_addr #0 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_Z25get_desc_from_tensor_ptrsSt6vectorIP6TensorSaIS1_EE(ptr dead_on_unwind noalias writable sret(%"class.std::vector.3") align 8, ptr noundef) local_unnamed_addr #2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIP6TensorSaIS1_EEC2ERKS3_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #0 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIP6TensorSaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #3 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef i32 @_Z30slice_infer_output_size_kernel10TensorDesc14SliceParamSpecRSt6vectorIS_SaIS_EE4Arch(ptr noundef byval(%struct.TensorDesc) align 8, ptr noundef byval(%struct.SliceParamSpec) align 8, ptr noundef nonnull align 8 dereferenceable(24), i32 noundef) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #4

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIP6TensorSaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP6TensorSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #3 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN6Tensor6resizeE10TensorDesc(ptr noundef nonnull align 8 dereferenceable(32), ptr noundef byval(%struct.TensorDesc) align 8) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(92) ptr @_ZNSt6vectorI10TensorDescSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #3 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorI10TensorDescSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #3 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"_ZTS8ArchInfo", !7, i64 0, !10, i64 8}
!7 = !{!"_ZTS4Arch", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!10, !10, i64 0}
!12 = !{i64 0, i64 4, !13, i64 4, i64 4, !15, i64 8, i64 4, !17, i64 12, i64 80, !19}
!13 = !{!14, !14, i64 0}
!14 = !{!"_ZTS8DataType", !8, i64 0}
!15 = !{!16, !16, i64 0}
!16 = !{!"_ZTS10DataFormat", !8, i64 0}
!17 = !{!18, !18, i64 0}
!18 = !{!"int", !8, i64 0}
!19 = !{!8, !8, i64 0}
!20 = distinct !{!20, !21}
!21 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: DSEPass,EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,MemCpyOptPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass