; LLVM IR from nsccgz-storage/nvlsm :: util/coding.ll (ZN7leveldb14GetVarint64PtrEPKcS1_Pm)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef ptr @_ZN7leveldb14GetVarint64PtrEPKcS1_Pm(ptr noundef %0, ptr noundef %1, ptr noundef %2) #1 {
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca i64, align 8
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i64, align 8
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  store ptr %2, ptr %7, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #2
  store i64 0, ptr %8, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #2
  store i32 0, ptr %9, align 4, !tbaa !11
  br label %12

12:                                               ; preds = %53, %3
  %13 = load i32, ptr %9, align 4, !tbaa !11
  %14 = icmp ule i32 %13, 63
  br i1 %14, label %15, label %19

15:                                               ; preds = %12
  %16 = load ptr, ptr %5, align 8, !tbaa !5
  %17 = load ptr, ptr %6, align 8, !tbaa !5
  %18 = icmp ult ptr %16, %17
  br label %19

19:                                               ; preds = %15, %12
  %20 = phi i1 [ false, %12 ], [ %18, %15 ]
  br i1 %20, label %22, label %21

21:                                               ; preds = %19
  store i32 2, ptr %10, align 4
  br label %56

22:                                               ; preds = %19
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #2
  %23 = load ptr, ptr %5, align 8, !tbaa !5
  %24 = load i8, ptr %23, align 1, !tbaa !13
  %25 = zext i8 %24 to i64
  store i64 %25, ptr %11, align 8, !tbaa !9
  %26 = load ptr, ptr %5, align 8, !tbaa !5
  %27 = getelementptr inbounds i8, ptr %26, i32 1
  store ptr %27, ptr %5, align 8, !tbaa !5
  %28 = load i64, ptr %11, align 8, !tbaa !9
  %29 = and i64 %28, 128
  %30 = icmp ne i64 %29, 0
  br i1 %30, label %31, label %39

31:                                               ; preds = %22
  %32 = load i64, ptr %11, align 8, !tbaa !9
  %33 = and i64 %32, 127
  %34 = load i32, ptr %9, align 4, !tbaa !11
  %35 = zext i32 %34 to i64
  %36 = shl i64 %33, %35
  %37 = load i64, ptr %8, align 8, !tbaa !9
  %38 = or i64 %37, %36
  store i64 %38, ptr %8, align 8, !tbaa !9
  br label %49

39:                                               ; preds = %22
  %40 = load i64, ptr %11, align 8, !tbaa !9
  %41 = load i32, ptr %9, align 4, !tbaa !11
  %42 = zext i32 %41 to i64
  %43 = shl i64 %40, %42
  %44 = load i64, ptr %8, align 8, !tbaa !9
  %45 = or i64 %44, %43
  store i64 %45, ptr %8, align 8, !tbaa !9
  %46 = load i64, ptr %8, align 8, !tbaa !9
  %47 = load ptr, ptr %7, align 8, !tbaa !5
  store i64 %46, ptr %47, align 8, !tbaa !9
  %48 = load ptr, ptr %5, align 8, !tbaa !5
  store ptr %48, ptr %4, align 8
  store i32 1, ptr %10, align 4
  br label %50

49:                                               ; preds = %31
  store i32 0, ptr %10, align 4
  br label %50

50:                                               ; preds = %49, %39
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #2
  %51 = load i32, ptr %10, align 4
  switch i32 %51, label %56 [
    i32 0, label %52
  ]

52:                                               ; preds = %50
  br label %53

53:                                               ; preds = %52
  %54 = load i32, ptr %9, align 4, !tbaa !11
  %55 = add i32 %54, 7
  store i32 %55, ptr %9, align 4, !tbaa !11
  br label %12, !llvm.loop !14

56:                                               ; preds = %50, %21
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #2
  %57 = load i32, ptr %10, align 4
  switch i32 %57, label %59 [
    i32 2, label %58
  ]

58:                                               ; preds = %56
  store ptr null, ptr %4, align 8
  store i32 1, ptr %10, align 4
  br label %59

59:                                               ; preds = %58, %56
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #2
  %60 = load ptr, ptr %4, align 8
  ret ptr %60
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!7, !7, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind memory(read, argmem: readwrite, inaccessiblemem: none) uwtable
define dso_local noundef ptr @_ZN7leveldb14GetVarint64PtrEPKcS1_Pm(ptr noundef readonly %0, ptr noundef readnone %1, ptr nocapture noundef writeonly %2) local_unnamed_addr #0 {
  %.not38 = icmp ult ptr %0, %1
  br i1 %.not38, label %.lr.ph, label %.loopexit

.lr.ph:                                           ; preds = %3, %10
  %indvars.iv = phi i64 [ %indvars.iv.next, %10 ], [ 0, %3 ]
  %.02236 = phi i64 [ %13, %10 ], [ 0, %3 ]
  %.02435 = phi ptr [ %6, %10 ], [ %0, %3 ]
  %4 = load i8, ptr %.02435, align 1, !tbaa !5
  %5 = zext i8 %4 to i64
  %6 = getelementptr inbounds i8, ptr %.02435, i64 1
  %.not = icmp slt i8 %4, 0
  br i1 %.not, label %10, label %7

7:                                                ; preds = %.lr.ph
  %8 = shl i64 %5, %indvars.iv
  %9 = or i64 %8, %.02236
  store i64 %9, ptr %2, align 8, !tbaa !8
  br label %.loopexit

10:                                               ; preds = %.lr.ph
  %11 = and i64 %5, 127
  %12 = shl nuw nsw i64 %11, %indvars.iv
  %13 = or i64 %12, %.02236
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 7
  %14 = icmp ugt i64 %indvars.iv, 56
  %15 = icmp uge ptr %6, %1
  %.not27 = select i1 %14, i1 true, i1 %15
  br i1 %.not27, label %.loopexit, label %.lr.ph, !llvm.loop !10

.loopexit:                                        ; preds = %10, %3, %7
  %spec.select = phi ptr [ %6, %7 ], [ null, %3 ], [ null, %10 ]
  ret ptr %spec.select
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind memory(read, argmem: readwrite, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}
!8 = !{!9, !9, i64 0}
!9 = !{!"long", !6, i64 0}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass