; LLVM IR from smv1999/CompetitiveProgrammingQuestionBank :: Techgig Code Gladiators 2021/semifinals/JazzyAndCricketBalls.ll (Z5valuex)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i64 @_Z5valuex(i64 noundef %0) #0 {
  %2 = alloca i64, align 8
  %3 = alloca i64, align 8
  %4 = alloca i64, align 8
  store i64 %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %3) #2
  %5 = load i64, ptr %2, align 8, !tbaa !5
  store i64 %5, ptr %3, align 8, !tbaa !5
  br label %6

6:                                                ; preds = %10, %1
  %7 = load i64, ptr %2, align 8, !tbaa !5
  %8 = srem i64 %7, 2
  %9 = icmp eq i64 %8, 0
  br i1 %9, label %10, label %16

10:                                               ; preds = %6
  %11 = load i64, ptr %2, align 8, !tbaa !5
  %12 = sdiv i64 %11, 2
  store i64 %12, ptr %2, align 8, !tbaa !5
  %13 = load i64, ptr %2, align 8, !tbaa !5
  %14 = load i64, ptr %3, align 8, !tbaa !5
  %15 = add nsw i64 %14, %13
  store i64 %15, ptr %3, align 8, !tbaa !5
  br label %6, !llvm.loop !9

16:                                               ; preds = %6
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #2
  store i64 3, ptr %4, align 8, !tbaa !5
  br label %17

17:                                               ; preds = %39, %16
  %18 = load i64, ptr %4, align 8, !tbaa !5
  %19 = load i64, ptr %4, align 8, !tbaa !5
  %20 = mul nsw i64 %18, %19
  %21 = load i64, ptr %2, align 8, !tbaa !5
  %22 = add nsw i64 %21, 2
  %23 = icmp slt i64 %20, %22
  br i1 %23, label %25, label %24

24:                                               ; preds = %17
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #2
  br label %42

25:                                               ; preds = %17
  br label %26

26:                                               ; preds = %31, %25
  %27 = load i64, ptr %2, align 8, !tbaa !5
  %28 = load i64, ptr %4, align 8, !tbaa !5
  %29 = srem i64 %27, %28
  %30 = icmp eq i64 %29, 0
  br i1 %30, label %31, label %38

31:                                               ; preds = %26
  %32 = load i64, ptr %4, align 8, !tbaa !5
  %33 = load i64, ptr %2, align 8, !tbaa !5
  %34 = sdiv i64 %33, %32
  store i64 %34, ptr %2, align 8, !tbaa !5
  %35 = load i64, ptr %2, align 8, !tbaa !5
  %36 = load i64, ptr %3, align 8, !tbaa !5
  %37 = add nsw i64 %36, %35
  store i64 %37, ptr %3, align 8, !tbaa !5
  br label %26, !llvm.loop !11

38:                                               ; preds = %26
  br label %39

39:                                               ; preds = %38
  %40 = load i64, ptr %4, align 8, !tbaa !5
  %41 = add nsw i64 %40, 2
  store i64 %41, ptr %4, align 8, !tbaa !5
  br label %17, !llvm.loop !12

42:                                               ; preds = %24
  %43 = load i64, ptr %2, align 8, !tbaa !5
  %44 = icmp sgt i64 %43, 2
  br i1 %44, label %45, label %48

45:                                               ; preds = %42
  %46 = load i64, ptr %3, align 8, !tbaa !5
  %47 = add nsw i64 %46, 1
  store i64 %47, ptr %3, align 8, !tbaa !5
  br label %48

48:                                               ; preds = %45, %42
  %49 = load i64, ptr %3, align 8, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 8, ptr %3) #2
  ret i64 %49
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define dso_local noundef i64 @_Z5valuex(i64 noundef %0) local_unnamed_addr #0 {
  %2 = and i64 %0, 1
  %3 = icmp eq i64 %2, 0
  br i1 %3, label %.lr.ph, label %.preheader22

.preheader22:                                     ; preds = %.lr.ph, %1
  %.019.lcssa = phi i64 [ %0, %1 ], [ %5, %.lr.ph ]
  %.018.lcssa = phi i64 [ %0, %1 ], [ %6, %.lr.ph ]
  %4 = icmp sgt i64 %.019.lcssa, 7
  br i1 %4, label %.preheader, label %._crit_edge34

.lr.ph:                                           ; preds = %1, %.lr.ph
  %.01824 = phi i64 [ %6, %.lr.ph ], [ %0, %1 ]
  %.01923 = phi i64 [ %5, %.lr.ph ], [ %0, %1 ]
  %5 = ashr exact i64 %.01923, 1
  %6 = add nsw i64 %.01824, %5
  %7 = and i64 %.01923, 2
  %8 = icmp eq i64 %7, 0
  br i1 %8, label %.lr.ph, label %.preheader22, !llvm.loop !5

.preheader:                                       ; preds = %.preheader22, %._crit_edge
  %.033 = phi i64 [ %17, %._crit_edge ], [ 3, %.preheader22 ]
  %.132 = phi i64 [ %.2.lcssa, %._crit_edge ], [ %.018.lcssa, %.preheader22 ]
  %.12031 = phi i64 [ %.221.lcssa, %._crit_edge ], [ %.019.lcssa, %.preheader22 ]
  %9 = srem i64 %.12031, %.033
  %10 = icmp eq i64 %9, 0
  br i1 %10, label %.lr.ph28, label %._crit_edge

._crit_edge34:                                    ; preds = %._crit_edge, %.preheader22
  %.120.lcssa = phi i64 [ %.019.lcssa, %.preheader22 ], [ %.221.lcssa, %._crit_edge ]
  %.1.lcssa = phi i64 [ %.018.lcssa, %.preheader22 ], [ %.2.lcssa, %._crit_edge ]
  %11 = icmp sgt i64 %.120.lcssa, 2
  %12 = zext i1 %11 to i64
  %spec.select = add nsw i64 %.1.lcssa, %12
  ret i64 %spec.select

.lr.ph28:                                         ; preds = %.preheader, %.lr.ph28
  %.227 = phi i64 [ %14, %.lr.ph28 ], [ %.132, %.preheader ]
  %.22126 = phi i64 [ %13, %.lr.ph28 ], [ %.12031, %.preheader ]
  %13 = sdiv i64 %.22126, %.033
  %14 = add nsw i64 %13, %.227
  %15 = srem i64 %13, %.033
  %16 = icmp eq i64 %15, 0
  br i1 %16, label %.lr.ph28, label %._crit_edge, !llvm.loop !7

._crit_edge:                                      ; preds = %.lr.ph28, %.preheader
  %.221.lcssa = phi i64 [ %.12031, %.preheader ], [ %13, %.lr.ph28 ]
  %.2.lcssa = phi i64 [ %.132, %.preheader ], [ %14, %.lr.ph28 ]
  %17 = add nuw nsw i64 %.033, 2
  %18 = mul nuw nsw i64 %17, %17
  %19 = add nsw i64 %.221.lcssa, 2
  %20 = icmp slt i64 %18, %19
  br i1 %20, label %.preheader, label %._crit_edge34, !llvm.loop !8
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = distinct !{!7, !6}
!8 = distinct !{!8, !6}


; Effective O3 passes: GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass