; LLVM IR from huawei-noah/bolt :: compute/tensor/src/cpu (scatter)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.TensorDesc = type { i32, i32, i32, [20 x i32] }
%struct.ScatterParamSpec = type { i32 }

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z11scatter_cpu10TensorDescPKvS_S1_S_S1_16ScatterParamSpecPvS_S3_(ptr noundef byval(%struct.TensorDesc) align 8 %0, ptr noundef %1, ptr noundef byval(%struct.TensorDesc) align 8 %2, ptr noundef %3, ptr noundef byval(%struct.TensorDesc) align 8 %4, ptr noundef %5, i32 %6, ptr noundef %7, ptr noundef byval(%struct.TensorDesc) align 8 %8, ptr noundef %9) #0 {
  %11 = alloca %struct.ScatterParamSpec, align 4
  %12 = alloca ptr, align 8
  %13 = alloca ptr, align 8
  %14 = alloca ptr, align 8
  %15 = alloca ptr, align 8
  %16 = alloca ptr, align 8
  %17 = alloca %struct.TensorDesc, align 4
  %18 = alloca %struct.TensorDesc, align 8
  %19 = alloca %struct.TensorDesc, align 8
  %20 = alloca %struct.TensorDesc, align 8
  %21 = alloca %struct.TensorDesc, align 4
  %22 = alloca %struct.TensorDesc, align 8
  %23 = alloca %struct.TensorDesc, align 8
  %24 = alloca %struct.TensorDesc, align 8
  %25 = alloca i32, align 4
  %26 = getelementptr inbounds %struct.ScatterParamSpec, ptr %11, i32 0, i32 0
  store i32 %6, ptr %26, align 4
  store ptr %1, ptr %12, align 8, !tbaa !5
  store ptr %3, ptr %13, align 8, !tbaa !5
  store ptr %5, ptr %14, align 8, !tbaa !5
  store ptr %7, ptr %15, align 8, !tbaa !5
  store ptr %9, ptr %16, align 8, !tbaa !5
  %27 = getelementptr inbounds %struct.TensorDesc, ptr %0, i32 0, i32 1
  %28 = load i32, ptr %27, align 4, !tbaa !9
  %29 = icmp eq i32 %28, 2
  br i1 %29, label %30, label %41

30:                                               ; preds = %10
  call void @llvm.lifetime.start.p0(i64 92, ptr %17) #5
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %17, ptr align 8 %0, i64 92, i1 false), !tbaa.struct !14
  %31 = getelementptr inbounds %struct.TensorDesc, ptr %17, i32 0, i32 1
  store i32 0, ptr %31, align 4, !tbaa !9
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %18, ptr align 8 %0, i64 92, i1 false), !tbaa.struct !14
  %32 = load ptr, ptr %12, align 8, !tbaa !5
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %19, ptr align 4 %17, i64 92, i1 false), !tbaa.struct !14
  %33 = load ptr, ptr %15, align 8, !tbaa !5
  %34 = call noundef i32 @_Z15transformToNCHW10TensorDescPKvS_Pv(ptr noundef byval(%struct.TensorDesc) align 8 %18, ptr noundef %32, ptr noundef byval(%struct.TensorDesc) align 8 %19, ptr noundef %33)
  %35 = load ptr, ptr %15, align 8, !tbaa !5
  store ptr %35, ptr %12, align 8, !tbaa !5
  %36 = load ptr, ptr %15, align 8, !tbaa !5
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %20, ptr align 8 %0, i64 92, i1 false), !tbaa.struct !14
  %37 = call noundef i32 @_Z14tensorNumBytes10TensorDesc(ptr noundef byval(%struct.TensorDesc) align 8 %20)
  %38 = zext i32 %37 to i64
  %39 = getelementptr inbounds i8, ptr %36, i64 %38
  store ptr %39, ptr %15, align 8, !tbaa !5
  %40 = getelementptr inbounds %struct.TensorDesc, ptr %0, i32 0, i32 1
  store i32 0, ptr %40, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 92, ptr %17) #5
  br label %41

41:                                               ; preds = %30, %10
  %42 = getelementptr inbounds %struct.TensorDesc, ptr %4, i32 0, i32 1
  %43 = load i32, ptr %42, align 4, !tbaa !9
  %44 = icmp eq i32 %43, 2
  br i1 %44, label %45, label %56

45:                                               ; preds = %41
  call void @llvm.lifetime.start.p0(i64 92, ptr %21) #5
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %21, ptr align 8 %4, i64 92, i1 false), !tbaa.struct !14
  %46 = getelementptr inbounds %struct.TensorDesc, ptr %21, i32 0, i32 1
  store i32 0, ptr %46, align 4, !tbaa !9
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %22, ptr align 8 %4, i64 92, i1 false), !tbaa.struct !14
  %47 = load ptr, ptr %14, align 8, !tbaa !5
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %23, ptr align 4 %21, i64 92, i1 false), !tbaa.struct !14
  %48 = load ptr, ptr %15, align 8, !tbaa !5
  %49 = call noundef i32 @_Z15transformToNCHW10TensorDescPKvS_Pv(ptr noundef byval(%struct.TensorDesc) align 8 %22, ptr noundef %47, ptr noundef byval(%struct.TensorDesc) align 8 %23, ptr noundef %48)
  %50 = load ptr, ptr %15, align 8, !tbaa !5
  store ptr %50, ptr %14, align 8, !tbaa !5
  %51 = load ptr, ptr %15, align 8, !tbaa !5
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %24, ptr align 8 %4, i64 92, i1 false), !tbaa.struct !14
  %52 = call noundef i32 @_Z14tensorNumBytes10TensorDesc(ptr noundef byval(%struct.TensorDesc) align 8 %24)
  %53 = zext i32 %52 to i64
  %54 = getelementptr inbounds i8, ptr %51, i64 %53
  store ptr %54, ptr %15, align 8, !tbaa !5
  %55 = getelementptr inbounds %struct.TensorDesc, ptr %4, i32 0, i32 1
  store i32 0, ptr %55, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 92, ptr %21) #5
  br label %56

56:                                               ; preds = %45, %41
  call void @llvm.lifetime.start.p0(i64 4, ptr %25) #5
  store i32 0, ptr %25, align 4, !tbaa !19
  %57 = getelementptr inbounds %struct.TensorDesc, ptr %0, i32 0, i32 0
  %58 = load i32, ptr %57, align 8, !tbaa !21
  switch i32 %58, label %69 [
    i32 2, label %59
    i32 3, label %59
    i32 0, label %64
    i32 1, label %64
  ]

59:                                               ; preds = %56, %56
  %60 = load ptr, ptr %12, align 8, !tbaa !5
  %61 = load ptr, ptr %13, align 8, !tbaa !5
  %62 = load ptr, ptr %14, align 8, !tbaa !5
  %63 = load ptr, ptr %16, align 8, !tbaa !5
  call void @_ZL14scatter_kernelIjEvRK10TensorDescPKT_S2_PKiS2_S5_RK16ScatterParamSpecS2_PS3_(ptr noundef nonnull align 4 dereferenceable(92) %0, ptr noundef %60, ptr noundef nonnull align 4 dereferenceable(92) %2, ptr noundef %61, ptr noundef nonnull align 4 dereferenceable(92) %4, ptr noundef %62, ptr noundef nonnull align 4 dereferenceable(4) %11, ptr noundef nonnull align 4 dereferenceable(92) %8, ptr noundef %63)
  br label %70

64:                                               ; preds = %56, %56
  %65 = load ptr, ptr %12, align 8, !tbaa !5
  %66 = load ptr, ptr %13, align 8, !tbaa !5
  %67 = load ptr, ptr %14, align 8, !tbaa !5
  %68 = load ptr, ptr %16, align 8, !tbaa !5
  call void @_ZL14scatter_kernelIaEvRK10TensorDescPKT_S2_PKiS2_S5_RK16ScatterParamSpecS2_PS3_(ptr noundef nonnull align 4 dereferenceable(92) %0, ptr noundef %65, ptr noundef nonnull align 4 dereferenceable(92) %2, ptr noundef %66, ptr noundef nonnull align 4 dereferenceable(92) %4, ptr noundef %67, ptr noundef nonnull align 4 dereferenceable(4) %11, ptr noundef nonnull align 4 dereferenceable(92) %8, ptr noundef %68)
  br label %70

69:                                               ; preds = %56
  store i32 51, ptr %25, align 4, !tbaa !19
  br label %70

70:                                               ; preds = %69, %64, %59
  %71 = load i32, ptr %25, align 4, !tbaa !19
  call void @llvm.lifetime.end.p0(i64 4, ptr %25) #5
  ret i32 %71
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2

declare noundef i32 @_Z15transformToNCHW10TensorDescPKvS_Pv(ptr noundef byval(%struct.TensorDesc) align 8, ptr noundef, ptr noundef byval(%struct.TensorDesc) align 8, ptr noundef) #3

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef i32 @_Z14tensorNumBytes10TensorDesc(ptr noundef byval(%struct.TensorDesc) align 8) #4

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress uwtable
declare hidden void @_ZL14scatter_kernelIjEvRK10TensorDescPKT_S2_PKiS2_S5_RK16ScatterParamSpecS2_PS3_(ptr noundef nonnull align 4 dereferenceable(92), ptr noundef, ptr noundef nonnull align 4 dereferenceable(92), ptr noundef, ptr noundef nonnull align 4 dereferenceable(92), ptr noundef, ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(92), ptr noundef) #4

; Function Attrs: inlinehint mustprogress uwtable
declare hidden void @_ZL14scatter_kernelIaEvRK10TensorDescPKT_S2_PKiS2_S5_RK16ScatterParamSpecS2_PS3_(ptr noundef nonnull align 4 dereferenceable(92), ptr noundef, ptr noundef nonnull align 4 dereferenceable(92), ptr noundef, ptr noundef nonnull align 4 dereferenceable(92), ptr noundef, ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(92), ptr noundef) #4

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !12, i64 4}
!10 = !{!"_ZTS10TensorDesc", !11, i64 0, !12, i64 4, !13, i64 8, !7, i64 12}
!11 = !{!"_ZTS8DataType", !7, i64 0}
!12 = !{!"_ZTS10DataFormat", !7, i64 0}
!13 = !{!"int", !7, i64 0}
!14 = !{i64 0, i64 4, !15, i64 4, i64 4, !16, i64 8, i64 4, !17, i64 12, i64 80, !18}
!15 = !{!11, !11, i64 0}
!16 = !{!12, !12, i64 0}
!17 = !{!13, !13, i64 0}
!18 = !{!7, !7, i64 0}
!19 = !{!20, !20, i64 0}
!20 = !{!"_ZTS2EE", !7, i64 0}
!21 = !{!10, !11, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.TensorDesc = type { i32, i32, i32, [20 x i32] }
%struct.ScatterParamSpec = type { i32 }

; Function Attrs: mustprogress uwtable
define dso_local noundef range(i32 0, 52) i32 @_Z11scatter_cpu10TensorDescPKvS_S1_S_S1_16ScatterParamSpecPvS_S3_(ptr noundef byval(%struct.TensorDesc) align 8 %0, ptr noundef %1, ptr noundef byval(%struct.TensorDesc) align 8 %2, ptr noundef %3, ptr noundef byval(%struct.TensorDesc) align 8 %4, ptr noundef %5, i32 %6, ptr noundef %7, ptr noundef byval(%struct.TensorDesc) align 8 %8, ptr noundef %9) local_unnamed_addr #0 {
  %11 = alloca %struct.ScatterParamSpec, align 4
  %12 = alloca %struct.TensorDesc, align 8
  %13 = alloca %struct.TensorDesc, align 8
  store i32 %6, ptr %11, align 4
  %14 = getelementptr inbounds i8, ptr %0, i64 4
  %15 = load i32, ptr %14, align 4, !tbaa !5
  %16 = icmp eq i32 %15, 2
  br i1 %16, label %17, label %22

17:                                               ; preds = %10
  %.sroa.05.0.copyload = load i32, ptr %0, align 8, !tbaa !12
  %.sroa.510.0..sroa_idx = getelementptr inbounds i8, ptr %0, i64 8
  %.sroa.510.0..sroa_idx11 = getelementptr inbounds i8, ptr %12, i64 8
  call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 8 dereferenceable(84) %.sroa.510.0..sroa_idx11, ptr noundef nonnull align 8 dereferenceable(84) %.sroa.510.0..sroa_idx, i64 84, i1 false)
  store i32 %.sroa.05.0.copyload, ptr %12, align 8, !tbaa !12
  %.sroa.47.0..sroa_idx8 = getelementptr inbounds i8, ptr %12, i64 4
  store i32 0, ptr %.sroa.47.0..sroa_idx8, align 4, !tbaa !13
  %18 = tail call noundef i32 @_Z15transformToNCHW10TensorDescPKvS_Pv(ptr noundef nonnull byval(%struct.TensorDesc) align 8 %0, ptr noundef %1, ptr noundef nonnull byval(%struct.TensorDesc) align 8 %12, ptr noundef %7)
  %19 = tail call noundef i32 @_Z14tensorNumBytes10TensorDesc(ptr noundef nonnull byval(%struct.TensorDesc) align 8 %0)
  %20 = zext i32 %19 to i64
  %21 = getelementptr inbounds i8, ptr %7, i64 %20
  store i32 0, ptr %14, align 4, !tbaa !5
  br label %22

22:                                               ; preds = %17, %10
  %.029 = phi ptr [ %21, %17 ], [ %7, %10 ]
  %.027 = phi ptr [ %7, %17 ], [ %1, %10 ]
  %23 = getelementptr inbounds i8, ptr %4, i64 4
  %24 = load i32, ptr %23, align 4, !tbaa !5
  %25 = icmp eq i32 %24, 2
  br i1 %25, label %26, label %29

26:                                               ; preds = %22
  %.sroa.0.0.copyload = load i32, ptr %4, align 8, !tbaa !12
  %.sroa.5.0..sroa_idx = getelementptr inbounds i8, ptr %4, i64 8
  %.sroa.5.0..sroa_idx4 = getelementptr inbounds i8, ptr %13, i64 8
  call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 8 dereferenceable(84) %.sroa.5.0..sroa_idx4, ptr noundef nonnull align 8 dereferenceable(84) %.sroa.5.0..sroa_idx, i64 84, i1 false)
  store i32 %.sroa.0.0.copyload, ptr %13, align 8, !tbaa !12
  %.sroa.4.0..sroa_idx2 = getelementptr inbounds i8, ptr %13, i64 4
  store i32 0, ptr %.sroa.4.0..sroa_idx2, align 4, !tbaa !13
  %27 = tail call noundef i32 @_Z15transformToNCHW10TensorDescPKvS_Pv(ptr noundef nonnull byval(%struct.TensorDesc) align 8 %4, ptr noundef %5, ptr noundef nonnull byval(%struct.TensorDesc) align 8 %13, ptr noundef %.029)
  %28 = tail call noundef i32 @_Z14tensorNumBytes10TensorDesc(ptr noundef nonnull byval(%struct.TensorDesc) align 8 %4)
  store i32 0, ptr %23, align 4, !tbaa !5
  br label %29

29:                                               ; preds = %26, %22
  %.028 = phi ptr [ %.029, %26 ], [ %5, %22 ]
  %30 = load i32, ptr %0, align 8, !tbaa !14
  switch i32 %30, label %33 [
    i32 2, label %31
    i32 3, label %31
    i32 0, label %32
    i32 1, label %32
  ]

31:                                               ; preds = %29, %29
  call void @_ZL14scatter_kernelIjEvRK10TensorDescPKT_S2_PKiS2_S5_RK16ScatterParamSpecS2_PS3_(ptr noundef nonnull align 4 dereferenceable(92) %0, ptr noundef %.027, ptr noundef nonnull align 4 dereferenceable(92) %2, ptr noundef %3, ptr noundef nonnull align 4 dereferenceable(92) %4, ptr noundef %.028, ptr noundef nonnull align 4 dereferenceable(4) %11, ptr noundef nonnull align 4 dereferenceable(92) %8, ptr noundef %9)
  br label %33

32:                                               ; preds = %29, %29
  call void @_ZL14scatter_kernelIaEvRK10TensorDescPKT_S2_PKiS2_S5_RK16ScatterParamSpecS2_PS3_(ptr noundef nonnull align 4 dereferenceable(92) %0, ptr noundef %.027, ptr noundef nonnull align 4 dereferenceable(92) %2, ptr noundef %3, ptr noundef nonnull align 4 dereferenceable(92) %4, ptr noundef %.028, ptr noundef nonnull align 4 dereferenceable(4) %11, ptr noundef nonnull align 4 dereferenceable(92) %8, ptr noundef %9)
  br label %33

33:                                               ; preds = %29, %32, %31
  %.0 = phi i32 [ 0, %32 ], [ 0, %31 ], [ 51, %29 ]
  ret i32 %.0
}

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #1

declare noundef i32 @_Z15transformToNCHW10TensorDescPKvS_Pv(ptr noundef byval(%struct.TensorDesc) align 8, ptr noundef, ptr noundef byval(%struct.TensorDesc) align 8, ptr noundef) local_unnamed_addr #2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef i32 @_Z14tensorNumBytes10TensorDesc(ptr noundef byval(%struct.TensorDesc) align 8) local_unnamed_addr #3

; Function Attrs: inlinehint mustprogress uwtable
declare hidden void @_ZL14scatter_kernelIjEvRK10TensorDescPKT_S2_PKiS2_S5_RK16ScatterParamSpecS2_PS3_(ptr noundef nonnull align 4 dereferenceable(92), ptr noundef, ptr noundef nonnull align 4 dereferenceable(92), ptr noundef, ptr noundef nonnull align 4 dereferenceable(92), ptr noundef, ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(92), ptr noundef) local_unnamed_addr #3

; Function Attrs: inlinehint mustprogress uwtable
declare hidden void @_ZL14scatter_kernelIaEvRK10TensorDescPKT_S2_PKiS2_S5_RK16ScatterParamSpecS2_PS3_(ptr noundef nonnull align 4 dereferenceable(92), ptr noundef, ptr noundef nonnull align 4 dereferenceable(92), ptr noundef, ptr noundef nonnull align 4 dereferenceable(92), ptr noundef, ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(92), ptr noundef) local_unnamed_addr #3

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 4}
!6 = !{!"_ZTS10TensorDesc", !7, i64 0, !10, i64 4, !11, i64 8, !8, i64 12}
!7 = !{!"_ZTS8DataType", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"_ZTS10DataFormat", !8, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!7, !7, i64 0}
!13 = !{!10, !10, i64 0}
!14 = !{!6, !7, i64 0}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,MemCpyOptPass,SROAPass,SimplifyCFGPass,TailCallElimPass