; LLVM IR from huawei-noah/bolt :: compute/tensor/src (preallocated_memory)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.PreAllocatedMemoryParamSpec = type { %struct.TensorDesc, float }
%struct.TensorDesc = type { i32, i32, i32, [20 x i32] }

@.str = external hidden unnamed_addr constant [20 x i8], align 1
@stdout = external global ptr, align 8
@.str.1 = external hidden unnamed_addr constant [18 x i8], align 1

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z37preallocated_memory_infer_output_sizeSt6vectorIP6TensorSaIS1_EE27PreAllocatedMemoryParamSpecS1_P8ArchInfo(ptr noundef %0, ptr noundef byval(%struct.PreAllocatedMemoryParamSpec) align 8 %1, ptr noundef %2, ptr noundef %3) #0 {
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca %struct.TensorDesc, align 4
  %11 = alloca %struct.TensorDesc, align 4
  %12 = alloca i32, align 4
  %13 = alloca %struct.TensorDesc, align 8
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %2, ptr %6, align 8, !tbaa !5
  store ptr %3, ptr %7, align 8, !tbaa !5
  %14 = load ptr, ptr %6, align 8, !tbaa !5
  %15 = icmp eq ptr %14, null
  br i1 %15, label %16, label %32

16:                                               ; preds = %4
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #8
  store i32 1, ptr %8, align 4, !tbaa !9
  %17 = load i32, ptr %8, align 4, !tbaa !9
  %18 = icmp ne i32 %17, 0
  br i1 %18, label %19, label %31

19:                                               ; preds = %16
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #8
  %20 = call i64 (i64, ...) @syscall(i64 noundef 186) #8
  %21 = trunc i64 %20 to i32
  store i32 %21, ptr %9, align 4, !tbaa !11
  %22 = load i32, ptr %9, align 4, !tbaa !11
  %23 = call i32 (ptr, ...) @printf(ptr noundef @.str, i32 noundef %22)
  %24 = load ptr, ptr @stdout, align 8, !tbaa !5
  %25 = call i32 @fflush(ptr noundef %24)
  %26 = load i32, ptr %8, align 4, !tbaa !9
  %27 = call ptr @ee2str(i32 noundef %26)
  %28 = call i32 (ptr, ...) @printf(ptr noundef @.str.1, ptr noundef %27)
  %29 = load ptr, ptr @stdout, align 8, !tbaa !5
  %30 = call i32 @fflush(ptr noundef %29)
  call void @exit(i32 noundef 1) #9
  unreachable

31:                                               ; preds = %16
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #8
  br label %32

32:                                               ; preds = %31, %4
  call void @llvm.lifetime.start.p0(i64 92, ptr %10) #8
  %33 = getelementptr inbounds %struct.PreAllocatedMemoryParamSpec, ptr %1, i32 0, i32 0
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %10, ptr align 8 %33, i64 92, i1 false), !tbaa.struct !13
  %34 = call noundef i64 @_ZNKSt6vectorIP6TensorSaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #8
  %35 = icmp ugt i64 %34, 0
  br i1 %35, label %36, label %96

36:                                               ; preds = %32
  call void @llvm.lifetime.start.p0(i64 92, ptr %11) #8
  %37 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP6TensorSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef 0) #8
  %38 = load ptr, ptr %37, align 8, !tbaa !5
  call void @_ZN6Tensor8get_descEv(ptr dead_on_unwind writable sret(%struct.TensorDesc) align 4 %11, ptr noundef nonnull align 8 dereferenceable(32) %38)
  %39 = getelementptr inbounds %struct.TensorDesc, ptr %10, i32 0, i32 2
  %40 = load i32, ptr %39, align 4, !tbaa !19
  %41 = icmp eq i32 %40, 0
  br i1 %41, label %42, label %43

42:                                               ; preds = %36
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %10, ptr align 4 %11, i64 92, i1 false), !tbaa.struct !13
  br label %95

43:                                               ; preds = %36
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #8
  store i32 0, ptr %12, align 4, !tbaa !11
  br label %44

44:                                               ; preds = %91, %43
  %45 = load i32, ptr %12, align 4, !tbaa !11
  %46 = getelementptr inbounds %struct.TensorDesc, ptr %11, i32 0, i32 2
  %47 = load i32, ptr %46, align 4, !tbaa !19
  %48 = getelementptr inbounds %struct.TensorDesc, ptr %10, i32 0, i32 2
  %49 = load i32, ptr %48, align 4, !tbaa !19
  %50 = icmp ult i32 %47, %49
  br i1 %50, label %51, label %54

51:                                               ; preds = %44
  %52 = getelementptr inbounds %struct.TensorDesc, ptr %11, i32 0, i32 2
  %53 = load i32, ptr %52, align 4, !tbaa !19
  br label %57

54:                                               ; preds = %44
  %55 = getelementptr inbounds %struct.TensorDesc, ptr %10, i32 0, i32 2
  %56 = load i32, ptr %55, align 4, !tbaa !19
  br label %57

57:                                               ; preds = %54, %51
  %58 = phi i32 [ %53, %51 ], [ %56, %54 ]
  %59 = icmp ult i32 %45, %58
  br i1 %59, label %61, label %60

60:                                               ; preds = %57
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #8
  br label %94

61:                                               ; preds = %57
  %62 = getelementptr inbounds %struct.TensorDesc, ptr %10, i32 0, i32 3
  %63 = getelementptr inbounds %struct.TensorDesc, ptr %10, i32 0, i32 2
  %64 = load i32, ptr %63, align 4, !tbaa !19
  %65 = sub i32 %64, 1
  %66 = load i32, ptr %12, align 4, !tbaa !11
  %67 = sub i32 %65, %66
  %68 = zext i32 %67 to i64
  %69 = getelementptr inbounds [20 x i32], ptr %62, i64 0, i64 %68
  %70 = load i32, ptr %69, align 4, !tbaa !11
  %71 = icmp ule i32 %70, 0
  br i1 %71, label %72, label %90

72:                                               ; preds = %61
  %73 = getelementptr inbounds %struct.TensorDesc, ptr %11, i32 0, i32 3
  %74 = getelementptr inbounds %struct.TensorDesc, ptr %11, i32 0, i32 2
  %75 = load i32, ptr %74, align 4, !tbaa !19
  %76 = sub i32 %75, 1
  %77 = load i32, ptr %12, align 4, !tbaa !11
  %78 = sub i32 %76, %77
  %79 = zext i32 %78 to i64
  %80 = getelementptr inbounds [20 x i32], ptr %73, i64 0, i64 %79
  %81 = load i32, ptr %80, align 4, !tbaa !11
  %82 = getelementptr inbounds %struct.TensorDesc, ptr %10, i32 0, i32 3
  %83 = getelementptr inbounds %struct.TensorDesc, ptr %10, i32 0, i32 2
  %84 = load i32, ptr %83, align 4, !tbaa !19
  %85 = sub i32 %84, 1
  %86 = load i32, ptr %12, align 4, !tbaa !11
  %87 = sub i32 %85, %86
  %88 = zext i32 %87 to i64
  %89 = getelementptr inbounds [20 x i32], ptr %82, i64 0, i64 %88
  store i32 %81, ptr %89, align 4, !tbaa !11
  br label %90

90:                                               ; preds = %72, %61
  br label %91

91:                                               ; preds = %90
  %92 = load i32, ptr %12, align 4, !tbaa !11
  %93 = add i32 %92, 1
  store i32 %93, ptr %12, align 4, !tbaa !11
  br label %44, !llvm.loop !21

94:                                               ; preds = %60
  br label %95

95:                                               ; preds = %94, %42
  call void @llvm.lifetime.end.p0(i64 92, ptr %11) #8
  br label %96

96:                                               ; preds = %95, %32
  %97 = load ptr, ptr %6, align 8, !tbaa !5
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %13, ptr align 4 %10, i64 92, i1 false), !tbaa.struct !13
  call void @_ZN6Tensor6resizeE10TensorDesc(ptr noundef nonnull align 8 dereferenceable(32) %97, ptr noundef byval(%struct.TensorDesc) align 8 %13)
  call void @llvm.lifetime.end.p0(i64 92, ptr %10) #8
  ret i32 0
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind
declare i64 @syscall(i64 noundef, ...) #2

declare i32 @printf(ptr noundef, ...) #3

declare i32 @fflush(ptr noundef) #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local ptr @ee2str(i32 noundef) #4

; Function Attrs: noreturn nounwind
declare void @exit(i32 noundef) #5

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #6

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIP6TensorSaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #7 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP6TensorSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #7 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN6Tensor8get_descEv(ptr dead_on_unwind noalias writable sret(%struct.TensorDesc) align 4, ptr noundef nonnull align 8 dereferenceable(32)) #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN6Tensor6resizeE10TensorDesc(ptr noundef nonnull align 8 dereferenceable(32), ptr noundef byval(%struct.TensorDesc) align 8) #0 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #7 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #8 = { nounwind }
attributes #9 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"_ZTS2EE", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{i64 0, i64 4, !14, i64 4, i64 4, !16, i64 8, i64 4, !11, i64 12, i64 80, !18}
!14 = !{!15, !15, i64 0}
!15 = !{!"_ZTS8DataType", !7, i64 0}
!16 = !{!17, !17, i64 0}
!17 = !{!"_ZTS10DataFormat", !7, i64 0}
!18 = !{!7, !7, i64 0}
!19 = !{!20, !12, i64 8}
!20 = !{!"_ZTS10TensorDesc", !15, i64 0, !17, i64 4, !12, i64 8, !7, i64 12}
!21 = distinct !{!21, !22}
!22 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.PreAllocatedMemoryParamSpec = type { %struct.TensorDesc, float }
%struct.TensorDesc = type { i32, i32, i32, [20 x i32] }

@.str = external hidden unnamed_addr constant [20 x i8], align 1
@stdout = external local_unnamed_addr global ptr, align 8
@.str.1 = external hidden unnamed_addr constant [18 x i8], align 1

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z37preallocated_memory_infer_output_sizeSt6vectorIP6TensorSaIS1_EE27PreAllocatedMemoryParamSpecS1_P8ArchInfo(ptr noundef %0, ptr nocapture noundef readonly byval(%struct.PreAllocatedMemoryParamSpec) align 8 %1, ptr noundef %2, ptr nocapture noundef readnone %3) local_unnamed_addr #0 {
  %5 = alloca %struct.TensorDesc, align 8
  %6 = alloca %struct.TensorDesc, align 4
  %7 = icmp eq ptr %2, null
  br i1 %7, label %8, label %18

8:                                                ; preds = %4
  %9 = tail call i64 (i64, ...) @syscall(i64 noundef 186) #9
  %10 = trunc i64 %9 to i32
  %11 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str, i32 noundef %10)
  %12 = load ptr, ptr @stdout, align 8, !tbaa !5
  %13 = tail call i32 @fflush(ptr noundef %12)
  %14 = tail call ptr @ee2str(i32 noundef 1)
  %15 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.1, ptr noundef %14)
  %16 = load ptr, ptr @stdout, align 8, !tbaa !5
  %17 = tail call i32 @fflush(ptr noundef %16)
  tail call void @exit(i32 noundef 1) #10
  unreachable

18:                                               ; preds = %4
  call void @llvm.lifetime.start.p0(i64 92, ptr nonnull %5) #9
  call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 8 dereferenceable(92) %5, ptr noundef nonnull align 8 dereferenceable(92) %1, i64 92, i1 false), !tbaa.struct !9
  %19 = tail call noundef i64 @_ZNKSt6vectorIP6TensorSaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #9
  %.not = icmp eq i64 %19, 0
  br i1 %.not, label %72, label %20

20:                                               ; preds = %18
  call void @llvm.lifetime.start.p0(i64 92, ptr nonnull %6) #9
  %21 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP6TensorSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef 0) #9
  %22 = load ptr, ptr %21, align 8, !tbaa !5
  call void @_ZN6Tensor8get_descEv(ptr dead_on_unwind nonnull writable sret(%struct.TensorDesc) align 4 %6, ptr noundef nonnull align 8 dereferenceable(32) %22)
  %23 = getelementptr inbounds i8, ptr %5, i64 8
  %24 = load i32, ptr %23, align 8
  %25 = icmp eq i32 %24, 0
  br i1 %25, label %32, label %.preheader

.preheader:                                       ; preds = %20
  %26 = getelementptr inbounds i8, ptr %6, i64 8
  %27 = load i32, ptr %26, align 4
  %.not10 = icmp eq i32 %27, 0
  br i1 %.not10, label %.loopexit, label %.lr.ph

.lr.ph:                                           ; preds = %.preheader
  %28 = call i32 @llvm.umin.i32(i32 %27, i32 %24)
  %29 = getelementptr inbounds i8, ptr %5, i64 12
  %30 = getelementptr inbounds i8, ptr %6, i64 12
  %wide.trip.count = zext i32 %28 to i64
  %xtraiter = and i64 %wide.trip.count, 1
  %31 = icmp eq i32 %28, 1
  br i1 %31, label %.loopexit.loopexit.unr-lcssa, label %.lr.ph.new

.lr.ph.new:                                       ; preds = %.lr.ph
  %unroll_iter = and i64 %wide.trip.count, 4294967294
  br label %33

32:                                               ; preds = %20
  call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 8 dereferenceable(92) %5, ptr noundef nonnull align 4 dereferenceable(92) %6, i64 92, i1 false), !tbaa.struct !9
  br label %.loopexit

33:                                               ; preds = %59, %.lr.ph.new
  %indvars.iv = phi i64 [ 0, %.lr.ph.new ], [ %indvars.iv.next.1, %59 ]
  %niter = phi i64 [ 0, %.lr.ph.new ], [ %niter.next.1, %59 ]
  %34 = trunc nuw i64 %indvars.iv to i32
  %35 = xor i32 %34, -1
  %36 = add i32 %24, %35
  %37 = zext i32 %36 to i64
  %38 = getelementptr inbounds [20 x i32], ptr %29, i64 0, i64 %37
  %39 = load i32, ptr %38, align 4, !tbaa !14
  %40 = icmp eq i32 %39, 0
  br i1 %40, label %41, label %46

41:                                               ; preds = %33
  %42 = add i32 %27, %35
  %43 = zext i32 %42 to i64
  %44 = getelementptr inbounds [20 x i32], ptr %30, i64 0, i64 %43
  %45 = load i32, ptr %44, align 4, !tbaa !14
  store i32 %45, ptr %38, align 4, !tbaa !14
  br label %46

46:                                               ; preds = %33, %41
  %47 = trunc i64 %indvars.iv to i32
  %48 = xor i32 %47, -2
  %49 = add i32 %24, %48
  %50 = zext i32 %49 to i64
  %51 = getelementptr inbounds [20 x i32], ptr %29, i64 0, i64 %50
  %52 = load i32, ptr %51, align 4, !tbaa !14
  %53 = icmp eq i32 %52, 0
  br i1 %53, label %54, label %59

54:                                               ; preds = %46
  %55 = add i32 %27, %48
  %56 = zext i32 %55 to i64
  %57 = getelementptr inbounds [20 x i32], ptr %30, i64 0, i64 %56
  %58 = load i32, ptr %57, align 4, !tbaa !14
  store i32 %58, ptr %51, align 4, !tbaa !14
  br label %59

59:                                               ; preds = %54, %46
  %indvars.iv.next.1 = add nuw nsw i64 %indvars.iv, 2
  %niter.next.1 = add i64 %niter, 2
  %niter.ncmp.1 = icmp eq i64 %niter.next.1, %unroll_iter
  br i1 %niter.ncmp.1, label %.loopexit.loopexit.unr-lcssa.loopexit, label %33, !llvm.loop !17

.loopexit.loopexit.unr-lcssa.loopexit:            ; preds = %59
  %60 = trunc nuw i64 %indvars.iv.next.1 to i32
  %61 = xor i32 %60, -1
  br label %.loopexit.loopexit.unr-lcssa

.loopexit.loopexit.unr-lcssa:                     ; preds = %.loopexit.loopexit.unr-lcssa.loopexit, %.lr.ph
  %indvars.iv.unr = phi i32 [ -1, %.lr.ph ], [ %61, %.loopexit.loopexit.unr-lcssa.loopexit ]
  %lcmp.mod.not = icmp eq i64 %xtraiter, 0
  br i1 %lcmp.mod.not, label %.loopexit, label %.epil.preheader

.epil.preheader:                                  ; preds = %.loopexit.loopexit.unr-lcssa
  %62 = add i32 %24, %indvars.iv.unr
  %63 = zext i32 %62 to i64
  %64 = getelementptr inbounds [20 x i32], ptr %29, i64 0, i64 %63
  %65 = load i32, ptr %64, align 4, !tbaa !14
  %66 = icmp eq i32 %65, 0
  br i1 %66, label %67, label %.loopexit

67:                                               ; preds = %.epil.preheader
  %68 = add i32 %27, %indvars.iv.unr
  %69 = zext i32 %68 to i64
  %70 = getelementptr inbounds [20 x i32], ptr %30, i64 0, i64 %69
  %71 = load i32, ptr %70, align 4, !tbaa !14
  store i32 %71, ptr %64, align 4, !tbaa !14
  br label %.loopexit

.loopexit:                                        ; preds = %.loopexit.loopexit.unr-lcssa, %67, %.epil.preheader, %.preheader, %32
  call void @llvm.lifetime.end.p0(i64 92, ptr nonnull %6) #9
  br label %72

72:                                               ; preds = %.loopexit, %18
  call void @_ZN6Tensor6resizeE10TensorDesc(ptr noundef nonnull align 8 dereferenceable(32) %2, ptr noundef nonnull byval(%struct.TensorDesc) align 8 %5)
  call void @llvm.lifetime.end.p0(i64 92, ptr nonnull %5) #9
  ret i32 0
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind
declare i64 @syscall(i64 noundef, ...) local_unnamed_addr #2

; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #3

; Function Attrs: nofree nounwind
declare noundef i32 @fflush(ptr nocapture noundef) local_unnamed_addr #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local ptr @ee2str(i32 noundef) local_unnamed_addr #4

; Function Attrs: noreturn nounwind
declare void @exit(i32 noundef) local_unnamed_addr #5

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #6

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIP6TensorSaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #7 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP6TensorSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #7 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN6Tensor8get_descEv(ptr dead_on_unwind noalias writable sret(%struct.TensorDesc) align 4, ptr noundef nonnull align 8 dereferenceable(32)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN6Tensor6resizeE10TensorDesc(ptr noundef nonnull align 8 dereferenceable(32), ptr noundef byval(%struct.TensorDesc) align 8) local_unnamed_addr #0 align 2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.umin.i32(i32, i32) #8

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #7 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #8 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #9 = { nounwind }
attributes #10 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{i64 0, i64 4, !10, i64 4, i64 4, !12, i64 8, i64 4, !14, i64 12, i64 80, !16}
!10 = !{!11, !11, i64 0}
!11 = !{!"_ZTS8DataType", !7, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"_ZTS10DataFormat", !7, i64 0}
!14 = !{!15, !15, i64 0}
!15 = !{!"int", !7, i64 0}
!16 = !{!7, !7, i64 0}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,DSEPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,MemCpyOptPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass