; LLVM IR from upupming/algorithm :: AdvancedLevel_C++/1151. LCA in a Binary Tree (30).ll (Z3lcaiiiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::map" = type { %"class.std::_Rb_tree" }
%"class.std::_Rb_tree" = type { %"struct.std::_Rb_tree<int, std::pair<const int, int>, std::_Select1st<std::pair<const int, int>>, std::less<int>>::_Rb_tree_impl" }
%"struct.std::_Rb_tree<int, std::pair<const int, int>, std::_Select1st<std::pair<const int, int>>, std::less<int>>::_Rb_tree_impl" = type { [8 x i8], %"struct.std::_Rb_tree_header" }
%"struct.std::_Rb_tree_header" = type { %"struct.std::_Rb_tree_node_base", i64 }
%"struct.std::_Rb_tree_node_base" = type { i32, ptr, ptr, ptr }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@pos = external dso_local global %"class.std::map", align 8
@in = external dso_local global %"class.std::vector", align 8
@pre = external dso_local global %"class.std::vector", align 8
@.str = external hidden unnamed_addr constant [25 x i8], align 1
@.str.4 = external hidden unnamed_addr constant [26 x i8], align 1

; Function Attrs: mustprogress uwtable
define dso_local void @_Z3lcaiiiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) #0 {
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  store i32 %0, ptr %6, align 4, !tbaa !5
  store i32 %1, ptr %7, align 4, !tbaa !5
  store i32 %2, ptr %8, align 4, !tbaa !5
  store i32 %3, ptr %9, align 4, !tbaa !5
  store i32 %4, ptr %10, align 4, !tbaa !5
  %14 = load i32, ptr %6, align 4, !tbaa !5
  %15 = load i32, ptr %7, align 4, !tbaa !5
  %16 = icmp sgt i32 %14, %15
  br i1 %16, label %17, label %18

17:                                               ; preds = %5
  br label %108

18:                                               ; preds = %5
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #4
  %19 = load i32, ptr %8, align 4, !tbaa !5
  %20 = sext i32 %19 to i64
  %21 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @pre, i64 noundef %20) #4
  %22 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt3mapIiiSt4lessIiESaISt4pairIKiiEEEixERS3_(ptr noundef nonnull align 8 dereferenceable(48) @pos, ptr noundef nonnull align 4 dereferenceable(4) %21)
  %23 = load i32, ptr %22, align 4, !tbaa !5
  store i32 %23, ptr %11, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #4
  %24 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt3mapIiiSt4lessIiESaISt4pairIKiiEEEixERS3_(ptr noundef nonnull align 8 dereferenceable(48) @pos, ptr noundef nonnull align 4 dereferenceable(4) %9)
  %25 = load i32, ptr %24, align 4, !tbaa !5
  store i32 %25, ptr %12, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #4
  %26 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt3mapIiiSt4lessIiESaISt4pairIKiiEEEixERS3_(ptr noundef nonnull align 8 dereferenceable(48) @pos, ptr noundef nonnull align 4 dereferenceable(4) %10)
  %27 = load i32, ptr %26, align 4, !tbaa !5
  store i32 %27, ptr %13, align 4, !tbaa !5
  %28 = load i32, ptr %12, align 4, !tbaa !5
  %29 = load i32, ptr %11, align 4, !tbaa !5
  %30 = icmp slt i32 %28, %29
  br i1 %30, label %31, label %43

31:                                               ; preds = %18
  %32 = load i32, ptr %13, align 4, !tbaa !5
  %33 = load i32, ptr %11, align 4, !tbaa !5
  %34 = icmp slt i32 %32, %33
  br i1 %34, label %35, label %43

35:                                               ; preds = %31
  %36 = load i32, ptr %6, align 4, !tbaa !5
  %37 = load i32, ptr %11, align 4, !tbaa !5
  %38 = sub nsw i32 %37, 1
  %39 = load i32, ptr %8, align 4, !tbaa !5
  %40 = add nsw i32 %39, 1
  %41 = load i32, ptr %9, align 4, !tbaa !5
  %42 = load i32, ptr %10, align 4, !tbaa !5
  call void @_Z3lcaiiiii(i32 noundef %36, i32 noundef %38, i32 noundef %40, i32 noundef %41, i32 noundef %42)
  br label %107

43:                                               ; preds = %31, %18
  %44 = load i32, ptr %12, align 4, !tbaa !5
  %45 = load i32, ptr %11, align 4, !tbaa !5
  %46 = icmp slt i32 %44, %45
  br i1 %46, label %47, label %51

47:                                               ; preds = %43
  %48 = load i32, ptr %13, align 4, !tbaa !5
  %49 = load i32, ptr %11, align 4, !tbaa !5
  %50 = icmp sgt i32 %48, %49
  br i1 %50, label %59, label %51

51:                                               ; preds = %47, %43
  %52 = load i32, ptr %12, align 4, !tbaa !5
  %53 = load i32, ptr %11, align 4, !tbaa !5
  %54 = icmp sgt i32 %52, %53
  br i1 %54, label %55, label %67

55:                                               ; preds = %51
  %56 = load i32, ptr %13, align 4, !tbaa !5
  %57 = load i32, ptr %11, align 4, !tbaa !5
  %58 = icmp slt i32 %56, %57
  br i1 %58, label %59, label %67

59:                                               ; preds = %55, %47
  %60 = load i32, ptr %9, align 4, !tbaa !5
  %61 = load i32, ptr %10, align 4, !tbaa !5
  %62 = load i32, ptr %11, align 4, !tbaa !5
  %63 = sext i32 %62 to i64
  %64 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @in, i64 noundef %63) #4
  %65 = load i32, ptr %64, align 4, !tbaa !5
  %66 = call i32 (ptr, ...) @printf(ptr noundef @.str, i32 noundef %60, i32 noundef %61, i32 noundef %65)
  br label %106

67:                                               ; preds = %55, %51
  %68 = load i32, ptr %12, align 4, !tbaa !5
  %69 = load i32, ptr %11, align 4, !tbaa !5
  %70 = icmp sgt i32 %68, %69
  br i1 %70, label %71, label %87

71:                                               ; preds = %67
  %72 = load i32, ptr %13, align 4, !tbaa !5
  %73 = load i32, ptr %11, align 4, !tbaa !5
  %74 = icmp sgt i32 %72, %73
  br i1 %74, label %75, label %87

75:                                               ; preds = %71
  %76 = load i32, ptr %11, align 4, !tbaa !5
  %77 = add nsw i32 %76, 1
  %78 = load i32, ptr %7, align 4, !tbaa !5
  %79 = load i32, ptr %8, align 4, !tbaa !5
  %80 = add nsw i32 %79, 1
  %81 = load i32, ptr %11, align 4, !tbaa !5
  %82 = load i32, ptr %6, align 4, !tbaa !5
  %83 = sub nsw i32 %81, %82
  %84 = add nsw i32 %80, %83
  %85 = load i32, ptr %9, align 4, !tbaa !5
  %86 = load i32, ptr %10, align 4, !tbaa !5
  call void @_Z3lcaiiiii(i32 noundef %77, i32 noundef %78, i32 noundef %84, i32 noundef %85, i32 noundef %86)
  br label %105

87:                                               ; preds = %71, %67
  %88 = load i32, ptr %12, align 4, !tbaa !5
  %89 = load i32, ptr %11, align 4, !tbaa !5
  %90 = icmp eq i32 %88, %89
  br i1 %90, label %91, label %95

91:                                               ; preds = %87
  %92 = load i32, ptr %9, align 4, !tbaa !5
  %93 = load i32, ptr %10, align 4, !tbaa !5
  %94 = call i32 (ptr, ...) @printf(ptr noundef @.str.4, i32 noundef %92, i32 noundef %93)
  br label %104

95:                                               ; preds = %87
  %96 = load i32, ptr %13, align 4, !tbaa !5
  %97 = load i32, ptr %11, align 4, !tbaa !5
  %98 = icmp eq i32 %96, %97
  br i1 %98, label %99, label %103

99:                                               ; preds = %95
  %100 = load i32, ptr %10, align 4, !tbaa !5
  %101 = load i32, ptr %9, align 4, !tbaa !5
  %102 = call i32 (ptr, ...) @printf(ptr noundef @.str.4, i32 noundef %100, i32 noundef %101)
  br label %103

103:                                              ; preds = %99, %95
  br label %104

104:                                              ; preds = %103, %91
  br label %105

105:                                              ; preds = %104, %75
  br label %106

106:                                              ; preds = %105, %59
  br label %107

107:                                              ; preds = %106, %35
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #4
  br label %108

108:                                              ; preds = %107, %17
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt3mapIiiSt4lessIiESaISt4pairIKiiEEEixERS3_(ptr noundef nonnull align 8 dereferenceable(48), ptr noundef nonnull align 4 dereferenceable(4)) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

declare i32 @printf(ptr noundef, ...) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::map" = type { %"class.std::_Rb_tree" }
%"class.std::_Rb_tree" = type { %"struct.std::_Rb_tree<int, std::pair<const int, int>, std::_Select1st<std::pair<const int, int>>, std::less<int>>::_Rb_tree_impl" }
%"struct.std::_Rb_tree<int, std::pair<const int, int>, std::_Select1st<std::pair<const int, int>>, std::less<int>>::_Rb_tree_impl" = type { [8 x i8], %"struct.std::_Rb_tree_header" }
%"struct.std::_Rb_tree_header" = type { %"struct.std::_Rb_tree_node_base", i64 }
%"struct.std::_Rb_tree_node_base" = type { i32, ptr, ptr, ptr }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@pos = external dso_local global %"class.std::map", align 8
@in = external dso_local global %"class.std::vector", align 8
@pre = external dso_local global %"class.std::vector", align 8
@.str = external hidden unnamed_addr constant [25 x i8], align 1
@.str.4 = external hidden unnamed_addr constant [26 x i8], align 1

; Function Attrs: mustprogress uwtable
define dso_local void @_Z3lcaiiiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) local_unnamed_addr #0 {
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  store i32 %3, ptr %6, align 4, !tbaa !5
  store i32 %4, ptr %7, align 4, !tbaa !5
  %8 = icmp sgt i32 %0, %1
  br i1 %8, label %55, label %9

9:                                                ; preds = %5
  %10 = sext i32 %2 to i64
  %11 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @pre, i64 noundef %10) #3
  %12 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt3mapIiiSt4lessIiESaISt4pairIKiiEEEixERS3_(ptr noundef nonnull align 8 dereferenceable(48) @pos, ptr noundef nonnull align 4 dereferenceable(4) %11)
  %13 = load i32, ptr %12, align 4, !tbaa !5
  %14 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt3mapIiiSt4lessIiESaISt4pairIKiiEEEixERS3_(ptr noundef nonnull align 8 dereferenceable(48) @pos, ptr noundef nonnull align 4 dereferenceable(4) %6)
  %15 = load i32, ptr %14, align 4, !tbaa !5
  %16 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt3mapIiiSt4lessIiESaISt4pairIKiiEEEixERS3_(ptr noundef nonnull align 8 dereferenceable(48) @pos, ptr noundef nonnull align 4 dereferenceable(4) %7)
  %17 = load i32, ptr %16, align 4, !tbaa !5
  %18 = icmp slt i32 %15, %13
  %19 = icmp slt i32 %17, %13
  %or.cond = select i1 %18, i1 %19, i1 false
  br i1 %or.cond, label %20, label %25

20:                                               ; preds = %9
  %21 = add nsw i32 %13, -1
  %22 = add nsw i32 %2, 1
  %23 = load i32, ptr %6, align 4, !tbaa !5
  %24 = load i32, ptr %7, align 4, !tbaa !5
  call void @_Z3lcaiiiii(i32 noundef %0, i32 noundef %21, i32 noundef %22, i32 noundef %23, i32 noundef %24)
  br label %55

25:                                               ; preds = %9
  %26 = icmp sgt i32 %17, %13
  %or.cond34 = select i1 %18, i1 %26, i1 false
  br i1 %or.cond34, label %29, label %27

27:                                               ; preds = %25
  %28 = icmp sgt i32 %15, %13
  %or.cond35 = select i1 %28, i1 %19, i1 false
  br i1 %or.cond35, label %29, label %36

29:                                               ; preds = %27, %25
  %30 = load i32, ptr %6, align 4, !tbaa !5
  %31 = load i32, ptr %7, align 4, !tbaa !5
  %32 = sext i32 %13 to i64
  %33 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @in, i64 noundef %32) #3
  %34 = load i32, ptr %33, align 4, !tbaa !5
  %35 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str, i32 noundef %30, i32 noundef %31, i32 noundef %34)
  br label %55

36:                                               ; preds = %27
  %or.cond36 = select i1 %28, i1 %26, i1 false
  br i1 %or.cond36, label %37, label %43

37:                                               ; preds = %36
  %38 = add nsw i32 %13, 1
  %reass.sub = sub i32 %2, %0
  %39 = add i32 %reass.sub, 1
  %40 = add i32 %39, %13
  %41 = load i32, ptr %6, align 4, !tbaa !5
  %42 = load i32, ptr %7, align 4, !tbaa !5
  call void @_Z3lcaiiiii(i32 noundef %38, i32 noundef %1, i32 noundef %40, i32 noundef %41, i32 noundef %42)
  br label %55

43:                                               ; preds = %36
  %44 = icmp eq i32 %15, %13
  br i1 %44, label %45, label %49

45:                                               ; preds = %43
  %46 = load i32, ptr %6, align 4, !tbaa !5
  %47 = load i32, ptr %7, align 4, !tbaa !5
  %48 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.4, i32 noundef %46, i32 noundef %47)
  br label %55

49:                                               ; preds = %43
  %50 = icmp eq i32 %17, %13
  br i1 %50, label %51, label %55

51:                                               ; preds = %49
  %52 = load i32, ptr %7, align 4, !tbaa !5
  %53 = load i32, ptr %6, align 4, !tbaa !5
  %54 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.4, i32 noundef %52, i32 noundef %53)
  br label %55

55:                                               ; preds = %20, %37, %49, %51, %45, %29, %5
  ret void
}

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt3mapIiiSt4lessIiESaISt4pairIKiiEEEixERS3_(ptr noundef nonnull align 8 dereferenceable(48), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass