; LLVM IR from quantumlib/qsim :: apps (qsim_von_neumann)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.Options = type <{ %"class.std::__cxx11::basic_string", i32, i32, i32, i32, i32, i8, [3 x i8] }>
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"struct.qsim::Circuit" = type { i32, %"class.std::vector" }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<qsim::Gate<float, qsim::GateKind>, std::allocator<qsim::Gate<float, qsim::GateKind>>>::_Vector_impl" }
%"struct.std::_Vector_base<qsim::Gate<float, qsim::GateKind>, std::allocator<qsim::Gate<float, qsim::GateKind>>>::_Vector_impl" = type { %"struct.std::_Vector_base<qsim::Gate<float, qsim::GateKind>, std::allocator<qsim::Gate<float, qsim::GateKind>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<qsim::Gate<float, qsim::GateKind>, std::allocator<qsim::Gate<float, qsim::GateKind>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%class.anon = type { ptr, ptr }
%"struct.qsim::QSimRunner<qsim::IO, qsim::MultiQubitGateFuser<qsim::IO, qsim::Gate<float, qsim::GateKind>>, Factory>::Parameter" = type { %"struct.qsim::MultiQubitGateFuser<qsim::IO, qsim::Gate<float, qsim::GateKind>>::Parameter", i64 }
%"struct.qsim::MultiQubitGateFuser<qsim::IO, qsim::Gate<float, qsim::GateKind>>::Parameter" = type { i32, i32 }
%struct.Factory = type { i32 }

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z10GetOptionsiPPc(ptr dead_on_unwind noalias writable sret(%struct.Options) align 8, i32 noundef, ptr noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare i32 @__gxx_personality_v0(...)

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN7OptionsD2Ev(ptr noundef nonnull align 8 dereferenceable(53)) unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_Z15ValidateOptionsRK7Options(ptr noundef nonnull align 8 dereferenceable(53)) #0

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main(i32 noundef %0, ptr noundef %1) #3 personality ptr @__gxx_personality_v0 {
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca ptr, align 8
  %6 = alloca %struct.Options, align 8
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca %"struct.qsim::Circuit", align 8
  %11 = alloca %class.anon, align 8
  %12 = alloca %"struct.qsim::QSimRunner<qsim::IO, qsim::MultiQubitGateFuser<qsim::IO, qsim::Gate<float, qsim::GateKind>>, Factory>::Parameter", align 8
  %13 = alloca %struct.Factory, align 4
  %14 = alloca %class.anon, align 8
  store i32 0, ptr %3, align 4
  store i32 %0, ptr %4, align 4, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 56, ptr %6) #6
  %15 = load i32, ptr %4, align 4, !tbaa !5
  %16 = load ptr, ptr %5, align 8, !tbaa !9
  call void @_Z10GetOptionsiPPc(ptr dead_on_unwind writable sret(%struct.Options) align 8 %6, i32 noundef %15, ptr noundef %16)
  %17 = invoke noundef zeroext i1 @_Z15ValidateOptionsRK7Options(ptr noundef nonnull align 8 dereferenceable(53) %6)
          to label %18 unwind label %20

18:                                               ; preds = %2
  br i1 %17, label %24, label %19

19:                                               ; preds = %18
  store i32 1, ptr %3, align 4
  store i32 1, ptr %9, align 4
  br label %69

20:                                               ; preds = %2
  %21 = landingpad { ptr, i32 }
          cleanup
  %22 = extractvalue { ptr, i32 } %21, 0
  store ptr %22, ptr %7, align 8
  %23 = extractvalue { ptr, i32 } %21, 1
  store i32 %23, ptr %8, align 4
  br label %71

24:                                               ; preds = %18
  call void @llvm.lifetime.start.p0(i64 32, ptr %10) #6
  call void @_ZN4qsim7CircuitINS_4GateIfNS_8GateKindEEEEC2Ev(ptr noundef nonnull align 8 dereferenceable(32) %10) #6
  %25 = getelementptr inbounds %struct.Options, ptr %6, i32 0, i32 1
  %26 = load i32, ptr %25, align 8, !tbaa !11
  %27 = getelementptr inbounds %struct.Options, ptr %6, i32 0, i32 0
  %28 = invoke noundef zeroext i1 @_ZN4qsim17CircuitQsimParserINS_6IOFileEE8FromFileIfEEbjRKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEERNS_7CircuitINS_4GateIT_NS_8GateKindEEEEE(i32 noundef %26, ptr noundef nonnull align 8 dereferenceable(32) %27, ptr noundef nonnull align 8 dereferenceable(32) %10)
          to label %29 unwind label %31

29:                                               ; preds = %24
  br i1 %28, label %35, label %30

30:                                               ; preds = %29
  store i32 1, ptr %3, align 4
  store i32 1, ptr %9, align 4
  br label %67

31:                                               ; preds = %39, %24
  %32 = landingpad { ptr, i32 }
          cleanup
  %33 = extractvalue { ptr, i32 } %32, 0
  store ptr %33, ptr %7, align 8
  %34 = extractvalue { ptr, i32 } %32, 1
  store i32 %34, ptr %8, align 4
  br label %68

35:                                               ; preds = %29
  %36 = getelementptr inbounds %struct.Options, ptr %6, i32 0, i32 6
  %37 = load i8, ptr %36, align 4, !tbaa !17, !range !18, !noundef !19
  %38 = trunc i8 %37 to i1
  br i1 %38, label %39, label %41

39:                                               ; preds = %35
  invoke void @_ZN4qsim34SetFlushToZeroAndDenormalsAreZerosEv()
          to label %40 unwind label %31

40:                                               ; preds = %39
  br label %41

41:                                               ; preds = %40, %35
  call void @llvm.lifetime.start.p0(i64 16, ptr %11) #6
  %42 = getelementptr inbounds %class.anon, ptr %11, i32 0, i32 0
  store ptr %6, ptr %42, align 8, !tbaa !9
  %43 = getelementptr inbounds %class.anon, ptr %11, i32 0, i32 1
  store ptr %10, ptr %43, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 16, ptr %12) #6
  call void @_ZN4qsim10QSimRunnerINS_2IOENS_19MultiQubitGateFuserIS1_NS_4GateIfNS_8GateKindEEEEEZ4mainE7FactorySt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEE9ParameterC2Ev(ptr noundef nonnull align 8 dereferenceable(16) %12) #6
  %44 = getelementptr inbounds %struct.Options, ptr %6, i32 0, i32 4
  %45 = load i32, ptr %44, align 4, !tbaa !20
  %46 = getelementptr inbounds %"struct.qsim::MultiQubitGateFuser<qsim::IO, qsim::Gate<float, qsim::GateKind>>::Parameter", ptr %12, i32 0, i32 0
  store i32 %45, ptr %46, align 8, !tbaa !21
  %47 = getelementptr inbounds %struct.Options, ptr %6, i32 0, i32 2
  %48 = load i32, ptr %47, align 4, !tbaa !23
  %49 = zext i32 %48 to i64
  %50 = getelementptr inbounds %"struct.qsim::QSimRunner<qsim::IO, qsim::MultiQubitGateFuser<qsim::IO, qsim::Gate<float, qsim::GateKind>>, Factory>::Parameter", ptr %12, i32 0, i32 1
  store i64 %49, ptr %50, align 8, !tbaa !24
  %51 = getelementptr inbounds %struct.Options, ptr %6, i32 0, i32 5
  %52 = load i32, ptr %51, align 8, !tbaa !26
  %53 = getelementptr inbounds %"struct.qsim::MultiQubitGateFuser<qsim::IO, qsim::Gate<float, qsim::GateKind>>::Parameter", ptr %12, i32 0, i32 1
  store i32 %52, ptr %53, align 4, !tbaa !27
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #6
  %54 = getelementptr inbounds %struct.Options, ptr %6, i32 0, i32 3
  %55 = load i32, ptr %54, align 8, !tbaa !28
  invoke void @_ZZ4mainEN7FactoryC2Ej(ptr noundef nonnull align 4 dereferenceable(4) %13, i32 noundef %55)
          to label %56 unwind label %63

56:                                               ; preds = %41
  call void @llvm.memcpy.p0.p0.i64(ptr align 8 %14, ptr align 8 %11, i64 16, i1 false), !tbaa.struct !29
  %57 = getelementptr inbounds { ptr, ptr }, ptr %14, i32 0, i32 0
  %58 = load ptr, ptr %57, align 8
  %59 = getelementptr inbounds { ptr, ptr }, ptr %14, i32 0, i32 1
  %60 = load ptr, ptr %59, align 8
  %61 = invoke noundef zeroext i1 @"_ZN4qsim10QSimRunnerINS_2IOENS_19MultiQubitGateFuserIS1_NS_4GateIfNS_8GateKindEEEEEZ4mainE7FactorySt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEE3RunINS_7CircuitIS5_EEZ4mainE3$_0EEbRKNSA_9ParameterERKS7_RKT_T0_"(ptr noundef nonnull align 8 dereferenceable(16) %12, ptr noundef nonnull align 4 dereferenceable(4) %13, ptr noundef nonnull align 8 dereferenceable(32) %10, ptr %58, ptr %60)
          to label %62 unwind label %63

62:                                               ; preds = %56
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #6
  store i32 0, ptr %3, align 4
  store i32 1, ptr %9, align 4
  call void @llvm.lifetime.end.p0(i64 16, ptr %12) #6
  call void @llvm.lifetime.end.p0(i64 16, ptr %11) #6
  br label %67

63:                                               ; preds = %56, %41
  %64 = landingpad { ptr, i32 }
          cleanup
  %65 = extractvalue { ptr, i32 } %64, 0
  store ptr %65, ptr %7, align 8
  %66 = extractvalue { ptr, i32 } %64, 1
  store i32 %66, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #6
  call void @llvm.lifetime.end.p0(i64 16, ptr %12) #6
  call void @llvm.lifetime.end.p0(i64 16, ptr %11) #6
  br label %68

67:                                               ; preds = %62, %30
  call void @_ZN4qsim7CircuitINS_4GateIfNS_8GateKindEEEED2Ev(ptr noundef nonnull align 8 dereferenceable(32) %10) #6
  call void @llvm.lifetime.end.p0(i64 32, ptr %10) #6
  br label %69

68:                                               ; preds = %63, %31
  call void @_ZN4qsim7CircuitINS_4GateIfNS_8GateKindEEEED2Ev(ptr noundef nonnull align 8 dereferenceable(32) %10) #6
  call void @llvm.lifetime.end.p0(i64 32, ptr %10) #6
  br label %71

69:                                               ; preds = %67, %19
  call void @_ZN7OptionsD2Ev(ptr noundef nonnull align 8 dereferenceable(53) %6) #6
  call void @llvm.lifetime.end.p0(i64 56, ptr %6) #6
  %70 = load i32, ptr %3, align 4
  ret i32 %70

71:                                               ; preds = %68, %20
  call void @_ZN7OptionsD2Ev(ptr noundef nonnull align 8 dereferenceable(53) %6) #6
  call void @llvm.lifetime.end.p0(i64 56, ptr %6) #6
  br label %72

72:                                               ; preds = %71
  %73 = load ptr, ptr %7, align 8
  %74 = load i32, ptr %8, align 4
  %75 = insertvalue { ptr, i32 } poison, ptr %73, 0
  %76 = insertvalue { ptr, i32 } %75, i32 %74, 1
  resume { ptr, i32 } %76
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN4qsim7CircuitINS_4GateIfNS_8GateKindEEEEC2Ev(ptr noundef nonnull align 8 dereferenceable(32)) unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZN4qsim17CircuitQsimParserINS_6IOFileEE8FromFileIfEEbjRKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEERNS_7CircuitINS_4GateIT_NS_8GateKindEEEEE(i32 noundef, ptr noundef nonnull align 8 dereferenceable(32), ptr noundef nonnull align 8 dereferenceable(32)) #0 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN4qsim34SetFlushToZeroAndDenormalsAreZerosEv() #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden void @_ZN4qsim10QSimRunnerINS_2IOENS_19MultiQubitGateFuserIS1_NS_4GateIfNS_8GateKindEEEEEZ4mainE7FactorySt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEE9ParameterC2Ev(ptr noundef nonnull align 8 dereferenceable(16)) unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare hidden noundef zeroext i1 @"_ZN4qsim10QSimRunnerINS_2IOENS_19MultiQubitGateFuserIS1_NS_4GateIfNS_8GateKindEEEEEZ4mainE7FactorySt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEE3RunINS_7CircuitIS5_EEZ4mainE3$_0EEbRKNSA_9ParameterERKS7_RKT_T0_"(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 8 dereferenceable(32), ptr, ptr) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare hidden void @_ZZ4mainEN7FactoryC2Ej(ptr noundef nonnull align 4 dereferenceable(4), i32 noundef) unnamed_addr #4 align 2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #5

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN4qsim7CircuitINS_4GateIfNS_8GateKindEEEED2Ev(ptr noundef nonnull align 8 dereferenceable(32)) unnamed_addr #2 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !6, i64 32}
!12 = !{!"_ZTS7Options", !13, i64 0, !6, i64 32, !6, i64 36, !6, i64 40, !6, i64 44, !6, i64 48, !16, i64 52}
!13 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !14, i64 0, !15, i64 8, !7, i64 16}
!14 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !10, i64 0}
!15 = !{!"long", !7, i64 0}
!16 = !{!"bool", !7, i64 0}
!17 = !{!12, !16, i64 52}
!18 = !{i8 0, i8 2}
!19 = !{}
!20 = !{!12, !6, i64 44}
!21 = !{!22, !6, i64 0}
!22 = !{!"_ZTSN4qsim19MultiQubitGateFuserINS_2IOENS_4GateIfNS_8GateKindEEEE9ParameterE", !6, i64 0, !6, i64 4}
!23 = !{!12, !6, i64 36}
!24 = !{!25, !15, i64 8}
!25 = !{!"_ZTSN4qsim10QSimRunnerINS_2IOENS_19MultiQubitGateFuserIS1_NS_4GateIfNS_8GateKindEEEEEZ4mainE7FactorySt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEE9ParameterE", !22, i64 0, !15, i64 8}
!26 = !{!12, !6, i64 48}
!27 = !{!22, !6, i64 4}
!28 = !{!12, !6, i64 40}
!29 = !{i64 0, i64 8, !9, i64 8, i64 8, !9}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.Options = type <{ %"class.std::__cxx11::basic_string", i32, i32, i32, i32, i32, i8, [3 x i8] }>
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"struct.qsim::Circuit" = type { i32, %"class.std::vector" }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<qsim::Gate<float, qsim::GateKind>, std::allocator<qsim::Gate<float, qsim::GateKind>>>::_Vector_impl" }
%"struct.std::_Vector_base<qsim::Gate<float, qsim::GateKind>, std::allocator<qsim::Gate<float, qsim::GateKind>>>::_Vector_impl" = type { %"struct.std::_Vector_base<qsim::Gate<float, qsim::GateKind>, std::allocator<qsim::Gate<float, qsim::GateKind>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<qsim::Gate<float, qsim::GateKind>, std::allocator<qsim::Gate<float, qsim::GateKind>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"struct.qsim::QSimRunner<qsim::IO, qsim::MultiQubitGateFuser<qsim::IO, qsim::Gate<float, qsim::GateKind>>, Factory>::Parameter" = type { %"struct.qsim::MultiQubitGateFuser<qsim::IO, qsim::Gate<float, qsim::GateKind>>::Parameter", i64 }
%"struct.qsim::MultiQubitGateFuser<qsim::IO, qsim::Gate<float, qsim::GateKind>>::Parameter" = type { i32, i32 }
%struct.Factory = type { i32 }

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z10GetOptionsiPPc(ptr dead_on_unwind noalias writable sret(%struct.Options) align 8, i32 noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN7OptionsD2Ev(ptr noundef nonnull align 8 dereferenceable(53)) unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_Z15ValidateOptionsRK7Options(ptr noundef nonnull align 8 dereferenceable(53)) local_unnamed_addr #0

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef range(i32 0, 2) i32 @main(i32 noundef %0, ptr noundef %1) local_unnamed_addr #3 personality ptr @__gxx_personality_v0 {
  %3 = alloca %struct.Options, align 8
  %4 = alloca %"struct.qsim::Circuit", align 8
  %5 = alloca %"struct.qsim::QSimRunner<qsim::IO, qsim::MultiQubitGateFuser<qsim::IO, qsim::Gate<float, qsim::GateKind>>, Factory>::Parameter", align 8
  %6 = alloca %struct.Factory, align 4
  call void @llvm.lifetime.start.p0(i64 56, ptr nonnull %3) #5
  call void @_Z10GetOptionsiPPc(ptr dead_on_unwind nonnull writable sret(%struct.Options) align 8 %3, i32 noundef %0, ptr noundef %1)
  %7 = invoke noundef zeroext i1 @_Z15ValidateOptionsRK7Options(ptr noundef nonnull align 8 dereferenceable(53) %3)
          to label %8 unwind label %9

8:                                                ; preds = %2
  br i1 %7, label %11, label %38

9:                                                ; preds = %2
  %10 = landingpad { ptr, i32 }
          cleanup
  br label %39

11:                                               ; preds = %8
  call void @llvm.lifetime.start.p0(i64 32, ptr nonnull %4) #5
  call void @_ZN4qsim7CircuitINS_4GateIfNS_8GateKindEEEEC2Ev(ptr noundef nonnull align 8 dereferenceable(32) %4) #5
  %12 = getelementptr inbounds i8, ptr %3, i64 32
  %13 = load i32, ptr %12, align 8, !tbaa !5
  %14 = invoke noundef zeroext i1 @_ZN4qsim17CircuitQsimParserINS_6IOFileEE8FromFileIfEEbjRKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEERNS_7CircuitINS_4GateIT_NS_8GateKindEEEEE(i32 noundef %13, ptr noundef nonnull align 8 dereferenceable(32) %3, ptr noundef nonnull align 8 dereferenceable(32) %4)
          to label %15 unwind label %16

15:                                               ; preds = %11
  br i1 %14, label %18, label %36

16:                                               ; preds = %11
  %17 = landingpad { ptr, i32 }
          cleanup
  br label %37

18:                                               ; preds = %15
  %19 = getelementptr inbounds i8, ptr %3, i64 52
  %20 = load i8, ptr %19, align 4, !tbaa !15, !range !16, !noundef !17
  %21 = trunc nuw i8 %20 to i1
  br i1 %21, label %22, label %23

22:                                               ; preds = %18
  call void @_ZN4qsim34SetFlushToZeroAndDenormalsAreZerosEv()
  br label %23

23:                                               ; preds = %22, %18
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %5) #5
  call void @_ZN4qsim10QSimRunnerINS_2IOENS_19MultiQubitGateFuserIS1_NS_4GateIfNS_8GateKindEEEEEZ4mainE7FactorySt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEE9ParameterC2Ev(ptr noundef nonnull align 8 dereferenceable(16) %5) #5
  %24 = getelementptr inbounds i8, ptr %3, i64 44
  %25 = getelementptr inbounds i8, ptr %3, i64 36
  %26 = load i32, ptr %25, align 4, !tbaa !18
  %27 = zext i32 %26 to i64
  %28 = getelementptr inbounds i8, ptr %5, i64 8
  store i64 %27, ptr %28, align 8, !tbaa !19
  %29 = load <2 x i32>, ptr %24, align 4, !tbaa !22
  store <2 x i32> %29, ptr %5, align 8, !tbaa !22
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %6) #5
  %30 = getelementptr inbounds i8, ptr %3, i64 40
  %31 = load i32, ptr %30, align 8, !tbaa !23
  call void @_ZZ4mainEN7FactoryC2Ej(ptr noundef nonnull align 4 dereferenceable(4) %6, i32 noundef %31)
  %32 = invoke noundef zeroext i1 @"_ZN4qsim10QSimRunnerINS_2IOENS_19MultiQubitGateFuserIS1_NS_4GateIfNS_8GateKindEEEEEZ4mainE7FactorySt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEE3RunINS_7CircuitIS5_EEZ4mainE3$_0EEbRKNSA_9ParameterERKS7_RKT_T0_"(ptr noundef nonnull align 8 dereferenceable(16) %5, ptr noundef nonnull align 4 dereferenceable(4) %6, ptr noundef nonnull align 8 dereferenceable(32) %4, ptr nonnull %3, ptr nonnull %4)
          to label %33 unwind label %34

33:                                               ; preds = %23
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #5
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %5) #5
  br label %36

34:                                               ; preds = %23
  %35 = landingpad { ptr, i32 }
          cleanup
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #5
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %5) #5
  br label %37

36:                                               ; preds = %15, %33
  %.0 = phi i32 [ 0, %33 ], [ 1, %15 ]
  call void @_ZN4qsim7CircuitINS_4GateIfNS_8GateKindEEEED2Ev(ptr noundef nonnull align 8 dereferenceable(32) %4) #5
  call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %4) #5
  br label %38

37:                                               ; preds = %34, %16
  %.pn = phi { ptr, i32 } [ %35, %34 ], [ %17, %16 ]
  call void @_ZN4qsim7CircuitINS_4GateIfNS_8GateKindEEEED2Ev(ptr noundef nonnull align 8 dereferenceable(32) %4) #5
  call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %4) #5
  br label %39

38:                                               ; preds = %8, %36
  %.1 = phi i32 [ %.0, %36 ], [ 1, %8 ]
  call void @_ZN7OptionsD2Ev(ptr noundef nonnull align 8 dereferenceable(53) %3) #5
  call void @llvm.lifetime.end.p0(i64 56, ptr nonnull %3) #5
  ret i32 %.1

39:                                               ; preds = %37, %9
  %.pn.pn = phi { ptr, i32 } [ %.pn, %37 ], [ %10, %9 ]
  call void @_ZN7OptionsD2Ev(ptr noundef nonnull align 8 dereferenceable(53) %3) #5
  call void @llvm.lifetime.end.p0(i64 56, ptr nonnull %3) #5
  resume { ptr, i32 } %.pn.pn
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN4qsim7CircuitINS_4GateIfNS_8GateKindEEEEC2Ev(ptr noundef nonnull align 8 dereferenceable(32)) unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZN4qsim17CircuitQsimParserINS_6IOFileEE8FromFileIfEEbjRKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEERNS_7CircuitINS_4GateIT_NS_8GateKindEEEEE(i32 noundef, ptr noundef nonnull align 8 dereferenceable(32), ptr noundef nonnull align 8 dereferenceable(32)) local_unnamed_addr #0 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN4qsim34SetFlushToZeroAndDenormalsAreZerosEv() local_unnamed_addr #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden void @_ZN4qsim10QSimRunnerINS_2IOENS_19MultiQubitGateFuserIS1_NS_4GateIfNS_8GateKindEEEEEZ4mainE7FactorySt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEE9ParameterC2Ev(ptr noundef nonnull align 8 dereferenceable(16)) unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare hidden noundef zeroext i1 @"_ZN4qsim10QSimRunnerINS_2IOENS_19MultiQubitGateFuserIS1_NS_4GateIfNS_8GateKindEEEEEZ4mainE7FactorySt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEE3RunINS_7CircuitIS5_EEZ4mainE3$_0EEbRKNSA_9ParameterERKS7_RKT_T0_"(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 8 dereferenceable(32), ptr, ptr) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare hidden void @_ZZ4mainEN7FactoryC2Ej(ptr noundef nonnull align 4 dereferenceable(4), i32 noundef) unnamed_addr #4 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN4qsim7CircuitINS_4GateIfNS_8GateKindEEEED2Ev(ptr noundef nonnull align 8 dereferenceable(32)) unnamed_addr #2 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !13, i64 32}
!6 = !{!"_ZTS7Options", !7, i64 0, !13, i64 32, !13, i64 36, !13, i64 40, !13, i64 44, !13, i64 48, !14, i64 52}
!7 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !8, i64 0, !12, i64 8, !10, i64 16}
!8 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !9, i64 0}
!9 = !{!"any pointer", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C++ TBAA"}
!12 = !{!"long", !10, i64 0}
!13 = !{!"int", !10, i64 0}
!14 = !{!"bool", !10, i64 0}
!15 = !{!6, !14, i64 52}
!16 = !{i8 0, i8 2}
!17 = !{}
!18 = !{!6, !13, i64 36}
!19 = !{!20, !12, i64 8}
!20 = !{!"_ZTSN4qsim10QSimRunnerINS_2IOENS_19MultiQubitGateFuserIS1_NS_4GateIfNS_8GateKindEEEEEZ4mainE7FactorySt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEE9ParameterE", !21, i64 0, !12, i64 8}
!21 = !{!"_ZTSN4qsim19MultiQubitGateFuserINS_2IOENS_4GateIfNS_8GateKindEEEE9ParameterE", !13, i64 0, !13, i64 4}
!22 = !{!13, !13, i64 0}
!23 = !{!6, !13, i64 40}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SLPVectorizerPass,SROAPass,SimplifyCFGPass