; LLVM IR from t-dillon/tdoku :: src/util.ll (ZN4Util12BlockShuffleEPSt5arrayIiLm9EE)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.std::array" = type { [3 x i32] }
%class.Util = type { %"class.std::random_device", %"class.std::mersenne_twister_engine.0", %"class.std::uniform_int_distribution", %"class.std::uniform_real_distribution" }
%"class.std::random_device" = type { %union.anon }
%union.anon = type { %"class.std::mersenne_twister_engine" }
%"class.std::mersenne_twister_engine" = type { [624 x i64], i64 }
%"class.std::mersenne_twister_engine.0" = type { [312 x i64], i64 }
%"class.std::uniform_int_distribution" = type { %"struct.std::uniform_int_distribution<unsigned int>::param_type" }
%"struct.std::uniform_int_distribution<unsigned int>::param_type" = type { i32, i32 }
%"class.std::uniform_real_distribution" = type { %"struct.std::uniform_real_distribution<>::param_type" }
%"struct.std::uniform_real_distribution<>::param_type" = type { double, double }

@__const._ZN4Util12BlockShuffleEPSt5arrayIiLm9EE.blocks = external hidden unnamed_addr constant %"struct.std::array", align 4
@__const._ZN4Util12BlockShuffleEPSt5arrayIiLm9EE.block = external hidden unnamed_addr constant %"struct.std::array", align 4

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Util12BlockShuffleEPSt5arrayIiLm9EE(ptr noundef nonnull align 8 dereferenceable(7528) %0, ptr noundef %1) #1 align 2 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca %"struct.std::array", align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca %"struct.std::array", align 4
  %9 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  %10 = load ptr, ptr %3, align 8
  call void @llvm.lifetime.start.p0(i64 12, ptr %5) #5
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %5, ptr align 4 @__const._ZN4Util12BlockShuffleEPSt5arrayIiLm9EE.blocks, i64 12, i1 false)
  %11 = call noundef ptr @_ZNSt5arrayIiLm3EE5beginEv(ptr noundef nonnull align 4 dereferenceable(12) %5) #6
  %12 = call noundef ptr @_ZNSt5arrayIiLm3EE3endEv(ptr noundef nonnull align 4 dereferenceable(12) %5) #6
  %13 = getelementptr inbounds %class.Util, ptr %10, i32 0, i32 1
  call void @_ZSt7shuffleIPiRSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEEvT_S4_OT0_(ptr noundef %11, ptr noundef %12, ptr noundef nonnull align 8 dereferenceable(2504) %13)
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #5
  store i32 0, ptr %6, align 4, !tbaa !9
  br label %14

14:                                               ; preds = %48, %2
  %15 = load i32, ptr %6, align 4, !tbaa !9
  %16 = icmp slt i32 %15, 3
  br i1 %16, label %18, label %17

17:                                               ; preds = %14
  store i32 2, ptr %7, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #5
  br label %51

18:                                               ; preds = %14
  call void @llvm.lifetime.start.p0(i64 12, ptr %8) #5
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %8, ptr align 4 @__const._ZN4Util12BlockShuffleEPSt5arrayIiLm9EE.block, i64 12, i1 false)
  %19 = call noundef ptr @_ZNSt5arrayIiLm3EE5beginEv(ptr noundef nonnull align 4 dereferenceable(12) %8) #6
  %20 = call noundef ptr @_ZNSt5arrayIiLm3EE3endEv(ptr noundef nonnull align 4 dereferenceable(12) %8) #6
  %21 = getelementptr inbounds %class.Util, ptr %10, i32 0, i32 1
  call void @_ZSt7shuffleIPiRSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEEvT_S4_OT0_(ptr noundef %19, ptr noundef %20, ptr noundef nonnull align 8 dereferenceable(2504) %21)
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #5
  store i32 0, ptr %9, align 4, !tbaa !9
  br label %22

22:                                               ; preds = %44, %18
  %23 = load i32, ptr %9, align 4, !tbaa !9
  %24 = icmp slt i32 %23, 3
  br i1 %24, label %26, label %25

25:                                               ; preds = %22
  store i32 5, ptr %7, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #5
  br label %47

26:                                               ; preds = %22
  %27 = load i32, ptr %6, align 4, !tbaa !9
  %28 = sext i32 %27 to i64
  %29 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt5arrayIiLm3EEixEm(ptr noundef nonnull align 4 dereferenceable(12) %5, i64 noundef %28) #5
  %30 = load i32, ptr %29, align 4, !tbaa !9
  %31 = mul nsw i32 %30, 3
  %32 = load i32, ptr %9, align 4, !tbaa !9
  %33 = sext i32 %32 to i64
  %34 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt5arrayIiLm3EEixEm(ptr noundef nonnull align 4 dereferenceable(12) %8, i64 noundef %33) #5
  %35 = load i32, ptr %34, align 4, !tbaa !9
  %36 = add nsw i32 %31, %35
  %37 = load ptr, ptr %4, align 8, !tbaa !5
  %38 = load i32, ptr %6, align 4, !tbaa !9
  %39 = mul nsw i32 %38, 3
  %40 = load i32, ptr %9, align 4, !tbaa !9
  %41 = add nsw i32 %39, %40
  %42 = sext i32 %41 to i64
  %43 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt5arrayIiLm9EEixEm(ptr noundef nonnull align 4 dereferenceable(36) %37, i64 noundef %42) #5
  store i32 %36, ptr %43, align 4, !tbaa !9
  br label %44

44:                                               ; preds = %26
  %45 = load i32, ptr %9, align 4, !tbaa !9
  %46 = add nsw i32 %45, 1
  store i32 %46, ptr %9, align 4, !tbaa !9
  br label %22, !llvm.loop !11

47:                                               ; preds = %25
  call void @llvm.lifetime.end.p0(i64 12, ptr %8) #5
  br label %48

48:                                               ; preds = %47
  %49 = load i32, ptr %6, align 4, !tbaa !9
  %50 = add nsw i32 %49, 1
  store i32 %50, ptr %6, align 4, !tbaa !9
  br label %14, !llvm.loop !13

51:                                               ; preds = %17
  call void @llvm.lifetime.end.p0(i64 12, ptr %5) #5
  ret void
}

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZSt7shuffleIPiRSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEEvT_S4_OT0_(ptr noundef, ptr noundef, ptr noundef nonnull align 8 dereferenceable(2504)) #1

; Function Attrs: mustprogress nounwind willreturn memory(none) uwtable
declare dso_local noundef ptr @_ZNSt5arrayIiLm3EE5beginEv(ptr noundef nonnull align 4 dereferenceable(12)) #3 align 2

; Function Attrs: mustprogress nounwind willreturn memory(none) uwtable
declare dso_local noundef ptr @_ZNSt5arrayIiLm3EE3endEv(ptr noundef nonnull align 4 dereferenceable(12)) #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt5arrayIiLm3EEixEm(ptr noundef nonnull align 4 dereferenceable(12), i64 noundef) #4 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt5arrayIiLm9EEixEm(ptr noundef nonnull align 4 dereferenceable(36), i64 noundef) #4 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { mustprogress nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }
attributes #6 = { nounwind willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.std::array" = type { [3 x i32] }

@__const._ZN4Util12BlockShuffleEPSt5arrayIiLm9EE.blocks = external hidden unnamed_addr constant %"struct.std::array", align 4
@__const._ZN4Util12BlockShuffleEPSt5arrayIiLm9EE.block = external hidden unnamed_addr constant %"struct.std::array", align 4

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Util12BlockShuffleEPSt5arrayIiLm9EE(ptr noundef nonnull align 8 dereferenceable(7528) %0, ptr noundef %1) local_unnamed_addr #1 align 2 {
  %3 = alloca %"struct.std::array", align 4
  %4 = alloca %"struct.std::array", align 4
  call void @llvm.lifetime.start.p0(i64 12, ptr nonnull %3) #5
  call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 4 dereferenceable(12) %3, ptr noundef nonnull align 4 dereferenceable(12) @__const._ZN4Util12BlockShuffleEPSt5arrayIiLm9EE.blocks, i64 12, i1 false)
  %5 = call noundef ptr @_ZNSt5arrayIiLm3EE5beginEv(ptr noundef nonnull align 4 dereferenceable(12) %3) #6
  %6 = call noundef ptr @_ZNSt5arrayIiLm3EE3endEv(ptr noundef nonnull align 4 dereferenceable(12) %3) #6
  %7 = getelementptr inbounds i8, ptr %0, i64 5000
  call void @_ZSt7shuffleIPiRSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEEvT_S4_OT0_(ptr noundef %5, ptr noundef %6, ptr noundef nonnull align 8 dereferenceable(2504) %7)
  %8 = call noundef ptr @_ZNSt5arrayIiLm3EE5beginEv(ptr noundef nonnull align 4 dereferenceable(12) %4) #6
  %9 = call noundef ptr @_ZNSt5arrayIiLm3EE3endEv(ptr noundef nonnull align 4 dereferenceable(12) %4) #6
  call void @llvm.lifetime.start.p0(i64 12, ptr nonnull %4) #5
  call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 4 dereferenceable(12) %4, ptr noundef nonnull align 4 dereferenceable(12) @__const._ZN4Util12BlockShuffleEPSt5arrayIiLm9EE.block, i64 12, i1 false)
  call void @_ZSt7shuffleIPiRSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEEvT_S4_OT0_(ptr noundef %8, ptr noundef %9, ptr noundef nonnull align 8 dereferenceable(2504) %7)
  %10 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt5arrayIiLm3EEixEm(ptr noundef nonnull align 4 dereferenceable(12) %3, i64 noundef 0) #5
  %11 = load i32, ptr %10, align 4, !tbaa !5
  %12 = mul nsw i32 %11, 3
  %13 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt5arrayIiLm3EEixEm(ptr noundef nonnull align 4 dereferenceable(12) %4, i64 noundef 0) #5
  %14 = load i32, ptr %13, align 4, !tbaa !5
  %15 = add nsw i32 %14, %12
  %16 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt5arrayIiLm9EEixEm(ptr noundef nonnull align 4 dereferenceable(36) %1, i64 noundef 0) #5
  store i32 %15, ptr %16, align 4, !tbaa !5
  %17 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt5arrayIiLm3EEixEm(ptr noundef nonnull align 4 dereferenceable(12) %3, i64 noundef 0) #5
  %18 = load i32, ptr %17, align 4, !tbaa !5
  %19 = mul nsw i32 %18, 3
  %20 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt5arrayIiLm3EEixEm(ptr noundef nonnull align 4 dereferenceable(12) %4, i64 noundef 1) #5
  %21 = load i32, ptr %20, align 4, !tbaa !5
  %22 = add nsw i32 %21, %19
  %23 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt5arrayIiLm9EEixEm(ptr noundef nonnull align 4 dereferenceable(36) %1, i64 noundef 1) #5
  store i32 %22, ptr %23, align 4, !tbaa !5
  %24 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt5arrayIiLm3EEixEm(ptr noundef nonnull align 4 dereferenceable(12) %3, i64 noundef 0) #5
  %25 = load i32, ptr %24, align 4, !tbaa !5
  %26 = mul nsw i32 %25, 3
  %27 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt5arrayIiLm3EEixEm(ptr noundef nonnull align 4 dereferenceable(12) %4, i64 noundef 2) #5
  %28 = load i32, ptr %27, align 4, !tbaa !5
  %29 = add nsw i32 %28, %26
  %30 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt5arrayIiLm9EEixEm(ptr noundef nonnull align 4 dereferenceable(36) %1, i64 noundef 2) #5
  store i32 %29, ptr %30, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 12, ptr nonnull %4) #5
  call void @llvm.lifetime.start.p0(i64 12, ptr nonnull %4) #5
  call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 4 dereferenceable(12) %4, ptr noundef nonnull align 4 dereferenceable(12) @__const._ZN4Util12BlockShuffleEPSt5arrayIiLm9EE.block, i64 12, i1 false)
  call void @_ZSt7shuffleIPiRSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEEvT_S4_OT0_(ptr noundef %8, ptr noundef %9, ptr noundef nonnull align 8 dereferenceable(2504) %7)
  %31 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt5arrayIiLm3EEixEm(ptr noundef nonnull align 4 dereferenceable(12) %3, i64 noundef 1) #5
  %32 = load i32, ptr %31, align 4, !tbaa !5
  %33 = mul nsw i32 %32, 3
  %34 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt5arrayIiLm3EEixEm(ptr noundef nonnull align 4 dereferenceable(12) %4, i64 noundef 0) #5
  %35 = load i32, ptr %34, align 4, !tbaa !5
  %36 = add nsw i32 %35, %33
  %37 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt5arrayIiLm9EEixEm(ptr noundef nonnull align 4 dereferenceable(36) %1, i64 noundef 3) #5
  store i32 %36, ptr %37, align 4, !tbaa !5
  %38 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt5arrayIiLm3EEixEm(ptr noundef nonnull align 4 dereferenceable(12) %3, i64 noundef 1) #5
  %39 = load i32, ptr %38, align 4, !tbaa !5
  %40 = mul nsw i32 %39, 3
  %41 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt5arrayIiLm3EEixEm(ptr noundef nonnull align 4 dereferenceable(12) %4, i64 noundef 1) #5
  %42 = load i32, ptr %41, align 4, !tbaa !5
  %43 = add nsw i32 %42, %40
  %44 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt5arrayIiLm9EEixEm(ptr noundef nonnull align 4 dereferenceable(36) %1, i64 noundef 4) #5
  store i32 %43, ptr %44, align 4, !tbaa !5
  %45 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt5arrayIiLm3EEixEm(ptr noundef nonnull align 4 dereferenceable(12) %3, i64 noundef 1) #5
  %46 = load i32, ptr %45, align 4, !tbaa !5
  %47 = mul nsw i32 %46, 3
  %48 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt5arrayIiLm3EEixEm(ptr noundef nonnull align 4 dereferenceable(12) %4, i64 noundef 2) #5
  %49 = load i32, ptr %48, align 4, !tbaa !5
  %50 = add nsw i32 %49, %47
  %51 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt5arrayIiLm9EEixEm(ptr noundef nonnull align 4 dereferenceable(36) %1, i64 noundef 5) #5
  store i32 %50, ptr %51, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 12, ptr nonnull %4) #5
  call void @llvm.lifetime.start.p0(i64 12, ptr nonnull %4) #5
  call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 4 dereferenceable(12) %4, ptr noundef nonnull align 4 dereferenceable(12) @__const._ZN4Util12BlockShuffleEPSt5arrayIiLm9EE.block, i64 12, i1 false)
  call void @_ZSt7shuffleIPiRSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEEvT_S4_OT0_(ptr noundef %8, ptr noundef %9, ptr noundef nonnull align 8 dereferenceable(2504) %7)
  %52 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt5arrayIiLm3EEixEm(ptr noundef nonnull align 4 dereferenceable(12) %3, i64 noundef 2) #5
  %53 = load i32, ptr %52, align 4, !tbaa !5
  %54 = mul nsw i32 %53, 3
  %55 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt5arrayIiLm3EEixEm(ptr noundef nonnull align 4 dereferenceable(12) %4, i64 noundef 0) #5
  %56 = load i32, ptr %55, align 4, !tbaa !5
  %57 = add nsw i32 %56, %54
  %58 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt5arrayIiLm9EEixEm(ptr noundef nonnull align 4 dereferenceable(36) %1, i64 noundef 6) #5
  store i32 %57, ptr %58, align 4, !tbaa !5
  %59 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt5arrayIiLm3EEixEm(ptr noundef nonnull align 4 dereferenceable(12) %3, i64 noundef 2) #5
  %60 = load i32, ptr %59, align 4, !tbaa !5
  %61 = mul nsw i32 %60, 3
  %62 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt5arrayIiLm3EEixEm(ptr noundef nonnull align 4 dereferenceable(12) %4, i64 noundef 1) #5
  %63 = load i32, ptr %62, align 4, !tbaa !5
  %64 = add nsw i32 %63, %61
  %65 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt5arrayIiLm9EEixEm(ptr noundef nonnull align 4 dereferenceable(36) %1, i64 noundef 7) #5
  store i32 %64, ptr %65, align 4, !tbaa !5
  %66 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt5arrayIiLm3EEixEm(ptr noundef nonnull align 4 dereferenceable(12) %3, i64 noundef 2) #5
  %67 = load i32, ptr %66, align 4, !tbaa !5
  %68 = mul nsw i32 %67, 3
  %69 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt5arrayIiLm3EEixEm(ptr noundef nonnull align 4 dereferenceable(12) %4, i64 noundef 2) #5
  %70 = load i32, ptr %69, align 4, !tbaa !5
  %71 = add nsw i32 %70, %68
  %72 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt5arrayIiLm9EEixEm(ptr noundef nonnull align 4 dereferenceable(36) %1, i64 noundef 8) #5
  store i32 %71, ptr %72, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 12, ptr nonnull %4) #5
  call void @llvm.lifetime.end.p0(i64 12, ptr nonnull %3) #5
  ret void
}

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZSt7shuffleIPiRSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEEvT_S4_OT0_(ptr noundef, ptr noundef, ptr noundef nonnull align 8 dereferenceable(2504)) local_unnamed_addr #1

; Function Attrs: mustprogress nofree nosync nounwind willreturn memory(none) uwtable
declare dso_local noundef ptr @_ZNSt5arrayIiLm3EE5beginEv(ptr noundef nonnull align 4 dereferenceable(12)) local_unnamed_addr #3 align 2

; Function Attrs: mustprogress nofree nosync nounwind willreturn memory(none) uwtable
declare dso_local noundef ptr @_ZNSt5arrayIiLm3EE3endEv(ptr noundef nonnull align 4 dereferenceable(12)) local_unnamed_addr #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt5arrayIiLm3EEixEm(ptr noundef nonnull align 4 dereferenceable(12), i64 noundef) local_unnamed_addr #4 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt5arrayIiLm9EEixEm(ptr noundef nonnull align 4 dereferenceable(36), i64 noundef) local_unnamed_addr #4 align 2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { mustprogress nofree nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }
attributes #6 = { nounwind willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,LICMPass,LoopRotatePass,ReassociatePass,SROAPass,SimplifyCFGPass