; LLVM IR from huawei-noah/bolt :: compute/tensor/src/cpu (detectionoutput)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.DetectionOutputParamSpec = type { i32, float, i32, i32, float }
%struct.TensorDesc = type { i32, i32, i32, [20 x i32] }

@.str = external hidden unnamed_addr constant [20 x i8], align 1
@stdout = external global ptr, align 8
@.str.1 = external hidden unnamed_addr constant [18 x i8], align 1

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z19detectionoutput_cpuSt6vectorI10TensorDescSaIS0_EES_IPvSaIS3_EE24DetectionOutputParamSpecS0_S3_4Arch(ptr noundef %0, ptr noundef %1, ptr noundef byval(%struct.DetectionOutputParamSpec) align 8 %2, ptr noundef byval(%struct.TensorDesc) align 8 %3, ptr noundef %4, i32 noundef %5) #0 {
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  %9 = alloca ptr, align 8
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  store ptr %0, ptr %7, align 8, !tbaa !5
  store ptr %1, ptr %8, align 8, !tbaa !5
  store ptr %4, ptr %9, align 8, !tbaa !5
  store i32 %5, ptr %10, align 4, !tbaa !9
  %18 = load ptr, ptr %9, align 8, !tbaa !5
  %19 = icmp eq ptr null, %18
  br i1 %19, label %20, label %36

20:                                               ; preds = %6
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #7
  store i32 1, ptr %11, align 4, !tbaa !11
  %21 = load i32, ptr %11, align 4, !tbaa !11
  %22 = icmp ne i32 %21, 0
  br i1 %22, label %23, label %35

23:                                               ; preds = %20
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #7
  %24 = call i64 (i64, ...) @syscall(i64 noundef 186) #7
  %25 = trunc i64 %24 to i32
  store i32 %25, ptr %12, align 4, !tbaa !13
  %26 = load i32, ptr %12, align 4, !tbaa !13
  %27 = call i32 (ptr, ...) @printf(ptr noundef @.str, i32 noundef %26)
  %28 = load ptr, ptr @stdout, align 8, !tbaa !5
  %29 = call i32 @fflush(ptr noundef %28)
  %30 = load i32, ptr %11, align 4, !tbaa !11
  %31 = call ptr @ee2str(i32 noundef %30)
  %32 = call i32 (ptr, ...) @printf(ptr noundef @.str.1, ptr noundef %31)
  %33 = load ptr, ptr @stdout, align 8, !tbaa !5
  %34 = call i32 @fflush(ptr noundef %33)
  call void @exit(i32 noundef 1) #8
  unreachable

35:                                               ; preds = %20
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #7
  br label %36

36:                                               ; preds = %35, %6
  %37 = call noundef i64 @_ZNKSt6vectorI10TensorDescSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #7
  %38 = icmp ne i64 %37, 3
  br i1 %38, label %39, label %55

39:                                               ; preds = %36
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #7
  store i32 2, ptr %13, align 4, !tbaa !11
  %40 = load i32, ptr %13, align 4, !tbaa !11
  %41 = icmp ne i32 %40, 0
  br i1 %41, label %42, label %54

42:                                               ; preds = %39
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #7
  %43 = call i64 (i64, ...) @syscall(i64 noundef 186) #7
  %44 = trunc i64 %43 to i32
  store i32 %44, ptr %14, align 4, !tbaa !13
  %45 = load i32, ptr %14, align 4, !tbaa !13
  %46 = call i32 (ptr, ...) @printf(ptr noundef @.str, i32 noundef %45)
  %47 = load ptr, ptr @stdout, align 8, !tbaa !5
  %48 = call i32 @fflush(ptr noundef %47)
  %49 = load i32, ptr %13, align 4, !tbaa !11
  %50 = call ptr @ee2str(i32 noundef %49)
  %51 = call i32 (ptr, ...) @printf(ptr noundef @.str.1, ptr noundef %50)
  %52 = load ptr, ptr @stdout, align 8, !tbaa !5
  %53 = call i32 @fflush(ptr noundef %52)
  call void @exit(i32 noundef 1) #8
  unreachable

54:                                               ; preds = %39
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #7
  br label %55

55:                                               ; preds = %54, %36
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #7
  %56 = call noundef nonnull align 4 dereferenceable(92) ptr @_ZNSt6vectorI10TensorDescSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef 0) #7
  %57 = getelementptr inbounds %struct.TensorDesc, ptr %56, i32 0, i32 0
  %58 = load i32, ptr %57, align 4, !tbaa !15
  store i32 %58, ptr %15, align 4, !tbaa !19
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #7
  %59 = call noundef nonnull align 4 dereferenceable(92) ptr @_ZNSt6vectorI10TensorDescSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef 2) #7
  %60 = getelementptr inbounds %struct.TensorDesc, ptr %59, i32 0, i32 3
  %61 = getelementptr inbounds [20 x i32], ptr %60, i64 0, i64 0
  %62 = load i32, ptr %61, align 4, !tbaa !13
  store i32 %62, ptr %16, align 4, !tbaa !13
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #7
  store i32 51, ptr %17, align 4, !tbaa !11
  %63 = load i32, ptr %15, align 4, !tbaa !19
  switch i32 %63, label %64 [
  ]

64:                                               ; preds = %55
  br label %65

65:                                               ; preds = %64
  %66 = load i32, ptr %17, align 4, !tbaa !11
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #7
  ret i32 %66
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind
declare i64 @syscall(i64 noundef, ...) #2

declare i32 @printf(ptr noundef, ...) #3

declare i32 @fflush(ptr noundef) #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local ptr @ee2str(i32 noundef) #4

; Function Attrs: noreturn nounwind
declare void @exit(i32 noundef) #5

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorI10TensorDescSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #6 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(92) ptr @_ZNSt6vectorI10TensorDescSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #6 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { nounwind }
attributes #8 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"_ZTS4Arch", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"_ZTS2EE", !7, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"int", !7, i64 0}
!15 = !{!16, !17, i64 0}
!16 = !{!"_ZTS10TensorDesc", !17, i64 0, !18, i64 4, !14, i64 8, !7, i64 12}
!17 = !{!"_ZTS8DataType", !7, i64 0}
!18 = !{!"_ZTS10DataFormat", !7, i64 0}
!19 = !{!17, !17, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.DetectionOutputParamSpec = type { i32, float, i32, i32, float }
%struct.TensorDesc = type { i32, i32, i32, [20 x i32] }

@.str = external hidden unnamed_addr constant [20 x i8], align 1
@stdout = external local_unnamed_addr global ptr, align 8
@.str.1 = external hidden unnamed_addr constant [18 x i8], align 1

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z19detectionoutput_cpuSt6vectorI10TensorDescSaIS0_EES_IPvSaIS3_EE24DetectionOutputParamSpecS0_S3_4Arch(ptr noundef %0, ptr nocapture noundef readnone %1, ptr nocapture noundef readnone byval(%struct.DetectionOutputParamSpec) align 8 %2, ptr nocapture noundef readnone byval(%struct.TensorDesc) align 8 %3, ptr noundef readnone %4, i32 noundef %5) local_unnamed_addr #0 {
  %7 = icmp eq ptr %4, null
  br i1 %7, label %8, label %18

8:                                                ; preds = %6
  %9 = tail call i64 (i64, ...) @syscall(i64 noundef 186) #5
  %10 = trunc i64 %9 to i32
  %11 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str, i32 noundef %10)
  %12 = load ptr, ptr @stdout, align 8, !tbaa !5
  %13 = tail call i32 @fflush(ptr noundef %12)
  %14 = tail call ptr @ee2str(i32 noundef 1)
  %15 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.1, ptr noundef %14)
  %16 = load ptr, ptr @stdout, align 8, !tbaa !5
  %17 = tail call i32 @fflush(ptr noundef %16)
  tail call void @exit(i32 noundef 1) #6
  unreachable

18:                                               ; preds = %6
  %19 = tail call noundef i64 @_ZNKSt6vectorI10TensorDescSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #5
  %.not = icmp eq i64 %19, 3
  br i1 %.not, label %30, label %20

20:                                               ; preds = %18
  %21 = tail call i64 (i64, ...) @syscall(i64 noundef 186) #5
  %22 = trunc i64 %21 to i32
  %23 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str, i32 noundef %22)
  %24 = load ptr, ptr @stdout, align 8, !tbaa !5
  %25 = tail call i32 @fflush(ptr noundef %24)
  %26 = tail call ptr @ee2str(i32 noundef 2)
  %27 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.1, ptr noundef %26)
  %28 = load ptr, ptr @stdout, align 8, !tbaa !5
  %29 = tail call i32 @fflush(ptr noundef %28)
  tail call void @exit(i32 noundef 1) #6
  unreachable

30:                                               ; preds = %18
  %31 = tail call noundef nonnull align 4 dereferenceable(92) ptr @_ZNSt6vectorI10TensorDescSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef 0) #5
  %32 = tail call noundef nonnull align 4 dereferenceable(92) ptr @_ZNSt6vectorI10TensorDescSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef 2) #5
  ret i32 51
}

; Function Attrs: nounwind
declare i64 @syscall(i64 noundef, ...) local_unnamed_addr #1

; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #2

; Function Attrs: nofree nounwind
declare noundef i32 @fflush(ptr nocapture noundef) local_unnamed_addr #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local ptr @ee2str(i32 noundef) local_unnamed_addr #3

; Function Attrs: noreturn nounwind
declare void @exit(i32 noundef) local_unnamed_addr #4

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorI10TensorDescSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(92) ptr @_ZNSt6vectorI10TensorDescSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }
attributes #6 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass