; LLVM IR from Samson-Mano/EM_Propogation_simulation :: EM_Propogation_simulation/src/ImGui/imgui.ll (Z25ImGetDirQuadrantFromDeltaff)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fabs.f32(float) #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z25ImGetDirQuadrantFromDeltaff(float noundef %0, float noundef %1) #1 {
  %3 = alloca i32, align 4
  %4 = alloca float, align 4
  %5 = alloca float, align 4
  store float %0, ptr %4, align 4, !tbaa !5
  store float %1, ptr %5, align 4, !tbaa !5
  %6 = load float, ptr %4, align 4, !tbaa !5
  %7 = call float @llvm.fabs.f32(float %6)
  %8 = load float, ptr %5, align 4, !tbaa !5
  %9 = call float @llvm.fabs.f32(float %8)
  %10 = fcmp ogt float %7, %9
  br i1 %10, label %11, label %16

11:                                               ; preds = %2
  %12 = load float, ptr %4, align 4, !tbaa !5
  %13 = fcmp ogt float %12, 0.000000e+00
  %14 = zext i1 %13 to i64
  %15 = select i1 %13, i32 1, i32 0
  store i32 %15, ptr %3, align 4
  br label %21

16:                                               ; preds = %2
  %17 = load float, ptr %5, align 4, !tbaa !5
  %18 = fcmp ogt float %17, 0.000000e+00
  %19 = zext i1 %18 to i64
  %20 = select i1 %18, i32 3, i32 2
  store i32 %20, ptr %3, align 4
  br label %21

21:                                               ; preds = %16, %11
  %22 = load i32, ptr %3, align 4
  ret i32 %22
}

attributes #0 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"float", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fabs.f32(float) #0

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define dso_local noundef range(i32 0, 4) i32 @_Z25ImGetDirQuadrantFromDeltaff(float noundef %0, float noundef %1) local_unnamed_addr #1 {
  %3 = tail call float @llvm.fabs.f32(float %0)
  %4 = tail call float @llvm.fabs.f32(float %1)
  %5 = fcmp ogt float %3, %4
  %6 = fcmp ogt float %0, 0.000000e+00
  %7 = zext i1 %6 to i32
  %8 = fcmp ogt float %1, 0.000000e+00
  %9 = select i1 %8, i32 3, i32 2
  %.0 = select i1 %5, i32 %7, i32 %9
  ret i32 %.0
}

attributes #0 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #1 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass