; LLVM IR from huawei-noah/bolt :: compute/tensor/src (batch_norm)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.BatchNormParamSpec = type { i32, float, float, float }
%struct.ArchInfo = type { i32, ptr }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z33batch_norm_transform_filter_bytes6TensorS_18BatchNormParamSpecPjP8ArchInfo(ptr noundef %0, ptr noundef %1, i64 %2, <2 x float> %3, ptr noundef %4, ptr noundef %5) #1 {
  %7 = alloca i32, align 4
  %8 = alloca %struct.BatchNormParamSpec, align 4
  %9 = alloca ptr, align 8
  %10 = alloca ptr, align 8
  %11 = alloca ptr, align 8
  %12 = alloca ptr, align 8
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = getelementptr inbounds { i64, <2 x float> }, ptr %8, i32 0, i32 0
  store i64 %2, ptr %15, align 4
  %16 = getelementptr inbounds { i64, <2 x float> }, ptr %8, i32 0, i32 1
  store <2 x float> %3, ptr %16, align 4
  store ptr %0, ptr %9, align 8, !tbaa !5
  store ptr %1, ptr %10, align 8, !tbaa !5
  store ptr %4, ptr %11, align 8, !tbaa !5
  store ptr %5, ptr %12, align 8, !tbaa !5
  %17 = load ptr, ptr %11, align 8, !tbaa !5
  %18 = icmp eq ptr null, %17
  br i1 %18, label %19, label %20

19:                                               ; preds = %6
  store i32 1, ptr %7, align 4
  br label %62

20:                                               ; preds = %6
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #3
  %21 = load ptr, ptr %12, align 8, !tbaa !5
  %22 = getelementptr inbounds %struct.ArchInfo, ptr %21, i32 0, i32 0
  %23 = load i32, ptr %22, align 8, !tbaa !9
  store i32 %23, ptr %13, align 4, !tbaa !12
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #3
  store i32 51, ptr %14, align 4, !tbaa !13
  %24 = load i32, ptr %13, align 4, !tbaa !12
  %25 = icmp eq i32 %24, 1
  br i1 %25, label %53, label %26

26:                                               ; preds = %20
  %27 = load i32, ptr %13, align 4, !tbaa !12
  %28 = icmp eq i32 %27, 8
  br i1 %28, label %53, label %29

29:                                               ; preds = %26
  %30 = load i32, ptr %13, align 4, !tbaa !12
  %31 = icmp eq i32 %30, 9
  br i1 %31, label %53, label %32

32:                                               ; preds = %29
  %33 = load i32, ptr %13, align 4, !tbaa !12
  %34 = icmp eq i32 %33, 10
  br i1 %34, label %53, label %35

35:                                               ; preds = %32
  %36 = load i32, ptr %13, align 4, !tbaa !12
  %37 = icmp eq i32 %36, 9
  br i1 %37, label %53, label %38

38:                                               ; preds = %35
  %39 = load i32, ptr %13, align 4, !tbaa !12
  %40 = icmp eq i32 %39, 10
  br i1 %40, label %53, label %41

41:                                               ; preds = %38
  %42 = load i32, ptr %13, align 4, !tbaa !12
  %43 = icmp eq i32 %42, 5
  br i1 %43, label %53, label %44

44:                                               ; preds = %41
  %45 = load i32, ptr %13, align 4, !tbaa !12
  %46 = icmp eq i32 %45, 6
  br i1 %46, label %53, label %47

47:                                               ; preds = %44
  %48 = load i32, ptr %13, align 4, !tbaa !12
  %49 = icmp eq i32 %48, 4
  br i1 %49, label %53, label %50

50:                                               ; preds = %47
  %51 = load i32, ptr %13, align 4, !tbaa !12
  %52 = icmp eq i32 %51, 3
  br i1 %52, label %53, label %60

53:                                               ; preds = %50, %47, %44, %41, %38, %35, %32, %29, %26, %20
  %54 = call noundef i32 @_ZN6Tensor5bytesEv(ptr noundef nonnull align 8 dereferenceable(32) %0)
  %55 = load ptr, ptr %11, align 8, !tbaa !5
  %56 = getelementptr inbounds i32, ptr %55, i64 0
  store i32 %54, ptr %56, align 4, !tbaa !15
  %57 = call noundef i32 @_ZN6Tensor5bytesEv(ptr noundef nonnull align 8 dereferenceable(32) %1)
  %58 = load ptr, ptr %11, align 8, !tbaa !5
  %59 = getelementptr inbounds i32, ptr %58, i64 1
  store i32 %57, ptr %59, align 4, !tbaa !15
  store i32 0, ptr %14, align 4, !tbaa !13
  br label %60

60:                                               ; preds = %53, %50
  %61 = load i32, ptr %14, align 4, !tbaa !13
  store i32 %61, ptr %7, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #3
  br label %62

62:                                               ; preds = %60, %19
  %63 = load i32, ptr %7, align 4
  ret i32 %63
}

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_ZN6Tensor5bytesEv(ptr noundef nonnull align 8 dereferenceable(32)) #2 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="64" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"_ZTS8ArchInfo", !11, i64 0, !6, i64 8}
!11 = !{!"_ZTS4Arch", !7, i64 0}
!12 = !{!11, !11, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"_ZTS2EE", !7, i64 0}
!15 = !{!16, !16, i64 0}
!16 = !{!"int", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local noundef range(i32 0, 52) i32 @_Z33batch_norm_transform_filter_bytes6TensorS_18BatchNormParamSpecPjP8ArchInfo(ptr noundef %0, ptr noundef %1, i64 %2, <2 x float> %3, ptr noundef writeonly %4, ptr nocapture noundef readonly %5) local_unnamed_addr #0 {
  %7 = icmp eq ptr %4, null
  br i1 %7, label %14, label %8

8:                                                ; preds = %6
  %9 = load i32, ptr %5, align 8, !tbaa !5
  switch i32 %9, label %14 [
    i32 10, label %10
    i32 9, label %10
    i32 8, label %10
    i32 6, label %10
    i32 5, label %10
    i32 4, label %10
    i32 3, label %10
    i32 1, label %10
  ]

10:                                               ; preds = %8, %8, %8, %8, %8, %8, %8, %8
  %11 = tail call noundef i32 @_ZN6Tensor5bytesEv(ptr noundef nonnull align 8 dereferenceable(32) %0)
  store i32 %11, ptr %4, align 4, !tbaa !11
  %12 = tail call noundef i32 @_ZN6Tensor5bytesEv(ptr noundef nonnull align 8 dereferenceable(32) %1)
  %13 = getelementptr inbounds i8, ptr %4, i64 4
  store i32 %12, ptr %13, align 4, !tbaa !11
  br label %14

14:                                               ; preds = %10, %8, %6
  %.032 = phi i32 [ 1, %6 ], [ 0, %10 ], [ 51, %8 ]
  ret i32 %.032
}

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_ZN6Tensor5bytesEv(ptr noundef nonnull align 8 dereferenceable(32)) local_unnamed_addr #1 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="64" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"_ZTS8ArchInfo", !7, i64 0, !10, i64 8}
!7 = !{!"_ZTS4Arch", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !8, i64 0}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass