; LLVM IR from facebookresearch/habitat-sim :: src/deps/basis-universal/encoder (basisu_etc)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.basisu::etc1_solution_coordinates" = type <{ %"class.basisu::color_rgba", i32, i8, [3 x i8] }>
%"class.basisu::color_rgba" = type { %union.anon }
%union.anon = type { [4 x i8] }
%struct.anon = type { i8, i8, i8, i8 }
%"class.basisu::etc1_optimizer" = type { ptr, ptr, i32, %"class.basisu::vec", i32, i32, i32, i32, %"class.basisu::vector", %"class.basisu::vector.3", %"class.basisu::vector.3", ptr, ptr, %"class.basisu::vector.5", %"class.basisu::vector.5", %"struct.basisu::etc1_optimizer::potential_solution", %"struct.basisu::etc1_optimizer::potential_solution", %"class.basisu::vector.5", [128 x i8] }
%"class.basisu::vec" = type { [3 x float] }
%"class.basisu::vector" = type { ptr, i32, i32 }
%"class.basisu::vector.3" = type { ptr, i32, i32 }
%"struct.basisu::etc1_optimizer::potential_solution" = type <{ %"struct.basisu::etc1_solution_coordinates", [4 x i8], %"class.basisu::vector.5", i64, i8, [7 x i8] }>
%"class.basisu::vector.5" = type { ptr, i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZN6basisu14etc1_optimizer28check_for_redundant_solutionERKNS_25etc1_solution_coordinatesE(ptr noundef nonnull align 8 dereferenceable(384) %0, ptr noundef nonnull align 4 dereferenceable(9) %1) #1 align 2 {
  %3 = alloca i1, align 1
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  %10 = load ptr, ptr %4, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #3
  %11 = load ptr, ptr %5, align 8, !tbaa !5
  %12 = getelementptr inbounds %"struct.basisu::etc1_solution_coordinates", ptr %11, i32 0, i32 0
  %13 = getelementptr inbounds %"class.basisu::color_rgba", ptr %12, i32 0, i32 0
  %14 = getelementptr inbounds %struct.anon, ptr %13, i32 0, i32 0
  %15 = call noundef i32 @_ZN6basisu10hash_hsiehEPKhm(ptr noundef %14, i64 noundef 3)
  store i32 %15, ptr %6, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  %16 = load i32, ptr %6, align 4, !tbaa !9
  %17 = and i32 %16, 1023
  store i32 %17, ptr %7, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  %18 = load i32, ptr %6, align 4, !tbaa !9
  %19 = lshr i32 %18, 10
  %20 = and i32 %19, 1023
  store i32 %20, ptr %8, align 4, !tbaa !9
  %21 = getelementptr inbounds %"class.basisu::etc1_optimizer", ptr %10, i32 0, i32 18
  %22 = load i32, ptr %7, align 4, !tbaa !9
  %23 = lshr i32 %22, 3
  %24 = zext i32 %23 to i64
  %25 = getelementptr inbounds [128 x i8], ptr %21, i64 0, i64 %24
  %26 = load i8, ptr %25, align 1, !tbaa !11
  %27 = zext i8 %26 to i32
  %28 = load i32, ptr %7, align 4, !tbaa !9
  %29 = and i32 %28, 7
  %30 = shl i32 1, %29
  %31 = and i32 %27, %30
  %32 = icmp ne i32 %31, 0
  br i1 %32, label %33, label %47

33:                                               ; preds = %2
  %34 = getelementptr inbounds %"class.basisu::etc1_optimizer", ptr %10, i32 0, i32 18
  %35 = load i32, ptr %8, align 4, !tbaa !9
  %36 = lshr i32 %35, 3
  %37 = zext i32 %36 to i64
  %38 = getelementptr inbounds [128 x i8], ptr %34, i64 0, i64 %37
  %39 = load i8, ptr %38, align 1, !tbaa !11
  %40 = zext i8 %39 to i32
  %41 = load i32, ptr %8, align 4, !tbaa !9
  %42 = and i32 %41, 7
  %43 = shl i32 1, %42
  %44 = and i32 %40, %43
  %45 = icmp ne i32 %44, 0
  br i1 %45, label %46, label %47

46:                                               ; preds = %33
  store i1 false, ptr %3, align 1
  store i32 1, ptr %9, align 4
  br label %72

47:                                               ; preds = %33, %2
  %48 = load i32, ptr %7, align 4, !tbaa !9
  %49 = and i32 %48, 7
  %50 = shl i32 1, %49
  %51 = getelementptr inbounds %"class.basisu::etc1_optimizer", ptr %10, i32 0, i32 18
  %52 = load i32, ptr %7, align 4, !tbaa !9
  %53 = lshr i32 %52, 3
  %54 = zext i32 %53 to i64
  %55 = getelementptr inbounds [128 x i8], ptr %51, i64 0, i64 %54
  %56 = load i8, ptr %55, align 1, !tbaa !11
  %57 = zext i8 %56 to i32
  %58 = or i32 %57, %50
  %59 = trunc i32 %58 to i8
  store i8 %59, ptr %55, align 1, !tbaa !11
  %60 = load i32, ptr %8, align 4, !tbaa !9
  %61 = and i32 %60, 7
  %62 = shl i32 1, %61
  %63 = getelementptr inbounds %"class.basisu::etc1_optimizer", ptr %10, i32 0, i32 18
  %64 = load i32, ptr %8, align 4, !tbaa !9
  %65 = lshr i32 %64, 3
  %66 = zext i32 %65 to i64
  %67 = getelementptr inbounds [128 x i8], ptr %63, i64 0, i64 %66
  %68 = load i8, ptr %67, align 1, !tbaa !11
  %69 = zext i8 %68 to i32
  %70 = or i32 %69, %62
  %71 = trunc i32 %70 to i8
  store i8 %71, ptr %67, align 1, !tbaa !11
  store i1 true, ptr %3, align 1
  store i32 1, ptr %9, align 4
  br label %72

72:                                               ; preds = %47, %46
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #3
  %73 = load i1, ptr %3, align 1
  ret i1 %73
}

declare noundef i32 @_ZN6basisu10hash_hsiehEPKhm(ptr noundef, i64 noundef) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!7, !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZN6basisu14etc1_optimizer28check_for_redundant_solutionERKNS_25etc1_solution_coordinatesE(ptr nocapture noundef nonnull align 8 dereferenceable(384) %0, ptr noundef nonnull align 4 dereferenceable(9) %1) local_unnamed_addr #0 align 2 {
  %3 = tail call noundef i32 @_ZN6basisu10hash_hsiehEPKhm(ptr noundef nonnull %1, i64 noundef 3)
  %4 = lshr i32 %3, 10
  %5 = and i32 %4, 1023
  %6 = getelementptr inbounds i8, ptr %0, i64 256
  %7 = lshr i32 %3, 3
  %8 = and i32 %7, 127
  %9 = zext nneg i32 %8 to i64
  %10 = getelementptr inbounds [128 x i8], ptr %6, i64 0, i64 %9
  %11 = load i8, ptr %10, align 1, !tbaa !5
  %12 = zext i8 %11 to i32
  %13 = and i32 %3, 7
  %14 = shl nuw nsw i32 1, %13
  %15 = and i32 %14, %12
  %.not = icmp eq i32 %15, 0
  br i1 %.not, label %._crit_edge, label %16

._crit_edge:                                      ; preds = %2
  %.pre = and i32 %4, 7
  %.pre13 = shl nuw nsw i32 1, %.pre
  %.pre15 = lshr i32 %5, 3
  %.pre17 = zext nneg i32 %.pre15 to i64
  br label %25

16:                                               ; preds = %2
  %17 = lshr i32 %5, 3
  %18 = zext nneg i32 %17 to i64
  %19 = getelementptr inbounds [128 x i8], ptr %6, i64 0, i64 %18
  %20 = load i8, ptr %19, align 1, !tbaa !5
  %21 = zext i8 %20 to i32
  %22 = and i32 %4, 7
  %23 = shl nuw nsw i32 1, %22
  %24 = and i32 %23, %21
  %.not12 = icmp eq i32 %24, 0
  br i1 %.not12, label %25, label %32

25:                                               ; preds = %._crit_edge, %16
  %.pre-phi18 = phi i64 [ %.pre17, %._crit_edge ], [ %18, %16 ]
  %.pre-phi14 = phi i32 [ %.pre13, %._crit_edge ], [ %23, %16 ]
  %26 = trunc nuw i32 %14 to i8
  %27 = or i8 %11, %26
  store i8 %27, ptr %10, align 1, !tbaa !5
  %28 = getelementptr inbounds [128 x i8], ptr %6, i64 0, i64 %.pre-phi18
  %29 = load i8, ptr %28, align 1, !tbaa !5
  %30 = trunc nuw i32 %.pre-phi14 to i8
  %31 = or i8 %29, %30
  store i8 %31, ptr %28, align 1, !tbaa !5
  br label %32

32:                                               ; preds = %16, %25
  %.0 = phi i1 [ true, %25 ], [ false, %16 ]
  ret i1 %.0
}

declare noundef i32 @_ZN6basisu10hash_hsiehEPKhm(ptr noundef, i64 noundef) local_unnamed_addr #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}


; Effective O3 passes: BDCEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass