; LLVM IR from cvxgrp/scs :: linsys/gpu/gpu.ll (scs_accum_by_a_gpu)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.SCS_GPU_DATA_MATRIX = type { ptr, ptr, ptr, i32, i32, i32, ptr }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare i32 @cusparseSpMV_bufferSize(ptr noundef, i32 noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef, ptr noundef) #1

declare i32 @cudaFree(ptr noundef) #1

declare i32 @cudaMalloc(ptr noundef, i64 noundef) #1

declare i32 @cusparseSpMV(ptr noundef, i32 noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef, ptr noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local void @_scs_accum_by_a_gpu(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, ptr noundef %4, ptr noundef %5) #2 {
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  %9 = alloca ptr, align 8
  %10 = alloca ptr, align 8
  %11 = alloca ptr, align 8
  %12 = alloca ptr, align 8
  %13 = alloca double, align 8
  %14 = alloca i64, align 8
  store ptr %0, ptr %7, align 8, !tbaa !5
  store ptr %1, ptr %8, align 8, !tbaa !5
  store ptr %2, ptr %9, align 8, !tbaa !5
  store ptr %3, ptr %10, align 8, !tbaa !5
  store ptr %4, ptr %11, align 8, !tbaa !5
  store ptr %5, ptr %12, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %13) #3
  store double 1.000000e+00, ptr %13, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %14) #3
  store i64 0, ptr %14, align 8, !tbaa !11
  %15 = load ptr, ptr %10, align 8, !tbaa !5
  %16 = load ptr, ptr %7, align 8, !tbaa !5
  %17 = getelementptr inbounds %struct.SCS_GPU_DATA_MATRIX, ptr %16, i32 0, i32 6
  %18 = load ptr, ptr %17, align 8, !tbaa !13
  %19 = load ptr, ptr %8, align 8, !tbaa !5
  %20 = load ptr, ptr %9, align 8, !tbaa !5
  %21 = call i32 @cusparseSpMV_bufferSize(ptr noundef %15, i32 noundef 1, ptr noundef %13, ptr noundef %18, ptr noundef %19, ptr noundef %13, ptr noundef %20, i32 noundef 1, i32 noundef 2, ptr noundef %14)
  %22 = load i64, ptr %14, align 8, !tbaa !11
  %23 = load ptr, ptr %11, align 8, !tbaa !5
  %24 = load i64, ptr %23, align 8, !tbaa !11
  %25 = icmp ugt i64 %22, %24
  br i1 %25, label %26, label %40

26:                                               ; preds = %6
  %27 = load ptr, ptr %12, align 8, !tbaa !5
  %28 = load ptr, ptr %27, align 8, !tbaa !5
  %29 = icmp ne ptr %28, null
  br i1 %29, label %30, label %34

30:                                               ; preds = %26
  %31 = load ptr, ptr %12, align 8, !tbaa !5
  %32 = load ptr, ptr %31, align 8, !tbaa !5
  %33 = call i32 @cudaFree(ptr noundef %32)
  br label %34

34:                                               ; preds = %30, %26
  %35 = load ptr, ptr %12, align 8, !tbaa !5
  %36 = load i64, ptr %14, align 8, !tbaa !11
  %37 = call i32 @cudaMalloc(ptr noundef %35, i64 noundef %36)
  %38 = load i64, ptr %14, align 8, !tbaa !11
  %39 = load ptr, ptr %11, align 8, !tbaa !5
  store i64 %38, ptr %39, align 8, !tbaa !11
  br label %40

40:                                               ; preds = %34, %6
  %41 = load ptr, ptr %10, align 8, !tbaa !5
  %42 = load ptr, ptr %7, align 8, !tbaa !5
  %43 = getelementptr inbounds %struct.SCS_GPU_DATA_MATRIX, ptr %42, i32 0, i32 6
  %44 = load ptr, ptr %43, align 8, !tbaa !13
  %45 = load ptr, ptr %8, align 8, !tbaa !5
  %46 = load ptr, ptr %9, align 8, !tbaa !5
  %47 = load ptr, ptr %12, align 8, !tbaa !5
  %48 = load ptr, ptr %47, align 8, !tbaa !5
  %49 = call i32 @cusparseSpMV(ptr noundef %41, i32 noundef 1, ptr noundef %13, ptr noundef %44, ptr noundef %45, ptr noundef %13, ptr noundef %46, i32 noundef 1, i32 noundef 2, ptr noundef %48)
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #3
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"double", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !7, i64 0}
!13 = !{!14, !6, i64 40}
!14 = !{!"SCS_GPU_DATA_MATRIX", !6, i64 0, !6, i64 8, !6, i64 16, !15, i64 24, !15, i64 28, !15, i64 32, !6, i64 40}
!15 = !{!"int", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare i32 @cusparseSpMV_bufferSize(ptr noundef, i32 noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1

declare i32 @cudaFree(ptr noundef) local_unnamed_addr #1

declare i32 @cudaMalloc(ptr noundef, i64 noundef) local_unnamed_addr #1

declare i32 @cusparseSpMV(ptr noundef, i32 noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local void @_scs_accum_by_a_gpu(ptr nocapture noundef readonly %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, ptr nocapture noundef %4, ptr noundef %5) local_unnamed_addr #2 {
  %7 = alloca double, align 8
  %8 = alloca i64, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %7) #3
  store double 1.000000e+00, ptr %7, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %8) #3
  store i64 0, ptr %8, align 8, !tbaa !9
  %9 = getelementptr inbounds i8, ptr %0, i64 40
  %10 = load ptr, ptr %9, align 8, !tbaa !11
  %11 = call i32 @cusparseSpMV_bufferSize(ptr noundef %3, i32 noundef 1, ptr noundef nonnull %7, ptr noundef %10, ptr noundef %1, ptr noundef nonnull %7, ptr noundef %2, i32 noundef 1, i32 noundef 2, ptr noundef nonnull %8) #3
  %12 = load i64, ptr %8, align 8, !tbaa !9
  %13 = load i64, ptr %4, align 8, !tbaa !9
  %14 = icmp ugt i64 %12, %13
  br i1 %14, label %15, label %23

15:                                               ; preds = %6
  %16 = load ptr, ptr %5, align 8, !tbaa !15
  %.not = icmp eq ptr %16, null
  br i1 %.not, label %19, label %17

17:                                               ; preds = %15
  %18 = call i32 @cudaFree(ptr noundef nonnull %16) #3
  %.pre = load i64, ptr %8, align 8, !tbaa !9
  br label %19

19:                                               ; preds = %17, %15
  %20 = phi i64 [ %.pre, %17 ], [ %12, %15 ]
  %21 = call i32 @cudaMalloc(ptr noundef nonnull %5, i64 noundef %20) #3
  %22 = load i64, ptr %8, align 8, !tbaa !9
  store i64 %22, ptr %4, align 8, !tbaa !9
  br label %23

23:                                               ; preds = %19, %6
  %24 = load ptr, ptr %9, align 8, !tbaa !11
  %25 = load ptr, ptr %5, align 8, !tbaa !15
  %26 = call i32 @cusparseSpMV(ptr noundef %3, i32 noundef 1, ptr noundef nonnull %7, ptr noundef %24, ptr noundef %1, ptr noundef nonnull %7, ptr noundef %2, i32 noundef 1, i32 noundef 2, ptr noundef %25) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %8) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %7) #3
  ret void
}

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"double", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !13, i64 40}
!12 = !{!"SCS_GPU_DATA_MATRIX", !13, i64 0, !13, i64 8, !13, i64 16, !14, i64 24, !14, i64 28, !14, i64 32, !13, i64 40}
!13 = !{!"any pointer", !7, i64 0}
!14 = !{!"int", !7, i64 0}
!15 = !{!13, !13, i64 0}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass