; LLVM IR from huawei-noah/bolt :: compute/tensor/src/cpu/gat.ll (Z25gat_infer_output_size_cpu10TensorDesc12GATParamSpecPS_)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.TensorDesc = type { i32, i32, i32, [20 x i32] }
%struct.GATParamSpec = type { i32, %struct.ActivationParamSpec }
%struct.ActivationParamSpec = type { i32, [4 x float] }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z25gat_infer_output_size_cpu10TensorDesc12GATParamSpecPS_(ptr noundef byval(%struct.TensorDesc) align 8 %0, ptr noundef byval(%struct.GATParamSpec) align 8 %1, ptr noundef %2) #2 {
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca %struct.TensorDesc, align 4
  store ptr %2, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #4
  %8 = getelementptr inbounds %struct.GATParamSpec, ptr %1, i32 0, i32 0
  %9 = load i32, ptr %8, align 8, !tbaa !9
  store i32 %9, ptr %5, align 4, !tbaa !14
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #4
  %10 = getelementptr inbounds %struct.TensorDesc, ptr %0, i32 0, i32 3
  %11 = getelementptr inbounds [20 x i32], ptr %10, i64 0, i64 1
  %12 = load i32, ptr %11, align 4, !tbaa !14
  store i32 %12, ptr %6, align 4, !tbaa !14
  call void @llvm.lifetime.start.p0(i64 92, ptr %7) #4
  %13 = getelementptr inbounds %struct.TensorDesc, ptr %0, i32 0, i32 0
  %14 = load i32, ptr %13, align 8, !tbaa !15
  %15 = load i32, ptr %5, align 4, !tbaa !14
  %16 = load i32, ptr %6, align 4, !tbaa !14
  %17 = load i32, ptr %6, align 4, !tbaa !14
  call void @_Z9tensor3df8DataType10DataFormatjjj(ptr dead_on_unwind writable sret(%struct.TensorDesc) align 4 %7, i32 noundef %14, i32 noundef 0, i32 noundef %15, i32 noundef %16, i32 noundef %17)
  %18 = load ptr, ptr %4, align 8, !tbaa !5
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %18, ptr align 4 %7, i64 92, i1 false), !tbaa.struct !19
  call void @llvm.lifetime.end.p0(i64 92, ptr %7) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #4
  ret i32 0
}

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_Z9tensor3df8DataType10DataFormatjjj(ptr dead_on_unwind noalias writable sret(%struct.TensorDesc) align 4, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #3

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"_ZTS12GATParamSpec", !11, i64 0, !12, i64 4}
!11 = !{!"int", !7, i64 0}
!12 = !{!"_ZTS19ActivationParamSpec", !13, i64 0, !7, i64 4}
!13 = !{!"_ZTS14ActivationMode", !7, i64 0}
!14 = !{!11, !11, i64 0}
!15 = !{!16, !17, i64 0}
!16 = !{!"_ZTS10TensorDesc", !17, i64 0, !18, i64 4, !11, i64 8, !7, i64 12}
!17 = !{!"_ZTS8DataType", !7, i64 0}
!18 = !{!"_ZTS10DataFormat", !7, i64 0}
!19 = !{i64 0, i64 4, !20, i64 4, i64 4, !21, i64 8, i64 4, !14, i64 12, i64 80, !22}
!20 = !{!17, !17, i64 0}
!21 = !{!18, !18, i64 0}
!22 = !{!7, !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.TensorDesc = type { i32, i32, i32, [20 x i32] }
%struct.GATParamSpec = type { i32, %struct.ActivationParamSpec }
%struct.ActivationParamSpec = type { i32, [4 x float] }

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z25gat_infer_output_size_cpu10TensorDesc12GATParamSpecPS_(ptr nocapture noundef readonly byval(%struct.TensorDesc) align 8 %0, ptr nocapture noundef readonly byval(%struct.GATParamSpec) align 8 %1, ptr nocapture noundef writeonly %2) local_unnamed_addr #2 {
  %4 = alloca %struct.TensorDesc, align 4
  %5 = load i32, ptr %1, align 8, !tbaa !5
  %6 = getelementptr inbounds i8, ptr %0, i64 16
  %7 = load i32, ptr %6, align 8, !tbaa !12
  call void @llvm.lifetime.start.p0(i64 92, ptr nonnull %4) #4
  %8 = load i32, ptr %0, align 8, !tbaa !13
  call void @_Z9tensor3df8DataType10DataFormatjjj(ptr dead_on_unwind nonnull writable sret(%struct.TensorDesc) align 4 %4, i32 noundef %8, i32 noundef 0, i32 noundef %5, i32 noundef %7, i32 noundef %7)
  call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 4 dereferenceable(92) %2, ptr noundef nonnull align 4 dereferenceable(92) %4, i64 92, i1 false), !tbaa.struct !17
  call void @llvm.lifetime.end.p0(i64 92, ptr nonnull %4) #4
  ret i32 0
}

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_Z9tensor3df8DataType10DataFormatjjj(ptr dead_on_unwind noalias writable sret(%struct.TensorDesc) align 4, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #3

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"_ZTS12GATParamSpec", !7, i64 0, !10, i64 4}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"_ZTS19ActivationParamSpec", !11, i64 0, !8, i64 4}
!11 = !{!"_ZTS14ActivationMode", !8, i64 0}
!12 = !{!7, !7, i64 0}
!13 = !{!14, !15, i64 0}
!14 = !{!"_ZTS10TensorDesc", !15, i64 0, !16, i64 4, !7, i64 8, !8, i64 12}
!15 = !{!"_ZTS8DataType", !8, i64 0}
!16 = !{!"_ZTS10DataFormat", !8, i64 0}
!17 = !{i64 0, i64 4, !18, i64 4, i64 4, !19, i64 8, i64 4, !12, i64 12, i64 80, !20}
!18 = !{!15, !15, i64 0}
!19 = !{!16, !16, i64 0}
!20 = !{!8, !8, i64 0}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass