; LLVM IR from smv1999/CompetitiveProgrammingQuestionBank :: Arrays/findMinimumInRotatedSortedArray.ll (Z7findMinRSt6vectorIiSaIiEE)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z7findMinRSt6vectorIiSaIiEE(ptr noundef nonnull align 8 dereferenceable(24) %0) #0 {
  %2 = alloca i32, align 4
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #2
  store i32 0, ptr %4, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  %11 = load ptr, ptr %3, align 8, !tbaa !5
  %12 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %11) #2
  %13 = sub i64 %12, 1
  %14 = trunc i64 %13 to i32
  store i32 %14, ptr %5, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #2
  %15 = load i32, ptr %4, align 4, !tbaa !9
  %16 = load i32, ptr %5, align 4, !tbaa !9
  %17 = add nsw i32 %15, %16
  %18 = sdiv i32 %17, 2
  store i32 %18, ptr %6, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #2
  %19 = load ptr, ptr %3, align 8, !tbaa !5
  %20 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %19) #2
  %21 = trunc i64 %20 to i32
  store i32 %21, ptr %7, align 4, !tbaa !9
  br label %22

22:                                               ; preds = %141, %1
  %23 = load i32, ptr %4, align 4, !tbaa !9
  %24 = load i32, ptr %5, align 4, !tbaa !9
  %25 = icmp sle i32 %23, %24
  br i1 %25, label %26, label %142

26:                                               ; preds = %22
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #2
  %27 = load i32, ptr %6, align 4, !tbaa !9
  %28 = add nsw i32 %27, 1
  %29 = load i32, ptr %7, align 4, !tbaa !9
  %30 = srem i32 %28, %29
  store i32 %30, ptr %8, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #2
  %31 = load i32, ptr %6, align 4, !tbaa !9
  %32 = sub nsw i32 %31, 1
  %33 = load i32, ptr %7, align 4, !tbaa !9
  %34 = add nsw i32 %32, %33
  %35 = load i32, ptr %7, align 4, !tbaa !9
  %36 = srem i32 %34, %35
  store i32 %36, ptr %9, align 4, !tbaa !9
  %37 = load ptr, ptr %3, align 8, !tbaa !5
  %38 = load i32, ptr %4, align 4, !tbaa !9
  %39 = sext i32 %38 to i64
  %40 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %37, i64 noundef %39) #2
  %41 = load i32, ptr %40, align 4, !tbaa !9
  %42 = load ptr, ptr %3, align 8, !tbaa !5
  %43 = load i32, ptr %5, align 4, !tbaa !9
  %44 = sext i32 %43 to i64
  %45 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %42, i64 noundef %44) #2
  %46 = load i32, ptr %45, align 4, !tbaa !9
  %47 = icmp sle i32 %41, %46
  br i1 %47, label %48, label %54

48:                                               ; preds = %26
  %49 = load ptr, ptr %3, align 8, !tbaa !5
  %50 = load i32, ptr %4, align 4, !tbaa !9
  %51 = sext i32 %50 to i64
  %52 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %49, i64 noundef %51) #2
  %53 = load i32, ptr %52, align 4, !tbaa !9
  store i32 %53, ptr %2, align 4
  store i32 1, ptr %10, align 4
  br label %139

54:                                               ; preds = %26
  %55 = load ptr, ptr %3, align 8, !tbaa !5
  %56 = load i32, ptr %6, align 4, !tbaa !9
  %57 = sext i32 %56 to i64
  %58 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %55, i64 noundef %57) #2
  %59 = load i32, ptr %58, align 4, !tbaa !9
  %60 = load ptr, ptr %3, align 8, !tbaa !5
  %61 = load i32, ptr %9, align 4, !tbaa !9
  %62 = sext i32 %61 to i64
  %63 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %60, i64 noundef %62) #2
  %64 = load i32, ptr %63, align 4, !tbaa !9
  %65 = icmp slt i32 %59, %64
  br i1 %65, label %66, label %84

66:                                               ; preds = %54
  %67 = load ptr, ptr %3, align 8, !tbaa !5
  %68 = load i32, ptr %6, align 4, !tbaa !9
  %69 = sext i32 %68 to i64
  %70 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %67, i64 noundef %69) #2
  %71 = load i32, ptr %70, align 4, !tbaa !9
  %72 = load ptr, ptr %3, align 8, !tbaa !5
  %73 = load i32, ptr %8, align 4, !tbaa !9
  %74 = sext i32 %73 to i64
  %75 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %72, i64 noundef %74) #2
  %76 = load i32, ptr %75, align 4, !tbaa !9
  %77 = icmp slt i32 %71, %76
  br i1 %77, label %78, label %84

78:                                               ; preds = %66
  %79 = load ptr, ptr %3, align 8, !tbaa !5
  %80 = load i32, ptr %6, align 4, !tbaa !9
  %81 = sext i32 %80 to i64
  %82 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %79, i64 noundef %81) #2
  %83 = load i32, ptr %82, align 4, !tbaa !9
  store i32 %83, ptr %2, align 4
  store i32 1, ptr %10, align 4
  br label %139

84:                                               ; preds = %66, %54
  %85 = load ptr, ptr %3, align 8, !tbaa !5
  %86 = load i32, ptr %6, align 4, !tbaa !9
  %87 = sext i32 %86 to i64
  %88 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %85, i64 noundef %87) #2
  %89 = load i32, ptr %88, align 4, !tbaa !9
  %90 = load ptr, ptr %3, align 8, !tbaa !5
  %91 = load i32, ptr %4, align 4, !tbaa !9
  %92 = sext i32 %91 to i64
  %93 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %90, i64 noundef %92) #2
  %94 = load i32, ptr %93, align 4, !tbaa !9
  %95 = icmp sgt i32 %89, %94
  br i1 %95, label %96, label %98

96:                                               ; preds = %84
  %97 = load i32, ptr %8, align 4, !tbaa !9
  store i32 %97, ptr %4, align 4, !tbaa !9
  br label %132

98:                                               ; preds = %84
  %99 = load ptr, ptr %3, align 8, !tbaa !5
  %100 = load i32, ptr %6, align 4, !tbaa !9
  %101 = sext i32 %100 to i64
  %102 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %99, i64 noundef %101) #2
  %103 = load i32, ptr %102, align 4, !tbaa !9
  %104 = load ptr, ptr %3, align 8, !tbaa !5
  %105 = load i32, ptr %5, align 4, !tbaa !9
  %106 = sext i32 %105 to i64
  %107 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %104, i64 noundef %106) #2
  %108 = load i32, ptr %107, align 4, !tbaa !9
  %109 = icmp slt i32 %103, %108
  br i1 %109, label %110, label %112

110:                                              ; preds = %98
  %111 = load i32, ptr %9, align 4, !tbaa !9
  store i32 %111, ptr %5, align 4, !tbaa !9
  br label %131

112:                                              ; preds = %98
  %113 = load ptr, ptr %3, align 8, !tbaa !5
  %114 = load i32, ptr %5, align 4, !tbaa !9
  %115 = sext i32 %114 to i64
  %116 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %113, i64 noundef %115) #2
  %117 = load i32, ptr %116, align 4, !tbaa !9
  %118 = load ptr, ptr %3, align 8, !tbaa !5
  %119 = load i32, ptr %4, align 4, !tbaa !9
  %120 = sext i32 %119 to i64
  %121 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %118, i64 noundef %120) #2
  %122 = load i32, ptr %121, align 4, !tbaa !9
  %123 = icmp sle i32 %117, %122
  br i1 %123, label %124, label %130

124:                                              ; preds = %112
  %125 = load ptr, ptr %3, align 8, !tbaa !5
  %126 = load i32, ptr %5, align 4, !tbaa !9
  %127 = sext i32 %126 to i64
  %128 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %125, i64 noundef %127) #2
  %129 = load i32, ptr %128, align 4, !tbaa !9
  store i32 %129, ptr %2, align 4
  store i32 1, ptr %10, align 4
  br label %139

130:                                              ; preds = %112
  br label %131

131:                                              ; preds = %130, %110
  br label %132

132:                                              ; preds = %131, %96
  br label %133

133:                                              ; preds = %132
  br label %134

134:                                              ; preds = %133
  %135 = load i32, ptr %4, align 4, !tbaa !9
  %136 = load i32, ptr %5, align 4, !tbaa !9
  %137 = add nsw i32 %135, %136
  %138 = sdiv i32 %137, 2
  store i32 %138, ptr %6, align 4, !tbaa !9
  store i32 0, ptr %10, align 4
  br label %139

139:                                              ; preds = %134, %124, %78, %48
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #2
  %140 = load i32, ptr %10, align 4
  switch i32 %140, label %143 [
    i32 0, label %141
  ]

141:                                              ; preds = %139
  br label %22, !llvm.loop !11

142:                                              ; preds = %22
  store i32 -1, ptr %2, align 4
  store i32 1, ptr %10, align 4
  br label %143

143:                                              ; preds = %142, %139
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #2
  %144 = load i32, ptr %2, align 4
  ret i32 %144
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z7findMinRSt6vectorIiSaIiEE(ptr noundef nonnull align 8 dereferenceable(24) %0) local_unnamed_addr #0 {
  %2 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #1
  %3 = trunc i64 %2 to i32
  %4 = add i32 %3, -1
  %5 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #1
  %6 = trunc i64 %5 to i32
  %.not70 = icmp slt i32 %4, 0
  br i1 %.not70, label %.thread, label %.lr.ph

.lr.ph:                                           ; preds = %1
  %7 = add i32 %6, -1
  br label %8

8:                                                ; preds = %.lr.ph, %51
  %.05373.in = phi i32 [ %4, %.lr.ph ], [ %52, %51 ]
  %.04772 = phi i32 [ 0, %.lr.ph ], [ %.148, %51 ]
  %.05071 = phi i32 [ %4, %.lr.ph ], [ %.151, %51 ]
  %.05373 = sdiv i32 %.05373.in, 2
  %9 = add nsw i32 %.05373, 1
  %10 = srem i32 %9, %6
  %11 = add i32 %7, %.05373
  %12 = srem i32 %11, %6
  %13 = sext i32 %.04772 to i64
  %14 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %13) #1
  %15 = load i32, ptr %14, align 4, !tbaa !5
  %16 = sext i32 %.05071 to i64
  %17 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %16) #1
  %18 = load i32, ptr %17, align 4, !tbaa !5
  %.not55 = icmp sgt i32 %15, %18
  br i1 %.not55, label %19, label %.thread.sink.split

19:                                               ; preds = %8
  %20 = sext i32 %.05373 to i64
  %21 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %20) #1
  %22 = load i32, ptr %21, align 4, !tbaa !5
  %23 = sext i32 %12 to i64
  %24 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %23) #1
  %25 = load i32, ptr %24, align 4, !tbaa !5
  %26 = icmp slt i32 %22, %25
  br i1 %26, label %27, label %34

27:                                               ; preds = %19
  %28 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %20) #1
  %29 = load i32, ptr %28, align 4, !tbaa !5
  %30 = sext i32 %10 to i64
  %31 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %30) #1
  %32 = load i32, ptr %31, align 4, !tbaa !5
  %33 = icmp slt i32 %29, %32
  br i1 %33, label %.thread.sink.split, label %34

34:                                               ; preds = %27, %19
  %35 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %20) #1
  %36 = load i32, ptr %35, align 4, !tbaa !5
  %37 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %13) #1
  %38 = load i32, ptr %37, align 4, !tbaa !5
  %39 = icmp sgt i32 %36, %38
  br i1 %39, label %51, label %40

40:                                               ; preds = %34
  %41 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %20) #1
  %42 = load i32, ptr %41, align 4, !tbaa !5
  %43 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %16) #1
  %44 = load i32, ptr %43, align 4, !tbaa !5
  %45 = icmp slt i32 %42, %44
  br i1 %45, label %51, label %46

46:                                               ; preds = %40
  %47 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %16) #1
  %48 = load i32, ptr %47, align 4, !tbaa !5
  %49 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %13) #1
  %50 = load i32, ptr %49, align 4, !tbaa !5
  %.not56 = icmp sgt i32 %48, %50
  br i1 %.not56, label %51, label %.thread.sink.split

51:                                               ; preds = %46, %34, %40
  %.151 = phi i32 [ %.05071, %46 ], [ %.05071, %34 ], [ %12, %40 ]
  %.148 = phi i32 [ %.04772, %46 ], [ %10, %34 ], [ %.04772, %40 ]
  %52 = add nsw i32 %.148, %.151
  %.not = icmp sgt i32 %.148, %.151
  br i1 %.not, label %.thread, label %8, !llvm.loop !9

.thread.sink.split:                               ; preds = %46, %27, %8
  %.lcssa85.sink = phi i64 [ %13, %8 ], [ %20, %27 ], [ %16, %46 ]
  %53 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %.lcssa85.sink) #1
  %54 = load i32, ptr %53, align 4, !tbaa !5
  br label %.thread

.thread:                                          ; preds = %51, %.thread.sink.split, %1
  %.2 = phi i32 [ -1, %1 ], [ %54, %.thread.sink.split ], [ -1, %51 ]
  ret i32 %.2
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass