; LLVM IR from Samson-Mano/EM_Propogation_simulation :: EM_Propogation_simulation/src/ImGui/imgui.ll (Z15ImStrTrimBlanksPc)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z15ImStrTrimBlanksPc(ptr noundef %0) #1 {
  %2 = alloca ptr, align 8
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  store ptr %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %3) #3
  %5 = load ptr, ptr %2, align 8, !tbaa !5
  store ptr %5, ptr %3, align 8, !tbaa !5
  br label %6

6:                                                ; preds = %20, %1
  %7 = load ptr, ptr %3, align 8, !tbaa !5
  %8 = getelementptr inbounds i8, ptr %7, i64 0
  %9 = load i8, ptr %8, align 1, !tbaa !9
  %10 = sext i8 %9 to i32
  %11 = icmp eq i32 %10, 32
  br i1 %11, label %18, label %12

12:                                               ; preds = %6
  %13 = load ptr, ptr %3, align 8, !tbaa !5
  %14 = getelementptr inbounds i8, ptr %13, i64 0
  %15 = load i8, ptr %14, align 1, !tbaa !9
  %16 = sext i8 %15 to i32
  %17 = icmp eq i32 %16, 9
  br label %18

18:                                               ; preds = %12, %6
  %19 = phi i1 [ true, %6 ], [ %17, %12 ]
  br i1 %19, label %20, label %23

20:                                               ; preds = %18
  %21 = load ptr, ptr %3, align 8, !tbaa !5
  %22 = getelementptr inbounds i8, ptr %21, i32 1
  store ptr %22, ptr %3, align 8, !tbaa !5
  br label %6, !llvm.loop !10

23:                                               ; preds = %18
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #3
  %24 = load ptr, ptr %3, align 8, !tbaa !5
  store ptr %24, ptr %4, align 8, !tbaa !5
  br label %25

25:                                               ; preds = %30, %23
  %26 = load ptr, ptr %3, align 8, !tbaa !5
  %27 = load i8, ptr %26, align 1, !tbaa !9
  %28 = sext i8 %27 to i32
  %29 = icmp ne i32 %28, 0
  br i1 %29, label %30, label %33

30:                                               ; preds = %25
  %31 = load ptr, ptr %3, align 8, !tbaa !5
  %32 = getelementptr inbounds i8, ptr %31, i32 1
  store ptr %32, ptr %3, align 8, !tbaa !5
  br label %25, !llvm.loop !12

33:                                               ; preds = %25
  br label %34

34:                                               ; preds = %54, %33
  %35 = load ptr, ptr %3, align 8, !tbaa !5
  %36 = load ptr, ptr %4, align 8, !tbaa !5
  %37 = icmp ugt ptr %35, %36
  br i1 %37, label %38, label %52

38:                                               ; preds = %34
  %39 = load ptr, ptr %3, align 8, !tbaa !5
  %40 = getelementptr inbounds i8, ptr %39, i64 -1
  %41 = load i8, ptr %40, align 1, !tbaa !9
  %42 = sext i8 %41 to i32
  %43 = icmp eq i32 %42, 32
  br i1 %43, label %50, label %44

44:                                               ; preds = %38
  %45 = load ptr, ptr %3, align 8, !tbaa !5
  %46 = getelementptr inbounds i8, ptr %45, i64 -1
  %47 = load i8, ptr %46, align 1, !tbaa !9
  %48 = sext i8 %47 to i32
  %49 = icmp eq i32 %48, 9
  br label %50

50:                                               ; preds = %44, %38
  %51 = phi i1 [ true, %38 ], [ %49, %44 ]
  br label %52

52:                                               ; preds = %50, %34
  %53 = phi i1 [ false, %34 ], [ %51, %50 ]
  br i1 %53, label %54, label %57

54:                                               ; preds = %52
  %55 = load ptr, ptr %3, align 8, !tbaa !5
  %56 = getelementptr inbounds i8, ptr %55, i32 -1
  store ptr %56, ptr %3, align 8, !tbaa !5
  br label %34, !llvm.loop !13

57:                                               ; preds = %52
  %58 = load ptr, ptr %4, align 8, !tbaa !5
  %59 = load ptr, ptr %2, align 8, !tbaa !5
  %60 = icmp ne ptr %58, %59
  br i1 %60, label %61, label %69

61:                                               ; preds = %57
  %62 = load ptr, ptr %2, align 8, !tbaa !5
  %63 = load ptr, ptr %4, align 8, !tbaa !5
  %64 = load ptr, ptr %3, align 8, !tbaa !5
  %65 = load ptr, ptr %4, align 8, !tbaa !5
  %66 = ptrtoint ptr %64 to i64
  %67 = ptrtoint ptr %65 to i64
  %68 = sub i64 %66, %67
  call void @llvm.memmove.p0.p0.i64(ptr align 1 %62, ptr align 1 %63, i64 %68, i1 false)
  br label %69

69:                                               ; preds = %61, %57
  %70 = load ptr, ptr %2, align 8, !tbaa !5
  %71 = load ptr, ptr %3, align 8, !tbaa !5
  %72 = load ptr, ptr %4, align 8, !tbaa !5
  %73 = ptrtoint ptr %71 to i64
  %74 = ptrtoint ptr %72 to i64
  %75 = sub i64 %73, %74
  %76 = getelementptr inbounds i8, ptr %70, i64 %75
  store i8 0, ptr %76, align 1, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %3) #3
  ret void
}

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memmove.p0.p0.i64(ptr nocapture writeonly, ptr nocapture readonly, i64, i1 immarg) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
!12 = distinct !{!12, !11}
!13 = distinct !{!13, !11}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind memory(readwrite, inaccessiblemem: none) uwtable
define dso_local void @_Z15ImStrTrimBlanksPc(ptr noundef %0) local_unnamed_addr #0 {
  br label %2

2:                                                ; preds = %.critedge, %1
  %.0 = phi ptr [ %0, %1 ], [ %4, %.critedge ]
  %3 = load i8, ptr %.0, align 1, !tbaa !5
  switch i8 %3, label %.lr.ph [
    i8 32, label %.critedge
    i8 9, label %.critedge
    i8 0, label %.critedge2
  ]

.critedge:                                        ; preds = %2, %2
  %4 = getelementptr inbounds i8, ptr %.0, i64 1
  br label %2, !llvm.loop !8

.preheader:                                       ; preds = %.lr.ph
  %5 = icmp ugt ptr %6, %.0
  br i1 %5, label %.lr.ph33, label %.critedge2

.lr.ph:                                           ; preds = %2, %.lr.ph
  %.131 = phi ptr [ %6, %.lr.ph ], [ %.0, %2 ]
  %6 = getelementptr inbounds i8, ptr %.131, i64 1
  %.pr = load i8, ptr %6, align 1, !tbaa !5
  %.not = icmp eq i8 %.pr, 0
  br i1 %.not, label %.preheader, label %.lr.ph, !llvm.loop !10

.lr.ph33:                                         ; preds = %.preheader, %.critedge4
  %.232 = phi ptr [ %7, %.critedge4 ], [ %6, %.preheader ]
  %7 = getelementptr inbounds i8, ptr %.232, i64 -1
  %8 = load i8, ptr %7, align 1, !tbaa !5
  switch i8 %8, label %.critedge2 [
    i8 32, label %.critedge4
    i8 9, label %.critedge4
  ]

.critedge4:                                       ; preds = %.lr.ph33, %.lr.ph33
  %9 = icmp ugt ptr %7, %.0
  br i1 %9, label %.lr.ph33, label %.critedge2, !llvm.loop !11

.critedge2:                                       ; preds = %2, %.critedge4, %.lr.ph33, %.preheader
  %.2.lcssa = phi ptr [ %6, %.preheader ], [ %.232, %.lr.ph33 ], [ %7, %.critedge4 ], [ %.0, %2 ]
  %.not28 = icmp eq ptr %.0, %0
  %.pre = ptrtoint ptr %.2.lcssa to i64
  %.pre38 = ptrtoint ptr %.0 to i64
  %.pre40 = sub i64 %.pre, %.pre38
  br i1 %.not28, label %.critedge2._crit_edge, label %10

10:                                               ; preds = %.critedge2
  tail call void @llvm.memmove.p0.p0.i64(ptr align 1 %0, ptr nonnull align 1 %.0, i64 %.pre40, i1 false)
  br label %.critedge2._crit_edge

.critedge2._crit_edge:                            ; preds = %.critedge2, %10
  %11 = getelementptr inbounds i8, ptr %0, i64 %.pre40
  store i8 0, ptr %11, align 1, !tbaa !5
  ret void
}

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memmove.p0.p0.i64(ptr nocapture writeonly, ptr nocapture readonly, i64, i1 immarg) #1

attributes #0 = { mustprogress nofree norecurse nosync nounwind memory(readwrite, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}
!8 = distinct !{!8, !9}
!9 = !{!"llvm.loop.mustprogress"}
!10 = distinct !{!10, !9}
!11 = distinct !{!11, !9}


; Effective O3 passes: BDCEPass,CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass