; LLVM IR from InductiveComputerScience/infracore :: drivers/screen-linux-x11 (screen-linux-x11)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local void @draw(ptr noundef %0, i32 noundef %1, i32 noundef %2) #0 {
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !9
  store i32 %2, ptr %6, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #2
  store i32 0, ptr %7, align 4, !tbaa !9
  store i32 0, ptr %7, align 4, !tbaa !9
  br label %8

8:                                                ; preds = %36, %3
  %9 = load i32, ptr %7, align 4, !tbaa !9
  %10 = load i32, ptr %5, align 4, !tbaa !9
  %11 = load i32, ptr %6, align 4, !tbaa !9
  %12 = mul nsw i32 %10, %11
  %13 = mul nsw i32 %12, 4
  %14 = icmp slt i32 %9, %13
  br i1 %14, label %15, label %39

15:                                               ; preds = %8
  %16 = load ptr, ptr %4, align 8, !tbaa !5
  %17 = load i32, ptr %7, align 4, !tbaa !9
  %18 = add nsw i32 %17, 0
  %19 = sext i32 %18 to i64
  %20 = getelementptr inbounds i8, ptr %16, i64 %19
  store i8 -1, ptr %20, align 1, !tbaa !11
  %21 = load ptr, ptr %4, align 8, !tbaa !5
  %22 = load i32, ptr %7, align 4, !tbaa !9
  %23 = add nsw i32 %22, 1
  %24 = sext i32 %23 to i64
  %25 = getelementptr inbounds i8, ptr %21, i64 %24
  store i8 -1, ptr %25, align 1, !tbaa !11
  %26 = load ptr, ptr %4, align 8, !tbaa !5
  %27 = load i32, ptr %7, align 4, !tbaa !9
  %28 = add nsw i32 %27, 2
  %29 = sext i32 %28 to i64
  %30 = getelementptr inbounds i8, ptr %26, i64 %29
  store i8 -1, ptr %30, align 1, !tbaa !11
  %31 = load ptr, ptr %4, align 8, !tbaa !5
  %32 = load i32, ptr %7, align 4, !tbaa !9
  %33 = add nsw i32 %32, 3
  %34 = sext i32 %33 to i64
  %35 = getelementptr inbounds i8, ptr %31, i64 %34
  store i8 0, ptr %35, align 1, !tbaa !11
  br label %36

36:                                               ; preds = %15
  %37 = load i32, ptr %7, align 4, !tbaa !9
  %38 = add nsw i32 %37, 4
  store i32 %38, ptr %7, align 4, !tbaa !9
  br label %8, !llvm.loop !12

39:                                               ; preds = %8
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #2
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nofree norecurse nosync nounwind memory(argmem: write) uwtable
define dso_local void @draw(ptr nocapture noundef writeonly %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 {
  %4 = shl i32 %1, 2
  %5 = mul i32 %4, %2
  %6 = icmp sgt i32 %5, 0
  br i1 %6, label %.lr.ph.preheader, label %._crit_edge

.lr.ph.preheader:                                 ; preds = %3
  %7 = zext nneg i32 %5 to i64
  %8 = add nsw i64 %7, -1
  %9 = lshr i64 %8, 2
  %10 = add nuw nsw i64 %9, 1
  %xtraiter = and i64 %10, 7
  %11 = icmp ult i32 %5, 29
  br i1 %11, label %._crit_edge.loopexit.unr-lcssa, label %.lr.ph.preheader.new

.lr.ph.preheader.new:                             ; preds = %.lr.ph.preheader
  %unroll_iter = and i64 %10, 9223372036854775800
  br label %.lr.ph

.lr.ph:                                           ; preds = %.lr.ph, %.lr.ph.preheader.new
  %indvars.iv = phi i64 [ 0, %.lr.ph.preheader.new ], [ %indvars.iv.next.7, %.lr.ph ]
  %niter = phi i64 [ 0, %.lr.ph.preheader.new ], [ %niter.next.7, %.lr.ph ]
  %12 = getelementptr inbounds i8, ptr %0, i64 %indvars.iv
  store <4 x i8> <i8 -1, i8 -1, i8 -1, i8 0>, ptr %12, align 1, !tbaa !5
  %indvars.iv.next = or disjoint i64 %indvars.iv, 4
  %13 = getelementptr inbounds i8, ptr %0, i64 %indvars.iv.next
  store <4 x i8> <i8 -1, i8 -1, i8 -1, i8 0>, ptr %13, align 1, !tbaa !5
  %indvars.iv.next.1 = or disjoint i64 %indvars.iv, 8
  %14 = getelementptr inbounds i8, ptr %0, i64 %indvars.iv.next.1
  store <4 x i8> <i8 -1, i8 -1, i8 -1, i8 0>, ptr %14, align 1, !tbaa !5
  %indvars.iv.next.2 = or disjoint i64 %indvars.iv, 12
  %15 = getelementptr inbounds i8, ptr %0, i64 %indvars.iv.next.2
  store <4 x i8> <i8 -1, i8 -1, i8 -1, i8 0>, ptr %15, align 1, !tbaa !5
  %indvars.iv.next.3 = or disjoint i64 %indvars.iv, 16
  %16 = getelementptr inbounds i8, ptr %0, i64 %indvars.iv.next.3
  store <4 x i8> <i8 -1, i8 -1, i8 -1, i8 0>, ptr %16, align 1, !tbaa !5
  %indvars.iv.next.4 = or disjoint i64 %indvars.iv, 20
  %17 = getelementptr inbounds i8, ptr %0, i64 %indvars.iv.next.4
  store <4 x i8> <i8 -1, i8 -1, i8 -1, i8 0>, ptr %17, align 1, !tbaa !5
  %indvars.iv.next.5 = or disjoint i64 %indvars.iv, 24
  %18 = getelementptr inbounds i8, ptr %0, i64 %indvars.iv.next.5
  store <4 x i8> <i8 -1, i8 -1, i8 -1, i8 0>, ptr %18, align 1, !tbaa !5
  %indvars.iv.next.6 = or disjoint i64 %indvars.iv, 28
  %19 = getelementptr inbounds i8, ptr %0, i64 %indvars.iv.next.6
  store <4 x i8> <i8 -1, i8 -1, i8 -1, i8 0>, ptr %19, align 1, !tbaa !5
  %indvars.iv.next.7 = add nuw nsw i64 %indvars.iv, 32
  %niter.next.7 = add i64 %niter, 8
  %niter.ncmp.7.not = icmp eq i64 %niter.next.7, %unroll_iter
  br i1 %niter.ncmp.7.not, label %._crit_edge.loopexit.unr-lcssa, label %.lr.ph, !llvm.loop !8

._crit_edge.loopexit.unr-lcssa:                   ; preds = %.lr.ph, %.lr.ph.preheader
  %indvars.iv.unr = phi i64 [ 0, %.lr.ph.preheader ], [ %indvars.iv.next.7, %.lr.ph ]
  %lcmp.mod.not = icmp eq i64 %xtraiter, 0
  br i1 %lcmp.mod.not, label %._crit_edge, label %.lr.ph.epil

.lr.ph.epil:                                      ; preds = %._crit_edge.loopexit.unr-lcssa, %.lr.ph.epil
  %indvars.iv.epil = phi i64 [ %indvars.iv.next.epil, %.lr.ph.epil ], [ %indvars.iv.unr, %._crit_edge.loopexit.unr-lcssa ]
  %epil.iter = phi i64 [ %epil.iter.next, %.lr.ph.epil ], [ 0, %._crit_edge.loopexit.unr-lcssa ]
  %20 = getelementptr inbounds i8, ptr %0, i64 %indvars.iv.epil
  store <4 x i8> <i8 -1, i8 -1, i8 -1, i8 0>, ptr %20, align 1, !tbaa !5
  %indvars.iv.next.epil = add nuw nsw i64 %indvars.iv.epil, 4
  %epil.iter.next = add i64 %epil.iter, 1
  %epil.iter.cmp.not = icmp eq i64 %epil.iter.next, %xtraiter
  br i1 %epil.iter.cmp.not, label %._crit_edge, label %.lr.ph.epil, !llvm.loop !10

._crit_edge:                                      ; preds = %._crit_edge.loopexit.unr-lcssa, %.lr.ph.epil, %3
  ret void
}

attributes #0 = { nofree norecurse nosync nounwind memory(argmem: write) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = distinct !{!8, !9}
!9 = !{!"llvm.loop.mustprogress"}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.unroll.disable"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SLPVectorizerPass,SROAPass,SimplifyCFGPass