; LLVM IR from AF-GRILL/DISPluginForUnreal :: Source/ThirdParty/include/dis6 (GridAxisRecordRepresentation1)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.DIS::GridAxisRecordRepresentation1" = type { %"class.DIS::GridAxisRecord.base", float, float, i16, %"class.std::vector" }
%"class.DIS::GridAxisRecord.base" = type <{ ptr, i16, i16 }>
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<DIS::TwoByteChunk, std::allocator<DIS::TwoByteChunk>>::_Vector_impl" }
%"struct.std::_Vector_base<DIS::TwoByteChunk, std::allocator<DIS::TwoByteChunk>>::_Vector_impl" = type { %"struct.std::_Vector_base<DIS::TwoByteChunk, std::allocator<DIS::TwoByteChunk>>::_Vector_impl_data" }
%"struct.std::_Vector_base<DIS::TwoByteChunk, std::allocator<DIS::TwoByteChunk>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@_ZTVN3DIS29GridAxisRecordRepresentation1E = external dso_local unnamed_addr constant { [7 x ptr] }, align 8

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN3DIS29GridAxisRecordRepresentation1C2Ev(ptr noundef nonnull align 8 dereferenceable(48) %0) unnamed_addr #0 align 2 {
  %2 = alloca ptr, align 8
  store ptr %0, ptr %2, align 8, !tbaa !5
  %3 = load ptr, ptr %2, align 8
  call void @_ZN3DIS14GridAxisRecordC2Ev(ptr noundef nonnull align 8 dereferenceable(12) %3)
  store ptr getelementptr inbounds inrange(-16, 40) ({ [7 x ptr] }, ptr @_ZTVN3DIS29GridAxisRecordRepresentation1E, i32 0, i32 0, i32 2), ptr %3, align 8, !tbaa !9
  %4 = getelementptr inbounds %"class.DIS::GridAxisRecordRepresentation1", ptr %3, i32 0, i32 1
  store float 0.000000e+00, ptr %4, align 4, !tbaa !11
  %5 = getelementptr inbounds %"class.DIS::GridAxisRecordRepresentation1", ptr %3, i32 0, i32 2
  store float 0.000000e+00, ptr %5, align 8, !tbaa !20
  %6 = getelementptr inbounds %"class.DIS::GridAxisRecordRepresentation1", ptr %3, i32 0, i32 3
  store i16 0, ptr %6, align 4, !tbaa !21
  %7 = getelementptr inbounds %"class.DIS::GridAxisRecordRepresentation1", ptr %3, i32 0, i32 4
  call void @_ZNSt6vectorIN3DIS12TwoByteChunkESaIS1_EEC2Ev(ptr noundef nonnull align 8 dereferenceable(24) %7) #3
  ret void
}

declare void @_ZN3DIS14GridAxisRecordC2Ev(ptr noundef nonnull align 8 dereferenceable(12)) unnamed_addr #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIN3DIS12TwoByteChunkESaIS1_EEC2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #2 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"vtable pointer", !8, i64 0}
!11 = !{!12, !15, i64 12}
!12 = !{!"_ZTSN3DIS29GridAxisRecordRepresentation1E", !13, i64 0, !15, i64 12, !15, i64 16, !14, i64 20, !16, i64 24}
!13 = !{!"_ZTSN3DIS14GridAxisRecordE", !14, i64 8, !14, i64 10}
!14 = !{!"short", !7, i64 0}
!15 = !{!"float", !7, i64 0}
!16 = !{!"_ZTSSt6vectorIN3DIS12TwoByteChunkESaIS1_EE", !17, i64 0}
!17 = !{!"_ZTSSt12_Vector_baseIN3DIS12TwoByteChunkESaIS1_EE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseIN3DIS12TwoByteChunkESaIS1_EE12_Vector_implE", !19, i64 0}
!19 = !{!"_ZTSNSt12_Vector_baseIN3DIS12TwoByteChunkESaIS1_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!20 = !{!12, !15, i64 16}
!21 = !{!12, !14, i64 20}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@_ZTVN3DIS29GridAxisRecordRepresentation1E = external dso_local unnamed_addr constant { [7 x ptr] }, align 8

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN3DIS29GridAxisRecordRepresentation1C2Ev(ptr noundef nonnull align 8 dereferenceable(48) %0) unnamed_addr #0 align 2 {
  tail call void @_ZN3DIS14GridAxisRecordC2Ev(ptr noundef nonnull align 8 dereferenceable(12) %0)
  store ptr getelementptr inbounds inrange(-16, 40) (i8, ptr @_ZTVN3DIS29GridAxisRecordRepresentation1E, i64 16), ptr %0, align 8, !tbaa !5
  %2 = getelementptr inbounds i8, ptr %0, i64 12
  store <2 x float> zeroinitializer, ptr %2, align 4, !tbaa !8
  %3 = getelementptr inbounds i8, ptr %0, i64 20
  store i16 0, ptr %3, align 4, !tbaa !11
  %4 = getelementptr inbounds i8, ptr %0, i64 24
  tail call void @_ZNSt6vectorIN3DIS12TwoByteChunkESaIS1_EEC2Ev(ptr noundef nonnull align 8 dereferenceable(24) %4) #3
  ret void
}

declare void @_ZN3DIS14GridAxisRecordC2Ev(ptr noundef nonnull align 8 dereferenceable(12)) unnamed_addr #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIN3DIS12TwoByteChunkESaIS1_EEC2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #2 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"vtable pointer", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}
!8 = !{!9, !9, i64 0}
!9 = !{!"float", !10, i64 0}
!10 = !{!"omnipotent char", !7, i64 0}
!11 = !{!12, !14, i64 20}
!12 = !{!"_ZTSN3DIS29GridAxisRecordRepresentation1E", !13, i64 0, !9, i64 12, !9, i64 16, !14, i64 20, !15, i64 24}
!13 = !{!"_ZTSN3DIS14GridAxisRecordE", !14, i64 8, !14, i64 10}
!14 = !{!"short", !10, i64 0}
!15 = !{!"_ZTSSt6vectorIN3DIS12TwoByteChunkESaIS1_EE", !16, i64 0}
!16 = !{!"_ZTSSt12_Vector_baseIN3DIS12TwoByteChunkESaIS1_EE", !17, i64 0}
!17 = !{!"_ZTSNSt12_Vector_baseIN3DIS12TwoByteChunkESaIS1_EE12_Vector_implE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseIN3DIS12TwoByteChunkESaIS1_EE17_Vector_impl_dataE", !19, i64 0, !19, i64 8, !19, i64 16}
!19 = !{!"any pointer", !10, i64 0}


; Effective O3 passes: InstCombinePass,SLPVectorizerPass,SROAPass,TailCallElimPass