; LLVM IR from indygreg/python-zstandard :: zstd (zstd)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @MEM_writeLE16(ptr noundef, i16 noundef zeroext) #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @MEM_writeLE32(ptr noundef, i32 noundef) #1

; Function Attrs: nounwind uwtable
define dso_local i64 @ZSTD_compressRleLiteralsBlock(ptr noundef %0, i64 noundef %1, ptr noundef %2, i64 noundef %3) #2 {
  %5 = alloca ptr, align 8
  %6 = alloca i64, align 8
  %7 = alloca ptr, align 8
  %8 = alloca i64, align 8
  %9 = alloca ptr, align 8
  %10 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store i64 %1, ptr %6, align 8, !tbaa !9
  store ptr %2, ptr %7, align 8, !tbaa !5
  store i64 %3, ptr %8, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #3
  %11 = load ptr, ptr %5, align 8, !tbaa !5
  store ptr %11, ptr %9, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  %12 = load i64, ptr %8, align 8, !tbaa !9
  %13 = icmp ugt i64 %12, 31
  %14 = zext i1 %13 to i32
  %15 = add nsw i32 1, %14
  %16 = load i64, ptr %8, align 8, !tbaa !9
  %17 = icmp ugt i64 %16, 4095
  %18 = zext i1 %17 to i32
  %19 = add nsw i32 %15, %18
  store i32 %19, ptr %10, align 4, !tbaa !11
  %20 = load i64, ptr %6, align 8, !tbaa !9
  %21 = load i32, ptr %10, align 4, !tbaa !11
  switch i32 %21, label %41 [
    i32 1, label %22
    i32 2, label %29
    i32 3, label %35
  ]

22:                                               ; preds = %4
  %23 = load i64, ptr %8, align 8, !tbaa !9
  %24 = shl i64 %23, 3
  %25 = add i64 1, %24
  %26 = trunc i64 %25 to i8
  %27 = load ptr, ptr %9, align 8, !tbaa !5
  %28 = getelementptr inbounds i8, ptr %27, i64 0
  store i8 %26, ptr %28, align 1, !tbaa !13
  br label %42

29:                                               ; preds = %4
  %30 = load ptr, ptr %9, align 8, !tbaa !5
  %31 = load i64, ptr %8, align 8, !tbaa !9
  %32 = shl i64 %31, 4
  %33 = add i64 5, %32
  %34 = trunc i64 %33 to i16
  call void @MEM_writeLE16(ptr noundef %30, i16 noundef zeroext %34)
  br label %42

35:                                               ; preds = %4
  %36 = load ptr, ptr %9, align 8, !tbaa !5
  %37 = load i64, ptr %8, align 8, !tbaa !9
  %38 = shl i64 %37, 4
  %39 = add i64 13, %38
  %40 = trunc i64 %39 to i32
  call void @MEM_writeLE32(ptr noundef %36, i32 noundef %40)
  br label %42

41:                                               ; preds = %4
  br label %42

42:                                               ; preds = %41, %35, %29, %22
  %43 = load ptr, ptr %7, align 8, !tbaa !5
  %44 = load i8, ptr %43, align 1, !tbaa !13
  %45 = load ptr, ptr %9, align 8, !tbaa !5
  %46 = load i32, ptr %10, align 4, !tbaa !11
  %47 = zext i32 %46 to i64
  %48 = getelementptr inbounds i8, ptr %45, i64 %47
  store i8 %44, ptr %48, align 1, !tbaa !13
  br label %49

49:                                               ; preds = %42
  br label %50

50:                                               ; preds = %49
  br label %51

51:                                               ; preds = %50
  %52 = load i32, ptr %10, align 4, !tbaa !11
  %53 = add i32 %52, 1
  %54 = zext i32 %53 to i64
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #3
  ret i64 %54
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!7, !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @MEM_writeLE16(ptr noundef, i16 noundef zeroext) local_unnamed_addr #0

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @MEM_writeLE32(ptr noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local range(i64 2, 5) i64 @ZSTD_compressRleLiteralsBlock(ptr noundef %0, i64 noundef %1, ptr nocapture noundef readonly %2, i64 noundef %3) local_unnamed_addr #1 {
  %5 = icmp ugt i64 %3, 31
  %6 = select i1 %5, i32 2, i32 1
  %7 = icmp ugt i64 %3, 4095
  %8 = zext i1 %7 to i32
  %9 = add nuw nsw i32 %6, %8
  switch i32 %9, label %default.unreachable16 [
    i32 1, label %10
    i32 2, label %13
    i32 3, label %16
  ]

10:                                               ; preds = %4
  %.tr15 = trunc i64 %3 to i8
  %11 = shl i8 %.tr15, 3
  %12 = or disjoint i8 %11, 1
  store i8 %12, ptr %0, align 1, !tbaa !5
  br label %19

13:                                               ; preds = %4
  %.tr14 = trunc i64 %3 to i16
  %14 = shl i16 %.tr14, 4
  %15 = or disjoint i16 %14, 5
  tail call void @MEM_writeLE16(ptr noundef %0, i16 noundef zeroext %15)
  br label %19

16:                                               ; preds = %4
  %.tr = trunc i64 %3 to i32
  %17 = shl i32 %.tr, 4
  %18 = or disjoint i32 %17, 13
  tail call void @MEM_writeLE32(ptr noundef %0, i32 noundef %18)
  br label %19

default.unreachable16:                            ; preds = %4
  unreachable

19:                                               ; preds = %16, %13, %10
  %20 = load i8, ptr %2, align 1, !tbaa !5
  %21 = zext nneg i32 %9 to i64
  %22 = getelementptr inbounds i8, ptr %0, i64 %21
  store i8 %20, ptr %22, align 1, !tbaa !5
  %23 = add nuw nsw i32 %9, 1
  %24 = zext nneg i32 %23 to i64
  ret i64 %24
}

attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass