; LLVM IR from huawei-noah/bolt :: compute/tensor/src/cpu/x86/int8/avx (quantize)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.TensorDesc = type { i32, i32, i32, [20 x i32] }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z17tensorNumElements10TensorDesc(ptr noundef byval(%struct.TensorDesc) align 8) #1

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z15transformU8ToI810TensorDescPKhPS_Pa(ptr noundef byval(%struct.TensorDesc) align 8 %0, ptr noundef %1, ptr noundef %2, ptr noundef %3) #3 {
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  %9 = alloca %struct.TensorDesc, align 8
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  store ptr %1, ptr %5, align 8, !tbaa !5
  store ptr %2, ptr %6, align 8, !tbaa !5
  store ptr %3, ptr %7, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #4
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %9, ptr align 8 %0, i64 92, i1 false), !tbaa.struct !9
  %13 = call noundef i32 @_Z17tensorNumElements10TensorDesc(ptr noundef byval(%struct.TensorDesc) align 8 %9)
  store i32 %13, ptr %8, align 4, !tbaa !14
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #4
  %14 = load i32, ptr %8, align 4, !tbaa !14
  %15 = udiv i32 %14, 8
  store i32 %15, ptr %10, align 4, !tbaa !14
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #4
  %16 = load i32, ptr %8, align 4, !tbaa !14
  %17 = urem i32 %16, 8
  store i32 %17, ptr %11, align 4, !tbaa !14
  %18 = load ptr, ptr %5, align 8, !tbaa !5
  %19 = load ptr, ptr %7, align 8, !tbaa !5
  %20 = load i32, ptr %10, align 4, !tbaa !14
  %21 = call { ptr, ptr } asm sideeffect "mov $$0x80, %ebx \0A\09vmovd %ebx, %xmm1                    \0A\09vpbroadcastb %xmm1, %ymm2            \0A\09mov $2, %ebx \0A\09cmp $$0x0, %ebx                         \0A\09je 1f                                    \0A\09.align 16                             \0A\090:                                    \0A\09vpaddb ($0), %ymm2, %ymm0              \0A\09vmovups %ymm0, ($1)              \0A\09add $$0x20, $0                         \0A\09add $$0x20, $1                         \0A\09dec %ebx                             \0A\09jg 0b                                 \0A\09.align 16                             \0A\091:                                    \0A\09", "=r,=r,r,0,1,~{ebx},~{ymm0},~{ymm1},~{ymm2},~{memory},~{cc},~{dirflag},~{fpsr},~{flags}"(i32 %20, ptr %18, ptr %19) #4, !srcloc !17
  %22 = extractvalue { ptr, ptr } %21, 0
  %23 = extractvalue { ptr, ptr } %21, 1
  store ptr %22, ptr %5, align 8, !tbaa !5
  store ptr %23, ptr %7, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #4
  store i32 0, ptr %12, align 4, !tbaa !14
  br label %24

24:                                               ; preds = %42, %4
  %25 = load i32, ptr %12, align 4, !tbaa !14
  %26 = load i32, ptr %11, align 4, !tbaa !14
  %27 = icmp ult i32 %25, %26
  br i1 %27, label %29, label %28

28:                                               ; preds = %24
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #4
  br label %45

29:                                               ; preds = %24
  %30 = load ptr, ptr %5, align 8, !tbaa !5
  %31 = load i32, ptr %12, align 4, !tbaa !14
  %32 = zext i32 %31 to i64
  %33 = getelementptr inbounds i8, ptr %30, i64 %32
  %34 = load i8, ptr %33, align 1, !tbaa !16
  %35 = zext i8 %34 to i32
  %36 = sub nsw i32 %35, 128
  %37 = trunc i32 %36 to i8
  %38 = load ptr, ptr %7, align 8, !tbaa !5
  %39 = load i32, ptr %12, align 4, !tbaa !14
  %40 = zext i32 %39 to i64
  %41 = getelementptr inbounds i8, ptr %38, i64 %40
  store i8 %37, ptr %41, align 1, !tbaa !16
  br label %42

42:                                               ; preds = %29
  %43 = load i32, ptr %12, align 4, !tbaa !14
  %44 = add i32 %43, 1
  store i32 %44, ptr %12, align 4, !tbaa !14
  br label %24, !llvm.loop !18

45:                                               ; preds = %28
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #4
  ret i32 0
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{i64 0, i64 4, !10, i64 4, i64 4, !12, i64 8, i64 4, !14, i64 12, i64 80, !16}
!10 = !{!11, !11, i64 0}
!11 = !{!"_ZTS8DataType", !7, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"_ZTS10DataFormat", !7, i64 0}
!14 = !{!15, !15, i64 0}
!15 = !{!"int", !7, i64 0}
!16 = !{!7, !7, i64 0}
!17 = !{i64 12134, i64 12154, i64 12226, i64 12298, i64 12345, i64 12418, i64 12492, i64 12563, i64 12634, i64 12708, i64 12775, i64 12846, i64 12917, i64 12988, i64 13059, i64 13132, i64 13203}
!18 = distinct !{!18, !19}
!19 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.TensorDesc = type { i32, i32, i32, [20 x i32] }

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z17tensorNumElements10TensorDesc(ptr noundef byval(%struct.TensorDesc) align 8) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z15transformU8ToI810TensorDescPKhPS_Pa(ptr nocapture noundef readonly byval(%struct.TensorDesc) align 8 %0, ptr noundef %1, ptr nocapture noundef readnone %2, ptr noundef %3) local_unnamed_addr #1 {
  %5 = tail call noundef i32 @_Z17tensorNumElements10TensorDesc(ptr noundef nonnull byval(%struct.TensorDesc) align 8 %0)
  %6 = lshr i32 %5, 3
  %7 = and i32 %5, 7
  %8 = tail call { ptr, ptr } asm sideeffect "mov $$0x80, %ebx \0A\09vmovd %ebx, %xmm1                    \0A\09vpbroadcastb %xmm1, %ymm2            \0A\09mov $2, %ebx \0A\09cmp $$0x0, %ebx                         \0A\09je 1f                                    \0A\09.align 16                             \0A\090:                                    \0A\09vpaddb ($0), %ymm2, %ymm0              \0A\09vmovups %ymm0, ($1)              \0A\09add $$0x20, $0                         \0A\09add $$0x20, $1                         \0A\09dec %ebx                             \0A\09jg 0b                                 \0A\09.align 16                             \0A\091:                                    \0A\09", "=r,=r,r,0,1,~{ebx},~{ymm0},~{ymm1},~{ymm2},~{memory},~{cc},~{dirflag},~{fpsr},~{flags}"(i32 %6, ptr %1, ptr %3) #2, !srcloc !5
  %9 = extractvalue { ptr, ptr } %8, 0
  %10 = extractvalue { ptr, ptr } %8, 1
  %.not = icmp eq i32 %7, 0
  br i1 %.not, label %._crit_edge, label %.lr.ph

._crit_edge:                                      ; preds = %.lr.ph, %.lr.ph.1, %.lr.ph.2, %.lr.ph.3, %.lr.ph.4, %.lr.ph.5, %.lr.ph.6, %4
  ret i32 0

.lr.ph:                                           ; preds = %4
  %11 = load i8, ptr %9, align 1, !tbaa !6
  %12 = xor i8 %11, -128
  store i8 %12, ptr %10, align 1, !tbaa !6
  %exitcond.not = icmp eq i32 %7, 1
  br i1 %exitcond.not, label %._crit_edge, label %.lr.ph.1, !llvm.loop !9

.lr.ph.1:                                         ; preds = %.lr.ph
  %13 = getelementptr inbounds i8, ptr %9, i64 1
  %14 = load i8, ptr %13, align 1, !tbaa !6
  %15 = xor i8 %14, -128
  %16 = getelementptr inbounds i8, ptr %10, i64 1
  store i8 %15, ptr %16, align 1, !tbaa !6
  %exitcond.not.1 = icmp eq i32 %7, 2
  br i1 %exitcond.not.1, label %._crit_edge, label %.lr.ph.2, !llvm.loop !9

.lr.ph.2:                                         ; preds = %.lr.ph.1
  %17 = getelementptr inbounds i8, ptr %9, i64 2
  %18 = load i8, ptr %17, align 1, !tbaa !6
  %19 = xor i8 %18, -128
  %20 = getelementptr inbounds i8, ptr %10, i64 2
  store i8 %19, ptr %20, align 1, !tbaa !6
  %exitcond.not.2 = icmp eq i32 %7, 3
  br i1 %exitcond.not.2, label %._crit_edge, label %.lr.ph.3, !llvm.loop !9

.lr.ph.3:                                         ; preds = %.lr.ph.2
  %21 = getelementptr inbounds i8, ptr %9, i64 3
  %22 = load i8, ptr %21, align 1, !tbaa !6
  %23 = xor i8 %22, -128
  %24 = getelementptr inbounds i8, ptr %10, i64 3
  store i8 %23, ptr %24, align 1, !tbaa !6
  %exitcond.not.3 = icmp eq i32 %7, 4
  br i1 %exitcond.not.3, label %._crit_edge, label %.lr.ph.4, !llvm.loop !9

.lr.ph.4:                                         ; preds = %.lr.ph.3
  %25 = getelementptr inbounds i8, ptr %9, i64 4
  %26 = load i8, ptr %25, align 1, !tbaa !6
  %27 = xor i8 %26, -128
  %28 = getelementptr inbounds i8, ptr %10, i64 4
  store i8 %27, ptr %28, align 1, !tbaa !6
  %exitcond.not.4 = icmp eq i32 %7, 5
  br i1 %exitcond.not.4, label %._crit_edge, label %.lr.ph.5, !llvm.loop !9

.lr.ph.5:                                         ; preds = %.lr.ph.4
  %29 = getelementptr inbounds i8, ptr %9, i64 5
  %30 = load i8, ptr %29, align 1, !tbaa !6
  %31 = xor i8 %30, -128
  %32 = getelementptr inbounds i8, ptr %10, i64 5
  store i8 %31, ptr %32, align 1, !tbaa !6
  %exitcond.not.5 = icmp eq i32 %7, 6
  br i1 %exitcond.not.5, label %._crit_edge, label %.lr.ph.6, !llvm.loop !9

.lr.ph.6:                                         ; preds = %.lr.ph.5
  %33 = getelementptr inbounds i8, ptr %9, i64 6
  %34 = load i8, ptr %33, align 1, !tbaa !6
  %35 = xor i8 %34, -128
  %36 = getelementptr inbounds i8, ptr %10, i64 6
  store i8 %35, ptr %36, align 1, !tbaa !6
  br label %._crit_edge
}

attributes #0 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{i64 12134, i64 12154, i64 12226, i64 12298, i64 12345, i64 12418, i64 12492, i64 12563, i64 12634, i64 12708, i64 12775, i64 12846, i64 12917, i64 12988, i64 13059, i64 13132, i64 13203}
!6 = !{!7, !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,MemCpyOptPass,PostOrderFunctionAttrsPass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass