; LLVM IR from eclipse-threadx/threadx :: common/src/txe_event_flags_get.ll (txe_event_flags_get)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.TX_THREAD_STRUCT = type { i64, i64, ptr, ptr, ptr, i64, i64, i64, ptr, ptr, ptr, i32, ptr, ptr, i32, i32, i32, i32, i32, ptr, ptr, i64, %struct.TX_TIMER_INTERNAL_STRUCT, ptr, ptr, ptr, ptr, i64, ptr, i32, i32, ptr, ptr, ptr, i32, i32, i32, i32, ptr, ptr, ptr, i64 }
%struct.TX_TIMER_INTERNAL_STRUCT = type { i64, i64, ptr, i64, ptr, ptr, ptr }
%struct.TX_EVENT_FLAGS_GROUP_STRUCT = type { i64, ptr, i64, i32, ptr, i32, ptr, ptr, i64, ptr }

@_tx_thread_system_state = external global i64, align 8
@_tx_thread_current_ptr = external global ptr, align 8
@_tx_timer_thread = external global %struct.TX_THREAD_STRUCT, align 8

; Function Attrs: nounwind uwtable
define dso_local i32 @_txe_event_flags_get(ptr noundef %0, i64 noundef %1, i32 noundef %2, ptr noundef %3, i64 noundef %4) #0 {
  %6 = alloca ptr, align 8
  %7 = alloca i64, align 8
  %8 = alloca i32, align 4
  %9 = alloca ptr, align 8
  %10 = alloca i64, align 8
  %11 = alloca i32, align 4
  %12 = alloca ptr, align 8
  store ptr %0, ptr %6, align 8, !tbaa !5
  store i64 %1, ptr %7, align 8, !tbaa !9
  store i32 %2, ptr %8, align 4, !tbaa !11
  store ptr %3, ptr %9, align 8, !tbaa !5
  store i64 %4, ptr %10, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #3
  store i32 0, ptr %11, align 4, !tbaa !11
  %13 = load ptr, ptr %6, align 8, !tbaa !5
  %14 = icmp eq ptr %13, null
  br i1 %14, label %15, label %16

15:                                               ; preds = %5
  store i32 6, ptr %11, align 4, !tbaa !11
  br label %43

16:                                               ; preds = %5
  %17 = load ptr, ptr %6, align 8, !tbaa !5
  %18 = getelementptr inbounds %struct.TX_EVENT_FLAGS_GROUP_STRUCT, ptr %17, i32 0, i32 0
  %19 = load i64, ptr %18, align 8, !tbaa !13
  %20 = icmp ne i64 %19, 1146504270
  br i1 %20, label %21, label %22

21:                                               ; preds = %16
  store i32 6, ptr %11, align 4, !tbaa !11
  br label %42

22:                                               ; preds = %16
  %23 = load ptr, ptr %9, align 8, !tbaa !5
  %24 = icmp eq ptr %23, null
  br i1 %24, label %25, label %26

25:                                               ; preds = %22
  store i32 3, ptr %11, align 4, !tbaa !11
  br label %41

26:                                               ; preds = %22
  %27 = load i64, ptr %10, align 8, !tbaa !9
  %28 = icmp ne i64 %27, 0
  br i1 %28, label %29, label %40

29:                                               ; preds = %26
  %30 = load i64, ptr @_tx_thread_system_state, align 8, !tbaa !9
  %31 = icmp ne i64 %30, 0
  br i1 %31, label %32, label %33

32:                                               ; preds = %29
  store i32 4, ptr %11, align 4, !tbaa !11
  br label %39

33:                                               ; preds = %29
  %34 = load ptr, ptr @_tx_thread_current_ptr, align 8, !tbaa !5
  store ptr %34, ptr %12, align 8, !tbaa !5
  %35 = load ptr, ptr %12, align 8, !tbaa !5
  %36 = icmp eq ptr %35, @_tx_timer_thread
  br i1 %36, label %37, label %38

37:                                               ; preds = %33
  store i32 4, ptr %11, align 4, !tbaa !11
  br label %38

38:                                               ; preds = %37, %33
  br label %39

39:                                               ; preds = %38, %32
  br label %40

40:                                               ; preds = %39, %26
  br label %41

41:                                               ; preds = %40, %25
  br label %42

42:                                               ; preds = %41, %21
  br label %43

43:                                               ; preds = %42, %15
  %44 = load i32, ptr %11, align 4, !tbaa !11
  %45 = icmp eq i32 %44, 0
  br i1 %45, label %46, label %51

46:                                               ; preds = %43
  %47 = load i32, ptr %8, align 4, !tbaa !11
  %48 = icmp ugt i32 %47, 3
  br i1 %48, label %49, label %50

49:                                               ; preds = %46
  store i32 8, ptr %11, align 4, !tbaa !11
  br label %50

50:                                               ; preds = %49, %46
  br label %51

51:                                               ; preds = %50, %43
  %52 = load i32, ptr %11, align 4, !tbaa !11
  %53 = icmp eq i32 %52, 0
  br i1 %53, label %54, label %61

54:                                               ; preds = %51
  %55 = load ptr, ptr %6, align 8, !tbaa !5
  %56 = load i64, ptr %7, align 8, !tbaa !9
  %57 = load i32, ptr %8, align 4, !tbaa !11
  %58 = load ptr, ptr %9, align 8, !tbaa !5
  %59 = load i64, ptr %10, align 8, !tbaa !9
  %60 = call i32 @_tx_event_flags_get(ptr noundef %55, i64 noundef %56, i32 noundef %57, ptr noundef %58, i64 noundef %59)
  store i32 %60, ptr %11, align 4, !tbaa !11
  br label %61

61:                                               ; preds = %54, %51
  %62 = load i32, ptr %11, align 4, !tbaa !11
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #3
  ret i32 %62
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare i32 @_tx_event_flags_get(ptr noundef, i64 noundef, i32 noundef, ptr noundef, i64 noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!14, !10, i64 0}
!14 = !{!"TX_EVENT_FLAGS_GROUP_STRUCT", !10, i64 0, !6, i64 8, !10, i64 16, !12, i64 24, !6, i64 32, !12, i64 40, !6, i64 48, !6, i64 56, !10, i64 64, !6, i64 72}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.TX_THREAD_STRUCT = type { i64, i64, ptr, ptr, ptr, i64, i64, i64, ptr, ptr, ptr, i32, ptr, ptr, i32, i32, i32, i32, i32, ptr, ptr, i64, %struct.TX_TIMER_INTERNAL_STRUCT, ptr, ptr, ptr, ptr, i64, ptr, i32, i32, ptr, ptr, ptr, i32, i32, i32, i32, ptr, ptr, ptr, i64 }
%struct.TX_TIMER_INTERNAL_STRUCT = type { i64, i64, ptr, i64, ptr, ptr, ptr }

@_tx_thread_system_state = external local_unnamed_addr global i64, align 8
@_tx_thread_current_ptr = external local_unnamed_addr global ptr, align 8
@_tx_timer_thread = external global %struct.TX_THREAD_STRUCT, align 8

; Function Attrs: nounwind uwtable
define dso_local i32 @_txe_event_flags_get(ptr noundef %0, i64 noundef %1, i32 noundef %2, ptr noundef %3, i64 noundef %4) local_unnamed_addr #0 {
  %6 = icmp eq ptr %0, null
  br i1 %6, label %17, label %7

7:                                                ; preds = %5
  %8 = load i64, ptr %0, align 8, !tbaa !5
  %.not = icmp eq i64 %8, 1146504270
  br i1 %.not, label %9, label %17

9:                                                ; preds = %7
  %10 = icmp eq ptr %3, null
  br i1 %10, label %17, label %11

11:                                               ; preds = %9
  %.not15 = icmp eq i64 %4, 0
  br i1 %.not15, label %17, label %12

12:                                               ; preds = %11
  %13 = load i64, ptr @_tx_thread_system_state, align 8, !tbaa !12
  %.not16 = icmp eq i64 %13, 0
  br i1 %.not16, label %14, label %17

14:                                               ; preds = %12
  %15 = load ptr, ptr @_tx_thread_current_ptr, align 8, !tbaa !13
  %16 = icmp ne ptr %15, @_tx_timer_thread
  %spec.select17 = select i1 %16, i32 0, i32 4
  br label %17

17:                                               ; preds = %14, %12, %9, %7, %5, %11
  %18 = phi i1 [ true, %11 ], [ false, %5 ], [ false, %7 ], [ false, %9 ], [ false, %12 ], [ %16, %14 ]
  %.0 = phi i32 [ 0, %11 ], [ 6, %5 ], [ 6, %7 ], [ 3, %9 ], [ 4, %12 ], [ %spec.select17, %14 ]
  %19 = icmp ugt i32 %2, 3
  %or.cond = and i1 %19, %18
  %spec.store.select = select i1 %or.cond, i32 8, i32 %.0
  %20 = icmp eq i32 %spec.store.select, 0
  br i1 %20, label %21, label %23

21:                                               ; preds = %17
  %22 = tail call i32 @_tx_event_flags_get(ptr noundef %0, i64 noundef %1, i32 noundef %2, ptr noundef %3, i64 noundef %4) #2
  br label %23

23:                                               ; preds = %21, %17
  %.1 = phi i32 [ %22, %21 ], [ %spec.store.select, %17 ]
  ret i32 %.1
}

declare i32 @_tx_event_flags_get(ptr noundef, i64 noundef, i32 noundef, ptr noundef, i64 noundef) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TX_EVENT_FLAGS_GROUP_STRUCT", !7, i64 0, !10, i64 8, !7, i64 16, !11, i64 24, !10, i64 32, !11, i64 40, !10, i64 48, !10, i64 56, !7, i64 64, !10, i64 72}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!7, !7, i64 0}
!13 = !{!10, !10, i64 0}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass