; LLVM IR from smv1999/CompetitiveProgrammingQuestionBank :: GCD of two numbers (Alternative GCD Algorithm)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local i32 @gcd(i32 noundef %0, i32 noundef %1) #0 {
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  store i32 %0, ptr %3, align 4, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  store i32 2, ptr %5, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #2
  store i32 1, ptr %6, align 4, !tbaa !5
  br label %7

7:                                                ; preds = %34, %2
  %8 = load i32, ptr %4, align 4, !tbaa !5
  %9 = load i32, ptr %5, align 4, !tbaa !5
  %10 = icmp sge i32 %8, %9
  br i1 %10, label %11, label %35

11:                                               ; preds = %7
  %12 = load i32, ptr %3, align 4, !tbaa !5
  %13 = load i32, ptr %5, align 4, !tbaa !5
  %14 = srem i32 %12, %13
  %15 = icmp eq i32 %14, 0
  br i1 %15, label %16, label %31

16:                                               ; preds = %11
  %17 = load i32, ptr %4, align 4, !tbaa !5
  %18 = load i32, ptr %5, align 4, !tbaa !5
  %19 = srem i32 %17, %18
  %20 = icmp eq i32 %19, 0
  br i1 %20, label %21, label %31

21:                                               ; preds = %16
  %22 = load i32, ptr %5, align 4, !tbaa !5
  %23 = load i32, ptr %6, align 4, !tbaa !5
  %24 = mul nsw i32 %23, %22
  store i32 %24, ptr %6, align 4, !tbaa !5
  %25 = load i32, ptr %3, align 4, !tbaa !5
  %26 = load i32, ptr %5, align 4, !tbaa !5
  %27 = sdiv i32 %25, %26
  store i32 %27, ptr %3, align 4, !tbaa !5
  %28 = load i32, ptr %4, align 4, !tbaa !5
  %29 = load i32, ptr %5, align 4, !tbaa !5
  %30 = sdiv i32 %28, %29
  store i32 %30, ptr %4, align 4, !tbaa !5
  br label %34

31:                                               ; preds = %16, %11
  %32 = load i32, ptr %5, align 4, !tbaa !5
  %33 = add nsw i32 %32, 1
  store i32 %33, ptr %5, align 4, !tbaa !5
  br label %34

34:                                               ; preds = %31, %21
  br label %7, !llvm.loop !9

35:                                               ; preds = %7
  %36 = load i32, ptr %6, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  ret i32 %36
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nofree norecurse nosync nounwind memory(none) uwtable
define dso_local i32 @gcd(i32 noundef %0, i32 noundef %1) local_unnamed_addr #0 {
  %.not20 = icmp slt i32 %1, 2
  br i1 %.not20, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %2, %14
  %.024 = phi i32 [ %.1, %14 ], [ 1, %2 ]
  %.01423 = phi i32 [ %.115, %14 ], [ 2, %2 ]
  %.01622 = phi i32 [ %.117, %14 ], [ %1, %2 ]
  %.01821 = phi i32 [ %.119, %14 ], [ %0, %2 ]
  %3 = srem i32 %.01821, %.01423
  %4 = sdiv i32 %.01821, %.01423
  %5 = icmp eq i32 %3, 0
  br i1 %5, label %6, label %12

6:                                                ; preds = %.lr.ph
  %7 = srem i32 %.01622, %.01423
  %8 = sdiv i32 %.01622, %.01423
  %9 = icmp eq i32 %7, 0
  br i1 %9, label %10, label %12

10:                                               ; preds = %6
  %11 = mul nsw i32 %.024, %.01423
  br label %14

12:                                               ; preds = %6, %.lr.ph
  %13 = add nsw i32 %.01423, 1
  br label %14

14:                                               ; preds = %12, %10
  %.119 = phi i32 [ %4, %10 ], [ %.01821, %12 ]
  %.117 = phi i32 [ %8, %10 ], [ %.01622, %12 ]
  %.115 = phi i32 [ %.01423, %10 ], [ %13, %12 ]
  %.1 = phi i32 [ %11, %10 ], [ %.024, %12 ]
  %.not = icmp slt i32 %.117, %.115
  br i1 %.not, label %._crit_edge, label %.lr.ph, !llvm.loop !5

._crit_edge:                                      ; preds = %14, %2
  %.0.lcssa = phi i32 [ 1, %2 ], [ %.1, %14 ]
  ret i32 %.0.lcssa
}

attributes #0 = { nofree norecurse nosync nounwind memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: DivRemPairsPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass