; LLVM IR from eclipse-threadx/threadx :: ports/cortex_a34/ac6/example_build/sample_threadx (timer_interrupts)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@nudge_leds.state = external hidden global i32, align 4
@nudge_leds.value = external hidden global i32, align 4

; Function Attrs: nounwind uwtable
define dso_local void @nudge_leds() #0 {
  %1 = alloca i32, align 4
  %2 = load i32, ptr @nudge_leds.state, align 4, !tbaa !5
  %3 = icmp ne i32 %2, 0
  br i1 %3, label %4, label %12

4:                                                ; preds = %0
  call void @llvm.lifetime.start.p0(i64 4, ptr %1) #2
  store i32 128, ptr %1, align 4, !tbaa !5
  %5 = load i32, ptr @nudge_leds.value, align 4, !tbaa !5
  %6 = shl i32 %5, 1
  store i32 %6, ptr @nudge_leds.value, align 4, !tbaa !5
  %7 = load i32, ptr @nudge_leds.value, align 4, !tbaa !5
  %8 = load i32, ptr %1, align 4, !tbaa !5
  %9 = icmp eq i32 %7, %8
  br i1 %9, label %10, label %11

10:                                               ; preds = %4
  store i32 0, ptr @nudge_leds.state, align 4, !tbaa !5
  br label %11

11:                                               ; preds = %10, %4
  call void @llvm.lifetime.end.p0(i64 4, ptr %1) #2
  br label %19

12:                                               ; preds = %0
  %13 = load i32, ptr @nudge_leds.value, align 4, !tbaa !5
  %14 = ashr i32 %13, 1
  store i32 %14, ptr @nudge_leds.value, align 4, !tbaa !5
  %15 = load i32, ptr @nudge_leds.value, align 4, !tbaa !5
  %16 = icmp eq i32 %15, 1
  br i1 %16, label %17, label %18

17:                                               ; preds = %12
  store i32 1, ptr @nudge_leds.state, align 4, !tbaa !5
  br label %18

18:                                               ; preds = %17, %12
  br label %19

19:                                               ; preds = %18, %11
  %20 = load i32, ptr @nudge_leds.value, align 4, !tbaa !5
  store volatile i32 %20, ptr inttoptr (i64 469827592 to ptr), align 4, !tbaa !5
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@nudge_leds.state = external hidden local_unnamed_addr global i32, align 4
@nudge_leds.value = external hidden local_unnamed_addr global i32, align 4

; Function Attrs: nofree norecurse nounwind uwtable
define dso_local void @nudge_leds() local_unnamed_addr #0 {
  %1 = load i32, ptr @nudge_leds.state, align 4, !tbaa !5
  %.not = icmp eq i32 %1, 0
  %2 = load i32, ptr @nudge_leds.value, align 4, !tbaa !5
  br i1 %.not, label %6, label %3

3:                                                ; preds = %0
  %4 = shl i32 %2, 1
  store i32 %4, ptr @nudge_leds.value, align 4, !tbaa !5
  %5 = icmp eq i32 %4, 128
  br i1 %5, label %.sink.split, label %9

6:                                                ; preds = %0
  %7 = ashr i32 %2, 1
  store i32 %7, ptr @nudge_leds.value, align 4, !tbaa !5
  %8 = icmp eq i32 %7, 1
  br i1 %8, label %.sink.split, label %9

.sink.split:                                      ; preds = %6, %3
  %.sink = phi i32 [ 0, %3 ], [ 1, %6 ]
  %.ph = phi i32 [ 128, %3 ], [ 1, %6 ]
  store i32 %.sink, ptr @nudge_leds.state, align 4, !tbaa !5
  br label %9

9:                                                ; preds = %.sink.split, %3, %6
  %10 = phi i32 [ %4, %3 ], [ %7, %6 ], [ %.ph, %.sink.split ]
  store volatile i32 %10, ptr inttoptr (i64 469827592 to ptr), align 8, !tbaa !5
  ret void
}

attributes #0 = { nofree norecurse nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass