; LLVM IR from huawei-noah/bolt :: compute/tensor/src (scatter)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.ScatterParamSpec = type { i32 }
%struct.TensorDesc = type { i32, i32, i32, [20 x i32] }

@.str = external hidden unnamed_addr constant [20 x i8], align 1
@stdout = external global ptr, align 8
@.str.1 = external hidden unnamed_addr constant [18 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z25scatter_infer_output_sizeP6TensorS0_S0_16ScatterParamSpecS0_P8ArchInfo(ptr noundef %0, ptr noundef %1, ptr noundef %2, i32 %3, ptr noundef %4, ptr noundef %5) #1 {
  %7 = alloca %struct.ScatterParamSpec, align 4
  %8 = alloca ptr, align 8
  %9 = alloca ptr, align 8
  %10 = alloca ptr, align 8
  %11 = alloca ptr, align 8
  %12 = alloca ptr, align 8
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca %struct.TensorDesc, align 4
  %17 = alloca %struct.TensorDesc, align 4
  %18 = alloca %struct.TensorDesc, align 4
  %19 = alloca %struct.TensorDesc, align 4
  %20 = alloca %struct.TensorDesc, align 8
  %21 = getelementptr inbounds %struct.ScatterParamSpec, ptr %7, i32 0, i32 0
  store i32 %3, ptr %21, align 4
  store ptr %0, ptr %8, align 8, !tbaa !5
  store ptr %1, ptr %9, align 8, !tbaa !5
  store ptr %2, ptr %10, align 8, !tbaa !5
  store ptr %4, ptr %11, align 8, !tbaa !5
  store ptr %5, ptr %12, align 8, !tbaa !5
  %22 = load ptr, ptr %8, align 8, !tbaa !5
  %23 = icmp eq ptr %22, null
  br i1 %23, label %33, label %24

24:                                               ; preds = %6
  %25 = load ptr, ptr %9, align 8, !tbaa !5
  %26 = icmp eq ptr %25, null
  br i1 %26, label %33, label %27

27:                                               ; preds = %24
  %28 = load ptr, ptr %10, align 8, !tbaa !5
  %29 = icmp eq ptr %28, null
  br i1 %29, label %33, label %30

30:                                               ; preds = %27
  %31 = load ptr, ptr %11, align 8, !tbaa !5
  %32 = icmp eq ptr %31, null
  br i1 %32, label %33, label %49

33:                                               ; preds = %30, %27, %24, %6
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #7
  store i32 1, ptr %13, align 4, !tbaa !9
  %34 = load i32, ptr %13, align 4, !tbaa !9
  %35 = icmp ne i32 %34, 0
  br i1 %35, label %36, label %48

36:                                               ; preds = %33
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #7
  %37 = call i64 (i64, ...) @syscall(i64 noundef 186) #7
  %38 = trunc i64 %37 to i32
  store i32 %38, ptr %14, align 4, !tbaa !11
  %39 = load i32, ptr %14, align 4, !tbaa !11
  %40 = call i32 (ptr, ...) @printf(ptr noundef @.str, i32 noundef %39)
  %41 = load ptr, ptr @stdout, align 8, !tbaa !5
  %42 = call i32 @fflush(ptr noundef %41)
  %43 = load i32, ptr %13, align 4, !tbaa !9
  %44 = call ptr @ee2str(i32 noundef %43)
  %45 = call i32 (ptr, ...) @printf(ptr noundef @.str.1, ptr noundef %44)
  %46 = load ptr, ptr @stdout, align 8, !tbaa !5
  %47 = call i32 @fflush(ptr noundef %46)
  call void @exit(i32 noundef 1) #8
  unreachable

48:                                               ; preds = %33
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #7
  br label %49

49:                                               ; preds = %48, %30
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #7
  store i32 0, ptr %15, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 92, ptr %16) #7
  %50 = load ptr, ptr %8, align 8, !tbaa !5
  call void @_ZN6Tensor8get_descEv(ptr dead_on_unwind writable sret(%struct.TensorDesc) align 4 %16, ptr noundef nonnull align 8 dereferenceable(32) %50)
  call void @llvm.lifetime.start.p0(i64 92, ptr %17) #7
  %51 = load ptr, ptr %9, align 8, !tbaa !5
  call void @_ZN6Tensor8get_descEv(ptr dead_on_unwind writable sret(%struct.TensorDesc) align 4 %17, ptr noundef nonnull align 8 dereferenceable(32) %51)
  call void @llvm.lifetime.start.p0(i64 92, ptr %18) #7
  %52 = load ptr, ptr %10, align 8, !tbaa !5
  call void @_ZN6Tensor8get_descEv(ptr dead_on_unwind writable sret(%struct.TensorDesc) align 4 %18, ptr noundef nonnull align 8 dereferenceable(32) %52)
  call void @llvm.lifetime.start.p0(i64 92, ptr %19) #7
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %19, ptr align 4 %16, i64 92, i1 false), !tbaa.struct !13
  %53 = getelementptr inbounds %struct.TensorDesc, ptr %19, i32 0, i32 1
  %54 = load i32, ptr %53, align 4, !tbaa !19
  %55 = icmp eq i32 %54, 2
  br i1 %55, label %56, label %58

56:                                               ; preds = %49
  %57 = getelementptr inbounds %struct.TensorDesc, ptr %19, i32 0, i32 1
  store i32 0, ptr %57, align 4, !tbaa !19
  br label %58

58:                                               ; preds = %56, %49
  %59 = load ptr, ptr %11, align 8, !tbaa !5
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %20, ptr align 4 %19, i64 92, i1 false), !tbaa.struct !13
  call void @_ZN6Tensor6resizeE10TensorDesc(ptr noundef nonnull align 8 dereferenceable(32) %59, ptr noundef byval(%struct.TensorDesc) align 8 %20)
  %60 = load i32, ptr %15, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 92, ptr %19) #7
  call void @llvm.lifetime.end.p0(i64 92, ptr %18) #7
  call void @llvm.lifetime.end.p0(i64 92, ptr %17) #7
  call void @llvm.lifetime.end.p0(i64 92, ptr %16) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #7
  ret i32 %60
}

; Function Attrs: nounwind
declare i64 @syscall(i64 noundef, ...) #2

declare i32 @printf(ptr noundef, ...) #3

declare i32 @fflush(ptr noundef) #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local ptr @ee2str(i32 noundef) #4

; Function Attrs: noreturn nounwind
declare void @exit(i32 noundef) #5

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN6Tensor8get_descEv(ptr dead_on_unwind noalias writable sret(%struct.TensorDesc) align 4, ptr noundef nonnull align 8 dereferenceable(32)) #1 align 2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #6

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN6Tensor6resizeE10TensorDesc(ptr noundef nonnull align 8 dereferenceable(32), ptr noundef byval(%struct.TensorDesc) align 8) #1 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #7 = { nounwind }
attributes #8 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"_ZTS2EE", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{i64 0, i64 4, !14, i64 4, i64 4, !16, i64 8, i64 4, !11, i64 12, i64 80, !18}
!14 = !{!15, !15, i64 0}
!15 = !{!"_ZTS8DataType", !7, i64 0}
!16 = !{!17, !17, i64 0}
!17 = !{!"_ZTS10DataFormat", !7, i64 0}
!18 = !{!7, !7, i64 0}
!19 = !{!20, !17, i64 4}
!20 = !{!"_ZTS10TensorDesc", !15, i64 0, !17, i64 4, !12, i64 8, !7, i64 12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.TensorDesc = type { i32, i32, i32, [20 x i32] }

@.str = external hidden unnamed_addr constant [20 x i8], align 1
@stdout = external local_unnamed_addr global ptr, align 8
@.str.1 = external hidden unnamed_addr constant [18 x i8], align 1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z25scatter_infer_output_sizeP6TensorS0_S0_16ScatterParamSpecS0_P8ArchInfo(ptr noundef %0, ptr noundef %1, ptr noundef %2, i32 %3, ptr noundef %4, ptr nocapture noundef readnone %5) local_unnamed_addr #1 {
  %7 = alloca %struct.TensorDesc, align 4
  %8 = alloca %struct.TensorDesc, align 4
  %9 = alloca %struct.TensorDesc, align 4
  %10 = alloca %struct.TensorDesc, align 8
  %11 = insertelement <4 x ptr> poison, ptr %0, i64 0
  %12 = insertelement <4 x ptr> %11, ptr %1, i64 1
  %13 = insertelement <4 x ptr> %12, ptr %2, i64 2
  %14 = insertelement <4 x ptr> %13, ptr %4, i64 3
  %15 = icmp eq <4 x ptr> %14, zeroinitializer
  %16 = bitcast <4 x i1> %15 to i4
  %.not = icmp eq i4 %16, 0
  br i1 %.not, label %27, label %17

17:                                               ; preds = %6
  %18 = tail call i64 (i64, ...) @syscall(i64 noundef 186) #7
  %19 = trunc i64 %18 to i32
  %20 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str, i32 noundef %19)
  %21 = load ptr, ptr @stdout, align 8, !tbaa !5
  %22 = tail call i32 @fflush(ptr noundef %21)
  %23 = tail call ptr @ee2str(i32 noundef 1)
  %24 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.1, ptr noundef %23)
  %25 = load ptr, ptr @stdout, align 8, !tbaa !5
  %26 = tail call i32 @fflush(ptr noundef %25)
  tail call void @exit(i32 noundef 1) #8
  unreachable

27:                                               ; preds = %6
  call void @llvm.lifetime.start.p0(i64 92, ptr nonnull %7) #7
  call void @_ZN6Tensor8get_descEv(ptr dead_on_unwind nonnull writable sret(%struct.TensorDesc) align 4 %7, ptr noundef nonnull align 8 dereferenceable(32) %0)
  call void @llvm.lifetime.start.p0(i64 92, ptr nonnull %8) #7
  call void @_ZN6Tensor8get_descEv(ptr dead_on_unwind nonnull writable sret(%struct.TensorDesc) align 4 %8, ptr noundef nonnull align 8 dereferenceable(32) %1)
  call void @llvm.lifetime.start.p0(i64 92, ptr nonnull %9) #7
  call void @_ZN6Tensor8get_descEv(ptr dead_on_unwind nonnull writable sret(%struct.TensorDesc) align 4 %9, ptr noundef nonnull align 8 dereferenceable(32) %2)
  %.sroa.0.0.copyload = load i32, ptr %7, align 4, !tbaa !9
  %.sroa.4.0..sroa_idx = getelementptr inbounds i8, ptr %7, i64 4
  %.sroa.4.0.copyload = load i32, ptr %.sroa.4.0..sroa_idx, align 4, !tbaa !11
  %.sroa.6.0..sroa_idx = getelementptr inbounds i8, ptr %7, i64 8
  %.sroa.6.0..sroa_idx9 = getelementptr inbounds i8, ptr %10, i64 8
  call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 8 dereferenceable(84) %.sroa.6.0..sroa_idx9, ptr noundef nonnull align 4 dereferenceable(84) %.sroa.6.0..sroa_idx, i64 84, i1 false)
  %28 = icmp eq i32 %.sroa.4.0.copyload, 2
  %spec.select = select i1 %28, i32 0, i32 %.sroa.4.0.copyload
  store i32 %.sroa.0.0.copyload, ptr %10, align 8, !tbaa !9
  %.sroa.4.0..sroa_idx7 = getelementptr inbounds i8, ptr %10, i64 4
  store i32 %spec.select, ptr %.sroa.4.0..sroa_idx7, align 4, !tbaa !11
  call void @_ZN6Tensor6resizeE10TensorDesc(ptr noundef nonnull align 8 dereferenceable(32) %4, ptr noundef nonnull byval(%struct.TensorDesc) align 8 %10)
  call void @llvm.lifetime.end.p0(i64 92, ptr nonnull %9) #7
  call void @llvm.lifetime.end.p0(i64 92, ptr nonnull %8) #7
  call void @llvm.lifetime.end.p0(i64 92, ptr nonnull %7) #7
  ret i32 0
}

; Function Attrs: nounwind
declare i64 @syscall(i64 noundef, ...) local_unnamed_addr #2

; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #3

; Function Attrs: nofree nounwind
declare noundef i32 @fflush(ptr nocapture noundef) local_unnamed_addr #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local ptr @ee2str(i32 noundef) local_unnamed_addr #4

; Function Attrs: noreturn nounwind
declare void @exit(i32 noundef) local_unnamed_addr #5

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN6Tensor8get_descEv(ptr dead_on_unwind noalias writable sret(%struct.TensorDesc) align 4, ptr noundef nonnull align 8 dereferenceable(32)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #6

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN6Tensor6resizeE10TensorDesc(ptr noundef nonnull align 8 dereferenceable(32), ptr noundef byval(%struct.TensorDesc) align 8) local_unnamed_addr #1 align 2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #7 = { nounwind }
attributes #8 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"_ZTS8DataType", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"_ZTS10DataFormat", !7, i64 0}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalDCEPass,GlobalOptPass,IPSCCPPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,MemCpyOptPass,PostOrderFunctionAttrsPass,SLPVectorizerPass,SROAPass,SimplifyCFGPass,TailCallElimPass