; LLVM IR from AdaptiveCpp/AdaptiveCpp :: src/runtime (allocator)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.hipsycl::rt::allocation_info" = type { %"class.hipsycl::rt::device_id", i32 }
%"class.hipsycl::rt::device_id" = type { %"struct.hipsycl::rt::backend_descriptor", i32 }
%"struct.hipsycl::rt::backend_descriptor" = type { i32, i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare noundef nonnull align 1 dereferenceable(1) ptr @_ZN7hipsycl2rt11application19event_handler_layerEv() #1

declare void @_ZN7hipsycl2rt22runtime_event_handlers17on_new_allocationEPKvmRKNS0_15allocation_infoE(ptr noundef nonnull align 1 dereferenceable(1), ptr noundef, i64 noundef, ptr noundef nonnull align 4 dereferenceable(20)) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local noundef ptr @_ZN7hipsycl2rt13allocate_hostEPNS0_17backend_allocatorEmmRKNS0_16allocation_hintsE(ptr noundef %0, i64 noundef %1, i64 noundef %2, ptr noundef nonnull align 8 dereferenceable(32) %3) #2 {
  %5 = alloca ptr, align 8
  %6 = alloca i64, align 8
  %7 = alloca i64, align 8
  %8 = alloca ptr, align 8
  %9 = alloca ptr, align 8
  %10 = alloca %"struct.hipsycl::rt::allocation_info", align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store i64 %1, ptr %6, align 8, !tbaa !9
  store i64 %2, ptr %7, align 8, !tbaa !9
  store ptr %3, ptr %8, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #3
  %11 = load ptr, ptr %5, align 8, !tbaa !5
  %12 = load i64, ptr %6, align 8, !tbaa !9
  %13 = load i64, ptr %7, align 8, !tbaa !9
  %14 = load ptr, ptr %8, align 8, !tbaa !5
  %15 = load ptr, ptr %11, align 8, !tbaa !11
  %16 = getelementptr inbounds ptr, ptr %15, i64 1
  %17 = load ptr, ptr %16, align 8
  %18 = call noundef ptr %17(ptr noundef nonnull align 8 dereferenceable(8) %11, i64 noundef %12, i64 noundef %13, ptr noundef nonnull align 8 dereferenceable(32) %14)
  store ptr %18, ptr %9, align 8, !tbaa !5
  %19 = load ptr, ptr %9, align 8, !tbaa !5
  %20 = icmp ne ptr %19, null
  br i1 %20, label %21, label %36

21:                                               ; preds = %4
  %22 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZN7hipsycl2rt11application19event_handler_layerEv()
  %23 = load ptr, ptr %9, align 8, !tbaa !5
  %24 = load i64, ptr %7, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 20, ptr %10) #3
  %25 = getelementptr inbounds %"struct.hipsycl::rt::allocation_info", ptr %10, i32 0, i32 0
  %26 = load ptr, ptr %5, align 8, !tbaa !5
  %27 = load ptr, ptr %26, align 8, !tbaa !11
  %28 = getelementptr inbounds ptr, ptr %27, i64 4
  %29 = load ptr, ptr %28, align 8
  %30 = call { i64, i64 } %29(ptr noundef nonnull align 8 dereferenceable(8) %26)
  %31 = getelementptr inbounds { i64, i64 }, ptr %25, i32 0, i32 0
  %32 = extractvalue { i64, i64 } %30, 0
  store i64 %32, ptr %31, align 4
  %33 = getelementptr inbounds { i64, i64 }, ptr %25, i32 0, i32 1
  %34 = extractvalue { i64, i64 } %30, 1
  store i64 %34, ptr %33, align 4
  %35 = getelementptr inbounds %"struct.hipsycl::rt::allocation_info", ptr %10, i32 0, i32 1
  store i32 2, ptr %35, align 4, !tbaa !13
  call void @_ZN7hipsycl2rt22runtime_event_handlers17on_new_allocationEPKvmRKNS0_15allocation_infoE(ptr noundef nonnull align 1 dereferenceable(1) %22, ptr noundef %23, i64 noundef %24, ptr noundef nonnull align 4 dereferenceable(20) %10)
  call void @llvm.lifetime.end.p0(i64 20, ptr %10) #3
  br label %36

36:                                               ; preds = %21, %4
  %37 = load ptr, ptr %9, align 8, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #3
  ret ptr %37
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"vtable pointer", !8, i64 0}
!13 = !{!14, !21, i64 16}
!14 = !{!"_ZTSN7hipsycl2rt15allocation_infoE", !15, i64 0, !21, i64 16}
!15 = !{!"_ZTSN7hipsycl2rt9device_idE", !16, i64 0, !20, i64 12}
!16 = !{!"_ZTSN7hipsycl2rt18backend_descriptorE", !17, i64 0, !18, i64 4, !19, i64 8}
!17 = !{!"_ZTSN7hipsycl2rt10backend_idE", !7, i64 0}
!18 = !{!"_ZTSN7hipsycl2rt17hardware_platformE", !7, i64 0}
!19 = !{!"_ZTSN7hipsycl2rt12api_platformE", !7, i64 0}
!20 = !{!"int", !7, i64 0}
!21 = !{!"_ZTSN7hipsycl2rt15allocation_info15allocation_typeE", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.hipsycl::rt::allocation_info" = type { %"class.hipsycl::rt::device_id", i32 }
%"class.hipsycl::rt::device_id" = type { %"struct.hipsycl::rt::backend_descriptor", i32 }
%"struct.hipsycl::rt::backend_descriptor" = type { i32, i32, i32 }

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare noundef nonnull align 1 dereferenceable(1) ptr @_ZN7hipsycl2rt11application19event_handler_layerEv() local_unnamed_addr #1

declare void @_ZN7hipsycl2rt22runtime_event_handlers17on_new_allocationEPKvmRKNS0_15allocation_infoE(ptr noundef nonnull align 1 dereferenceable(1), ptr noundef, i64 noundef, ptr noundef nonnull align 4 dereferenceable(20)) local_unnamed_addr #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local noundef ptr @_ZN7hipsycl2rt13allocate_hostEPNS0_17backend_allocatorEmmRKNS0_16allocation_hintsE(ptr noundef %0, i64 noundef %1, i64 noundef %2, ptr noundef nonnull align 8 dereferenceable(32) %3) local_unnamed_addr #2 {
  %5 = alloca %"struct.hipsycl::rt::allocation_info", align 8
  %6 = load ptr, ptr %0, align 8, !tbaa !5
  %7 = getelementptr inbounds i8, ptr %6, i64 8
  %8 = load ptr, ptr %7, align 8
  %9 = tail call noundef ptr %8(ptr noundef nonnull align 8 dereferenceable(8) %0, i64 noundef %1, i64 noundef %2, ptr noundef nonnull align 8 dereferenceable(32) %3)
  %.not = icmp eq ptr %9, null
  br i1 %.not, label %20, label %10

10:                                               ; preds = %4
  %11 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZN7hipsycl2rt11application19event_handler_layerEv()
  call void @llvm.lifetime.start.p0(i64 20, ptr nonnull %5) #3
  %12 = load ptr, ptr %0, align 8, !tbaa !5
  %13 = getelementptr inbounds i8, ptr %12, i64 32
  %14 = load ptr, ptr %13, align 8
  %15 = tail call { i64, i64 } %14(ptr noundef nonnull align 8 dereferenceable(8) %0)
  %16 = extractvalue { i64, i64 } %15, 0
  store i64 %16, ptr %5, align 8
  %17 = getelementptr inbounds i8, ptr %5, i64 8
  %18 = extractvalue { i64, i64 } %15, 1
  store i64 %18, ptr %17, align 8
  %19 = getelementptr inbounds i8, ptr %5, i64 16
  store i32 2, ptr %19, align 8, !tbaa !8
  call void @_ZN7hipsycl2rt22runtime_event_handlers17on_new_allocationEPKvmRKNS0_15allocation_infoE(ptr noundef nonnull align 1 dereferenceable(1) %11, ptr noundef nonnull %9, i64 noundef %2, ptr noundef nonnull align 4 dereferenceable(20) %5)
  call void @llvm.lifetime.end.p0(i64 20, ptr nonnull %5) #3
  br label %20

20:                                               ; preds = %10, %4
  ret ptr %9
}

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"vtable pointer", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}
!8 = !{!9, !17, i64 16}
!9 = !{!"_ZTSN7hipsycl2rt15allocation_infoE", !10, i64 0, !17, i64 16}
!10 = !{!"_ZTSN7hipsycl2rt9device_idE", !11, i64 0, !16, i64 12}
!11 = !{!"_ZTSN7hipsycl2rt18backend_descriptorE", !12, i64 0, !14, i64 4, !15, i64 8}
!12 = !{!"_ZTSN7hipsycl2rt10backend_idE", !13, i64 0}
!13 = !{!"omnipotent char", !7, i64 0}
!14 = !{!"_ZTSN7hipsycl2rt17hardware_platformE", !13, i64 0}
!15 = !{!"_ZTSN7hipsycl2rt12api_platformE", !13, i64 0}
!16 = !{!"int", !13, i64 0}
!17 = !{!"_ZTSN7hipsycl2rt15allocation_info15allocation_typeE", !13, i64 0}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,TailCallElimPass