; LLVM IR from Mohamed-Ouarar/C_piscine :: C05/ex03 - ft_recursive_power (ft_recursive_power)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local i32 @ft_recursive_power(i32 noundef %0, i32 noundef %1) #0 {
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  store i32 %0, ptr %4, align 4, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !5
  %6 = load i32, ptr %5, align 4, !tbaa !5
  %7 = icmp slt i32 %6, 0
  br i1 %7, label %8, label %9

8:                                                ; preds = %2
  store i32 0, ptr %3, align 4
  br label %20

9:                                                ; preds = %2
  %10 = load i32, ptr %5, align 4, !tbaa !5
  %11 = icmp eq i32 %10, 0
  br i1 %11, label %12, label %13

12:                                               ; preds = %9
  store i32 1, ptr %3, align 4
  br label %20

13:                                               ; preds = %9
  %14 = load i32, ptr %4, align 4, !tbaa !5
  %15 = load i32, ptr %4, align 4, !tbaa !5
  %16 = load i32, ptr %5, align 4, !tbaa !5
  %17 = sub nsw i32 %16, 1
  %18 = call i32 @ft_recursive_power(i32 noundef %15, i32 noundef %17)
  %19 = mul nsw i32 %14, %18
  store i32 %19, ptr %3, align 4
  br label %20

20:                                               ; preds = %13, %12, %8
  %21 = load i32, ptr %3, align 4
  ret i32 %21
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nofree norecurse nosync nounwind memory(none) uwtable
define dso_local i32 @ft_recursive_power(i32 noundef %0, i32 noundef %1) local_unnamed_addr #0 {
  %3 = icmp slt i32 %1, 0
  br i1 %3, label %._crit_edge, label %.lr.ph.preheader

.lr.ph.preheader:                                 ; preds = %2
  %4 = icmp eq i32 %1, 0
  br i1 %4, label %._crit_edge, label %tailrecurse.lr.ph

tailrecurse.lr.ph:                                ; preds = %.lr.ph.preheader
  %min.iters.check = icmp ult i32 %1, 8
  br i1 %min.iters.check, label %tailrecurse.preheader, label %vector.ph

vector.ph:                                        ; preds = %tailrecurse.lr.ph
  %n.vec = and i32 %1, 2147483640
  %ind.end = and i32 %1, 7
  %broadcast.splatinsert = insertelement <4 x i32> poison, i32 %0, i64 0
  %broadcast.splat = shufflevector <4 x i32> %broadcast.splatinsert, <4 x i32> poison, <4 x i32> zeroinitializer
  br label %vector.body

vector.body:                                      ; preds = %vector.body, %vector.ph
  %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]
  %vec.phi = phi <4 x i32> [ <i32 1, i32 1, i32 1, i32 1>, %vector.ph ], [ %5, %vector.body ]
  %vec.phi15 = phi <4 x i32> [ <i32 1, i32 1, i32 1, i32 1>, %vector.ph ], [ %6, %vector.body ]
  %5 = mul <4 x i32> %vec.phi, %broadcast.splat
  %6 = mul <4 x i32> %vec.phi15, %broadcast.splat
  %index.next = add nuw i32 %index, 8
  %7 = icmp eq i32 %index.next, %n.vec
  br i1 %7, label %middle.block, label %vector.body, !llvm.loop !5

middle.block:                                     ; preds = %vector.body
  %bin.rdx = mul <4 x i32> %6, %5
  %8 = tail call i32 @llvm.vector.reduce.mul.v4i32(<4 x i32> %bin.rdx)
  %cmp.n = icmp eq i32 %n.vec, %1
  br i1 %cmp.n, label %._crit_edge, label %tailrecurse.preheader

tailrecurse.preheader:                            ; preds = %middle.block, %tailrecurse.lr.ph
  %accumulator.tr814.ph = phi i32 [ 1, %tailrecurse.lr.ph ], [ %8, %middle.block ]
  %.tr7913.ph = phi i32 [ %1, %tailrecurse.lr.ph ], [ %ind.end, %middle.block ]
  br label %tailrecurse

tailrecurse:                                      ; preds = %tailrecurse.preheader, %tailrecurse
  %accumulator.tr814 = phi i32 [ %10, %tailrecurse ], [ %accumulator.tr814.ph, %tailrecurse.preheader ]
  %.tr7913 = phi i32 [ %9, %tailrecurse ], [ %.tr7913.ph, %tailrecurse.preheader ]
  %9 = add nsw i32 %.tr7913, -1
  %10 = mul nsw i32 %accumulator.tr814, %0
  %11 = icmp eq i32 %9, 0
  br i1 %11, label %._crit_edge, label %tailrecurse, !llvm.loop !8

._crit_edge:                                      ; preds = %tailrecurse, %.lr.ph.preheader, %middle.block, %2
  %accumulator.ret.tr = phi i32 [ 0, %2 ], [ 1, %.lr.ph.preheader ], [ %8, %middle.block ], [ %10, %tailrecurse ]
  ret i32 %accumulator.ret.tr
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.vector.reduce.mul.v4i32(<4 x i32>) #1

attributes #0 = { nofree norecurse nosync nounwind memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6, !7}
!6 = !{!"llvm.loop.isvectorized", i32 1}
!7 = !{!"llvm.loop.unroll.runtime.disable"}
!8 = distinct !{!8, !7, !6}


; Effective O3 passes: GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopLoadEliminationPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,LoopVectorizePass,PostOrderFunctionAttrsPass,ReassociatePass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass