; LLVM IR from int32bit/leetcode :: algorithms/BitwiseANDofNumbersRange (solve)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @midRangeBitwiseAnd(i32 noundef %0, i32 noundef %1) #1 {
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  store i32 %0, ptr %4, align 4, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #2
  store i32 1, ptr %6, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #2
  %11 = load i32, ptr %5, align 4, !tbaa !5
  store i32 %11, ptr %7, align 4, !tbaa !5
  br label %12

12:                                               ; preds = %16, %2
  %13 = load i32, ptr %7, align 4, !tbaa !5
  %14 = ashr i32 %13, 1
  %15 = icmp ne i32 %14, 0
  br i1 %15, label %16, label %21

16:                                               ; preds = %12
  %17 = load i32, ptr %6, align 4, !tbaa !5
  %18 = shl i32 %17, 1
  store i32 %18, ptr %6, align 4, !tbaa !5
  %19 = load i32, ptr %7, align 4, !tbaa !5
  %20 = ashr i32 %19, 1
  store i32 %20, ptr %7, align 4, !tbaa !5
  br label %12, !llvm.loop !9

21:                                               ; preds = %12
  %22 = load i32, ptr %4, align 4, !tbaa !5
  %23 = load i32, ptr %6, align 4, !tbaa !5
  %24 = icmp slt i32 %22, %23
  br i1 %24, label %25, label %26

25:                                               ; preds = %21
  store i32 0, ptr %3, align 4
  store i32 1, ptr %8, align 4
  br label %44

26:                                               ; preds = %21
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #2
  %27 = load i32, ptr %5, align 4, !tbaa !5
  store i32 %27, ptr %9, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #2
  %28 = load i32, ptr %5, align 4, !tbaa !5
  %29 = sub nsw i32 %28, 1
  store i32 %29, ptr %10, align 4, !tbaa !5
  br label %30

30:                                               ; preds = %39, %26
  %31 = load i32, ptr %10, align 4, !tbaa !5
  %32 = load i32, ptr %4, align 4, !tbaa !5
  %33 = icmp sge i32 %31, %32
  br i1 %33, label %35, label %34

34:                                               ; preds = %30
  store i32 4, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #2
  br label %42

35:                                               ; preds = %30
  %36 = load i32, ptr %10, align 4, !tbaa !5
  %37 = load i32, ptr %9, align 4, !tbaa !5
  %38 = and i32 %37, %36
  store i32 %38, ptr %9, align 4, !tbaa !5
  br label %39

39:                                               ; preds = %35
  %40 = load i32, ptr %10, align 4, !tbaa !5
  %41 = add nsw i32 %40, -1
  store i32 %41, ptr %10, align 4, !tbaa !5
  br label %30, !llvm.loop !11

42:                                               ; preds = %34
  %43 = load i32, ptr %9, align 4, !tbaa !5
  store i32 %43, ptr %3, align 4
  store i32 1, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #2
  br label %44

44:                                               ; preds = %42, %25
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #2
  %45 = load i32, ptr %3, align 4
  ret i32 %45
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nofree norecurse nosync nounwind memory(none) uwtable
define dso_local i32 @midRangeBitwiseAnd(i32 noundef %0, i32 noundef %1) local_unnamed_addr #0 {
  %.not22 = icmp ult i32 %1, 2
  br i1 %.not22, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %2, %.lr.ph
  %.01624 = phi i32 [ %3, %.lr.ph ], [ %1, %2 ]
  %.01723 = phi i32 [ %4, %.lr.ph ], [ 1, %2 ]
  %3 = ashr i32 %.01624, 1
  %4 = shl i32 %.01723, 1
  %.not = icmp ult i32 %3, 2
  br i1 %.not, label %._crit_edge, label %.lr.ph, !llvm.loop !5

._crit_edge:                                      ; preds = %.lr.ph, %2
  %.017.lcssa = phi i32 [ 1, %2 ], [ %4, %.lr.ph ]
  %5 = icmp sgt i32 %.017.lcssa, %0
  br i1 %5, label %.loopexit, label %.preheader

.preheader:                                       ; preds = %._crit_edge
  %.not21.not25 = icmp sgt i32 %1, %0
  br i1 %.not21.not25, label %.lr.ph28.preheader, label %.loopexit

.lr.ph28.preheader:                               ; preds = %.preheader
  %6 = sub i32 %1, %0
  %min.iters.check = icmp ult i32 %6, 8
  br i1 %min.iters.check, label %.lr.ph28.preheader35, label %vector.ph

vector.ph:                                        ; preds = %.lr.ph28.preheader
  %n.vec = and i32 %6, -8
  %ind.end = sub i32 %1, %n.vec
  %.splatinsert = insertelement <4 x i32> poison, i32 %1, i64 0
  %.splat = shufflevector <4 x i32> %.splatinsert, <4 x i32> poison, <4 x i32> zeroinitializer
  %induction = add <4 x i32> %.splat, <i32 0, i32 -1, i32 -2, i32 -3>
  %7 = insertelement <4 x i32> <i32 poison, i32 -1, i32 -1, i32 -1>, i32 %1, i64 0
  br label %vector.body

vector.body:                                      ; preds = %vector.body, %vector.ph
  %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]
  %vec.ind = phi <4 x i32> [ %induction, %vector.ph ], [ %vec.ind.next, %vector.body ]
  %vec.phi = phi <4 x i32> [ %7, %vector.ph ], [ %10, %vector.body ]
  %vec.phi34 = phi <4 x i32> [ <i32 -1, i32 -1, i32 -1, i32 -1>, %vector.ph ], [ %11, %vector.body ]
  %8 = add nsw <4 x i32> %vec.ind, <i32 -1, i32 -1, i32 -1, i32 -1>
  %9 = add <4 x i32> %vec.ind, <i32 -5, i32 -5, i32 -5, i32 -5>
  %10 = and <4 x i32> %8, %vec.phi
  %11 = and <4 x i32> %9, %vec.phi34
  %index.next = add nuw i32 %index, 8
  %vec.ind.next = add <4 x i32> %vec.ind, <i32 -8, i32 -8, i32 -8, i32 -8>
  %12 = icmp eq i32 %index.next, %n.vec
  br i1 %12, label %middle.block, label %vector.body, !llvm.loop !7

middle.block:                                     ; preds = %vector.body
  %bin.rdx = and <4 x i32> %11, %10
  %13 = tail call i32 @llvm.vector.reduce.and.v4i32(<4 x i32> %bin.rdx)
  %cmp.n = icmp eq i32 %6, %n.vec
  br i1 %cmp.n, label %.loopexit, label %.lr.ph28.preheader35

.lr.ph28.preheader35:                             ; preds = %middle.block, %.lr.ph28.preheader
  %.0.in27.ph = phi i32 [ %1, %.lr.ph28.preheader ], [ %ind.end, %middle.block ]
  %.01526.ph = phi i32 [ %1, %.lr.ph28.preheader ], [ %13, %middle.block ]
  br label %.lr.ph28

.lr.ph28:                                         ; preds = %.lr.ph28.preheader35, %.lr.ph28
  %.0.in27 = phi i32 [ %.0, %.lr.ph28 ], [ %.0.in27.ph, %.lr.ph28.preheader35 ]
  %.01526 = phi i32 [ %14, %.lr.ph28 ], [ %.01526.ph, %.lr.ph28.preheader35 ]
  %.0 = add nsw i32 %.0.in27, -1
  %14 = and i32 %.0, %.01526
  %.not21.not = icmp sgt i32 %.0, %0
  br i1 %.not21.not, label %.lr.ph28, label %.loopexit, !llvm.loop !10

.loopexit:                                        ; preds = %.lr.ph28, %middle.block, %.preheader, %._crit_edge
  %.018 = phi i32 [ 0, %._crit_edge ], [ %1, %.preheader ], [ %13, %middle.block ], [ %14, %.lr.ph28 ]
  ret i32 %.018
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.vector.reduce.and.v4i32(<4 x i32>) #1

attributes #0 = { nofree norecurse nosync nounwind memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = distinct !{!7, !6, !8, !9}
!8 = !{!"llvm.loop.isvectorized", i32 1}
!9 = !{!"llvm.loop.unroll.runtime.disable"}
!10 = distinct !{!10, !6, !9, !8}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopLoadEliminationPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,LoopVectorizePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass