; LLVM IR from facebookresearch/habitat-sim :: src/deps/basis-universal/encoder (basisu_frontend)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.basisu::vector.12" = type { ptr, i32, i32 }
%"class.basisu::basisu_frontend" = type { %"struct.basisu::basisu_frontend::params", i32, i32, i8, i8, i8, i32, i32, %"class.basisu::vector", %"class.basisu::vector.0", %"class.basisu::vector.0", %"class.basisu::vector.0", %"class.basisu::tree_vector_quant", %"class.basisu::vector.6", %"class.basisu::vector.6", %"class.basisu::vector.8", %"class.basisu::vector.6", %"class.basisu::vector.10", %"class.basisu::vector.12", %"class.basisu::vector.6", %"class.basisu::vector.0", %"class.basisu::vector.6", %"class.basisu::vector.8", %"class.basisu::vector.6", %"class.basisu::vector.14", %"class.basisu::vector.16", %"class.basisu::vector.18", %"class.basisu::vector.20", %"class.std::mutex" }
%"struct.basisu::basisu_frontend::params" = type { i32, ptr, i32, i32, i32, i8, i8, i8, i8, i8, i8, i8, ptr, i32, i32, i8, float, i32, ptr, ptr }
%"class.basisu::vector" = type { ptr, i32, i32 }
%"class.basisu::tree_vector_quant" = type <{ %"class.basisu::vector.2", %"class.basisu::vector.4", i32, [4 x i8] }>
%"class.basisu::vector.2" = type { ptr, i32, i32 }
%"class.basisu::vector.4" = type { ptr, i32, i32 }
%"class.basisu::vector.10" = type { ptr, i32, i32 }
%"class.basisu::vector.0" = type { ptr, i32, i32 }
%"class.basisu::vector.8" = type { ptr, i32, i32 }
%"class.basisu::vector.6" = type { ptr, i32, i32 }
%"class.basisu::vector.14" = type { ptr, i32, i32 }
%"class.basisu::vector.16" = type { ptr, i32, i32 }
%"class.basisu::vector.18" = type { ptr, i32, i32 }
%"class.basisu::vector.20" = type { ptr, i32, i32 }
%"class.std::mutex" = type { %"class.std::__mutex_base" }
%"class.std::__mutex_base" = type { %union.pthread_mutex_t }
%union.pthread_mutex_t = type { %struct.__pthread_mutex_s }
%struct.__pthread_mutex_s = type { i32, i32, i32, i32, i32, i16, i16, %struct.__pthread_internal_list }
%struct.__pthread_internal_list = type { ptr, ptr }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZNK6basisu15basisu_frontend23check_etc1s_constraintsEv(ptr noundef nonnull align 8 dereferenceable(496) %0) #1 align 2 personality ptr @__gxx_personality_v0 {
  %2 = alloca i1, align 1
  %3 = alloca ptr, align 8
  %4 = alloca %"class.basisu::vector.12", align 8
  %5 = alloca i32, align 4
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca ptr, align 8
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  %14 = load ptr, ptr %3, align 8
  call void @llvm.lifetime.start.p0(i64 16, ptr %4) #5
  %15 = getelementptr inbounds %"class.basisu::basisu_frontend", ptr %14, i32 0, i32 1
  %16 = load i32, ptr %15, align 8, !tbaa !9
  %17 = zext i32 %16 to i64
  call void @_ZN6basisu6vectorINS_5vec2UEEC2Em(ptr noundef nonnull align 8 dereferenceable(16) %4, i64 noundef %17)
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #5
  store i32 0, ptr %5, align 4, !tbaa !31
  br label %18

18:                                               ; preds = %87, %1
  %19 = load i32, ptr %5, align 4, !tbaa !31
  %20 = getelementptr inbounds %"class.basisu::basisu_frontend", ptr %14, i32 0, i32 13
  %21 = invoke noundef i32 @_ZNK6basisu6vectorINS0_IjEEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(16) %20)
          to label %22 unwind label %25

22:                                               ; preds = %18
  %23 = icmp slt i32 %19, %21
  br i1 %23, label %29, label %24

24:                                               ; preds = %22
  store i32 2, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #5
  br label %92

25:                                               ; preds = %18
  %26 = landingpad { ptr, i32 }
          cleanup
  %27 = extractvalue { ptr, i32 } %26, 0
  store ptr %27, ptr %6, align 8
  %28 = extractvalue { ptr, i32 } %26, 1
  store i32 %28, ptr %7, align 4
  br label %91

29:                                               ; preds = %22
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #5
  %30 = getelementptr inbounds %"class.basisu::basisu_frontend", ptr %14, i32 0, i32 13
  %31 = load i32, ptr %5, align 4, !tbaa !31
  %32 = sext i32 %31 to i64
  %33 = invoke noundef nonnull align 8 dereferenceable(16) ptr @_ZNK6basisu6vectorINS0_IjEEEixEm(ptr noundef nonnull align 8 dereferenceable(16) %30, i64 noundef %32)
          to label %34 unwind label %42

34:                                               ; preds = %29
  store ptr %33, ptr %9, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #5
  store i32 0, ptr %10, align 4, !tbaa !31
  br label %35

35:                                               ; preds = %73, %34
  %36 = load i32, ptr %10, align 4, !tbaa !31
  %37 = load ptr, ptr %9, align 8, !tbaa !5
  %38 = invoke noundef i32 @_ZNK6basisu6vectorIjE4sizeEv(ptr noundef nonnull align 8 dereferenceable(16) %37)
          to label %39 unwind label %46

39:                                               ; preds = %35
  %40 = icmp ult i32 %36, %38
  br i1 %40, label %50, label %41

41:                                               ; preds = %39
  store i32 5, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #5
  br label %86

42:                                               ; preds = %29
  %43 = landingpad { ptr, i32 }
          cleanup
  %44 = extractvalue { ptr, i32 } %43, 0
  store ptr %44, ptr %6, align 8
  %45 = extractvalue { ptr, i32 } %43, 1
  store i32 %45, ptr %7, align 4
  br label %90

46:                                               ; preds = %35
  %47 = landingpad { ptr, i32 }
          cleanup
  %48 = extractvalue { ptr, i32 } %47, 0
  store ptr %48, ptr %6, align 8
  %49 = extractvalue { ptr, i32 } %47, 1
  store i32 %49, ptr %7, align 4
  br label %85

50:                                               ; preds = %39
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #5
  %51 = load ptr, ptr %9, align 8, !tbaa !5
  %52 = load i32, ptr %10, align 4, !tbaa !31
  %53 = zext i32 %52 to i64
  %54 = invoke noundef nonnull align 4 dereferenceable(4) ptr @_ZNK6basisu6vectorIjEixEm(ptr noundef nonnull align 8 dereferenceable(16) %51, i64 noundef %53)
          to label %55 unwind label %76

55:                                               ; preds = %50
  %56 = load i32, ptr %54, align 4, !tbaa !31
  %57 = lshr i32 %56, 1
  store i32 %57, ptr %11, align 4, !tbaa !31
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #5
  %58 = load ptr, ptr %9, align 8, !tbaa !5
  %59 = load i32, ptr %10, align 4, !tbaa !31
  %60 = zext i32 %59 to i64
  %61 = invoke noundef nonnull align 4 dereferenceable(4) ptr @_ZNK6basisu6vectorIjEixEm(ptr noundef nonnull align 8 dereferenceable(16) %58, i64 noundef %60)
          to label %62 unwind label %80

62:                                               ; preds = %55
  %63 = load i32, ptr %61, align 4, !tbaa !31
  %64 = and i32 %63, 1
  store i32 %64, ptr %12, align 4, !tbaa !31
  %65 = load i32, ptr %5, align 4, !tbaa !31
  %66 = load i32, ptr %11, align 4, !tbaa !31
  %67 = zext i32 %66 to i64
  %68 = invoke noundef nonnull align 4 dereferenceable(8) ptr @_ZN6basisu6vectorINS_5vec2UEEixEm(ptr noundef nonnull align 8 dereferenceable(16) %4, i64 noundef %67)
          to label %69 unwind label %80

69:                                               ; preds = %62
  %70 = load i32, ptr %12, align 4, !tbaa !31
  %71 = invoke noundef nonnull align 4 dereferenceable(4) ptr @_ZN6basisu5vec2UixEj(ptr noundef nonnull align 4 dereferenceable(8) %68, i32 noundef %70)
          to label %72 unwind label %80

72:                                               ; preds = %69
  store i32 %65, ptr %71, align 4, !tbaa !31
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #5
  br label %73

73:                                               ; preds = %72
  %74 = load i32, ptr %10, align 4, !tbaa !31
  %75 = add i32 %74, 1
  store i32 %75, ptr %10, align 4, !tbaa !31
  br label %35, !llvm.loop !32

76:                                               ; preds = %50
  %77 = landingpad { ptr, i32 }
          cleanup
  %78 = extractvalue { ptr, i32 } %77, 0
  store ptr %78, ptr %6, align 8
  %79 = extractvalue { ptr, i32 } %77, 1
  store i32 %79, ptr %7, align 4
  br label %84

80:                                               ; preds = %69, %62, %55
  %81 = landingpad { ptr, i32 }
          cleanup
  %82 = extractvalue { ptr, i32 } %81, 0
  store ptr %82, ptr %6, align 8
  %83 = extractvalue { ptr, i32 } %81, 1
  store i32 %83, ptr %7, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #5
  br label %84

84:                                               ; preds = %80, %76
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #5
  br label %85

85:                                               ; preds = %84, %46
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #5
  br label %90

86:                                               ; preds = %41
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #5
  br label %87

87:                                               ; preds = %86
  %88 = load i32, ptr %5, align 4, !tbaa !31
  %89 = add nsw i32 %88, 1
  store i32 %89, ptr %5, align 4, !tbaa !31
  br label %18, !llvm.loop !34

90:                                               ; preds = %85, %42
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #5
  br label %91

91:                                               ; preds = %90, %25
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #5
  br label %129

92:                                               ; preds = %24
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #5
  store i32 0, ptr %13, align 4, !tbaa !31
  br label %93

93:                                               ; preds = %121, %92
  %94 = load i32, ptr %13, align 4, !tbaa !31
  %95 = getelementptr inbounds %"class.basisu::basisu_frontend", ptr %14, i32 0, i32 1
  %96 = load i32, ptr %95, align 8, !tbaa !9
  %97 = icmp ult i32 %94, %96
  br i1 %97, label %99, label %98

98:                                               ; preds = %93
  store i32 8, ptr %8, align 4
  br label %124

99:                                               ; preds = %93
  %100 = load i32, ptr %13, align 4, !tbaa !31
  %101 = zext i32 %100 to i64
  %102 = invoke noundef nonnull align 4 dereferenceable(8) ptr @_ZN6basisu6vectorINS_5vec2UEEixEm(ptr noundef nonnull align 8 dereferenceable(16) %4, i64 noundef %101)
          to label %103 unwind label %116

103:                                              ; preds = %99
  %104 = invoke noundef nonnull align 4 dereferenceable(4) ptr @_ZN6basisu5vec2UixEj(ptr noundef nonnull align 4 dereferenceable(8) %102, i32 noundef 0)
          to label %105 unwind label %116

105:                                              ; preds = %103
  %106 = load i32, ptr %104, align 4, !tbaa !31
  %107 = load i32, ptr %13, align 4, !tbaa !31
  %108 = zext i32 %107 to i64
  %109 = invoke noundef nonnull align 4 dereferenceable(8) ptr @_ZN6basisu6vectorINS_5vec2UEEixEm(ptr noundef nonnull align 8 dereferenceable(16) %4, i64 noundef %108)
          to label %110 unwind label %116

110:                                              ; preds = %105
  %111 = invoke noundef nonnull align 4 dereferenceable(4) ptr @_ZN6basisu5vec2UixEj(ptr noundef nonnull align 4 dereferenceable(8) %109, i32 noundef 1)
          to label %112 unwind label %116

112:                                              ; preds = %110
  %113 = load i32, ptr %111, align 4, !tbaa !31
  %114 = icmp ne i32 %106, %113
  br i1 %114, label %115, label %120

115:                                              ; preds = %112
  store i1 false, ptr %2, align 1
  store i32 1, ptr %8, align 4
  br label %124

116:                                              ; preds = %110, %105, %103, %99
  %117 = landingpad { ptr, i32 }
          cleanup
  %118 = extractvalue { ptr, i32 } %117, 0
  store ptr %118, ptr %6, align 8
  %119 = extractvalue { ptr, i32 } %117, 1
  store i32 %119, ptr %7, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #5
  br label %129

120:                                              ; preds = %112
  br label %121

121:                                              ; preds = %120
  %122 = load i32, ptr %13, align 4, !tbaa !31
  %123 = add i32 %122, 1
  store i32 %123, ptr %13, align 4, !tbaa !31
  br label %93, !llvm.loop !35

124:                                              ; preds = %115, %98
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #5
  %125 = load i32, ptr %8, align 4
  switch i32 %125, label %127 [
    i32 8, label %126
  ]

126:                                              ; preds = %124
  store i1 true, ptr %2, align 1
  store i32 1, ptr %8, align 4
  br label %127

127:                                              ; preds = %126, %124
  call void @_ZN6basisu6vectorINS_5vec2UEED2Ev(ptr noundef nonnull align 8 dereferenceable(16) %4) #5
  call void @llvm.lifetime.end.p0(i64 16, ptr %4) #5
  %128 = load i1, ptr %2, align 1
  ret i1 %128

129:                                              ; preds = %116, %91
  call void @_ZN6basisu6vectorINS_5vec2UEED2Ev(ptr noundef nonnull align 8 dereferenceable(16) %4) #5
  call void @llvm.lifetime.end.p0(i64 16, ptr %4) #5
  br label %130

130:                                              ; preds = %129
  %131 = load ptr, ptr %6, align 8
  %132 = load i32, ptr %7, align 4
  %133 = insertvalue { ptr, i32 } poison, ptr %131, 0
  %134 = insertvalue { ptr, i32 } %133, i32 %132, 1
  resume { ptr, i32 } %134
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK6basisu6vectorINS0_IjEEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(16)) #2 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(8) ptr @_ZN6basisu6vectorINS_5vec2UEEixEm(ptr noundef nonnull align 8 dereferenceable(16), i64 noundef) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZN6basisu5vec2UixEj(ptr noundef nonnull align 4 dereferenceable(8), i32 noundef) #3 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK6basisu6vectorIjE4sizeEv(ptr noundef nonnull align 8 dereferenceable(16)) #2 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNK6basisu6vectorIjEixEm(ptr noundef nonnull align 8 dereferenceable(16), i64 noundef) #2 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN6basisu6vectorINS_5vec2UEEC2Em(ptr noundef nonnull align 8 dereferenceable(16), i64 noundef) unnamed_addr #4 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(16) ptr @_ZNK6basisu6vectorINS0_IjEEEixEm(ptr noundef nonnull align 8 dereferenceable(16), i64 noundef) #2 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN6basisu6vectorINS_5vec2UEED2Ev(ptr noundef nonnull align 8 dereferenceable(16)) unnamed_addr #2 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !12, i64 88}
!10 = !{!"_ZTSN6basisu15basisu_frontendE", !11, i64 0, !12, i64 88, !12, i64 92, !13, i64 96, !13, i64 97, !13, i64 98, !12, i64 100, !12, i64 104, !16, i64 112, !17, i64 128, !17, i64 144, !17, i64 160, !18, i64 176, !21, i64 216, !21, i64 232, !22, i64 248, !21, i64 264, !23, i64 280, !24, i64 296, !21, i64 312, !17, i64 328, !21, i64 344, !22, i64 360, !21, i64 376, !25, i64 392, !26, i64 408, !27, i64 424, !28, i64 440, !29, i64 456}
!11 = !{!"_ZTSN6basisu15basisu_frontend6paramsE", !12, i64 0, !6, i64 8, !12, i64 16, !12, i64 20, !12, i64 24, !13, i64 28, !13, i64 29, !13, i64 30, !13, i64 31, !13, i64 32, !13, i64 33, !13, i64 34, !6, i64 40, !12, i64 48, !12, i64 52, !13, i64 56, !14, i64 60, !15, i64 64, !6, i64 72, !6, i64 80}
!12 = !{!"int", !7, i64 0}
!13 = !{!"bool", !7, i64 0}
!14 = !{!"float", !7, i64 0}
!15 = !{!"_ZTSN6basist18basis_texture_typeE", !7, i64 0}
!16 = !{!"_ZTSN6basisu6vectorINS_11pixel_blockEEE", !6, i64 0, !12, i64 8, !12, i64 12}
!17 = !{!"_ZTSN6basisu6vectorINS_9etc_blockEEE", !6, i64 0, !12, i64 8, !12, i64 12}
!18 = !{!"_ZTSN6basisu17tree_vector_quantINS_3vecILj6EfEEEE", !19, i64 0, !20, i64 16, !12, i64 32}
!19 = !{!"_ZTSN6basisu6vectorINS_17tree_vector_quantINS_3vecILj6EfEEE9tsvq_nodeEEE", !6, i64 0, !12, i64 8, !12, i64 12}
!20 = !{!"_ZTSN6basisu6vectorISt4pairINS_3vecILj6EfEEmEEE", !6, i64 0, !12, i64 8, !12, i64 12}
!21 = !{!"_ZTSN6basisu6vectorINS0_IjEEEE", !6, i64 0, !12, i64 8, !12, i64 12}
!22 = !{!"_ZTSN6basisu6vectorIhEE", !6, i64 0, !12, i64 8, !12, i64 12}
!23 = !{!"_ZTSN6basisu6vectorINS_15basisu_frontend27endpoint_cluster_etc_paramsEEE", !6, i64 0, !12, i64 8, !12, i64 12}
!24 = !{!"_ZTSN6basisu6vectorINS_5vec2UEEE", !6, i64 0, !12, i64 8, !12, i64 12}
!25 = !{!"_ZTSN6basisu6vectorIN6basist38etc1_global_selector_codebook_entry_idEEE", !6, i64 0, !12, i64 8, !12, i64 12}
!26 = !{!"_ZTSN6basisu6vectorIbEE", !6, i64 0, !12, i64 8, !12, i64 12}
!27 = !{!"_ZTSN6basisu6vectorIjEE", !6, i64 0, !12, i64 8, !12, i64 12}
!28 = !{!"_ZTSN6basisu6vectorINS_15basisu_frontend27subblock_endpoint_quant_errEEE", !6, i64 0, !12, i64 8, !12, i64 12}
!29 = !{!"_ZTSSt5mutex", !30, i64 0}
!30 = !{!"_ZTSSt12__mutex_base", !7, i64 0}
!31 = !{!12, !12, i64 0}
!32 = distinct !{!32, !33}
!33 = !{!"llvm.loop.mustprogress"}
!34 = distinct !{!34, !33}
!35 = distinct !{!35, !33}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.basisu::vector.12" = type { ptr, i32, i32 }

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZNK6basisu15basisu_frontend23check_etc1s_constraintsEv(ptr noundef nonnull align 8 dereferenceable(496) %0) local_unnamed_addr #1 align 2 personality ptr @__gxx_personality_v0 {
  %2 = alloca %"class.basisu::vector.12", align 8
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %2) #5
  %3 = getelementptr inbounds i8, ptr %0, i64 88
  %4 = load i32, ptr %3, align 8, !tbaa !5
  %5 = zext i32 %4 to i64
  call void @_ZN6basisu6vectorINS_5vec2UEEC2Em(ptr noundef nonnull align 8 dereferenceable(16) %2, i64 noundef %5)
  %6 = getelementptr inbounds i8, ptr %0, i64 216
  %7 = call noundef i32 @_ZNK6basisu6vectorINS0_IjEEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(16) %6)
  %8 = icmp sgt i32 %7, 0
  br i1 %8, label %.lr.ph27, label %.preheader

.preheader:                                       ; preds = %._crit_edge, %1
  %9 = load i32, ptr %3, align 8, !tbaa !5
  %.not2328 = icmp eq i32 %9, 0
  br i1 %.not2328, label %.critedge, label %.lr.ph31

.lr.ph27:                                         ; preds = %1, %._crit_edge
  %indvars.iv36 = phi i64 [ %indvars.iv.next37, %._crit_edge ], [ 0, %1 ]
  %10 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNK6basisu6vectorINS0_IjEEEixEm(ptr noundef nonnull align 8 dereferenceable(16) %6, i64 noundef %indvars.iv36)
  %11 = call noundef i32 @_ZNK6basisu6vectorIjE4sizeEv(ptr noundef nonnull align 8 dereferenceable(16) %10)
  %.not34 = icmp eq i32 %11, 0
  br i1 %.not34, label %._crit_edge, label %.lr.ph.preheader

.lr.ph.preheader:                                 ; preds = %.lr.ph27
  %12 = trunc nuw nsw i64 %indvars.iv36 to i32
  br label %.lr.ph

._crit_edge:                                      ; preds = %.lr.ph, %.lr.ph27
  %indvars.iv.next37 = add nuw nsw i64 %indvars.iv36, 1
  %13 = call noundef i32 @_ZNK6basisu6vectorINS0_IjEEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(16) %6)
  %14 = sext i32 %13 to i64
  %15 = icmp slt i64 %indvars.iv.next37, %14
  br i1 %15, label %.lr.ph27, label %.preheader, !llvm.loop !30

.lr.ph:                                           ; preds = %.lr.ph.preheader, %.lr.ph
  %indvars.iv = phi i64 [ 0, %.lr.ph.preheader ], [ %indvars.iv.next, %.lr.ph ]
  %16 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNK6basisu6vectorIjEixEm(ptr noundef nonnull align 8 dereferenceable(16) %10, i64 noundef %indvars.iv)
  %17 = load i32, ptr %16, align 4, !tbaa !32
  %18 = lshr i32 %17, 1
  %19 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNK6basisu6vectorIjEixEm(ptr noundef nonnull align 8 dereferenceable(16) %10, i64 noundef %indvars.iv)
  %20 = load i32, ptr %19, align 4, !tbaa !32
  %21 = and i32 %20, 1
  %22 = zext nneg i32 %18 to i64
  %23 = call noundef nonnull align 4 dereferenceable(8) ptr @_ZN6basisu6vectorINS_5vec2UEEixEm(ptr noundef nonnull align 8 dereferenceable(16) %2, i64 noundef %22)
  %24 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN6basisu5vec2UixEj(ptr noundef nonnull align 4 dereferenceable(8) %23, i32 noundef %21)
  store i32 %12, ptr %24, align 4, !tbaa !32
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %25 = call noundef i32 @_ZNK6basisu6vectorIjE4sizeEv(ptr noundef nonnull align 8 dereferenceable(16) %10)
  %26 = zext i32 %25 to i64
  %27 = icmp ult i64 %indvars.iv.next, %26
  br i1 %27, label %.lr.ph, label %._crit_edge, !llvm.loop !33

28:                                               ; preds = %.lr.ph31
  %indvars.iv.next40 = add nuw nsw i64 %indvars.iv39, 1
  %29 = load i32, ptr %3, align 8, !tbaa !5
  %30 = zext i32 %29 to i64
  %.not23.not = icmp ult i64 %indvars.iv.next40, %30
  br i1 %.not23.not, label %.lr.ph31, label %.critedge, !llvm.loop !34

.lr.ph31:                                         ; preds = %.preheader, %28
  %indvars.iv39 = phi i64 [ %indvars.iv.next40, %28 ], [ 0, %.preheader ]
  %31 = call noundef nonnull align 4 dereferenceable(8) ptr @_ZN6basisu6vectorINS_5vec2UEEixEm(ptr noundef nonnull align 8 dereferenceable(16) %2, i64 noundef %indvars.iv39)
  %32 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN6basisu5vec2UixEj(ptr noundef nonnull align 4 dereferenceable(8) %31, i32 noundef 0)
  %33 = load i32, ptr %32, align 4, !tbaa !32
  %34 = call noundef nonnull align 4 dereferenceable(8) ptr @_ZN6basisu6vectorINS_5vec2UEEixEm(ptr noundef nonnull align 8 dereferenceable(16) %2, i64 noundef %indvars.iv39)
  %35 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN6basisu5vec2UixEj(ptr noundef nonnull align 4 dereferenceable(8) %34, i32 noundef 1)
  %36 = load i32, ptr %35, align 4, !tbaa !32
  %.not = icmp eq i32 %33, %36
  br i1 %.not, label %28, label %.critedge

.critedge:                                        ; preds = %.lr.ph31, %28, %.preheader
  %.not23.lcssa = phi i1 [ true, %.preheader ], [ %.not, %28 ], [ %.not, %.lr.ph31 ]
  call void @_ZN6basisu6vectorINS_5vec2UEED2Ev(ptr noundef nonnull align 8 dereferenceable(16) %2) #5
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %2) #5
  ret i1 %.not23.lcssa
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK6basisu6vectorINS0_IjEEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(16)) local_unnamed_addr #2 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(8) ptr @_ZN6basisu6vectorINS_5vec2UEEixEm(ptr noundef nonnull align 8 dereferenceable(16), i64 noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZN6basisu5vec2UixEj(ptr noundef nonnull align 4 dereferenceable(8), i32 noundef) local_unnamed_addr #3 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK6basisu6vectorIjE4sizeEv(ptr noundef nonnull align 8 dereferenceable(16)) local_unnamed_addr #2 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNK6basisu6vectorIjEixEm(ptr noundef nonnull align 8 dereferenceable(16), i64 noundef) local_unnamed_addr #2 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN6basisu6vectorINS_5vec2UEEC2Em(ptr noundef nonnull align 8 dereferenceable(16), i64 noundef) unnamed_addr #4 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(16) ptr @_ZNK6basisu6vectorINS0_IjEEEixEm(ptr noundef nonnull align 8 dereferenceable(16), i64 noundef) local_unnamed_addr #2 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN6basisu6vectorINS_5vec2UEED2Ev(ptr noundef nonnull align 8 dereferenceable(16)) unnamed_addr #2 align 2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !8, i64 88}
!6 = !{!"_ZTSN6basisu15basisu_frontendE", !7, i64 0, !8, i64 88, !8, i64 92, !12, i64 96, !12, i64 97, !12, i64 98, !8, i64 100, !8, i64 104, !15, i64 112, !16, i64 128, !16, i64 144, !16, i64 160, !17, i64 176, !20, i64 216, !20, i64 232, !21, i64 248, !20, i64 264, !22, i64 280, !23, i64 296, !20, i64 312, !16, i64 328, !20, i64 344, !21, i64 360, !20, i64 376, !24, i64 392, !25, i64 408, !26, i64 424, !27, i64 440, !28, i64 456}
!7 = !{!"_ZTSN6basisu15basisu_frontend6paramsE", !8, i64 0, !11, i64 8, !8, i64 16, !8, i64 20, !8, i64 24, !12, i64 28, !12, i64 29, !12, i64 30, !12, i64 31, !12, i64 32, !12, i64 33, !12, i64 34, !11, i64 40, !8, i64 48, !8, i64 52, !12, i64 56, !13, i64 60, !14, i64 64, !11, i64 72, !11, i64 80}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!"bool", !9, i64 0}
!13 = !{!"float", !9, i64 0}
!14 = !{!"_ZTSN6basist18basis_texture_typeE", !9, i64 0}
!15 = !{!"_ZTSN6basisu6vectorINS_11pixel_blockEEE", !11, i64 0, !8, i64 8, !8, i64 12}
!16 = !{!"_ZTSN6basisu6vectorINS_9etc_blockEEE", !11, i64 0, !8, i64 8, !8, i64 12}
!17 = !{!"_ZTSN6basisu17tree_vector_quantINS_3vecILj6EfEEEE", !18, i64 0, !19, i64 16, !8, i64 32}
!18 = !{!"_ZTSN6basisu6vectorINS_17tree_vector_quantINS_3vecILj6EfEEE9tsvq_nodeEEE", !11, i64 0, !8, i64 8, !8, i64 12}
!19 = !{!"_ZTSN6basisu6vectorISt4pairINS_3vecILj6EfEEmEEE", !11, i64 0, !8, i64 8, !8, i64 12}
!20 = !{!"_ZTSN6basisu6vectorINS0_IjEEEE", !11, i64 0, !8, i64 8, !8, i64 12}
!21 = !{!"_ZTSN6basisu6vectorIhEE", !11, i64 0, !8, i64 8, !8, i64 12}
!22 = !{!"_ZTSN6basisu6vectorINS_15basisu_frontend27endpoint_cluster_etc_paramsEEE", !11, i64 0, !8, i64 8, !8, i64 12}
!23 = !{!"_ZTSN6basisu6vectorINS_5vec2UEEE", !11, i64 0, !8, i64 8, !8, i64 12}
!24 = !{!"_ZTSN6basisu6vectorIN6basist38etc1_global_selector_codebook_entry_idEEE", !11, i64 0, !8, i64 8, !8, i64 12}
!25 = !{!"_ZTSN6basisu6vectorIbEE", !11, i64 0, !8, i64 8, !8, i64 12}
!26 = !{!"_ZTSN6basisu6vectorIjEE", !11, i64 0, !8, i64 8, !8, i64 12}
!27 = !{!"_ZTSN6basisu6vectorINS_15basisu_frontend27subblock_endpoint_quant_errEEE", !11, i64 0, !8, i64 8, !8, i64 12}
!28 = !{!"_ZTSSt5mutex", !29, i64 0}
!29 = !{!"_ZTSSt12__mutex_base", !9, i64 0}
!30 = distinct !{!30, !31}
!31 = !{!"llvm.loop.mustprogress"}
!32 = !{!8, !8, i64 0}
!33 = distinct !{!33, !31}
!34 = distinct !{!34, !31}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass