; LLVM IR from drken1215/book_algorithm_solution :: codes/chap05/code_5_6.ll (Z3reci)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl" }
%"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl" = type { %"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl_data" }
%"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@h = external dso_local global %"class.std::vector", align 8
@dp = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress uwtable
define dso_local noundef i64 @_Z3reci(i32 noundef %0) #0 {
  %2 = alloca i64, align 8
  %3 = alloca i32, align 4
  %4 = alloca i64, align 8
  store i32 %0, ptr %3, align 4, !tbaa !5
  %5 = load i32, ptr %3, align 4, !tbaa !5
  %6 = sext i32 %5 to i64
  %7 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @dp, i64 noundef %6) #4
  %8 = load i64, ptr %7, align 8, !tbaa !9
  %9 = icmp slt i64 %8, 1152921504606846976
  br i1 %9, label %10, label %15

10:                                               ; preds = %1
  %11 = load i32, ptr %3, align 4, !tbaa !5
  %12 = sext i32 %11 to i64
  %13 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @dp, i64 noundef %12) #4
  %14 = load i64, ptr %13, align 8, !tbaa !9
  store i64 %14, ptr %2, align 8
  br label %58

15:                                               ; preds = %1
  %16 = load i32, ptr %3, align 4, !tbaa !5
  %17 = icmp eq i32 %16, 0
  br i1 %17, label %18, label %19

18:                                               ; preds = %15
  store i64 0, ptr %2, align 8
  br label %58

19:                                               ; preds = %15
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #4
  store i64 1152921504606846976, ptr %4, align 8, !tbaa !9
  %20 = load i32, ptr %3, align 4, !tbaa !5
  %21 = sub nsw i32 %20, 1
  %22 = call noundef i64 @_Z3reci(i32 noundef %21)
  %23 = load i32, ptr %3, align 4, !tbaa !5
  %24 = sext i32 %23 to i64
  %25 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @h, i64 noundef %24) #4
  %26 = load i64, ptr %25, align 8, !tbaa !9
  %27 = load i32, ptr %3, align 4, !tbaa !5
  %28 = sub nsw i32 %27, 1
  %29 = sext i32 %28 to i64
  %30 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @h, i64 noundef %29) #4
  %31 = load i64, ptr %30, align 8, !tbaa !9
  %32 = sub nsw i64 %26, %31
  %33 = call noundef i64 @_ZSt3absx(i64 noundef %32)
  %34 = add nsw i64 %22, %33
  call void @_Z5chminIxEvRT_S0_(ptr noundef nonnull align 8 dereferenceable(8) %4, i64 noundef %34)
  %35 = load i32, ptr %3, align 4, !tbaa !5
  %36 = icmp sgt i32 %35, 1
  br i1 %36, label %37, label %53

37:                                               ; preds = %19
  %38 = load i32, ptr %3, align 4, !tbaa !5
  %39 = sub nsw i32 %38, 2
  %40 = call noundef i64 @_Z3reci(i32 noundef %39)
  %41 = load i32, ptr %3, align 4, !tbaa !5
  %42 = sext i32 %41 to i64
  %43 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @h, i64 noundef %42) #4
  %44 = load i64, ptr %43, align 8, !tbaa !9
  %45 = load i32, ptr %3, align 4, !tbaa !5
  %46 = sub nsw i32 %45, 2
  %47 = sext i32 %46 to i64
  %48 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @h, i64 noundef %47) #4
  %49 = load i64, ptr %48, align 8, !tbaa !9
  %50 = sub nsw i64 %44, %49
  %51 = call noundef i64 @_ZSt3absx(i64 noundef %50)
  %52 = add nsw i64 %40, %51
  call void @_Z5chminIxEvRT_S0_(ptr noundef nonnull align 8 dereferenceable(8) %4, i64 noundef %52)
  br label %53

53:                                               ; preds = %37, %19
  %54 = load i64, ptr %4, align 8, !tbaa !9
  %55 = load i32, ptr %3, align 4, !tbaa !5
  %56 = sext i32 %55 to i64
  %57 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @dp, i64 noundef %56) #4
  store i64 %54, ptr %57, align 8, !tbaa !9
  store i64 %54, ptr %2, align 8
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #4
  br label %58

58:                                               ; preds = %53, %18, %10
  %59 = load i64, ptr %2, align 8
  ret i64 %59
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z5chminIxEvRT_S0_(ptr noundef nonnull align 8 dereferenceable(8), i64 noundef) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZSt3absx(i64 noundef) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long long", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl" }
%"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl" = type { %"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl_data" }
%"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@h = external dso_local global %"class.std::vector", align 8
@dp = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i64 @_Z3reci(i32 noundef %0) local_unnamed_addr #0 {
  %2 = alloca i64, align 8
  %3 = sext i32 %0 to i64
  %4 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @dp, i64 noundef %3) #3
  %5 = load i64, ptr %4, align 8, !tbaa !5
  %6 = icmp slt i64 %5, 1152921504606846976
  br i1 %6, label %7, label %10

7:                                                ; preds = %1
  %8 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @dp, i64 noundef %3) #3
  %9 = load i64, ptr %8, align 8, !tbaa !5
  br label %38

10:                                               ; preds = %1
  %11 = icmp eq i32 %0, 0
  br i1 %11, label %38, label %12

12:                                               ; preds = %10
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %2) #3
  store i64 1152921504606846976, ptr %2, align 8, !tbaa !5
  %13 = add nsw i32 %0, -1
  %14 = tail call noundef i64 @_Z3reci(i32 noundef %13)
  %15 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @h, i64 noundef %3) #3
  %16 = load i64, ptr %15, align 8, !tbaa !5
  %17 = sext i32 %13 to i64
  %18 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @h, i64 noundef %17) #3
  %19 = load i64, ptr %18, align 8, !tbaa !5
  %20 = sub nsw i64 %16, %19
  %21 = tail call noundef i64 @_ZSt3absx(i64 noundef %20)
  %22 = add nsw i64 %21, %14
  call void @_Z5chminIxEvRT_S0_(ptr noundef nonnull align 8 dereferenceable(8) %2, i64 noundef %22)
  %23 = icmp sgt i32 %0, 1
  br i1 %23, label %24, label %35

24:                                               ; preds = %12
  %25 = add nsw i32 %0, -2
  %26 = call noundef i64 @_Z3reci(i32 noundef %25)
  %27 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @h, i64 noundef %3) #3
  %28 = load i64, ptr %27, align 8, !tbaa !5
  %29 = zext nneg i32 %25 to i64
  %30 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @h, i64 noundef %29) #3
  %31 = load i64, ptr %30, align 8, !tbaa !5
  %32 = sub nsw i64 %28, %31
  %33 = call noundef i64 @_ZSt3absx(i64 noundef %32)
  %34 = add nsw i64 %33, %26
  call void @_Z5chminIxEvRT_S0_(ptr noundef nonnull align 8 dereferenceable(8) %2, i64 noundef %34)
  br label %35

35:                                               ; preds = %24, %12
  %36 = load i64, ptr %2, align 8, !tbaa !5
  %37 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @dp, i64 noundef %3) #3
  store i64 %36, ptr %37, align 8, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2) #3
  br label %38

38:                                               ; preds = %10, %35, %7
  %.0 = phi i64 [ %9, %7 ], [ %36, %35 ], [ 0, %10 ]
  ret i64 %.0
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z5chminIxEvRT_S0_(ptr noundef nonnull align 8 dereferenceable(8), i64 noundef) local_unnamed_addr #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZSt3absx(i64 noundef) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass