; LLVM IR from microsoft/X-Mem :: src (Benchmark)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.xmem::Benchmark" = type <{ ptr, ptr, i64, i32, i32, i32, i32, i32, i32, i32, i32, %"class.std::vector", %"class.std::vector.3", %"class.std::vector.8", double, double, double, double, double, double, double, double, double, %"class.std::__cxx11::basic_string", %"class.std::vector.8", %"class.std::vector.8", %"class.std::__cxx11::basic_string", i8, i8, i8, [5 x i8] }>
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<xmem::PowerReader *, std::allocator<xmem::PowerReader *>>::_Vector_impl" }
%"struct.std::_Vector_base<xmem::PowerReader *, std::allocator<xmem::PowerReader *>>::_Vector_impl" = type { %"struct.std::_Vector_base<xmem::PowerReader *, std::allocator<xmem::PowerReader *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<xmem::PowerReader *, std::allocator<xmem::PowerReader *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.3" = type { %"struct.std::_Vector_base.4" }
%"struct.std::_Vector_base.4" = type { %"struct.std::_Vector_base<xmem::Thread *, std::allocator<xmem::Thread *>>::_Vector_impl" }
%"struct.std::_Vector_base<xmem::Thread *, std::allocator<xmem::Thread *>>::_Vector_impl" = type { %"struct.std::_Vector_base<xmem::Thread *, std::allocator<xmem::Thread *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<xmem::Thread *, std::allocator<xmem::Thread *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.8" = type { %"struct.std::_Vector_base.9" }
%"struct.std::_Vector_base.9" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }

@_ZTVN4xmem9BenchmarkE = external dso_local unnamed_addr constant { [7 x ptr] }, align 8

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4xmem9BenchmarkC2EPvmjjjjNS_14pattern_mode_tENS_9rw_mode_tENS_12chunk_size_tEiSt6vectorIPNS_11PowerReaderESaIS7_EENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESF_(ptr noundef nonnull align 8 dereferenceable(315) %0, ptr noundef %1, i64 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7, i32 noundef %8, i32 noundef %9, i32 noundef %10, ptr noundef %11, ptr noundef %12, ptr noundef %13) unnamed_addr #0 align 2 personality ptr @__gxx_personality_v0 {
  %15 = alloca ptr, align 8
  %16 = alloca ptr, align 8
  %17 = alloca i64, align 8
  %18 = alloca i32, align 4
  %19 = alloca i32, align 4
  %20 = alloca i32, align 4
  %21 = alloca i32, align 4
  %22 = alloca i32, align 4
  %23 = alloca i32, align 4
  %24 = alloca i32, align 4
  %25 = alloca i32, align 4
  %26 = alloca ptr, align 8
  %27 = alloca ptr, align 8
  %28 = alloca ptr, align 8
  %29 = alloca ptr, align 8
  %30 = alloca i32, align 4
  %31 = alloca i32, align 4
  %32 = alloca double, align 8
  store ptr %0, ptr %15, align 8, !tbaa !5
  store ptr %1, ptr %16, align 8, !tbaa !5
  store i64 %2, ptr %17, align 8, !tbaa !9
  store i32 %3, ptr %18, align 4, !tbaa !11
  store i32 %4, ptr %19, align 4, !tbaa !11
  store i32 %5, ptr %20, align 4, !tbaa !11
  store i32 %6, ptr %21, align 4, !tbaa !11
  store i32 %7, ptr %22, align 4, !tbaa !13
  store i32 %8, ptr %23, align 4, !tbaa !15
  store i32 %9, ptr %24, align 4, !tbaa !17
  store i32 %10, ptr %25, align 4, !tbaa !11
  store ptr %11, ptr %26, align 8, !tbaa !5
  store ptr %12, ptr %27, align 8, !tbaa !5
  store ptr %13, ptr %28, align 8, !tbaa !5
  %33 = load ptr, ptr %15, align 8
  store ptr getelementptr inbounds inrange(-16, 40) ({ [7 x ptr] }, ptr @_ZTVN4xmem9BenchmarkE, i32 0, i32 0, i32 2), ptr %33, align 8, !tbaa !19
  %34 = getelementptr inbounds %"class.xmem::Benchmark", ptr %33, i32 0, i32 1
  %35 = load ptr, ptr %16, align 8, !tbaa !5
  store ptr %35, ptr %34, align 8, !tbaa !21
  %36 = getelementptr inbounds %"class.xmem::Benchmark", ptr %33, i32 0, i32 2
  %37 = load i64, ptr %17, align 8, !tbaa !9
  store i64 %37, ptr %36, align 8, !tbaa !39
  %38 = getelementptr inbounds %"class.xmem::Benchmark", ptr %33, i32 0, i32 3
  %39 = load i32, ptr %18, align 4, !tbaa !11
  store i32 %39, ptr %38, align 8, !tbaa !40
  %40 = getelementptr inbounds %"class.xmem::Benchmark", ptr %33, i32 0, i32 4
  %41 = load i32, ptr %19, align 4, !tbaa !11
  store i32 %41, ptr %40, align 4, !tbaa !41
  %42 = getelementptr inbounds %"class.xmem::Benchmark", ptr %33, i32 0, i32 5
  %43 = load i32, ptr %20, align 4, !tbaa !11
  store i32 %43, ptr %42, align 8, !tbaa !42
  %44 = getelementptr inbounds %"class.xmem::Benchmark", ptr %33, i32 0, i32 6
  %45 = load i32, ptr %21, align 4, !tbaa !11
  store i32 %45, ptr %44, align 4, !tbaa !43
  %46 = getelementptr inbounds %"class.xmem::Benchmark", ptr %33, i32 0, i32 7
  %47 = load i32, ptr %22, align 4, !tbaa !13
  store i32 %47, ptr %46, align 8, !tbaa !44
  %48 = getelementptr inbounds %"class.xmem::Benchmark", ptr %33, i32 0, i32 8
  %49 = load i32, ptr %23, align 4, !tbaa !15
  store i32 %49, ptr %48, align 4, !tbaa !45
  %50 = getelementptr inbounds %"class.xmem::Benchmark", ptr %33, i32 0, i32 9
  %51 = load i32, ptr %24, align 4, !tbaa !17
  store i32 %51, ptr %50, align 8, !tbaa !46
  %52 = getelementptr inbounds %"class.xmem::Benchmark", ptr %33, i32 0, i32 10
  %53 = load i32, ptr %25, align 4, !tbaa !11
  store i32 %53, ptr %52, align 4, !tbaa !47
  %54 = getelementptr inbounds %"class.xmem::Benchmark", ptr %33, i32 0, i32 11
  call void @_ZNSt6vectorIPN4xmem11PowerReaderESaIS2_EEC2ERKS4_(ptr noundef nonnull align 8 dereferenceable(24) %54, ptr noundef nonnull align 8 dereferenceable(24) %11)
  %55 = getelementptr inbounds %"class.xmem::Benchmark", ptr %33, i32 0, i32 12
  call void @llvm.memset.p0.i64(ptr align 8 %55, i8 0, i64 24, i1 false)
  call void @_ZNSt6vectorIPN4xmem6ThreadESaIS2_EEC2Ev(ptr noundef nonnull align 8 dereferenceable(24) %55) #4
  %56 = getelementptr inbounds %"class.xmem::Benchmark", ptr %33, i32 0, i32 13
  call void @llvm.memset.p0.i64(ptr align 8 %56, i8 0, i64 24, i1 false)
  call void @_ZNSt6vectorIdSaIdEEC2Ev(ptr noundef nonnull align 8 dereferenceable(24) %56) #4
  %57 = getelementptr inbounds %"class.xmem::Benchmark", ptr %33, i32 0, i32 14
  store double 0.000000e+00, ptr %57, align 8, !tbaa !48
  %58 = getelementptr inbounds %"class.xmem::Benchmark", ptr %33, i32 0, i32 15
  store double 0.000000e+00, ptr %58, align 8, !tbaa !49
  %59 = getelementptr inbounds %"class.xmem::Benchmark", ptr %33, i32 0, i32 16
  store double 0.000000e+00, ptr %59, align 8, !tbaa !50
  %60 = getelementptr inbounds %"class.xmem::Benchmark", ptr %33, i32 0, i32 17
  store double 0.000000e+00, ptr %60, align 8, !tbaa !51
  %61 = getelementptr inbounds %"class.xmem::Benchmark", ptr %33, i32 0, i32 18
  store double 0.000000e+00, ptr %61, align 8, !tbaa !52
  %62 = getelementptr inbounds %"class.xmem::Benchmark", ptr %33, i32 0, i32 19
  store double 0.000000e+00, ptr %62, align 8, !tbaa !53
  %63 = getelementptr inbounds %"class.xmem::Benchmark", ptr %33, i32 0, i32 20
  store double 0.000000e+00, ptr %63, align 8, !tbaa !54
  %64 = getelementptr inbounds %"class.xmem::Benchmark", ptr %33, i32 0, i32 21
  store double 0.000000e+00, ptr %64, align 8, !tbaa !55
  %65 = getelementptr inbounds %"class.xmem::Benchmark", ptr %33, i32 0, i32 22
  store double 0.000000e+00, ptr %65, align 8, !tbaa !56
  %66 = getelementptr inbounds %"class.xmem::Benchmark", ptr %33, i32 0, i32 23
  invoke void @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2ERKS4_(ptr noundef nonnull align 8 dereferenceable(32) %66, ptr noundef nonnull align 8 dereferenceable(32) %12)
          to label %67 unwind label %81

67:                                               ; preds = %14
  %68 = getelementptr inbounds %"class.xmem::Benchmark", ptr %33, i32 0, i32 24
  call void @llvm.memset.p0.i64(ptr align 8 %68, i8 0, i64 24, i1 false)
  call void @_ZNSt6vectorIdSaIdEEC2Ev(ptr noundef nonnull align 8 dereferenceable(24) %68) #4
  %69 = getelementptr inbounds %"class.xmem::Benchmark", ptr %33, i32 0, i32 25
  call void @llvm.memset.p0.i64(ptr align 8 %69, i8 0, i64 24, i1 false)
  call void @_ZNSt6vectorIdSaIdEEC2Ev(ptr noundef nonnull align 8 dereferenceable(24) %69) #4
  %70 = getelementptr inbounds %"class.xmem::Benchmark", ptr %33, i32 0, i32 26
  invoke void @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2ERKS4_(ptr noundef nonnull align 8 dereferenceable(32) %70, ptr noundef nonnull align 8 dereferenceable(32) %13)
          to label %71 unwind label %85

71:                                               ; preds = %67
  %72 = getelementptr inbounds %"class.xmem::Benchmark", ptr %33, i32 0, i32 27
  store i8 0, ptr %72, align 8, !tbaa !57
  %73 = getelementptr inbounds %"class.xmem::Benchmark", ptr %33, i32 0, i32 28
  store i8 0, ptr %73, align 1, !tbaa !58
  %74 = getelementptr inbounds %"class.xmem::Benchmark", ptr %33, i32 0, i32 29
  store i8 0, ptr %74, align 2, !tbaa !59
  call void @llvm.lifetime.start.p0(i64 4, ptr %31) #4
  store i32 0, ptr %31, align 4, !tbaa !11
  br label %75

75:                                               ; preds = %92, %71
  %76 = load i32, ptr %31, align 4, !tbaa !11
  %77 = getelementptr inbounds %"class.xmem::Benchmark", ptr %33, i32 0, i32 3
  %78 = load i32, ptr %77, align 8, !tbaa !40
  %79 = icmp ult i32 %76, %78
  br i1 %79, label %89, label %80

80:                                               ; preds = %75
  call void @llvm.lifetime.end.p0(i64 4, ptr %31) #4
  br label %99

81:                                               ; preds = %14
  %82 = landingpad { ptr, i32 }
          cleanup
  %83 = extractvalue { ptr, i32 } %82, 0
  store ptr %83, ptr %29, align 8
  %84 = extractvalue { ptr, i32 } %82, 1
  store i32 %84, ptr %30, align 4
  br label %101

85:                                               ; preds = %67
  %86 = landingpad { ptr, i32 }
          cleanup
  %87 = extractvalue { ptr, i32 } %86, 0
  store ptr %87, ptr %29, align 8
  %88 = extractvalue { ptr, i32 } %86, 1
  store i32 %88, ptr %30, align 4
  br label %100

89:                                               ; preds = %75
  %90 = getelementptr inbounds %"class.xmem::Benchmark", ptr %33, i32 0, i32 13
  call void @llvm.lifetime.start.p0(i64 8, ptr %32) #4
  store double -1.000000e+00, ptr %32, align 8, !tbaa !60
  invoke void @_ZNSt6vectorIdSaIdEE9push_backEOd(ptr noundef nonnull align 8 dereferenceable(24) %90, ptr noundef nonnull align 8 dereferenceable(8) %32)
          to label %91 unwind label %95

91:                                               ; preds = %89
  call void @llvm.lifetime.end.p0(i64 8, ptr %32) #4
  br label %92

92:                                               ; preds = %91
  %93 = load i32, ptr %31, align 4, !tbaa !11
  %94 = add i32 %93, 1
  store i32 %94, ptr %31, align 4, !tbaa !11
  br label %75, !llvm.loop !61

95:                                               ; preds = %89
  %96 = landingpad { ptr, i32 }
          cleanup
  %97 = extractvalue { ptr, i32 } %96, 0
  store ptr %97, ptr %29, align 8
  %98 = extractvalue { ptr, i32 } %96, 1
  store i32 %98, ptr %30, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %32) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %31) #4
  call void @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev(ptr noundef nonnull align 8 dereferenceable(32) %70) #4
  br label %100

99:                                               ; preds = %80
  ret void

100:                                              ; preds = %95, %85
  call void @_ZNSt6vectorIdSaIdEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %69) #4
  call void @_ZNSt6vectorIdSaIdEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %68) #4
  call void @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev(ptr noundef nonnull align 8 dereferenceable(32) %66) #4
  br label %101

101:                                              ; preds = %100, %81
  call void @_ZNSt6vectorIdSaIdEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %56) #4
  call void @_ZNSt6vectorIPN4xmem6ThreadESaIS2_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %55) #4
  call void @_ZNSt6vectorIPN4xmem11PowerReaderESaIS2_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %54) #4
  br label %102

102:                                              ; preds = %101
  %103 = load ptr, ptr %29, align 8
  %104 = load i32, ptr %30, align 4
  %105 = insertvalue { ptr, i32 } poison, ptr %103, 0
  %106 = insertvalue { ptr, i32 } %105, i32 %104, 1
  resume { ptr, i32 } %106
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIPN4xmem11PowerReaderESaIS2_EEC2ERKS4_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #0 align 2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIPN4xmem6ThreadESaIS2_EEC2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIdSaIdEEC2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare void @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2ERKS4_(ptr noundef nonnull align 8 dereferenceable(32), ptr noundef nonnull align 8 dereferenceable(32)) unnamed_addr #0 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #3

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIdSaIdEE9push_backEOd(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(8)) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #3

; Function Attrs: mustprogress nounwind uwtable
declare void @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev(ptr noundef nonnull align 8 dereferenceable(32)) unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIdSaIdEED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIPN4xmem6ThreadESaIS2_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIPN4xmem11PowerReaderESaIS2_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #2 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"_ZTSN4xmem14pattern_mode_tE", !7, i64 0}
!15 = !{!16, !16, i64 0}
!16 = !{!"_ZTSN4xmem9rw_mode_tE", !7, i64 0}
!17 = !{!18, !18, i64 0}
!18 = !{!"_ZTSN4xmem12chunk_size_tE", !7, i64 0}
!19 = !{!20, !20, i64 0}
!20 = !{!"vtable pointer", !8, i64 0}
!21 = !{!22, !6, i64 8}
!22 = !{!"_ZTSN4xmem9BenchmarkE", !6, i64 8, !10, i64 16, !12, i64 24, !12, i64 28, !12, i64 32, !12, i64 36, !14, i64 40, !16, i64 44, !18, i64 48, !12, i64 52, !23, i64 56, !27, i64 80, !31, i64 104, !35, i64 128, !35, i64 136, !35, i64 144, !35, i64 152, !35, i64 160, !35, i64 168, !35, i64 176, !35, i64 184, !35, i64 192, !36, i64 200, !31, i64 232, !31, i64 256, !36, i64 280, !38, i64 312, !38, i64 313, !38, i64 314}
!23 = !{!"_ZTSSt6vectorIPN4xmem11PowerReaderESaIS2_EE", !24, i64 0}
!24 = !{!"_ZTSSt12_Vector_baseIPN4xmem11PowerReaderESaIS2_EE", !25, i64 0}
!25 = !{!"_ZTSNSt12_Vector_baseIPN4xmem11PowerReaderESaIS2_EE12_Vector_implE", !26, i64 0}
!26 = !{!"_ZTSNSt12_Vector_baseIPN4xmem11PowerReaderESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!27 = !{!"_ZTSSt6vectorIPN4xmem6ThreadESaIS2_EE", !28, i64 0}
!28 = !{!"_ZTSSt12_Vector_baseIPN4xmem6ThreadESaIS2_EE", !29, i64 0}
!29 = !{!"_ZTSNSt12_Vector_baseIPN4xmem6ThreadESaIS2_EE12_Vector_implE", !30, i64 0}
!30 = !{!"_ZTSNSt12_Vector_baseIPN4xmem6ThreadESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!31 = !{!"_ZTSSt6vectorIdSaIdEE", !32, i64 0}
!32 = !{!"_ZTSSt12_Vector_baseIdSaIdEE", !33, i64 0}
!33 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE12_Vector_implE", !34, i64 0}
!34 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!35 = !{!"double", !7, i64 0}
!36 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !37, i64 0, !10, i64 8, !7, i64 16}
!37 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!38 = !{!"bool", !7, i64 0}
!39 = !{!22, !10, i64 16}
!40 = !{!22, !12, i64 24}
!41 = !{!22, !12, i64 28}
!42 = !{!22, !12, i64 32}
!43 = !{!22, !12, i64 36}
!44 = !{!22, !14, i64 40}
!45 = !{!22, !16, i64 44}
!46 = !{!22, !18, i64 48}
!47 = !{!22, !12, i64 52}
!48 = !{!22, !35, i64 128}
!49 = !{!22, !35, i64 136}
!50 = !{!22, !35, i64 144}
!51 = !{!22, !35, i64 152}
!52 = !{!22, !35, i64 160}
!53 = !{!22, !35, i64 168}
!54 = !{!22, !35, i64 176}
!55 = !{!22, !35, i64 184}
!56 = !{!22, !35, i64 192}
!57 = !{!22, !38, i64 312}
!58 = !{!22, !38, i64 313}
!59 = !{!22, !38, i64 314}
!60 = !{!35, !35, i64 0}
!61 = distinct !{!61, !62}
!62 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@_ZTVN4xmem9BenchmarkE = external dso_local unnamed_addr constant { [7 x ptr] }, align 8

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4xmem9BenchmarkC2EPvmjjjjNS_14pattern_mode_tENS_9rw_mode_tENS_12chunk_size_tEiSt6vectorIPNS_11PowerReaderESaIS7_EENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESF_(ptr noundef nonnull align 8 dereferenceable(315) %0, ptr noundef %1, i64 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7, i32 noundef %8, i32 noundef %9, i32 noundef %10, ptr noundef nonnull %11, ptr noundef %12, ptr noundef %13) unnamed_addr #0 align 2 personality ptr @__gxx_personality_v0 {
  %15 = alloca double, align 8
  store ptr getelementptr inbounds inrange(-16, 40) (i8, ptr @_ZTVN4xmem9BenchmarkE, i64 16), ptr %0, align 8, !tbaa !5
  %16 = getelementptr inbounds i8, ptr %0, i64 8
  store ptr %1, ptr %16, align 8, !tbaa !8
  %17 = getelementptr inbounds i8, ptr %0, i64 16
  store i64 %2, ptr %17, align 8, !tbaa !33
  %18 = getelementptr inbounds i8, ptr %0, i64 24
  store i32 %3, ptr %18, align 8, !tbaa !34
  %19 = getelementptr inbounds i8, ptr %0, i64 28
  store i32 %4, ptr %19, align 4, !tbaa !35
  %20 = getelementptr inbounds i8, ptr %0, i64 32
  store i32 %5, ptr %20, align 8, !tbaa !36
  %21 = getelementptr inbounds i8, ptr %0, i64 36
  store i32 %6, ptr %21, align 4, !tbaa !37
  %22 = getelementptr inbounds i8, ptr %0, i64 40
  store i32 %7, ptr %22, align 8, !tbaa !38
  %23 = getelementptr inbounds i8, ptr %0, i64 44
  store i32 %8, ptr %23, align 4, !tbaa !39
  %24 = getelementptr inbounds i8, ptr %0, i64 48
  store i32 %9, ptr %24, align 8, !tbaa !40
  %25 = getelementptr inbounds i8, ptr %0, i64 52
  store i32 %10, ptr %25, align 4, !tbaa !41
  %26 = getelementptr inbounds i8, ptr %0, i64 56
  tail call void @_ZNSt6vectorIPN4xmem11PowerReaderESaIS2_EEC2ERKS4_(ptr noundef nonnull align 8 dereferenceable(24) %26, ptr noundef nonnull align 8 dereferenceable(24) %11)
  %27 = getelementptr inbounds i8, ptr %0, i64 80
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(24) %27, i8 0, i64 24, i1 false)
  tail call void @_ZNSt6vectorIPN4xmem6ThreadESaIS2_EEC2Ev(ptr noundef nonnull align 8 dereferenceable(24) %27) #4
  %28 = getelementptr inbounds i8, ptr %0, i64 104
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(24) %28, i8 0, i64 24, i1 false)
  tail call void @_ZNSt6vectorIdSaIdEEC2Ev(ptr noundef nonnull align 8 dereferenceable(24) %28) #4
  %29 = getelementptr inbounds i8, ptr %0, i64 128
  %30 = getelementptr inbounds i8, ptr %0, i64 200
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(72) %29, i8 0, i64 72, i1 false)
  invoke void @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2ERKS4_(ptr noundef nonnull align 8 dereferenceable(32) %30, ptr noundef nonnull align 8 dereferenceable(32) %12)
          to label %31 unwind label %40

31:                                               ; preds = %14
  %32 = getelementptr inbounds i8, ptr %0, i64 232
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(24) %32, i8 0, i64 24, i1 false)
  tail call void @_ZNSt6vectorIdSaIdEEC2Ev(ptr noundef nonnull align 8 dereferenceable(24) %32) #4
  %33 = getelementptr inbounds i8, ptr %0, i64 256
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(24) %33, i8 0, i64 24, i1 false)
  tail call void @_ZNSt6vectorIdSaIdEEC2Ev(ptr noundef nonnull align 8 dereferenceable(24) %33) #4
  %34 = getelementptr inbounds i8, ptr %0, i64 280
  invoke void @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2ERKS4_(ptr noundef nonnull align 8 dereferenceable(32) %34, ptr noundef nonnull align 8 dereferenceable(32) %13)
          to label %35 unwind label %42

35:                                               ; preds = %31
  %36 = getelementptr inbounds i8, ptr %0, i64 312
  store i8 0, ptr %36, align 8, !tbaa !42
  %37 = getelementptr inbounds i8, ptr %0, i64 313
  store i8 0, ptr %37, align 1, !tbaa !43
  %38 = getelementptr inbounds i8, ptr %0, i64 314
  store i8 0, ptr %38, align 2, !tbaa !44
  %39 = load i32, ptr %18, align 8, !tbaa !34
  %.not = icmp eq i32 %39, 0
  br i1 %.not, label %._crit_edge, label %.lr.ph

._crit_edge:                                      ; preds = %44, %35
  ret void

40:                                               ; preds = %14
  %41 = landingpad { ptr, i32 }
          cleanup
  br label %51

42:                                               ; preds = %31
  %43 = landingpad { ptr, i32 }
          cleanup
  br label %50

.lr.ph:                                           ; preds = %35, %44
  %.019 = phi i32 [ %45, %44 ], [ 0, %35 ]
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %15) #4
  store double -1.000000e+00, ptr %15, align 8, !tbaa !45
  invoke void @_ZNSt6vectorIdSaIdEE9push_backEOd(ptr noundef nonnull align 8 dereferenceable(24) %28, ptr noundef nonnull align 8 dereferenceable(8) %15)
          to label %44 unwind label %48

44:                                               ; preds = %.lr.ph
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %15) #4
  %45 = add nuw i32 %.019, 1
  %46 = load i32, ptr %18, align 8, !tbaa !34
  %47 = icmp ult i32 %45, %46
  br i1 %47, label %.lr.ph, label %._crit_edge, !llvm.loop !46

48:                                               ; preds = %.lr.ph
  %49 = landingpad { ptr, i32 }
          cleanup
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %15) #4
  call void @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev(ptr noundef nonnull align 8 dereferenceable(32) %34) #4
  br label %50

50:                                               ; preds = %48, %42
  %.pn = phi { ptr, i32 } [ %49, %48 ], [ %43, %42 ]
  call void @_ZNSt6vectorIdSaIdEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %33) #4
  call void @_ZNSt6vectorIdSaIdEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %32) #4
  call void @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev(ptr noundef nonnull align 8 dereferenceable(32) %30) #4
  br label %51

51:                                               ; preds = %50, %40
  %.pn.pn = phi { ptr, i32 } [ %.pn, %50 ], [ %41, %40 ]
  call void @_ZNSt6vectorIdSaIdEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %28) #4
  call void @_ZNSt6vectorIPN4xmem6ThreadESaIS2_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %27) #4
  call void @_ZNSt6vectorIPN4xmem11PowerReaderESaIS2_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %26) #4
  resume { ptr, i32 } %.pn.pn
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIPN4xmem11PowerReaderESaIS2_EEC2ERKS4_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #0 align 2

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIPN4xmem6ThreadESaIS2_EEC2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIdSaIdEEC2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare void @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2ERKS4_(ptr noundef nonnull align 8 dereferenceable(32), ptr noundef nonnull align 8 dereferenceable(32)) unnamed_addr #0 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #3

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIdSaIdEE9push_backEOd(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #3

; Function Attrs: mustprogress nounwind uwtable
declare void @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev(ptr noundef nonnull align 8 dereferenceable(32)) unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIdSaIdEED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIPN4xmem6ThreadESaIS2_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIPN4xmem11PowerReaderESaIS2_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #2 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"vtable pointer", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}
!8 = !{!9, !10, i64 8}
!9 = !{!"_ZTSN4xmem9BenchmarkE", !10, i64 8, !12, i64 16, !13, i64 24, !13, i64 28, !13, i64 32, !13, i64 36, !14, i64 40, !15, i64 44, !16, i64 48, !13, i64 52, !17, i64 56, !21, i64 80, !25, i64 104, !29, i64 128, !29, i64 136, !29, i64 144, !29, i64 152, !29, i64 160, !29, i64 168, !29, i64 176, !29, i64 184, !29, i64 192, !30, i64 200, !25, i64 232, !25, i64 256, !30, i64 280, !32, i64 312, !32, i64 313, !32, i64 314}
!10 = !{!"any pointer", !11, i64 0}
!11 = !{!"omnipotent char", !7, i64 0}
!12 = !{!"long", !11, i64 0}
!13 = !{!"int", !11, i64 0}
!14 = !{!"_ZTSN4xmem14pattern_mode_tE", !11, i64 0}
!15 = !{!"_ZTSN4xmem9rw_mode_tE", !11, i64 0}
!16 = !{!"_ZTSN4xmem12chunk_size_tE", !11, i64 0}
!17 = !{!"_ZTSSt6vectorIPN4xmem11PowerReaderESaIS2_EE", !18, i64 0}
!18 = !{!"_ZTSSt12_Vector_baseIPN4xmem11PowerReaderESaIS2_EE", !19, i64 0}
!19 = !{!"_ZTSNSt12_Vector_baseIPN4xmem11PowerReaderESaIS2_EE12_Vector_implE", !20, i64 0}
!20 = !{!"_ZTSNSt12_Vector_baseIPN4xmem11PowerReaderESaIS2_EE17_Vector_impl_dataE", !10, i64 0, !10, i64 8, !10, i64 16}
!21 = !{!"_ZTSSt6vectorIPN4xmem6ThreadESaIS2_EE", !22, i64 0}
!22 = !{!"_ZTSSt12_Vector_baseIPN4xmem6ThreadESaIS2_EE", !23, i64 0}
!23 = !{!"_ZTSNSt12_Vector_baseIPN4xmem6ThreadESaIS2_EE12_Vector_implE", !24, i64 0}
!24 = !{!"_ZTSNSt12_Vector_baseIPN4xmem6ThreadESaIS2_EE17_Vector_impl_dataE", !10, i64 0, !10, i64 8, !10, i64 16}
!25 = !{!"_ZTSSt6vectorIdSaIdEE", !26, i64 0}
!26 = !{!"_ZTSSt12_Vector_baseIdSaIdEE", !27, i64 0}
!27 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE12_Vector_implE", !28, i64 0}
!28 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE17_Vector_impl_dataE", !10, i64 0, !10, i64 8, !10, i64 16}
!29 = !{!"double", !11, i64 0}
!30 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !31, i64 0, !12, i64 8, !11, i64 16}
!31 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !10, i64 0}
!32 = !{!"bool", !11, i64 0}
!33 = !{!9, !12, i64 16}
!34 = !{!9, !13, i64 24}
!35 = !{!9, !13, i64 28}
!36 = !{!9, !13, i64 32}
!37 = !{!9, !13, i64 36}
!38 = !{!9, !14, i64 40}
!39 = !{!9, !15, i64 44}
!40 = !{!9, !16, i64 48}
!41 = !{!9, !13, i64 52}
!42 = !{!9, !32, i64 312}
!43 = !{!9, !32, i64 313}
!44 = !{!9, !32, i64 314}
!45 = !{!29, !29, i64 0}
!46 = distinct !{!46, !47}
!47 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,MemCpyOptPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass