; LLVM IR from Samson-Mano/EM_Propogation_simulation :: EM_Propogation_simulation/src/ImGui (imgui_widgets)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.4 = external hidden unnamed_addr constant [125 x i8], align 1
@.str.29 = external hidden unnamed_addr constant [2 x i8], align 1
@.str.33 = external hidden unnamed_addr constant [23 x i8], align 1
@__PRETTY_FUNCTION__._ZN5ImGui15DataTypeApplyOpEiiPvPKvS2_ = external hidden unnamed_addr constant [84 x i8], align 1

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN5ImGui15DataTypeApplyOpEiiPvPKvS2_(i32 noundef %0, i32 noundef %1, ptr noundef %2, ptr noundef %3, ptr noundef %4) #1 {
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca ptr, align 8
  %9 = alloca ptr, align 8
  %10 = alloca ptr, align 8
  store i32 %0, ptr %6, align 4, !tbaa !5
  store i32 %1, ptr %7, align 4, !tbaa !5
  store ptr %2, ptr %8, align 8, !tbaa !9
  store ptr %3, ptr %9, align 8, !tbaa !9
  store ptr %4, ptr %10, align 8, !tbaa !9
  %11 = load i32, ptr %7, align 4, !tbaa !5
  %12 = icmp eq i32 %11, 43
  br i1 %12, label %16, label %13

13:                                               ; preds = %5
  %14 = load i32, ptr %7, align 4, !tbaa !5
  %15 = icmp eq i32 %14, 45
  br label %16

16:                                               ; preds = %13, %5
  %17 = phi i1 [ true, %5 ], [ %15, %13 ]
  br i1 %17, label %18, label %19

18:                                               ; preds = %16
  br label %21

19:                                               ; preds = %16
  call void @__assert_fail(ptr noundef @.str.33, ptr noundef @.str.4, i32 noundef 2030, ptr noundef @__PRETTY_FUNCTION__._ZN5ImGui15DataTypeApplyOpEiiPvPKvS2_) #3
  unreachable

20:                                               ; No predecessors!
  br label %21

21:                                               ; preds = %20, %18
  %22 = load i32, ptr %6, align 4, !tbaa !5
  switch i32 %22, label %233 [
    i32 0, label %23
    i32 1, label %44
    i32 2, label %65
    i32 3, label %86
    i32 4, label %107
    i32 5, label %128
    i32 6, label %149
    i32 7, label %170
    i32 8, label %191
    i32 9, label %212
    i32 10, label %233
  ]

23:                                               ; preds = %21
  %24 = load i32, ptr %7, align 4, !tbaa !5
  %25 = icmp eq i32 %24, 43
  br i1 %25, label %26, label %33

26:                                               ; preds = %23
  %27 = load ptr, ptr %9, align 8, !tbaa !9
  %28 = load i8, ptr %27, align 1, !tbaa !11
  %29 = load ptr, ptr %10, align 8, !tbaa !9
  %30 = load i8, ptr %29, align 1, !tbaa !11
  %31 = call noundef signext i8 @_ZL18ImAddClampOverflowIaET_S0_S0_S0_S0_(i8 noundef signext %28, i8 noundef signext %30, i8 noundef signext -128, i8 noundef signext 127)
  %32 = load ptr, ptr %8, align 8, !tbaa !9
  store i8 %31, ptr %32, align 1, !tbaa !11
  br label %33

33:                                               ; preds = %26, %23
  %34 = load i32, ptr %7, align 4, !tbaa !5
  %35 = icmp eq i32 %34, 45
  br i1 %35, label %36, label %43

36:                                               ; preds = %33
  %37 = load ptr, ptr %9, align 8, !tbaa !9
  %38 = load i8, ptr %37, align 1, !tbaa !11
  %39 = load ptr, ptr %10, align 8, !tbaa !9
  %40 = load i8, ptr %39, align 1, !tbaa !11
  %41 = call noundef signext i8 @_ZL18ImSubClampOverflowIaET_S0_S0_S0_S0_(i8 noundef signext %38, i8 noundef signext %40, i8 noundef signext -128, i8 noundef signext 127)
  %42 = load ptr, ptr %8, align 8, !tbaa !9
  store i8 %41, ptr %42, align 1, !tbaa !11
  br label %43

43:                                               ; preds = %36, %33
  br label %234

44:                                               ; preds = %21
  %45 = load i32, ptr %7, align 4, !tbaa !5
  %46 = icmp eq i32 %45, 43
  br i1 %46, label %47, label %54

47:                                               ; preds = %44
  %48 = load ptr, ptr %9, align 8, !tbaa !9
  %49 = load i8, ptr %48, align 1, !tbaa !11
  %50 = load ptr, ptr %10, align 8, !tbaa !9
  %51 = load i8, ptr %50, align 1, !tbaa !11
  %52 = call noundef zeroext i8 @_ZL18ImAddClampOverflowIhET_S0_S0_S0_S0_(i8 noundef zeroext %49, i8 noundef zeroext %51, i8 noundef zeroext 0, i8 noundef zeroext -1)
  %53 = load ptr, ptr %8, align 8, !tbaa !9
  store i8 %52, ptr %53, align 1, !tbaa !11
  br label %54

54:                                               ; preds = %47, %44
  %55 = load i32, ptr %7, align 4, !tbaa !5
  %56 = icmp eq i32 %55, 45
  br i1 %56, label %57, label %64

57:                                               ; preds = %54
  %58 = load ptr, ptr %9, align 8, !tbaa !9
  %59 = load i8, ptr %58, align 1, !tbaa !11
  %60 = load ptr, ptr %10, align 8, !tbaa !9
  %61 = load i8, ptr %60, align 1, !tbaa !11
  %62 = call noundef zeroext i8 @_ZL18ImSubClampOverflowIhET_S0_S0_S0_S0_(i8 noundef zeroext %59, i8 noundef zeroext %61, i8 noundef zeroext 0, i8 noundef zeroext -1)
  %63 = load ptr, ptr %8, align 8, !tbaa !9
  store i8 %62, ptr %63, align 1, !tbaa !11
  br label %64

64:                                               ; preds = %57, %54
  br label %234

65:                                               ; preds = %21
  %66 = load i32, ptr %7, align 4, !tbaa !5
  %67 = icmp eq i32 %66, 43
  br i1 %67, label %68, label %75

68:                                               ; preds = %65
  %69 = load ptr, ptr %9, align 8, !tbaa !9
  %70 = load i16, ptr %69, align 2, !tbaa !12
  %71 = load ptr, ptr %10, align 8, !tbaa !9
  %72 = load i16, ptr %71, align 2, !tbaa !12
  %73 = call noundef signext i16 @_ZL18ImAddClampOverflowIsET_S0_S0_S0_S0_(i16 noundef signext %70, i16 noundef signext %72, i16 noundef signext -32768, i16 noundef signext 32767)
  %74 = load ptr, ptr %8, align 8, !tbaa !9
  store i16 %73, ptr %74, align 2, !tbaa !12
  br label %75

75:                                               ; preds = %68, %65
  %76 = load i32, ptr %7, align 4, !tbaa !5
  %77 = icmp eq i32 %76, 45
  br i1 %77, label %78, label %85

78:                                               ; preds = %75
  %79 = load ptr, ptr %9, align 8, !tbaa !9
  %80 = load i16, ptr %79, align 2, !tbaa !12
  %81 = load ptr, ptr %10, align 8, !tbaa !9
  %82 = load i16, ptr %81, align 2, !tbaa !12
  %83 = call noundef signext i16 @_ZL18ImSubClampOverflowIsET_S0_S0_S0_S0_(i16 noundef signext %80, i16 noundef signext %82, i16 noundef signext -32768, i16 noundef signext 32767)
  %84 = load ptr, ptr %8, align 8, !tbaa !9
  store i16 %83, ptr %84, align 2, !tbaa !12
  br label %85

85:                                               ; preds = %78, %75
  br label %234

86:                                               ; preds = %21
  %87 = load i32, ptr %7, align 4, !tbaa !5
  %88 = icmp eq i32 %87, 43
  br i1 %88, label %89, label %96

89:                                               ; preds = %86
  %90 = load ptr, ptr %9, align 8, !tbaa !9
  %91 = load i16, ptr %90, align 2, !tbaa !12
  %92 = load ptr, ptr %10, align 8, !tbaa !9
  %93 = load i16, ptr %92, align 2, !tbaa !12
  %94 = call noundef zeroext i16 @_ZL18ImAddClampOverflowItET_S0_S0_S0_S0_(i16 noundef zeroext %91, i16 noundef zeroext %93, i16 noundef zeroext 0, i16 noundef zeroext -1)
  %95 = load ptr, ptr %8, align 8, !tbaa !9
  store i16 %94, ptr %95, align 2, !tbaa !12
  br label %96

96:                                               ; preds = %89, %86
  %97 = load i32, ptr %7, align 4, !tbaa !5
  %98 = icmp eq i32 %97, 45
  br i1 %98, label %99, label %106

99:                                               ; preds = %96
  %100 = load ptr, ptr %9, align 8, !tbaa !9
  %101 = load i16, ptr %100, align 2, !tbaa !12
  %102 = load ptr, ptr %10, align 8, !tbaa !9
  %103 = load i16, ptr %102, align 2, !tbaa !12
  %104 = call noundef zeroext i16 @_ZL18ImSubClampOverflowItET_S0_S0_S0_S0_(i16 noundef zeroext %101, i16 noundef zeroext %103, i16 noundef zeroext 0, i16 noundef zeroext -1)
  %105 = load ptr, ptr %8, align 8, !tbaa !9
  store i16 %104, ptr %105, align 2, !tbaa !12
  br label %106

106:                                              ; preds = %99, %96
  br label %234

107:                                              ; preds = %21
  %108 = load i32, ptr %7, align 4, !tbaa !5
  %109 = icmp eq i32 %108, 43
  br i1 %109, label %110, label %117

110:                                              ; preds = %107
  %111 = load ptr, ptr %9, align 8, !tbaa !9
  %112 = load i32, ptr %111, align 4, !tbaa !5
  %113 = load ptr, ptr %10, align 8, !tbaa !9
  %114 = load i32, ptr %113, align 4, !tbaa !5
  %115 = call noundef i32 @_ZL18ImAddClampOverflowIiET_S0_S0_S0_S0_(i32 noundef %112, i32 noundef %114, i32 noundef -2147483648, i32 noundef 2147483647)
  %116 = load ptr, ptr %8, align 8, !tbaa !9
  store i32 %115, ptr %116, align 4, !tbaa !5
  br label %117

117:                                              ; preds = %110, %107
  %118 = load i32, ptr %7, align 4, !tbaa !5
  %119 = icmp eq i32 %118, 45
  br i1 %119, label %120, label %127

120:                                              ; preds = %117
  %121 = load ptr, ptr %9, align 8, !tbaa !9
  %122 = load i32, ptr %121, align 4, !tbaa !5
  %123 = load ptr, ptr %10, align 8, !tbaa !9
  %124 = load i32, ptr %123, align 4, !tbaa !5
  %125 = call noundef i32 @_ZL18ImSubClampOverflowIiET_S0_S0_S0_S0_(i32 noundef %122, i32 noundef %124, i32 noundef -2147483648, i32 noundef 2147483647)
  %126 = load ptr, ptr %8, align 8, !tbaa !9
  store i32 %125, ptr %126, align 4, !tbaa !5
  br label %127

127:                                              ; preds = %120, %117
  br label %234

128:                                              ; preds = %21
  %129 = load i32, ptr %7, align 4, !tbaa !5
  %130 = icmp eq i32 %129, 43
  br i1 %130, label %131, label %138

131:                                              ; preds = %128
  %132 = load ptr, ptr %9, align 8, !tbaa !9
  %133 = load i32, ptr %132, align 4, !tbaa !5
  %134 = load ptr, ptr %10, align 8, !tbaa !9
  %135 = load i32, ptr %134, align 4, !tbaa !5
  %136 = call noundef i32 @_ZL18ImAddClampOverflowIjET_S0_S0_S0_S0_(i32 noundef %133, i32 noundef %135, i32 noundef 0, i32 noundef -1)
  %137 = load ptr, ptr %8, align 8, !tbaa !9
  store i32 %136, ptr %137, align 4, !tbaa !5
  br label %138

138:                                              ; preds = %131, %128
  %139 = load i32, ptr %7, align 4, !tbaa !5
  %140 = icmp eq i32 %139, 45
  br i1 %140, label %141, label %148

141:                                              ; preds = %138
  %142 = load ptr, ptr %9, align 8, !tbaa !9
  %143 = load i32, ptr %142, align 4, !tbaa !5
  %144 = load ptr, ptr %10, align 8, !tbaa !9
  %145 = load i32, ptr %144, align 4, !tbaa !5
  %146 = call noundef i32 @_ZL18ImSubClampOverflowIjET_S0_S0_S0_S0_(i32 noundef %143, i32 noundef %145, i32 noundef 0, i32 noundef -1)
  %147 = load ptr, ptr %8, align 8, !tbaa !9
  store i32 %146, ptr %147, align 4, !tbaa !5
  br label %148

148:                                              ; preds = %141, %138
  br label %234

149:                                              ; preds = %21
  %150 = load i32, ptr %7, align 4, !tbaa !5
  %151 = icmp eq i32 %150, 43
  br i1 %151, label %152, label %159

152:                                              ; preds = %149
  %153 = load ptr, ptr %9, align 8, !tbaa !9
  %154 = load i64, ptr %153, align 8, !tbaa !14
  %155 = load ptr, ptr %10, align 8, !tbaa !9
  %156 = load i64, ptr %155, align 8, !tbaa !14
  %157 = call noundef i64 @_ZL18ImAddClampOverflowIxET_S0_S0_S0_S0_(i64 noundef %154, i64 noundef %156, i64 noundef -9223372036854775808, i64 noundef 9223372036854775807)
  %158 = load ptr, ptr %8, align 8, !tbaa !9
  store i64 %157, ptr %158, align 8, !tbaa !14
  br label %159

159:                                              ; preds = %152, %149
  %160 = load i32, ptr %7, align 4, !tbaa !5
  %161 = icmp eq i32 %160, 45
  br i1 %161, label %162, label %169

162:                                              ; preds = %159
  %163 = load ptr, ptr %9, align 8, !tbaa !9
  %164 = load i64, ptr %163, align 8, !tbaa !14
  %165 = load ptr, ptr %10, align 8, !tbaa !9
  %166 = load i64, ptr %165, align 8, !tbaa !14
  %167 = call noundef i64 @_ZL18ImSubClampOverflowIxET_S0_S0_S0_S0_(i64 noundef %164, i64 noundef %166, i64 noundef -9223372036854775808, i64 noundef 9223372036854775807)
  %168 = load ptr, ptr %8, align 8, !tbaa !9
  store i64 %167, ptr %168, align 8, !tbaa !14
  br label %169

169:                                              ; preds = %162, %159
  br label %234

170:                                              ; preds = %21
  %171 = load i32, ptr %7, align 4, !tbaa !5
  %172 = icmp eq i32 %171, 43
  br i1 %172, label %173, label %180

173:                                              ; preds = %170
  %174 = load ptr, ptr %9, align 8, !tbaa !9
  %175 = load i64, ptr %174, align 8, !tbaa !14
  %176 = load ptr, ptr %10, align 8, !tbaa !9
  %177 = load i64, ptr %176, align 8, !tbaa !14
  %178 = call noundef i64 @_ZL18ImAddClampOverflowIyET_S0_S0_S0_S0_(i64 noundef %175, i64 noundef %177, i64 noundef 0, i64 noundef -1)
  %179 = load ptr, ptr %8, align 8, !tbaa !9
  store i64 %178, ptr %179, align 8, !tbaa !14
  br label %180

180:                                              ; preds = %173, %170
  %181 = load i32, ptr %7, align 4, !tbaa !5
  %182 = icmp eq i32 %181, 45
  br i1 %182, label %183, label %190

183:                                              ; preds = %180
  %184 = load ptr, ptr %9, align 8, !tbaa !9
  %185 = load i64, ptr %184, align 8, !tbaa !14
  %186 = load ptr, ptr %10, align 8, !tbaa !9
  %187 = load i64, ptr %186, align 8, !tbaa !14
  %188 = call noundef i64 @_ZL18ImSubClampOverflowIyET_S0_S0_S0_S0_(i64 noundef %185, i64 noundef %187, i64 noundef 0, i64 noundef -1)
  %189 = load ptr, ptr %8, align 8, !tbaa !9
  store i64 %188, ptr %189, align 8, !tbaa !14
  br label %190

190:                                              ; preds = %183, %180
  br label %234

191:                                              ; preds = %21
  %192 = load i32, ptr %7, align 4, !tbaa !5
  %193 = icmp eq i32 %192, 43
  br i1 %193, label %194, label %201

194:                                              ; preds = %191
  %195 = load ptr, ptr %9, align 8, !tbaa !9
  %196 = load float, ptr %195, align 4, !tbaa !16
  %197 = load ptr, ptr %10, align 8, !tbaa !9
  %198 = load float, ptr %197, align 4, !tbaa !16
  %199 = fadd float %196, %198
  %200 = load ptr, ptr %8, align 8, !tbaa !9
  store float %199, ptr %200, align 4, !tbaa !16
  br label %201

201:                                              ; preds = %194, %191
  %202 = load i32, ptr %7, align 4, !tbaa !5
  %203 = icmp eq i32 %202, 45
  br i1 %203, label %204, label %211

204:                                              ; preds = %201
  %205 = load ptr, ptr %9, align 8, !tbaa !9
  %206 = load float, ptr %205, align 4, !tbaa !16
  %207 = load ptr, ptr %10, align 8, !tbaa !9
  %208 = load float, ptr %207, align 4, !tbaa !16
  %209 = fsub float %206, %208
  %210 = load ptr, ptr %8, align 8, !tbaa !9
  store float %209, ptr %210, align 4, !tbaa !16
  br label %211

211:                                              ; preds = %204, %201
  br label %234

212:                                              ; preds = %21
  %213 = load i32, ptr %7, align 4, !tbaa !5
  %214 = icmp eq i32 %213, 43
  br i1 %214, label %215, label %222

215:                                              ; preds = %212
  %216 = load ptr, ptr %9, align 8, !tbaa !9
  %217 = load double, ptr %216, align 8, !tbaa !18
  %218 = load ptr, ptr %10, align 8, !tbaa !9
  %219 = load double, ptr %218, align 8, !tbaa !18
  %220 = fadd double %217, %219
  %221 = load ptr, ptr %8, align 8, !tbaa !9
  store double %220, ptr %221, align 8, !tbaa !18
  br label %222

222:                                              ; preds = %215, %212
  %223 = load i32, ptr %7, align 4, !tbaa !5
  %224 = icmp eq i32 %223, 45
  br i1 %224, label %225, label %232

225:                                              ; preds = %222
  %226 = load ptr, ptr %9, align 8, !tbaa !9
  %227 = load double, ptr %226, align 8, !tbaa !18
  %228 = load ptr, ptr %10, align 8, !tbaa !9
  %229 = load double, ptr %228, align 8, !tbaa !18
  %230 = fsub double %227, %229
  %231 = load ptr, ptr %8, align 8, !tbaa !9
  store double %230, ptr %231, align 8, !tbaa !18
  br label %232

232:                                              ; preds = %225, %222
  br label %234

233:                                              ; preds = %21, %21
  call void @__assert_fail(ptr noundef @.str.29, ptr noundef @.str.4, i32 noundef 2075, ptr noundef @__PRETTY_FUNCTION__._ZN5ImGui15DataTypeApplyOpEiiPvPKvS2_) #3
  unreachable

234:                                              ; preds = %232, %211, %190, %169, %148, %127, %106, %85, %64, %43
  ret void
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef signext i8 @_ZL18ImAddClampOverflowIaET_S0_S0_S0_S0_(i8 noundef signext, i8 noundef signext, i8 noundef signext, i8 noundef signext) #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef signext i8 @_ZL18ImSubClampOverflowIaET_S0_S0_S0_S0_(i8 noundef signext, i8 noundef signext, i8 noundef signext, i8 noundef signext) #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef zeroext i8 @_ZL18ImAddClampOverflowIhET_S0_S0_S0_S0_(i8 noundef zeroext, i8 noundef zeroext, i8 noundef zeroext, i8 noundef zeroext) #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef zeroext i8 @_ZL18ImSubClampOverflowIhET_S0_S0_S0_S0_(i8 noundef zeroext, i8 noundef zeroext, i8 noundef zeroext, i8 noundef zeroext) #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef signext i16 @_ZL18ImAddClampOverflowIsET_S0_S0_S0_S0_(i16 noundef signext, i16 noundef signext, i16 noundef signext, i16 noundef signext) #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef signext i16 @_ZL18ImSubClampOverflowIsET_S0_S0_S0_S0_(i16 noundef signext, i16 noundef signext, i16 noundef signext, i16 noundef signext) #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef zeroext i16 @_ZL18ImAddClampOverflowItET_S0_S0_S0_S0_(i16 noundef zeroext, i16 noundef zeroext, i16 noundef zeroext, i16 noundef zeroext) #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef zeroext i16 @_ZL18ImSubClampOverflowItET_S0_S0_S0_S0_(i16 noundef zeroext, i16 noundef zeroext, i16 noundef zeroext, i16 noundef zeroext) #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef i32 @_ZL18ImAddClampOverflowIiET_S0_S0_S0_S0_(i32 noundef, i32 noundef, i32 noundef, i32 noundef) #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef i32 @_ZL18ImSubClampOverflowIiET_S0_S0_S0_S0_(i32 noundef, i32 noundef, i32 noundef, i32 noundef) #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef i32 @_ZL18ImAddClampOverflowIjET_S0_S0_S0_S0_(i32 noundef, i32 noundef, i32 noundef, i32 noundef) #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef i32 @_ZL18ImSubClampOverflowIjET_S0_S0_S0_S0_(i32 noundef, i32 noundef, i32 noundef, i32 noundef) #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef i64 @_ZL18ImAddClampOverflowIxET_S0_S0_S0_S0_(i64 noundef, i64 noundef, i64 noundef, i64 noundef) #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef i64 @_ZL18ImSubClampOverflowIxET_S0_S0_S0_S0_(i64 noundef, i64 noundef, i64 noundef, i64 noundef) #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef i64 @_ZL18ImAddClampOverflowIyET_S0_S0_S0_S0_(i64 noundef, i64 noundef, i64 noundef, i64 noundef) #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef i64 @_ZL18ImSubClampOverflowIyET_S0_S0_S0_S0_(i64 noundef, i64 noundef, i64 noundef, i64 noundef) #2

attributes #0 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"short", !7, i64 0}
!14 = !{!15, !15, i64 0}
!15 = !{!"long long", !7, i64 0}
!16 = !{!17, !17, i64 0}
!17 = !{!"float", !7, i64 0}
!18 = !{!19, !19, i64 0}
!19 = !{!"double", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.4 = external hidden unnamed_addr constant [125 x i8], align 1
@.str.29 = external hidden unnamed_addr constant [2 x i8], align 1
@.str.33 = external hidden unnamed_addr constant [23 x i8], align 1
@__PRETTY_FUNCTION__._ZN5ImGui15DataTypeApplyOpEiiPvPKvS2_ = external hidden unnamed_addr constant [84 x i8], align 1

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN5ImGui15DataTypeApplyOpEiiPvPKvS2_(i32 noundef %0, i32 noundef %1, ptr nocapture noundef writeonly %2, ptr nocapture noundef readonly %3, ptr nocapture noundef readonly %4) local_unnamed_addr #1 {
  %6 = icmp eq i32 %1, 43
  %7 = icmp eq i32 %1, 45
  switch i32 %1, label %8 [
    i32 45, label %9
    i32 43, label %9
  ]

8:                                                ; preds = %5
  tail call void @__assert_fail(ptr noundef nonnull @.str.33, ptr noundef nonnull @.str.4, i32 noundef 2030, ptr noundef nonnull @__PRETTY_FUNCTION__._ZN5ImGui15DataTypeApplyOpEiiPvPKvS2_) #3
  unreachable

9:                                                ; preds = %5, %5
  switch i32 %0, label %100 [
    i32 0, label %10
    i32 1, label %19
    i32 2, label %28
    i32 3, label %37
    i32 4, label %46
    i32 5, label %55
    i32 6, label %64
    i32 7, label %73
    i32 8, label %82
    i32 9, label %91
  ]

10:                                               ; preds = %9
  br i1 %6, label %.thread, label %14

.thread:                                          ; preds = %10
  %11 = load i8, ptr %3, align 1, !tbaa !5
  %12 = load i8, ptr %4, align 1, !tbaa !5
  %13 = tail call noundef signext i8 @_ZL18ImAddClampOverflowIaET_S0_S0_S0_S0_(i8 noundef signext %11, i8 noundef signext %12, i8 noundef signext -128, i8 noundef signext 127)
  store i8 %13, ptr %2, align 1, !tbaa !5
  br label %101

14:                                               ; preds = %10
  br i1 %7, label %15, label %101

15:                                               ; preds = %14
  %16 = load i8, ptr %3, align 1, !tbaa !5
  %17 = load i8, ptr %4, align 1, !tbaa !5
  %18 = tail call noundef signext i8 @_ZL18ImSubClampOverflowIaET_S0_S0_S0_S0_(i8 noundef signext %16, i8 noundef signext %17, i8 noundef signext -128, i8 noundef signext 127)
  store i8 %18, ptr %2, align 1, !tbaa !5
  br label %101

19:                                               ; preds = %9
  br i1 %6, label %.thread82, label %23

.thread82:                                        ; preds = %19
  %20 = load i8, ptr %3, align 1, !tbaa !5
  %21 = load i8, ptr %4, align 1, !tbaa !5
  %22 = tail call noundef zeroext i8 @_ZL18ImAddClampOverflowIhET_S0_S0_S0_S0_(i8 noundef zeroext %20, i8 noundef zeroext %21, i8 noundef zeroext 0, i8 noundef zeroext -1)
  store i8 %22, ptr %2, align 1, !tbaa !5
  br label %101

23:                                               ; preds = %19
  br i1 %7, label %24, label %101

24:                                               ; preds = %23
  %25 = load i8, ptr %3, align 1, !tbaa !5
  %26 = load i8, ptr %4, align 1, !tbaa !5
  %27 = tail call noundef zeroext i8 @_ZL18ImSubClampOverflowIhET_S0_S0_S0_S0_(i8 noundef zeroext %25, i8 noundef zeroext %26, i8 noundef zeroext 0, i8 noundef zeroext -1)
  store i8 %27, ptr %2, align 1, !tbaa !5
  br label %101

28:                                               ; preds = %9
  br i1 %6, label %.thread83, label %32

.thread83:                                        ; preds = %28
  %29 = load i16, ptr %3, align 2, !tbaa !8
  %30 = load i16, ptr %4, align 2, !tbaa !8
  %31 = tail call noundef signext i16 @_ZL18ImAddClampOverflowIsET_S0_S0_S0_S0_(i16 noundef signext %29, i16 noundef signext %30, i16 noundef signext -32768, i16 noundef signext 32767)
  store i16 %31, ptr %2, align 2, !tbaa !8
  br label %101

32:                                               ; preds = %28
  br i1 %7, label %33, label %101

33:                                               ; preds = %32
  %34 = load i16, ptr %3, align 2, !tbaa !8
  %35 = load i16, ptr %4, align 2, !tbaa !8
  %36 = tail call noundef signext i16 @_ZL18ImSubClampOverflowIsET_S0_S0_S0_S0_(i16 noundef signext %34, i16 noundef signext %35, i16 noundef signext -32768, i16 noundef signext 32767)
  store i16 %36, ptr %2, align 2, !tbaa !8
  br label %101

37:                                               ; preds = %9
  br i1 %6, label %.thread84, label %41

.thread84:                                        ; preds = %37
  %38 = load i16, ptr %3, align 2, !tbaa !8
  %39 = load i16, ptr %4, align 2, !tbaa !8
  %40 = tail call noundef zeroext i16 @_ZL18ImAddClampOverflowItET_S0_S0_S0_S0_(i16 noundef zeroext %38, i16 noundef zeroext %39, i16 noundef zeroext 0, i16 noundef zeroext -1)
  store i16 %40, ptr %2, align 2, !tbaa !8
  br label %101

41:                                               ; preds = %37
  br i1 %7, label %42, label %101

42:                                               ; preds = %41
  %43 = load i16, ptr %3, align 2, !tbaa !8
  %44 = load i16, ptr %4, align 2, !tbaa !8
  %45 = tail call noundef zeroext i16 @_ZL18ImSubClampOverflowItET_S0_S0_S0_S0_(i16 noundef zeroext %43, i16 noundef zeroext %44, i16 noundef zeroext 0, i16 noundef zeroext -1)
  store i16 %45, ptr %2, align 2, !tbaa !8
  br label %101

46:                                               ; preds = %9
  br i1 %6, label %.thread85, label %50

.thread85:                                        ; preds = %46
  %47 = load i32, ptr %3, align 4, !tbaa !10
  %48 = load i32, ptr %4, align 4, !tbaa !10
  %49 = tail call noundef i32 @_ZL18ImAddClampOverflowIiET_S0_S0_S0_S0_(i32 noundef %47, i32 noundef %48, i32 noundef -2147483648, i32 noundef 2147483647)
  store i32 %49, ptr %2, align 4, !tbaa !10
  br label %101

50:                                               ; preds = %46
  br i1 %7, label %51, label %101

51:                                               ; preds = %50
  %52 = load i32, ptr %3, align 4, !tbaa !10
  %53 = load i32, ptr %4, align 4, !tbaa !10
  %54 = tail call noundef i32 @_ZL18ImSubClampOverflowIiET_S0_S0_S0_S0_(i32 noundef %52, i32 noundef %53, i32 noundef -2147483648, i32 noundef 2147483647)
  store i32 %54, ptr %2, align 4, !tbaa !10
  br label %101

55:                                               ; preds = %9
  br i1 %6, label %.thread86, label %59

.thread86:                                        ; preds = %55
  %56 = load i32, ptr %3, align 4, !tbaa !10
  %57 = load i32, ptr %4, align 4, !tbaa !10
  %58 = tail call noundef i32 @_ZL18ImAddClampOverflowIjET_S0_S0_S0_S0_(i32 noundef %56, i32 noundef %57, i32 noundef 0, i32 noundef -1)
  store i32 %58, ptr %2, align 4, !tbaa !10
  br label %101

59:                                               ; preds = %55
  br i1 %7, label %60, label %101

60:                                               ; preds = %59
  %61 = load i32, ptr %3, align 4, !tbaa !10
  %62 = load i32, ptr %4, align 4, !tbaa !10
  %63 = tail call noundef i32 @_ZL18ImSubClampOverflowIjET_S0_S0_S0_S0_(i32 noundef %61, i32 noundef %62, i32 noundef 0, i32 noundef -1)
  store i32 %63, ptr %2, align 4, !tbaa !10
  br label %101

64:                                               ; preds = %9
  br i1 %6, label %.thread87, label %68

.thread87:                                        ; preds = %64
  %65 = load i64, ptr %3, align 8, !tbaa !12
  %66 = load i64, ptr %4, align 8, !tbaa !12
  %67 = tail call noundef i64 @_ZL18ImAddClampOverflowIxET_S0_S0_S0_S0_(i64 noundef %65, i64 noundef %66, i64 noundef -9223372036854775808, i64 noundef 9223372036854775807)
  store i64 %67, ptr %2, align 8, !tbaa !12
  br label %101

68:                                               ; preds = %64
  br i1 %7, label %69, label %101

69:                                               ; preds = %68
  %70 = load i64, ptr %3, align 8, !tbaa !12
  %71 = load i64, ptr %4, align 8, !tbaa !12
  %72 = tail call noundef i64 @_ZL18ImSubClampOverflowIxET_S0_S0_S0_S0_(i64 noundef %70, i64 noundef %71, i64 noundef -9223372036854775808, i64 noundef 9223372036854775807)
  store i64 %72, ptr %2, align 8, !tbaa !12
  br label %101

73:                                               ; preds = %9
  br i1 %6, label %.thread88, label %77

.thread88:                                        ; preds = %73
  %74 = load i64, ptr %3, align 8, !tbaa !12
  %75 = load i64, ptr %4, align 8, !tbaa !12
  %76 = tail call noundef i64 @_ZL18ImAddClampOverflowIyET_S0_S0_S0_S0_(i64 noundef %74, i64 noundef %75, i64 noundef 0, i64 noundef -1)
  store i64 %76, ptr %2, align 8, !tbaa !12
  br label %101

77:                                               ; preds = %73
  br i1 %7, label %78, label %101

78:                                               ; preds = %77
  %79 = load i64, ptr %3, align 8, !tbaa !12
  %80 = load i64, ptr %4, align 8, !tbaa !12
  %81 = tail call noundef i64 @_ZL18ImSubClampOverflowIyET_S0_S0_S0_S0_(i64 noundef %79, i64 noundef %80, i64 noundef 0, i64 noundef -1)
  store i64 %81, ptr %2, align 8, !tbaa !12
  br label %101

82:                                               ; preds = %9
  br i1 %6, label %.thread89, label %86

.thread89:                                        ; preds = %82
  %83 = load float, ptr %3, align 4, !tbaa !14
  %84 = load float, ptr %4, align 4, !tbaa !14
  %85 = fadd float %83, %84
  store float %85, ptr %2, align 4, !tbaa !14
  br label %101

86:                                               ; preds = %82
  br i1 %7, label %87, label %101

87:                                               ; preds = %86
  %88 = load float, ptr %3, align 4, !tbaa !14
  %89 = load float, ptr %4, align 4, !tbaa !14
  %90 = fsub float %88, %89
  store float %90, ptr %2, align 4, !tbaa !14
  br label %101

91:                                               ; preds = %9
  br i1 %6, label %.thread90, label %95

.thread90:                                        ; preds = %91
  %92 = load double, ptr %3, align 8, !tbaa !16
  %93 = load double, ptr %4, align 8, !tbaa !16
  %94 = fadd double %92, %93
  store double %94, ptr %2, align 8, !tbaa !16
  br label %101

95:                                               ; preds = %91
  br i1 %7, label %96, label %101

96:                                               ; preds = %95
  %97 = load double, ptr %3, align 8, !tbaa !16
  %98 = load double, ptr %4, align 8, !tbaa !16
  %99 = fsub double %97, %98
  store double %99, ptr %2, align 8, !tbaa !16
  br label %101

100:                                              ; preds = %9
  tail call void @__assert_fail(ptr noundef nonnull @.str.29, ptr noundef nonnull @.str.4, i32 noundef 2075, ptr noundef nonnull @__PRETTY_FUNCTION__._ZN5ImGui15DataTypeApplyOpEiiPvPKvS2_) #3
  unreachable

101:                                              ; preds = %.thread90, %.thread89, %.thread88, %.thread87, %.thread86, %.thread85, %.thread84, %.thread83, %.thread82, %.thread, %95, %96, %86, %87, %77, %78, %68, %69, %59, %60, %50, %51, %41, %42, %32, %33, %23, %24, %14, %15
  ret void
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef signext i8 @_ZL18ImAddClampOverflowIaET_S0_S0_S0_S0_(i8 noundef signext, i8 noundef signext, i8 noundef signext, i8 noundef signext) local_unnamed_addr #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef signext i8 @_ZL18ImSubClampOverflowIaET_S0_S0_S0_S0_(i8 noundef signext, i8 noundef signext, i8 noundef signext, i8 noundef signext) local_unnamed_addr #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef zeroext i8 @_ZL18ImAddClampOverflowIhET_S0_S0_S0_S0_(i8 noundef zeroext, i8 noundef zeroext, i8 noundef zeroext, i8 noundef zeroext) local_unnamed_addr #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef zeroext i8 @_ZL18ImSubClampOverflowIhET_S0_S0_S0_S0_(i8 noundef zeroext, i8 noundef zeroext, i8 noundef zeroext, i8 noundef zeroext) local_unnamed_addr #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef signext i16 @_ZL18ImAddClampOverflowIsET_S0_S0_S0_S0_(i16 noundef signext, i16 noundef signext, i16 noundef signext, i16 noundef signext) local_unnamed_addr #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef signext i16 @_ZL18ImSubClampOverflowIsET_S0_S0_S0_S0_(i16 noundef signext, i16 noundef signext, i16 noundef signext, i16 noundef signext) local_unnamed_addr #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef zeroext i16 @_ZL18ImAddClampOverflowItET_S0_S0_S0_S0_(i16 noundef zeroext, i16 noundef zeroext, i16 noundef zeroext, i16 noundef zeroext) local_unnamed_addr #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef zeroext i16 @_ZL18ImSubClampOverflowItET_S0_S0_S0_S0_(i16 noundef zeroext, i16 noundef zeroext, i16 noundef zeroext, i16 noundef zeroext) local_unnamed_addr #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef i32 @_ZL18ImAddClampOverflowIiET_S0_S0_S0_S0_(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef i32 @_ZL18ImSubClampOverflowIiET_S0_S0_S0_S0_(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef i32 @_ZL18ImAddClampOverflowIjET_S0_S0_S0_S0_(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef i32 @_ZL18ImSubClampOverflowIjET_S0_S0_S0_S0_(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef i64 @_ZL18ImAddClampOverflowIxET_S0_S0_S0_S0_(i64 noundef, i64 noundef, i64 noundef, i64 noundef) local_unnamed_addr #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef i64 @_ZL18ImSubClampOverflowIxET_S0_S0_S0_S0_(i64 noundef, i64 noundef, i64 noundef, i64 noundef) local_unnamed_addr #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef i64 @_ZL18ImAddClampOverflowIyET_S0_S0_S0_S0_(i64 noundef, i64 noundef, i64 noundef, i64 noundef) local_unnamed_addr #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef i64 @_ZL18ImSubClampOverflowIyET_S0_S0_S0_S0_(i64 noundef, i64 noundef, i64 noundef, i64 noundef) local_unnamed_addr #2

attributes #0 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}
!8 = !{!9, !9, i64 0}
!9 = !{!"short", !6, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !6, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"long long", !6, i64 0}
!14 = !{!15, !15, i64 0}
!15 = !{!"float", !6, i64 0}
!16 = !{!17, !17, i64 0}
!17 = !{!"double", !6, i64 0}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InstCombinePass,JumpThreadingPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass