; LLVM IR from smv1999/CompetitiveProgrammingQuestionBank :: Arrays/searchInRotatedSortedArray.ll (Z6searchRKSt6vectorIiSaIiEEi)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z12binarySearchSt6vectorIiSaIiEEiii(ptr noundef, i32 noundef, i32 noundef, i32 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z6searchRKSt6vectorIiSaIiEEi(ptr noundef nonnull align 8 dereferenceable(24) %0, i32 noundef %1) #2 {
  %3 = alloca i32, align 4
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca %"class.std::vector", align 8
  %16 = alloca %"class.std::vector", align 8
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #3
  store i32 0, ptr %6, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  %17 = load ptr, ptr %4, align 8, !tbaa !5
  %18 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %17) #3
  %19 = trunc i64 %18 to i32
  store i32 %19, ptr %7, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  %20 = load i32, ptr %7, align 4, !tbaa !9
  %21 = sub nsw i32 %20, 1
  store i32 %21, ptr %8, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  store i32 -1, ptr %9, align 4, !tbaa !9
  br label %22

22:                                               ; preds = %100, %2
  %23 = load i32, ptr %6, align 4, !tbaa !9
  %24 = load i32, ptr %8, align 4, !tbaa !9
  %25 = icmp sle i32 %23, %24
  br i1 %25, label %26, label %101

26:                                               ; preds = %22
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  %27 = load i32, ptr %6, align 4, !tbaa !9
  %28 = load i32, ptr %8, align 4, !tbaa !9
  %29 = add nsw i32 %27, %28
  %30 = sdiv i32 %29, 2
  store i32 %30, ptr %10, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #3
  %31 = load i32, ptr %10, align 4, !tbaa !9
  %32 = sub nsw i32 %31, 1
  %33 = load i32, ptr %7, align 4, !tbaa !9
  %34 = add nsw i32 %32, %33
  %35 = load i32, ptr %7, align 4, !tbaa !9
  %36 = srem i32 %34, %35
  store i32 %36, ptr %11, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #3
  %37 = load i32, ptr %10, align 4, !tbaa !9
  %38 = add nsw i32 %37, 1
  %39 = load i32, ptr %7, align 4, !tbaa !9
  %40 = srem i32 %38, %39
  store i32 %40, ptr %12, align 4, !tbaa !9
  %41 = load ptr, ptr %4, align 8, !tbaa !5
  %42 = load i32, ptr %6, align 4, !tbaa !9
  %43 = sext i32 %42 to i64
  %44 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %41, i64 noundef %43) #3
  %45 = load i32, ptr %44, align 4, !tbaa !9
  %46 = load ptr, ptr %4, align 8, !tbaa !5
  %47 = load i32, ptr %8, align 4, !tbaa !9
  %48 = sext i32 %47 to i64
  %49 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %46, i64 noundef %48) #3
  %50 = load i32, ptr %49, align 4, !tbaa !9
  %51 = icmp sle i32 %45, %50
  br i1 %51, label %52, label %54

52:                                               ; preds = %26
  %53 = load i32, ptr %6, align 4, !tbaa !9
  store i32 %53, ptr %9, align 4, !tbaa !9
  store i32 3, ptr %13, align 4
  br label %98

54:                                               ; preds = %26
  %55 = load ptr, ptr %4, align 8, !tbaa !5
  %56 = load i32, ptr %10, align 4, !tbaa !9
  %57 = sext i32 %56 to i64
  %58 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %55, i64 noundef %57) #3
  %59 = load i32, ptr %58, align 4, !tbaa !9
  %60 = load ptr, ptr %4, align 8, !tbaa !5
  %61 = load i32, ptr %11, align 4, !tbaa !9
  %62 = sext i32 %61 to i64
  %63 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %60, i64 noundef %62) #3
  %64 = load i32, ptr %63, align 4, !tbaa !9
  %65 = icmp sle i32 %59, %64
  br i1 %65, label %66, label %80

66:                                               ; preds = %54
  %67 = load ptr, ptr %4, align 8, !tbaa !5
  %68 = load i32, ptr %10, align 4, !tbaa !9
  %69 = sext i32 %68 to i64
  %70 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %67, i64 noundef %69) #3
  %71 = load i32, ptr %70, align 4, !tbaa !9
  %72 = load ptr, ptr %4, align 8, !tbaa !5
  %73 = load i32, ptr %12, align 4, !tbaa !9
  %74 = sext i32 %73 to i64
  %75 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %72, i64 noundef %74) #3
  %76 = load i32, ptr %75, align 4, !tbaa !9
  %77 = icmp sle i32 %71, %76
  br i1 %77, label %78, label %80

78:                                               ; preds = %66
  %79 = load i32, ptr %10, align 4, !tbaa !9
  store i32 %79, ptr %9, align 4, !tbaa !9
  store i32 3, ptr %13, align 4
  br label %98

80:                                               ; preds = %66, %54
  %81 = load ptr, ptr %4, align 8, !tbaa !5
  %82 = load i32, ptr %6, align 4, !tbaa !9
  %83 = sext i32 %82 to i64
  %84 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %81, i64 noundef %83) #3
  %85 = load i32, ptr %84, align 4, !tbaa !9
  %86 = load ptr, ptr %4, align 8, !tbaa !5
  %87 = load i32, ptr %10, align 4, !tbaa !9
  %88 = sext i32 %87 to i64
  %89 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %86, i64 noundef %88) #3
  %90 = load i32, ptr %89, align 4, !tbaa !9
  %91 = icmp sle i32 %85, %90
  br i1 %91, label %92, label %94

92:                                               ; preds = %80
  %93 = load i32, ptr %12, align 4, !tbaa !9
  store i32 %93, ptr %6, align 4, !tbaa !9
  br label %96

94:                                               ; preds = %80
  %95 = load i32, ptr %11, align 4, !tbaa !9
  store i32 %95, ptr %8, align 4, !tbaa !9
  br label %96

96:                                               ; preds = %94, %92
  br label %97

97:                                               ; preds = %96
  store i32 0, ptr %13, align 4
  br label %98

98:                                               ; preds = %97, %78, %52
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #3
  %99 = load i32, ptr %13, align 4
  switch i32 %99, label %121 [
    i32 0, label %100
    i32 3, label %101
  ]

100:                                              ; preds = %98
  br label %22, !llvm.loop !11

101:                                              ; preds = %98, %22
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #3
  %102 = load ptr, ptr %4, align 8, !tbaa !5
  call void @_ZNSt6vectorIiSaIiEEC2ERKS1_(ptr noundef nonnull align 8 dereferenceable(24) %15, ptr noundef nonnull align 8 dereferenceable(24) %102)
  %103 = load i32, ptr %9, align 4, !tbaa !9
  %104 = sub nsw i32 %103, 1
  %105 = load i32, ptr %5, align 4, !tbaa !9
  %106 = call noundef i32 @_Z12binarySearchSt6vectorIiSaIiEEiii(ptr noundef %15, i32 noundef 0, i32 noundef %104, i32 noundef %105)
  call void @_ZNSt6vectorIiSaIiEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %15) #3
  store i32 %106, ptr %14, align 4, !tbaa !9
  %107 = load i32, ptr %14, align 4, !tbaa !9
  %108 = icmp ne i32 %107, -1
  br i1 %108, label %109, label %111

109:                                              ; preds = %101
  %110 = load i32, ptr %14, align 4, !tbaa !9
  store i32 %110, ptr %3, align 4
  store i32 1, ptr %13, align 4
  br label %119

111:                                              ; preds = %101
  %112 = load ptr, ptr %4, align 8, !tbaa !5
  call void @_ZNSt6vectorIiSaIiEEC2ERKS1_(ptr noundef nonnull align 8 dereferenceable(24) %16, ptr noundef nonnull align 8 dereferenceable(24) %112)
  %113 = load i32, ptr %9, align 4, !tbaa !9
  %114 = load i32, ptr %7, align 4, !tbaa !9
  %115 = sub nsw i32 %114, 1
  %116 = load i32, ptr %5, align 4, !tbaa !9
  %117 = call noundef i32 @_Z12binarySearchSt6vectorIiSaIiEEiii(ptr noundef %16, i32 noundef %113, i32 noundef %115, i32 noundef %116)
  store i32 %117, ptr %14, align 4, !tbaa !9
  call void @_ZNSt6vectorIiSaIiEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %16) #3
  %118 = load i32, ptr %14, align 4, !tbaa !9
  store i32 %118, ptr %3, align 4
  store i32 1, ptr %13, align 4
  br label %119

119:                                              ; preds = %111, %109
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #3
  %120 = load i32, ptr %3, align 4
  ret i32 %120

121:                                              ; preds = %98
  unreachable
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEEC2ERKS1_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z12binarySearchSt6vectorIiSaIiEEiii(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z6searchRKSt6vectorIiSaIiEEi(ptr noundef nonnull align 8 dereferenceable(24) %0, i32 noundef %1) local_unnamed_addr #1 {
  %3 = alloca %"class.std::vector", align 8
  %4 = alloca %"class.std::vector", align 8
  %5 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #2
  %6 = trunc i64 %5 to i32
  %7 = add nsw i32 %6, -1
  %.not61 = icmp slt i32 %6, 1
  br i1 %.not61, label %.thread, label %.lr.ph

.lr.ph:                                           ; preds = %2, %33
  %.04363 = phi i32 [ %.043., %33 ], [ 0, %2 ]
  %.04462 = phi i32 [ %..044, %33 ], [ %7, %2 ]
  %8 = add nuw nsw i32 %.04363, %.04462
  %9 = lshr i32 %8, 1
  %10 = add i32 %7, %9
  %11 = srem i32 %10, %6
  %12 = add nuw nsw i32 %9, 1
  %13 = urem i32 %12, %6
  %14 = zext nneg i32 %.04363 to i64
  %15 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %14) #2
  %16 = load i32, ptr %15, align 4, !tbaa !5
  %17 = zext nneg i32 %.04462 to i64
  %18 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %17) #2
  %19 = load i32, ptr %18, align 4, !tbaa !5
  %.not51 = icmp sgt i32 %16, %19
  br i1 %.not51, label %20, label %.thread

20:                                               ; preds = %.lr.ph
  %21 = zext nneg i32 %9 to i64
  %22 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %21) #2
  %23 = load i32, ptr %22, align 4, !tbaa !5
  %24 = sext i32 %11 to i64
  %25 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %24) #2
  %26 = load i32, ptr %25, align 4, !tbaa !5
  %.not52 = icmp sgt i32 %23, %26
  br i1 %.not52, label %33, label %27

27:                                               ; preds = %20
  %28 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %21) #2
  %29 = load i32, ptr %28, align 4, !tbaa !5
  %30 = zext nneg i32 %13 to i64
  %31 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %30) #2
  %32 = load i32, ptr %31, align 4, !tbaa !5
  %.not53 = icmp sgt i32 %29, %32
  br i1 %.not53, label %33, label %.thread

33:                                               ; preds = %20, %27
  %34 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %14) #2
  %35 = load i32, ptr %34, align 4, !tbaa !5
  %36 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %21) #2
  %37 = load i32, ptr %36, align 4, !tbaa !5
  %.not54 = icmp sgt i32 %35, %37
  %..044 = select i1 %.not54, i32 %11, i32 %.04462
  %.043. = select i1 %.not54, i32 %.04363, i32 %13
  %.not = icmp sgt i32 %.043., %..044
  br i1 %.not, label %.thread, label %.lr.ph

.thread:                                          ; preds = %33, %.lr.ph, %27, %2
  %.249 = phi i32 [ -1, %2 ], [ %9, %27 ], [ %.04363, %.lr.ph ], [ -1, %33 ]
  call void @_ZNSt6vectorIiSaIiEEC2ERKS1_(ptr noundef nonnull align 8 dereferenceable(24) %3, ptr noundef nonnull align 8 dereferenceable(24) %0)
  %38 = add nsw i32 %.249, -1
  %39 = call noundef i32 @_Z12binarySearchSt6vectorIiSaIiEEiii(ptr noundef nonnull %3, i32 noundef 0, i32 noundef %38, i32 noundef %1)
  call void @_ZNSt6vectorIiSaIiEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %3) #2
  %.not55 = icmp eq i32 %39, -1
  br i1 %.not55, label %40, label %42

40:                                               ; preds = %.thread
  call void @_ZNSt6vectorIiSaIiEEC2ERKS1_(ptr noundef nonnull align 8 dereferenceable(24) %4, ptr noundef nonnull align 8 dereferenceable(24) %0)
  %41 = call noundef i32 @_Z12binarySearchSt6vectorIiSaIiEEiii(ptr noundef nonnull %4, i32 noundef %.249, i32 noundef %7, i32 noundef %1)
  call void @_ZNSt6vectorIiSaIiEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %4) #2
  br label %42

42:                                               ; preds = %.thread, %40
  %.042 = phi i32 [ %41, %40 ], [ %39, %.thread ]
  ret i32 %.042
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEEC2ERKS1_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass