; LLVM IR from facebookresearch/habitat-sim :: src/deps/basis-universal/encoder (basisu_etc)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.basisu::pack_eac_a8_results" = type { i32, i32, i32, %"class.basisu::vector.5", %"class.basisu::vector.5" }
%"class.basisu::vector.5" = type { ptr, i32, i32 }

@_ZN6basisu17g_etc2_eac_tablesE = external dso_local constant [16 x [8 x i8]], align 16

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN6basisu5clampIiEET_S1_S1_S1_(i32 noundef, i32 noundef, i32 noundef) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZN6basisu6vectorIhEixEm(ptr noundef nonnull align 8 dereferenceable(16), i64 noundef) #1 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN6basisu6vectorIhE6resizeEmb(ptr noundef nonnull align 8 dereferenceable(16), i64 noundef, i1 noundef zeroext) #2 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN6basisu6vectorIhE4swapERS1_(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 8 dereferenceable(16)) #1 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN6basisu4iabsEi(i32 noundef) #1

; Function Attrs: mustprogress uwtable
define dso_local noundef i64 @_ZN6basisu11pack_eac_a8ERNS_19pack_eac_a8_resultsEPKhjjjj(ptr noundef nonnull align 8 dereferenceable(48) %0, ptr noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5) #3 {
  %7 = alloca i64, align 8
  %8 = alloca ptr, align 8
  %9 = alloca ptr, align 8
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  %19 = alloca i32, align 4
  %20 = alloca i32, align 4
  %21 = alloca i64, align 8
  %22 = alloca i32, align 4
  %23 = alloca float, align 4
  %24 = alloca i32, align 4
  %25 = alloca i32, align 4
  %26 = alloca i32, align 4
  %27 = alloca i32, align 4
  %28 = alloca i32, align 4
  %29 = alloca i32, align 4
  %30 = alloca i32, align 4
  %31 = alloca i32, align 4
  %32 = alloca i64, align 8
  %33 = alloca i32, align 4
  %34 = alloca i32, align 4
  %35 = alloca i32, align 4
  %36 = alloca i32, align 4
  %37 = alloca i32, align 4
  %38 = alloca i32, align 4
  %39 = alloca i32, align 4
  store ptr %0, ptr %8, align 8, !tbaa !5
  store ptr %1, ptr %9, align 8, !tbaa !5
  store i32 %2, ptr %10, align 4, !tbaa !9
  store i32 %3, ptr %11, align 4, !tbaa !9
  store i32 %4, ptr %12, align 4, !tbaa !9
  store i32 %5, ptr %13, align 4, !tbaa !9
  %40 = load ptr, ptr %8, align 8, !tbaa !5
  %41 = getelementptr inbounds %"struct.basisu::pack_eac_a8_results", ptr %40, i32 0, i32 3
  %42 = load i32, ptr %10, align 4, !tbaa !9
  %43 = zext i32 %42 to i64
  call void @_ZN6basisu6vectorIhE6resizeEmb(ptr noundef nonnull align 8 dereferenceable(16) %41, i64 noundef %43, i1 noundef zeroext false)
  %44 = load ptr, ptr %8, align 8, !tbaa !5
  %45 = getelementptr inbounds %"struct.basisu::pack_eac_a8_results", ptr %44, i32 0, i32 4
  %46 = load i32, ptr %10, align 4, !tbaa !9
  %47 = zext i32 %46 to i64
  call void @_ZN6basisu6vectorIhE6resizeEmb(ptr noundef nonnull align 8 dereferenceable(16) %45, i64 noundef %47, i1 noundef zeroext false)
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #5
  store i32 255, ptr %14, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #5
  store i32 0, ptr %15, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #5
  store i32 0, ptr %16, align 4, !tbaa !9
  br label %48

48:                                               ; preds = %72, %6
  %49 = load i32, ptr %16, align 4, !tbaa !9
  %50 = load i32, ptr %10, align 4, !tbaa !9
  %51 = icmp ult i32 %49, %50
  br i1 %51, label %53, label %52

52:                                               ; preds = %48
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #5
  br label %75

53:                                               ; preds = %48
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #5
  %54 = load ptr, ptr %9, align 8, !tbaa !5
  %55 = load i32, ptr %16, align 4, !tbaa !9
  %56 = zext i32 %55 to i64
  %57 = getelementptr inbounds i8, ptr %54, i64 %56
  %58 = load i8, ptr %57, align 1, !tbaa !11
  %59 = zext i8 %58 to i32
  store i32 %59, ptr %17, align 4, !tbaa !9
  %60 = load i32, ptr %17, align 4, !tbaa !9
  %61 = load i32, ptr %14, align 4, !tbaa !9
  %62 = icmp ult i32 %60, %61
  br i1 %62, label %63, label %65

63:                                               ; preds = %53
  %64 = load i32, ptr %17, align 4, !tbaa !9
  store i32 %64, ptr %14, align 4, !tbaa !9
  br label %65

65:                                               ; preds = %63, %53
  %66 = load i32, ptr %17, align 4, !tbaa !9
  %67 = load i32, ptr %15, align 4, !tbaa !9
  %68 = icmp ugt i32 %66, %67
  br i1 %68, label %69, label %71

69:                                               ; preds = %65
  %70 = load i32, ptr %17, align 4, !tbaa !9
  store i32 %70, ptr %15, align 4, !tbaa !9
  br label %71

71:                                               ; preds = %69, %65
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #5
  br label %72

72:                                               ; preds = %71
  %73 = load i32, ptr %16, align 4, !tbaa !9
  %74 = add i32 %73, 1
  store i32 %74, ptr %16, align 4, !tbaa !9
  br label %48, !llvm.loop !12

75:                                               ; preds = %52
  %76 = load i32, ptr %14, align 4, !tbaa !9
  %77 = load i32, ptr %15, align 4, !tbaa !9
  %78 = icmp eq i32 %76, %77
  br i1 %78, label %79, label %102

79:                                               ; preds = %75
  %80 = load i32, ptr %14, align 4, !tbaa !9
  %81 = load ptr, ptr %8, align 8, !tbaa !5
  %82 = getelementptr inbounds %"struct.basisu::pack_eac_a8_results", ptr %81, i32 0, i32 0
  store i32 %80, ptr %82, align 8, !tbaa !14
  %83 = load ptr, ptr %8, align 8, !tbaa !5
  %84 = getelementptr inbounds %"struct.basisu::pack_eac_a8_results", ptr %83, i32 0, i32 1
  store i32 13, ptr %84, align 4, !tbaa !17
  %85 = load ptr, ptr %8, align 8, !tbaa !5
  %86 = getelementptr inbounds %"struct.basisu::pack_eac_a8_results", ptr %85, i32 0, i32 2
  store i32 1, ptr %86, align 8, !tbaa !18
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #5
  store i32 0, ptr %18, align 4, !tbaa !9
  br label %87

87:                                               ; preds = %98, %79
  %88 = load i32, ptr %18, align 4, !tbaa !9
  %89 = load i32, ptr %10, align 4, !tbaa !9
  %90 = icmp ult i32 %88, %89
  br i1 %90, label %92, label %91

91:                                               ; preds = %87
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #5
  br label %101

92:                                               ; preds = %87
  %93 = load ptr, ptr %8, align 8, !tbaa !5
  %94 = getelementptr inbounds %"struct.basisu::pack_eac_a8_results", ptr %93, i32 0, i32 3
  %95 = load i32, ptr %18, align 4, !tbaa !9
  %96 = zext i32 %95 to i64
  %97 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZN6basisu6vectorIhEixEm(ptr noundef nonnull align 8 dereferenceable(16) %94, i64 noundef %96)
  store i8 4, ptr %97, align 1, !tbaa !11
  br label %98

98:                                               ; preds = %92
  %99 = load i32, ptr %18, align 4, !tbaa !9
  %100 = add i32 %99, 1
  store i32 %100, ptr %18, align 4, !tbaa !9
  br label %87, !llvm.loop !19

101:                                              ; preds = %91
  store i64 0, ptr %7, align 8
  store i32 1, ptr %19, align 4
  br label %309

102:                                              ; preds = %75
  call void @llvm.lifetime.start.p0(i64 4, ptr %20) #5
  %103 = load i32, ptr %15, align 4, !tbaa !9
  %104 = load i32, ptr %14, align 4, !tbaa !9
  %105 = sub i32 %103, %104
  store i32 %105, ptr %20, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %21) #5
  store i64 -1, ptr %21, align 8, !tbaa !20
  call void @llvm.lifetime.start.p0(i64 4, ptr %22) #5
  store i32 0, ptr %22, align 4, !tbaa !9
  br label %106

106:                                              ; preds = %301, %102
  %107 = load i32, ptr %22, align 4, !tbaa !9
  %108 = icmp ult i32 %107, 16
  br i1 %108, label %110, label %109

109:                                              ; preds = %106
  store i32 8, ptr %19, align 4
  br label %304

110:                                              ; preds = %106
  %111 = load i32, ptr %13, align 4, !tbaa !9
  %112 = load i32, ptr %22, align 4, !tbaa !9
  %113 = shl i32 1, %112
  %114 = and i32 %111, %113
  %115 = icmp eq i32 %114, 0
  br i1 %115, label %116, label %117

116:                                              ; preds = %110
  br label %301

117:                                              ; preds = %110
  call void @llvm.lifetime.start.p0(i64 4, ptr %23) #5
  %118 = load i32, ptr %22, align 4, !tbaa !9
  %119 = zext i32 %118 to i64
  %120 = getelementptr inbounds [16 x [8 x i8]], ptr @_ZN6basisu17g_etc2_eac_tablesE, i64 0, i64 %119
  %121 = getelementptr inbounds [8 x i8], ptr %120, i64 0, i64 7
  %122 = load i8, ptr %121, align 1, !tbaa !11
  %123 = sext i8 %122 to i32
  %124 = load i32, ptr %22, align 4, !tbaa !9
  %125 = zext i32 %124 to i64
  %126 = getelementptr inbounds [16 x [8 x i8]], ptr @_ZN6basisu17g_etc2_eac_tablesE, i64 0, i64 %125
  %127 = getelementptr inbounds [8 x i8], ptr %126, i64 0, i64 3
  %128 = load i8, ptr %127, align 1, !tbaa !11
  %129 = sext i8 %128 to i32
  %130 = sub nsw i32 %123, %129
  %131 = sitofp i32 %130 to float
  store float %131, ptr %23, align 4, !tbaa !22
  call void @llvm.lifetime.start.p0(i64 4, ptr %24) #5
  %132 = load i32, ptr %14, align 4, !tbaa !9
  %133 = uitofp i32 %132 to float
  %134 = load i32, ptr %15, align 4, !tbaa !9
  %135 = uitofp i32 %134 to float
  %136 = load i32, ptr %22, align 4, !tbaa !9
  %137 = zext i32 %136 to i64
  %138 = getelementptr inbounds [16 x [8 x i8]], ptr @_ZN6basisu17g_etc2_eac_tablesE, i64 0, i64 %137
  %139 = getelementptr inbounds [8 x i8], ptr %138, i64 0, i64 3
  %140 = load i8, ptr %139, align 1, !tbaa !11
  %141 = sext i8 %140 to i32
  %142 = sub nsw i32 0, %141
  %143 = sitofp i32 %142 to float
  %144 = load float, ptr %23, align 4, !tbaa !22
  %145 = fdiv float %143, %144
  %146 = call noundef float @_ZN6basisu4lerpIffEET_S1_S1_T0_(float noundef %133, float noundef %135, float noundef %145)
  %147 = call float @llvm.round.f32(float %146)
  %148 = fptosi float %147 to i32
  store i32 %148, ptr %24, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %25) #5
  %149 = load i32, ptr %24, align 4, !tbaa !9
  %150 = load i32, ptr %11, align 4, !tbaa !9
  %151 = sub i32 %149, %150
  %152 = call noundef zeroext i8 @_ZN6basisu8clamp255Ei(i32 noundef %151)
  %153 = zext i8 %152 to i32
  store i32 %153, ptr %25, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %26) #5
  %154 = load i32, ptr %24, align 4, !tbaa !9
  %155 = load i32, ptr %11, align 4, !tbaa !9
  %156 = add i32 %154, %155
  %157 = call noundef zeroext i8 @_ZN6basisu8clamp255Ei(i32 noundef %156)
  %158 = zext i8 %157 to i32
  store i32 %158, ptr %26, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %27) #5
  %159 = load i32, ptr %20, align 4, !tbaa !9
  %160 = uitofp i32 %159 to float
  %161 = load float, ptr %23, align 4, !tbaa !22
  %162 = fdiv float %160, %161
  %163 = call float @llvm.round.f32(float %162)
  %164 = fptosi float %163 to i32
  store i32 %164, ptr %27, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %28) #5
  %165 = load i32, ptr %27, align 4, !tbaa !9
  %166 = load i32, ptr %12, align 4, !tbaa !9
  %167 = sub i32 %165, %166
  %168 = call noundef i32 @_ZN6basisu5clampIiEET_S1_S1_S1_(i32 noundef %167, i32 noundef 1, i32 noundef 15)
  store i32 %168, ptr %28, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %29) #5
  %169 = load i32, ptr %27, align 4, !tbaa !9
  %170 = load i32, ptr %12, align 4, !tbaa !9
  %171 = add i32 %169, %170
  %172 = call noundef i32 @_ZN6basisu5clampIiEET_S1_S1_S1_(i32 noundef %171, i32 noundef 1, i32 noundef 15)
  store i32 %172, ptr %29, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %30) #5
  %173 = load i32, ptr %25, align 4, !tbaa !9
  store i32 %173, ptr %30, align 4, !tbaa !9
  br label %174

174:                                              ; preds = %292, %117
  %175 = load i32, ptr %30, align 4, !tbaa !9
  %176 = load i32, ptr %26, align 4, !tbaa !9
  %177 = icmp sle i32 %175, %176
  br i1 %177, label %179, label %178

178:                                              ; preds = %174
  store i32 11, ptr %19, align 4
  br label %295

179:                                              ; preds = %174
  call void @llvm.lifetime.start.p0(i64 4, ptr %31) #5
  %180 = load i32, ptr %28, align 4, !tbaa !9
  store i32 %180, ptr %31, align 4, !tbaa !9
  br label %181

181:                                              ; preds = %286, %179
  %182 = load i32, ptr %31, align 4, !tbaa !9
  %183 = load i32, ptr %29, align 4, !tbaa !9
  %184 = icmp sle i32 %182, %183
  br i1 %184, label %186, label %185

185:                                              ; preds = %181
  store i32 14, ptr %19, align 4
  br label %289

186:                                              ; preds = %181
  call void @llvm.lifetime.start.p0(i64 8, ptr %32) #5
  store i64 0, ptr %32, align 8, !tbaa !20
  call void @llvm.lifetime.start.p0(i64 4, ptr %33) #5
  store i32 0, ptr %33, align 4, !tbaa !9
  br label %187

187:                                              ; preds = %254, %186
  %188 = load i32, ptr %33, align 4, !tbaa !9
  %189 = load i32, ptr %10, align 4, !tbaa !9
  %190 = icmp ult i32 %188, %189
  br i1 %190, label %192, label %191

191:                                              ; preds = %187
  store i32 17, ptr %19, align 4
  br label %257

192:                                              ; preds = %187
  call void @llvm.lifetime.start.p0(i64 4, ptr %34) #5
  %193 = load ptr, ptr %9, align 8, !tbaa !5
  %194 = load i32, ptr %33, align 4, !tbaa !9
  %195 = zext i32 %194 to i64
  %196 = getelementptr inbounds i8, ptr %193, i64 %195
  %197 = load i8, ptr %196, align 1, !tbaa !11
  %198 = zext i8 %197 to i32
  store i32 %198, ptr %34, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %35) #5
  store i32 -1, ptr %35, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %36) #5
  store i32 0, ptr %36, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %37) #5
  store i32 0, ptr %37, align 4, !tbaa !9
  br label %199

199:                                              ; preds = %229, %192
  %200 = load i32, ptr %37, align 4, !tbaa !9
  %201 = icmp ult i32 %200, 8
  br i1 %201, label %203, label %202

202:                                              ; preds = %199
  store i32 20, ptr %19, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %37) #5
  br label %232

203:                                              ; preds = %199
  call void @llvm.lifetime.start.p0(i64 4, ptr %38) #5
  %204 = load i32, ptr %31, align 4, !tbaa !9
  %205 = load i32, ptr %22, align 4, !tbaa !9
  %206 = zext i32 %205 to i64
  %207 = getelementptr inbounds [16 x [8 x i8]], ptr @_ZN6basisu17g_etc2_eac_tablesE, i64 0, i64 %206
  %208 = load i32, ptr %37, align 4, !tbaa !9
  %209 = zext i32 %208 to i64
  %210 = getelementptr inbounds [8 x i8], ptr %207, i64 0, i64 %209
  %211 = load i8, ptr %210, align 1, !tbaa !11
  %212 = sext i8 %211 to i32
  %213 = mul nsw i32 %204, %212
  %214 = load i32, ptr %30, align 4, !tbaa !9
  %215 = add nsw i32 %213, %214
  %216 = call noundef zeroext i8 @_ZN6basisu8clamp255Ei(i32 noundef %215)
  %217 = zext i8 %216 to i32
  store i32 %217, ptr %38, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %39) #5
  %218 = load i32, ptr %34, align 4, !tbaa !9
  %219 = load i32, ptr %38, align 4, !tbaa !9
  %220 = sub nsw i32 %218, %219
  %221 = call noundef i32 @_ZN6basisu4iabsEi(i32 noundef %220)
  store i32 %221, ptr %39, align 4, !tbaa !9
  %222 = load i32, ptr %39, align 4, !tbaa !9
  %223 = load i32, ptr %35, align 4, !tbaa !9
  %224 = icmp ult i32 %222, %223
  br i1 %224, label %225, label %228

225:                                              ; preds = %203
  %226 = load i32, ptr %39, align 4, !tbaa !9
  store i32 %226, ptr %35, align 4, !tbaa !9
  %227 = load i32, ptr %37, align 4, !tbaa !9
  store i32 %227, ptr %36, align 4, !tbaa !9
  br label %228

228:                                              ; preds = %225, %203
  call void @llvm.lifetime.end.p0(i64 4, ptr %39) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %38) #5
  br label %229

229:                                              ; preds = %228
  %230 = load i32, ptr %37, align 4, !tbaa !9
  %231 = add i32 %230, 1
  store i32 %231, ptr %37, align 4, !tbaa !9
  br label %199, !llvm.loop !24

232:                                              ; preds = %202
  %233 = load i32, ptr %36, align 4, !tbaa !9
  %234 = trunc i32 %233 to i8
  %235 = load ptr, ptr %8, align 8, !tbaa !5
  %236 = getelementptr inbounds %"struct.basisu::pack_eac_a8_results", ptr %235, i32 0, i32 4
  %237 = load i32, ptr %33, align 4, !tbaa !9
  %238 = zext i32 %237 to i64
  %239 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZN6basisu6vectorIhEixEm(ptr noundef nonnull align 8 dereferenceable(16) %236, i64 noundef %238)
  store i8 %234, ptr %239, align 1, !tbaa !11
  %240 = load i32, ptr %35, align 4, !tbaa !9
  %241 = load i32, ptr %35, align 4, !tbaa !9
  %242 = mul i32 %240, %241
  %243 = zext i32 %242 to i64
  %244 = load i64, ptr %32, align 8, !tbaa !20
  %245 = add i64 %244, %243
  store i64 %245, ptr %32, align 8, !tbaa !20
  %246 = load i64, ptr %32, align 8, !tbaa !20
  %247 = load i64, ptr %21, align 8, !tbaa !20
  %248 = icmp uge i64 %246, %247
  br i1 %248, label %249, label %250

249:                                              ; preds = %232
  store i32 17, ptr %19, align 4
  br label %251

250:                                              ; preds = %232
  store i32 0, ptr %19, align 4
  br label %251

251:                                              ; preds = %250, %249
  call void @llvm.lifetime.end.p0(i64 4, ptr %36) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %35) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %34) #5
  %252 = load i32, ptr %19, align 4
  switch i32 %252, label %257 [
    i32 0, label %253
  ]

253:                                              ; preds = %251
  br label %254

254:                                              ; preds = %253
  %255 = load i32, ptr %33, align 4, !tbaa !9
  %256 = add i32 %255, 1
  store i32 %256, ptr %33, align 4, !tbaa !9
  br label %187, !llvm.loop !25

257:                                              ; preds = %251, %191
  call void @llvm.lifetime.end.p0(i64 4, ptr %33) #5
  br label %258

258:                                              ; preds = %257
  %259 = load i64, ptr %32, align 8, !tbaa !20
  %260 = load i64, ptr %21, align 8, !tbaa !20
  %261 = icmp ult i64 %259, %260
  br i1 %261, label %262, label %282

262:                                              ; preds = %258
  %263 = load i64, ptr %32, align 8, !tbaa !20
  store i64 %263, ptr %21, align 8, !tbaa !20
  %264 = load i32, ptr %30, align 4, !tbaa !9
  %265 = load ptr, ptr %8, align 8, !tbaa !5
  %266 = getelementptr inbounds %"struct.basisu::pack_eac_a8_results", ptr %265, i32 0, i32 0
  store i32 %264, ptr %266, align 8, !tbaa !14
  %267 = load i32, ptr %31, align 4, !tbaa !9
  %268 = load ptr, ptr %8, align 8, !tbaa !5
  %269 = getelementptr inbounds %"struct.basisu::pack_eac_a8_results", ptr %268, i32 0, i32 2
  store i32 %267, ptr %269, align 8, !tbaa !18
  %270 = load i32, ptr %22, align 4, !tbaa !9
  %271 = load ptr, ptr %8, align 8, !tbaa !5
  %272 = getelementptr inbounds %"struct.basisu::pack_eac_a8_results", ptr %271, i32 0, i32 1
  store i32 %270, ptr %272, align 4, !tbaa !17
  %273 = load ptr, ptr %8, align 8, !tbaa !5
  %274 = getelementptr inbounds %"struct.basisu::pack_eac_a8_results", ptr %273, i32 0, i32 3
  %275 = load ptr, ptr %8, align 8, !tbaa !5
  %276 = getelementptr inbounds %"struct.basisu::pack_eac_a8_results", ptr %275, i32 0, i32 4
  call void @_ZN6basisu6vectorIhE4swapERS1_(ptr noundef nonnull align 8 dereferenceable(16) %274, ptr noundef nonnull align 8 dereferenceable(16) %276)
  %277 = load i64, ptr %21, align 8, !tbaa !20
  %278 = icmp ne i64 %277, 0
  br i1 %278, label %281, label %279

279:                                              ; preds = %262
  %280 = load i64, ptr %21, align 8, !tbaa !20
  store i64 %280, ptr %7, align 8
  store i32 1, ptr %19, align 4
  br label %283

281:                                              ; preds = %262
  br label %282

282:                                              ; preds = %281, %258
  store i32 0, ptr %19, align 4
  br label %283

283:                                              ; preds = %282, %279
  call void @llvm.lifetime.end.p0(i64 8, ptr %32) #5
  %284 = load i32, ptr %19, align 4
  switch i32 %284, label %289 [
    i32 0, label %285
  ]

285:                                              ; preds = %283
  br label %286

286:                                              ; preds = %285
  %287 = load i32, ptr %31, align 4, !tbaa !9
  %288 = add nsw i32 %287, 1
  store i32 %288, ptr %31, align 4, !tbaa !9
  br label %181, !llvm.loop !26

289:                                              ; preds = %283, %185
  call void @llvm.lifetime.end.p0(i64 4, ptr %31) #5
  %290 = load i32, ptr %19, align 4
  switch i32 %290, label %295 [
    i32 14, label %291
  ]

291:                                              ; preds = %289
  br label %292

292:                                              ; preds = %291
  %293 = load i32, ptr %30, align 4, !tbaa !9
  %294 = add nsw i32 %293, 1
  store i32 %294, ptr %30, align 4, !tbaa !9
  br label %174, !llvm.loop !27

295:                                              ; preds = %289, %178
  call void @llvm.lifetime.end.p0(i64 4, ptr %30) #5
  %296 = load i32, ptr %19, align 4
  switch i32 %296, label %298 [
    i32 11, label %297
  ]

297:                                              ; preds = %295
  store i32 0, ptr %19, align 4
  br label %298

298:                                              ; preds = %297, %295
  call void @llvm.lifetime.end.p0(i64 4, ptr %29) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %28) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %27) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %26) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %25) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %24) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %23) #5
  %299 = load i32, ptr %19, align 4
  switch i32 %299, label %304 [
    i32 0, label %300
  ]

300:                                              ; preds = %298
  br label %301

301:                                              ; preds = %300, %116
  %302 = load i32, ptr %22, align 4, !tbaa !9
  %303 = add i32 %302, 1
  store i32 %303, ptr %22, align 4, !tbaa !9
  br label %106, !llvm.loop !28

304:                                              ; preds = %298, %109
  call void @llvm.lifetime.end.p0(i64 4, ptr %22) #5
  %305 = load i32, ptr %19, align 4
  switch i32 %305, label %308 [
    i32 8, label %306
  ]

306:                                              ; preds = %304
  %307 = load i64, ptr %21, align 8, !tbaa !20
  store i64 %307, ptr %7, align 8
  store i32 1, ptr %19, align 4
  br label %308

308:                                              ; preds = %306, %304
  call void @llvm.lifetime.end.p0(i64 8, ptr %21) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %20) #5
  br label %309

309:                                              ; preds = %308, %101
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #5
  %310 = load i64, ptr %7, align 8
  ret i64 %310
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef float @_ZN6basisu4lerpIffEET_S1_S1_T0_(float noundef, float noundef, float noundef) #1

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.round.f32(float) #4

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef zeroext i8 @_ZN6basisu8clamp255Ei(i32 noundef) #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
!14 = !{!15, !10, i64 0}
!15 = !{!"_ZTSN6basisu19pack_eac_a8_resultsE", !10, i64 0, !10, i64 4, !10, i64 8, !16, i64 16, !16, i64 32}
!16 = !{!"_ZTSN6basisu6vectorIhEE", !6, i64 0, !10, i64 8, !10, i64 12}
!17 = !{!15, !10, i64 4}
!18 = !{!15, !10, i64 8}
!19 = distinct !{!19, !13}
!20 = !{!21, !21, i64 0}
!21 = !{!"long", !7, i64 0}
!22 = !{!23, !23, i64 0}
!23 = !{!"float", !7, i64 0}
!24 = distinct !{!24, !13}
!25 = distinct !{!25, !13}
!26 = distinct !{!26, !13}
!27 = distinct !{!27, !13}
!28 = distinct !{!28, !13}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@_ZN6basisu17g_etc2_eac_tablesE = external dso_local local_unnamed_addr constant [16 x [8 x i8]], align 16

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN6basisu5clampIiEET_S1_S1_S1_(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZN6basisu6vectorIhEixEm(ptr noundef nonnull align 8 dereferenceable(16), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN6basisu6vectorIhE6resizeEmb(ptr noundef nonnull align 8 dereferenceable(16), i64 noundef, i1 noundef zeroext) local_unnamed_addr #1 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN6basisu6vectorIhE4swapERS1_(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 8 dereferenceable(16)) local_unnamed_addr #0 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN6basisu4iabsEi(i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
define dso_local noundef i64 @_ZN6basisu11pack_eac_a8ERNS_19pack_eac_a8_resultsEPKhjjjj(ptr noundef nonnull align 8 dereferenceable(48) %0, ptr nocapture noundef readonly %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5) local_unnamed_addr #2 {
  %7 = getelementptr inbounds i8, ptr %0, i64 16
  %8 = zext i32 %2 to i64
  tail call void @_ZN6basisu6vectorIhE6resizeEmb(ptr noundef nonnull align 8 dereferenceable(16) %7, i64 noundef %8, i1 noundef zeroext false)
  %9 = getelementptr inbounds i8, ptr %0, i64 32
  tail call void @_ZN6basisu6vectorIhE6resizeEmb(ptr noundef nonnull align 8 dereferenceable(16) %9, i64 noundef %8, i1 noundef zeroext false)
  %.not206 = icmp eq i32 %2, 0
  br i1 %.not206, label %._crit_edge.thread, label %.lr.ph.preheader

.lr.ph.preheader:                                 ; preds = %6
  %min.iters.check = icmp ult i32 %2, 8
  br i1 %min.iters.check, label %.lr.ph.preheader273, label %vector.ph

.lr.ph.preheader273:                              ; preds = %middle.block, %.lr.ph.preheader
  %indvars.iv.ph = phi i64 [ 0, %.lr.ph.preheader ], [ %n.vec, %middle.block ]
  %.0106163.ph = phi i32 [ 255, %.lr.ph.preheader ], [ %19, %middle.block ]
  %.0113162.ph = phi i32 [ 0, %.lr.ph.preheader ], [ %20, %middle.block ]
  br label %.lr.ph

vector.ph:                                        ; preds = %.lr.ph.preheader
  %n.vec = and i64 %8, 4294967288
  br label %vector.body

vector.body:                                      ; preds = %vector.body, %vector.ph
  %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
  %vec.phi = phi <4 x i32> [ <i32 255, i32 255, i32 255, i32 255>, %vector.ph ], [ %14, %vector.body ]
  %vec.phi259 = phi <4 x i32> [ <i32 255, i32 255, i32 255, i32 255>, %vector.ph ], [ %15, %vector.body ]
  %vec.phi260 = phi <4 x i32> [ zeroinitializer, %vector.ph ], [ %16, %vector.body ]
  %vec.phi261 = phi <4 x i32> [ zeroinitializer, %vector.ph ], [ %17, %vector.body ]
  %10 = getelementptr inbounds i8, ptr %1, i64 %index
  %11 = getelementptr inbounds i8, ptr %10, i64 4
  %wide.load = load <4 x i8>, ptr %10, align 1, !tbaa !5
  %wide.load262 = load <4 x i8>, ptr %11, align 1, !tbaa !5
  %12 = zext <4 x i8> %wide.load to <4 x i32>
  %13 = zext <4 x i8> %wide.load262 to <4 x i32>
  %14 = tail call <4 x i32> @llvm.umin.v4i32(<4 x i32> %vec.phi, <4 x i32> %12)
  %15 = tail call <4 x i32> @llvm.umin.v4i32(<4 x i32> %vec.phi259, <4 x i32> %13)
  %16 = tail call <4 x i32> @llvm.umax.v4i32(<4 x i32> %vec.phi260, <4 x i32> %12)
  %17 = tail call <4 x i32> @llvm.umax.v4i32(<4 x i32> %vec.phi261, <4 x i32> %13)
  %index.next = add nuw i64 %index, 8
  %18 = icmp eq i64 %index.next, %n.vec
  br i1 %18, label %middle.block, label %vector.body, !llvm.loop !8

middle.block:                                     ; preds = %vector.body
  %rdx.minmax = tail call <4 x i32> @llvm.umin.v4i32(<4 x i32> %14, <4 x i32> %15)
  %19 = tail call i32 @llvm.vector.reduce.umin.v4i32(<4 x i32> %rdx.minmax)
  %rdx.minmax263 = tail call <4 x i32> @llvm.umax.v4i32(<4 x i32> %16, <4 x i32> %17)
  %20 = tail call i32 @llvm.vector.reduce.umax.v4i32(<4 x i32> %rdx.minmax263)
  %cmp.n = icmp eq i64 %n.vec, %8
  br i1 %cmp.n, label %._crit_edge, label %.lr.ph.preheader273

._crit_edge:                                      ; preds = %.lr.ph, %middle.block
  %spec.select.lcssa = phi i32 [ %19, %middle.block ], [ %spec.select, %.lr.ph ]
  %.1114.lcssa = phi i32 [ %20, %middle.block ], [ %.1114, %.lr.ph ]
  %21 = icmp eq i32 %spec.select.lcssa, %.1114.lcssa
  br i1 %21, label %25, label %._crit_edge.thread

.lr.ph:                                           ; preds = %.lr.ph.preheader273, %.lr.ph
  %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ %indvars.iv.ph, %.lr.ph.preheader273 ]
  %.0106163 = phi i32 [ %spec.select, %.lr.ph ], [ %.0106163.ph, %.lr.ph.preheader273 ]
  %.0113162 = phi i32 [ %.1114, %.lr.ph ], [ %.0113162.ph, %.lr.ph.preheader273 ]
  %22 = getelementptr inbounds i8, ptr %1, i64 %indvars.iv
  %23 = load i8, ptr %22, align 1, !tbaa !5
  %24 = zext i8 %23 to i32
  %spec.select = tail call i32 @llvm.umin.i32(i32 %.0106163, i32 %24)
  %.1114 = tail call i32 @llvm.umax.i32(i32 %.0113162, i32 %24)
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, %8
  br i1 %exitcond.not, label %._crit_edge, label %.lr.ph, !llvm.loop !12

25:                                               ; preds = %._crit_edge
  store i32 %.1114.lcssa, ptr %0, align 8, !tbaa !13
  %26 = getelementptr inbounds i8, ptr %0, i64 4
  store i32 13, ptr %26, align 4, !tbaa !18
  %27 = getelementptr inbounds i8, ptr %0, i64 8
  store i32 1, ptr %27, align 8, !tbaa !19
  br i1 %.not206, label %.loopexit, label %.lr.ph205

.lr.ph205:                                        ; preds = %25, %.lr.ph205
  %indvars.iv233 = phi i64 [ %indvars.iv.next234, %.lr.ph205 ], [ 0, %25 ]
  %28 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZN6basisu6vectorIhEixEm(ptr noundef nonnull align 8 dereferenceable(16) %7, i64 noundef %indvars.iv233)
  store i8 4, ptr %28, align 1, !tbaa !5
  %indvars.iv.next234 = add nuw nsw i64 %indvars.iv233, 1
  %exitcond237.not = icmp eq i64 %indvars.iv.next234, %8
  br i1 %exitcond237.not, label %.loopexit, label %.lr.ph205, !llvm.loop !20

._crit_edge.thread:                               ; preds = %6, %._crit_edge
  %.0106.lcssa241 = phi i32 [ %spec.select.lcssa, %._crit_edge ], [ 255, %6 ]
  %.0113.lcssa240 = phi i32 [ %.1114.lcssa, %._crit_edge ], [ 0, %6 ]
  %29 = sub nsw i32 %.0113.lcssa240, %.0106.lcssa241
  %30 = uitofp nneg i32 %.0106.lcssa241 to float
  %31 = uitofp nneg i32 %.0113.lcssa240 to float
  %32 = uitofp i32 %29 to float
  %33 = getelementptr inbounds i8, ptr %0, i64 8
  %34 = getelementptr inbounds i8, ptr %0, i64 4
  br label %35

35:                                               ; preds = %._crit_edge.thread, %.thread155
  %indvars.iv229 = phi i64 [ 0, %._crit_edge.thread ], [ %indvars.iv.next230, %.thread155 ]
  %.0127202 = phi i64 [ -1, %._crit_edge.thread ], [ %.7134, %.thread155 ]
  %36 = trunc nuw nsw i64 %indvars.iv229 to i32
  %37 = shl nuw nsw i32 1, %36
  %38 = and i32 %37, %5
  %39 = icmp eq i32 %38, 0
  br i1 %39, label %.thread155, label %40

40:                                               ; preds = %35
  %41 = getelementptr inbounds [16 x [8 x i8]], ptr @_ZN6basisu17g_etc2_eac_tablesE, i64 0, i64 %indvars.iv229
  %42 = getelementptr inbounds i8, ptr %41, i64 7
  %43 = load i8, ptr %42, align 1, !tbaa !5
  %44 = sext i8 %43 to i32
  %45 = getelementptr inbounds i8, ptr %41, i64 3
  %46 = load i8, ptr %45, align 1, !tbaa !5
  %47 = sext i8 %46 to i32
  %48 = sub nsw i32 %44, %47
  %49 = sitofp i32 %48 to float
  %50 = sub nsw i32 0, %47
  %51 = sitofp i32 %50 to float
  %52 = fdiv float %51, %49
  %53 = tail call noundef float @_ZN6basisu4lerpIffEET_S1_S1_T0_(float noundef %30, float noundef %31, float noundef %52)
  %54 = tail call float @llvm.round.f32(float %53)
  %55 = fptosi float %54 to i32
  %56 = sub i32 %55, %3
  %57 = tail call noundef zeroext i8 @_ZN6basisu8clamp255Ei(i32 noundef %56)
  %58 = zext i8 %57 to i32
  %59 = add i32 %55, %3
  %60 = tail call noundef zeroext i8 @_ZN6basisu8clamp255Ei(i32 noundef %59)
  %61 = zext i8 %60 to i32
  %62 = fdiv float %32, %49
  %63 = tail call float @llvm.round.f32(float %62)
  %64 = fptosi float %63 to i32
  %65 = sub i32 %64, %4
  %66 = tail call noundef i32 @_ZN6basisu5clampIiEET_S1_S1_S1_(i32 noundef %65, i32 noundef 1, i32 noundef 15)
  %67 = add i32 %64, %4
  %68 = tail call noundef i32 @_ZN6basisu5clampIiEET_S1_S1_S1_(i32 noundef %67, i32 noundef 1, i32 noundef 15)
  %.not180 = icmp ugt i8 %57, %60
  %.not141175 = icmp sgt i32 %66, %68
  %or.cond250 = or i1 %.not180, %.not141175
  br i1 %or.cond250, label %.thread155, label %.preheader157.lr.ph.split

.preheader157.lr.ph.split:                        ; preds = %40
  br i1 %.not206, label %.preheader157.preheader, label %.preheader157.us187.preheader

.preheader157.us187.preheader:                    ; preds = %.preheader157.lr.ph.split
  %69 = load i8, ptr %41, align 8, !tbaa !5
  %70 = sext i8 %69 to i32
  %71 = getelementptr inbounds [16 x [8 x i8]], ptr @_ZN6basisu17g_etc2_eac_tablesE, i64 0, i64 %indvars.iv229, i64 1
  %72 = getelementptr inbounds [16 x [8 x i8]], ptr @_ZN6basisu17g_etc2_eac_tablesE, i64 0, i64 %indvars.iv229, i64 2
  %73 = getelementptr inbounds [16 x [8 x i8]], ptr @_ZN6basisu17g_etc2_eac_tablesE, i64 0, i64 %indvars.iv229, i64 4
  %74 = getelementptr inbounds [16 x [8 x i8]], ptr @_ZN6basisu17g_etc2_eac_tablesE, i64 0, i64 %indvars.iv229, i64 5
  %75 = getelementptr inbounds [16 x [8 x i8]], ptr @_ZN6basisu17g_etc2_eac_tablesE, i64 0, i64 %indvars.iv229, i64 6
  br label %.preheader157.us187

.preheader157.preheader:                          ; preds = %.preheader157.lr.ph.split
  %.not208 = icmp eq i64 %.0127202, 0
  br label %.preheader157

.preheader157.us187:                              ; preds = %.preheader157.us187.preheader, %..thread152.loopexit_crit_edge.split.us.us
  %.0119182.us188 = phi i32 [ %159, %..thread152.loopexit_crit_edge.split.us.us ], [ %58, %.preheader157.us187.preheader ]
  %.1128181.us189 = phi i64 [ %.4131151.us.us, %..thread152.loopexit_crit_edge.split.us.us ], [ %.0127202, %.preheader157.us187.preheader ]
  br label %.preheader.us.us

.preheader.us.us:                                 ; preds = %.thread.us.us, %.preheader157.us187
  %.0118177.us.us = phi i32 [ %66, %.preheader157.us187 ], [ %158, %.thread.us.us ]
  %.2129176.us.us = phi i64 [ %.1128181.us189, %.preheader157.us187 ], [ %.4131151.us.us, %.thread.us.us ]
  %76 = mul nsw i32 %.0118177.us.us, %70
  %77 = add nsw i32 %76, %.0119182.us188
  %78 = mul nsw i32 %.0118177.us.us, %47
  %79 = add nsw i32 %78, %.0119182.us188
  %80 = mul nsw i32 %.0118177.us.us, %44
  %81 = add nsw i32 %80, %.0119182.us188
  br label %82

82:                                               ; preds = %82, %.preheader.us.us
  %indvars.iv222 = phi i64 [ %indvars.iv.next223, %82 ], [ 0, %.preheader.us.us ]
  %.0116168.us.us = phi i64 [ %155, %82 ], [ 0, %.preheader.us.us ]
  %83 = getelementptr inbounds i8, ptr %1, i64 %indvars.iv222
  %84 = load i8, ptr %83, align 1, !tbaa !5
  %85 = zext i8 %84 to i32
  %86 = tail call noundef zeroext i8 @_ZN6basisu8clamp255Ei(i32 noundef %77)
  %87 = zext i8 %86 to i32
  %88 = sub nsw i32 %85, %87
  %89 = tail call noundef i32 @_ZN6basisu4iabsEi(i32 noundef %88)
  %90 = load i8, ptr %71, align 1, !tbaa !5
  %91 = sext i8 %90 to i32
  %92 = mul nsw i32 %.0118177.us.us, %91
  %93 = add nsw i32 %92, %.0119182.us188
  %94 = tail call noundef zeroext i8 @_ZN6basisu8clamp255Ei(i32 noundef %93)
  %95 = zext i8 %94 to i32
  %96 = sub nsw i32 %85, %95
  %97 = tail call noundef i32 @_ZN6basisu4iabsEi(i32 noundef %96)
  %98 = icmp ult i32 %97, %89
  %spec.select144.us.us.1 = tail call i32 @llvm.umin.i32(i32 %97, i32 %89)
  %99 = load i8, ptr %72, align 2, !tbaa !5
  %100 = sext i8 %99 to i32
  %101 = mul nsw i32 %.0118177.us.us, %100
  %102 = add nsw i32 %101, %.0119182.us188
  %103 = tail call noundef zeroext i8 @_ZN6basisu8clamp255Ei(i32 noundef %102)
  %104 = zext i8 %103 to i32
  %105 = sub nsw i32 %85, %104
  %106 = tail call noundef i32 @_ZN6basisu4iabsEi(i32 noundef %105)
  %107 = icmp ult i32 %106, %spec.select144.us.us.1
  %spec.select144.us.us.2 = tail call i32 @llvm.umin.i32(i32 %106, i32 %spec.select144.us.us.1)
  %108 = zext i1 %98 to i8
  %109 = tail call noundef zeroext i8 @_ZN6basisu8clamp255Ei(i32 noundef %79)
  %110 = zext i8 %109 to i32
  %111 = sub nsw i32 %85, %110
  %112 = tail call noundef i32 @_ZN6basisu4iabsEi(i32 noundef %111)
  %113 = icmp ult i32 %112, %spec.select144.us.us.2
  %spec.select144.us.us.3 = tail call i32 @llvm.umin.i32(i32 %112, i32 %spec.select144.us.us.2)
  %114 = select i1 %107, i8 2, i8 %108
  %115 = load i8, ptr %73, align 4, !tbaa !5
  %116 = sext i8 %115 to i32
  %117 = mul nsw i32 %.0118177.us.us, %116
  %118 = add nsw i32 %117, %.0119182.us188
  %119 = tail call noundef zeroext i8 @_ZN6basisu8clamp255Ei(i32 noundef %118)
  %120 = zext i8 %119 to i32
  %121 = sub nsw i32 %85, %120
  %122 = tail call noundef i32 @_ZN6basisu4iabsEi(i32 noundef %121)
  %123 = icmp ult i32 %122, %spec.select144.us.us.3
  %spec.select144.us.us.4 = tail call i32 @llvm.umin.i32(i32 %122, i32 %spec.select144.us.us.3)
  %124 = select i1 %113, i8 3, i8 %114
  %125 = load i8, ptr %74, align 1, !tbaa !5
  %126 = sext i8 %125 to i32
  %127 = mul nsw i32 %.0118177.us.us, %126
  %128 = add nsw i32 %127, %.0119182.us188
  %129 = tail call noundef zeroext i8 @_ZN6basisu8clamp255Ei(i32 noundef %128)
  %130 = zext i8 %129 to i32
  %131 = sub nsw i32 %85, %130
  %132 = tail call noundef i32 @_ZN6basisu4iabsEi(i32 noundef %131)
  %133 = icmp ult i32 %132, %spec.select144.us.us.4
  %spec.select144.us.us.5 = tail call i32 @llvm.umin.i32(i32 %132, i32 %spec.select144.us.us.4)
  %134 = select i1 %123, i8 4, i8 %124
  %135 = load i8, ptr %75, align 2, !tbaa !5
  %136 = sext i8 %135 to i32
  %137 = mul nsw i32 %.0118177.us.us, %136
  %138 = add nsw i32 %137, %.0119182.us188
  %139 = tail call noundef zeroext i8 @_ZN6basisu8clamp255Ei(i32 noundef %138)
  %140 = zext i8 %139 to i32
  %141 = sub nsw i32 %85, %140
  %142 = tail call noundef i32 @_ZN6basisu4iabsEi(i32 noundef %141)
  %143 = icmp ult i32 %142, %spec.select144.us.us.5
  %spec.select144.us.us.6 = tail call i32 @llvm.umin.i32(i32 %142, i32 %spec.select144.us.us.5)
  %144 = select i1 %133, i8 5, i8 %134
  %145 = tail call noundef zeroext i8 @_ZN6basisu8clamp255Ei(i32 noundef %81)
  %146 = zext i8 %145 to i32
  %147 = sub nsw i32 %85, %146
  %148 = tail call noundef i32 @_ZN6basisu4iabsEi(i32 noundef %147)
  %149 = icmp ult i32 %148, %spec.select144.us.us.6
  %spec.select144.us.us.7 = tail call i32 @llvm.umin.i32(i32 %148, i32 %spec.select144.us.us.6)
  %150 = select i1 %143, i8 6, i8 %144
  %151 = select i1 %149, i8 7, i8 %150
  %152 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZN6basisu6vectorIhEixEm(ptr noundef nonnull align 8 dereferenceable(16) %9, i64 noundef %indvars.iv222)
  store i8 %151, ptr %152, align 1, !tbaa !5
  %153 = mul i32 %spec.select144.us.us.7, %spec.select144.us.us.7
  %154 = zext i32 %153 to i64
  %155 = add i64 %.0116168.us.us, %154
  %.not142.us.us = icmp ult i64 %155, %.2129176.us.us
  %indvars.iv.next223 = add nuw nsw i64 %indvars.iv222, 1
  %156 = icmp ult i64 %indvars.iv.next223, %8
  %or.cond = and i1 %.not142.us.us, %156
  br i1 %or.cond, label %82, label %._crit_edge171.us.us, !llvm.loop !21

._crit_edge171.us.us:                             ; preds = %82
  br i1 %.not142.us.us, label %157, label %.thread.us.us

157:                                              ; preds = %._crit_edge171.us.us
  store i32 %.0119182.us188, ptr %0, align 8, !tbaa !13
  store i32 %.0118177.us.us, ptr %33, align 8, !tbaa !19
  store i32 %36, ptr %34, align 4, !tbaa !18
  tail call void @_ZN6basisu6vectorIhE4swapERS1_(ptr noundef nonnull align 8 dereferenceable(16) %7, ptr noundef nonnull align 8 dereferenceable(16) %9)
  %.not143.not.us.us = icmp eq i64 %155, 0
  br i1 %.not143.not.us.us, label %.loopexit, label %.thread.us.us

.thread.us.us:                                    ; preds = %157, %._crit_edge171.us.us
  %.4131151.us.us = phi i64 [ %155, %157 ], [ %.2129176.us.us, %._crit_edge171.us.us ]
  %158 = add i32 %.0118177.us.us, 1
  %exitcond225.not = icmp eq i32 %.0118177.us.us, %68
  br i1 %exitcond225.not, label %..thread152.loopexit_crit_edge.split.us.us, label %.preheader.us.us, !llvm.loop !22

..thread152.loopexit_crit_edge.split.us.us:       ; preds = %.thread.us.us
  %159 = add nuw nsw i32 %.0119182.us188, 1
  %exitcond226.not = icmp eq i32 %.0119182.us188, %61
  br i1 %exitcond226.not, label %.thread155, label %.preheader157.us187, !llvm.loop !23

.preheader157:                                    ; preds = %.preheader157.preheader, %.thread152
  %.0119182 = phi i32 [ %161, %.thread152 ], [ %58, %.preheader157.preheader ]
  br label %.preheader

.preheader:                                       ; preds = %.preheader157, %.thread
  %.0118177 = phi i32 [ %66, %.preheader157 ], [ %160, %.thread ]
  br i1 %.not208, label %.thread, label %.split

.split:                                           ; preds = %.preheader
  store i32 %.0119182, ptr %0, align 8, !tbaa !13
  store i32 %.0118177, ptr %33, align 8, !tbaa !19
  store i32 %36, ptr %34, align 4, !tbaa !18
  tail call void @_ZN6basisu6vectorIhE4swapERS1_(ptr noundef nonnull align 8 dereferenceable(16) %7, ptr noundef nonnull align 8 dereferenceable(16) %9)
  br label %.loopexit

.thread:                                          ; preds = %.preheader
  %160 = add i32 %.0118177, 1
  %exitcond227.not = icmp eq i32 %.0118177, %68
  br i1 %exitcond227.not, label %.thread152, label %.preheader, !llvm.loop !22

.thread152:                                       ; preds = %.thread
  %161 = add nuw nsw i32 %.0119182, 1
  %exitcond228.not = icmp eq i32 %.0119182, %61
  br i1 %exitcond228.not, label %.thread155, label %.preheader157, !llvm.loop !23

.thread155:                                       ; preds = %..thread152.loopexit_crit_edge.split.us.us, %.thread152, %40, %35
  %.7134 = phi i64 [ %.0127202, %35 ], [ %.0127202, %40 ], [ 0, %.thread152 ], [ %.4131151.us.us, %..thread152.loopexit_crit_edge.split.us.us ]
  %indvars.iv.next230 = add nuw nsw i64 %indvars.iv229, 1
  %exitcond232 = icmp eq i64 %indvars.iv.next230, 16
  br i1 %exitcond232, label %.loopexit, label %35, !llvm.loop !24

.loopexit:                                        ; preds = %.lr.ph205, %.thread155, %157, %.split, %25
  %.9 = phi i64 [ 0, %25 ], [ 0, %.split ], [ 0, %157 ], [ %.7134, %.thread155 ], [ 0, %.lr.ph205 ]
  ret i64 %.9
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef float @_ZN6basisu4lerpIffEET_S1_S1_T0_(float noundef, float noundef, float noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.round.f32(float) #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef zeroext i8 @_ZN6basisu8clamp255Ei(i32 noundef) local_unnamed_addr #0

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.umin.i32(i32, i32) #4

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.umax.i32(i32, i32) #4

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare <4 x i32> @llvm.umin.v4i32(<4 x i32>, <4 x i32>) #4

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare <4 x i32> @llvm.umax.v4i32(<4 x i32>, <4 x i32>) #4

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.vector.reduce.umin.v4i32(<4 x i32>) #4

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.vector.reduce.umax.v4i32(<4 x i32>) #4

attributes #0 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}
!8 = distinct !{!8, !9, !10, !11}
!9 = !{!"llvm.loop.mustprogress"}
!10 = !{!"llvm.loop.isvectorized", i32 1}
!11 = !{!"llvm.loop.unroll.runtime.disable"}
!12 = distinct !{!12, !9, !11, !10}
!13 = !{!14, !15, i64 0}
!14 = !{!"_ZTSN6basisu19pack_eac_a8_resultsE", !15, i64 0, !15, i64 4, !15, i64 8, !16, i64 16, !16, i64 32}
!15 = !{!"int", !6, i64 0}
!16 = !{!"_ZTSN6basisu6vectorIhEE", !17, i64 0, !15, i64 8, !15, i64 12}
!17 = !{!"any pointer", !6, i64 0}
!18 = !{!14, !15, i64 4}
!19 = !{!14, !15, i64 8}
!20 = distinct !{!20, !9}
!21 = distinct !{!21, !9}
!22 = distinct !{!22, !9}
!23 = distinct !{!23, !9}
!24 = distinct !{!24, !9}


; Effective O3 passes: BDCEPass,ConstraintEliminationPass,CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopLoadEliminationPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,LoopVectorizePass,PostOrderFunctionAttrsPass,ReassociatePass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass