; LLVM IR from upupming/algorithm :: acwing/算法竞赛进阶指南/0x02-递推与递归/95. 费解的开关.ll (Z5solvev)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@r = external dso_local global i32, align 4
@c = external dso_local global i32, align 4
@v = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z5relaxRSt6vectorIiSaIiEEii(ptr noundef nonnull align 8 dereferenceable(24), i32 noundef, i32 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z5solvev() #2 personality ptr @__gxx_personality_v0 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca %"class.std::vector", align 8
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i8, align 1
  %10 = alloca i32, align 4
  %11 = alloca ptr, align 8
  %12 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %1) #4
  store i32 2147483647, ptr %1, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #4
  store i32 0, ptr %2, align 4, !tbaa !5
  br label %13

13:                                               ; preds = %124, %0
  %14 = load i32, ptr %2, align 4, !tbaa !5
  %15 = load i32, ptr @r, align 4, !tbaa !5
  %16 = shl i32 1, %15
  %17 = icmp slt i32 %14, %16
  br i1 %17, label %19, label %18

18:                                               ; preds = %13
  store i32 2, ptr %3, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #4
  br label %127

19:                                               ; preds = %13
  call void @llvm.lifetime.start.p0(i64 24, ptr %4) #4
  call void @_ZNSt6vectorIiSaIiEEC2ERKS1_(ptr noundef nonnull align 8 dereferenceable(24) %4, ptr noundef nonnull align 8 dereferenceable(24) @v)
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #4
  store i32 0, ptr %5, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #4
  store i32 0, ptr %6, align 4, !tbaa !5
  br label %20

20:                                               ; preds = %41, %19
  %21 = load i32, ptr %6, align 4, !tbaa !5
  %22 = load i32, ptr @c, align 4, !tbaa !5
  %23 = icmp slt i32 %21, %22
  br i1 %23, label %25, label %24

24:                                               ; preds = %20
  store i32 5, ptr %3, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #4
  br label %44

25:                                               ; preds = %20
  %26 = load i32, ptr %2, align 4, !tbaa !5
  %27 = load i32, ptr %6, align 4, !tbaa !5
  %28 = ashr i32 %26, %27
  %29 = and i32 %28, 1
  %30 = icmp ne i32 %29, 0
  br i1 %30, label %31, label %40

31:                                               ; preds = %25
  %32 = load i32, ptr %6, align 4, !tbaa !5
  %33 = sext i32 %32 to i64
  %34 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %4, i64 noundef %33) #4
  %35 = load i32, ptr %34, align 4, !tbaa !5
  %36 = xor i32 %35, 1
  store i32 %36, ptr %34, align 4, !tbaa !5
  %37 = load i32, ptr %5, align 4, !tbaa !5
  %38 = add nsw i32 %37, 1
  store i32 %38, ptr %5, align 4, !tbaa !5
  %39 = load i32, ptr %6, align 4, !tbaa !5
  call void @_Z5relaxRSt6vectorIiSaIiEEii(ptr noundef nonnull align 8 dereferenceable(24) %4, i32 noundef 0, i32 noundef %39)
  br label %40

40:                                               ; preds = %31, %25
  br label %41

41:                                               ; preds = %40
  %42 = load i32, ptr %6, align 4, !tbaa !5
  %43 = add nsw i32 %42, 1
  store i32 %43, ptr %6, align 4, !tbaa !5
  br label %20, !llvm.loop !9

44:                                               ; preds = %24
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #4
  store i32 1, ptr %7, align 4, !tbaa !5
  br label %45

45:                                               ; preds = %86, %44
  %46 = load i32, ptr %7, align 4, !tbaa !5
  %47 = load i32, ptr @r, align 4, !tbaa !5
  %48 = icmp slt i32 %46, %47
  br i1 %48, label %50, label %49

49:                                               ; preds = %45
  store i32 8, ptr %3, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #4
  br label %89

50:                                               ; preds = %45
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #4
  store i32 0, ptr %8, align 4, !tbaa !5
  br label %51

51:                                               ; preds = %82, %50
  %52 = load i32, ptr %8, align 4, !tbaa !5
  %53 = load i32, ptr @c, align 4, !tbaa !5
  %54 = icmp slt i32 %52, %53
  br i1 %54, label %56, label %55

55:                                               ; preds = %51
  store i32 11, ptr %3, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #4
  br label %85

56:                                               ; preds = %51
  %57 = load i32, ptr %7, align 4, !tbaa !5
  %58 = sub nsw i32 %57, 1
  %59 = load i32, ptr @c, align 4, !tbaa !5
  %60 = mul nsw i32 %58, %59
  %61 = load i32, ptr %8, align 4, !tbaa !5
  %62 = add nsw i32 %60, %61
  %63 = sext i32 %62 to i64
  %64 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %4, i64 noundef %63) #4
  %65 = load i32, ptr %64, align 4, !tbaa !5
  %66 = icmp ne i32 %65, 0
  br i1 %66, label %81, label %67

67:                                               ; preds = %56
  %68 = load i32, ptr %7, align 4, !tbaa !5
  %69 = load i32, ptr @c, align 4, !tbaa !5
  %70 = mul nsw i32 %68, %69
  %71 = load i32, ptr %8, align 4, !tbaa !5
  %72 = add nsw i32 %70, %71
  %73 = sext i32 %72 to i64
  %74 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %4, i64 noundef %73) #4
  %75 = load i32, ptr %74, align 4, !tbaa !5
  %76 = xor i32 %75, 1
  store i32 %76, ptr %74, align 4, !tbaa !5
  %77 = load i32, ptr %5, align 4, !tbaa !5
  %78 = add nsw i32 %77, 1
  store i32 %78, ptr %5, align 4, !tbaa !5
  %79 = load i32, ptr %7, align 4, !tbaa !5
  %80 = load i32, ptr %8, align 4, !tbaa !5
  call void @_Z5relaxRSt6vectorIiSaIiEEii(ptr noundef nonnull align 8 dereferenceable(24) %4, i32 noundef %79, i32 noundef %80)
  br label %81

81:                                               ; preds = %67, %56
  br label %82

82:                                               ; preds = %81
  %83 = load i32, ptr %8, align 4, !tbaa !5
  %84 = add nsw i32 %83, 1
  store i32 %84, ptr %8, align 4, !tbaa !5
  br label %51, !llvm.loop !11

85:                                               ; preds = %55
  br label %86

86:                                               ; preds = %85
  %87 = load i32, ptr %7, align 4, !tbaa !5
  %88 = add nsw i32 %87, 1
  store i32 %88, ptr %7, align 4, !tbaa !5
  br label %45, !llvm.loop !12

89:                                               ; preds = %49
  call void @llvm.lifetime.start.p0(i64 1, ptr %9) #4
  store i8 1, ptr %9, align 1, !tbaa !13
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #4
  store i32 0, ptr %10, align 4, !tbaa !5
  br label %90

90:                                               ; preds = %108, %89
  %91 = load i32, ptr %10, align 4, !tbaa !5
  %92 = load i32, ptr @c, align 4, !tbaa !5
  %93 = icmp slt i32 %91, %92
  br i1 %93, label %95, label %94

94:                                               ; preds = %90
  store i32 14, ptr %3, align 4
  br label %111

95:                                               ; preds = %90
  %96 = load i32, ptr @r, align 4, !tbaa !5
  %97 = sub nsw i32 %96, 1
  %98 = load i32, ptr @c, align 4, !tbaa !5
  %99 = mul nsw i32 %97, %98
  %100 = load i32, ptr %10, align 4, !tbaa !5
  %101 = add nsw i32 %99, %100
  %102 = sext i32 %101 to i64
  %103 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %4, i64 noundef %102) #4
  %104 = load i32, ptr %103, align 4, !tbaa !5
  %105 = icmp ne i32 %104, 0
  br i1 %105, label %107, label %106

106:                                              ; preds = %95
  store i8 0, ptr %9, align 1, !tbaa !13
  store i32 14, ptr %3, align 4
  br label %111

107:                                              ; preds = %95
  br label %108

108:                                              ; preds = %107
  %109 = load i32, ptr %10, align 4, !tbaa !5
  %110 = add nsw i32 %109, 1
  store i32 %110, ptr %10, align 4, !tbaa !5
  br label %90, !llvm.loop !15

111:                                              ; preds = %106, %94
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #4
  br label %112

112:                                              ; preds = %111
  %113 = load i8, ptr %9, align 1, !tbaa !13, !range !16, !noundef !17
  %114 = trunc i8 %113 to i1
  br i1 %114, label %115, label %123

115:                                              ; preds = %112
  %116 = invoke noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %1, ptr noundef nonnull align 4 dereferenceable(4) %5)
          to label %117 unwind label %119

117:                                              ; preds = %115
  %118 = load i32, ptr %116, align 4, !tbaa !5
  store i32 %118, ptr %1, align 4, !tbaa !5
  br label %123

119:                                              ; preds = %115
  %120 = landingpad { ptr, i32 }
          cleanup
  %121 = extractvalue { ptr, i32 } %120, 0
  store ptr %121, ptr %11, align 8
  %122 = extractvalue { ptr, i32 } %120, 1
  store i32 %122, ptr %12, align 4
  call void @llvm.lifetime.end.p0(i64 1, ptr %9) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #4
  call void @_ZNSt6vectorIiSaIiEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %4) #4
  call void @llvm.lifetime.end.p0(i64 24, ptr %4) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %1) #4
  br label %138

123:                                              ; preds = %117, %112
  call void @llvm.lifetime.end.p0(i64 1, ptr %9) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #4
  call void @_ZNSt6vectorIiSaIiEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %4) #4
  call void @llvm.lifetime.end.p0(i64 24, ptr %4) #4
  br label %124

124:                                              ; preds = %123
  %125 = load i32, ptr %2, align 4, !tbaa !5
  %126 = add nsw i32 %125, 1
  store i32 %126, ptr %2, align 4, !tbaa !5
  br label %13, !llvm.loop !18

127:                                              ; preds = %18
  %128 = load i32, ptr %1, align 4, !tbaa !5
  %129 = icmp eq i32 %128, 2147483647
  br i1 %129, label %133, label %130

130:                                              ; preds = %127
  %131 = load i32, ptr %1, align 4, !tbaa !5
  %132 = icmp sgt i32 %131, 6
  br i1 %132, label %133, label %134

133:                                              ; preds = %130, %127
  br label %136

134:                                              ; preds = %130
  %135 = load i32, ptr %1, align 4, !tbaa !5
  br label %136

136:                                              ; preds = %134, %133
  %137 = phi i32 [ -1, %133 ], [ %135, %134 ]
  store i32 1, ptr %3, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %1) #4
  ret i32 %137

138:                                              ; preds = %119
  %139 = load ptr, ptr %11, align 8
  %140 = load i32, ptr %12, align 4
  %141 = insertvalue { ptr, i32 } poison, ptr %139, 0
  %142 = insertvalue { ptr, i32 } %141, i32 %140, 1
  resume { ptr, i32 } %142
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEEC2ERKS1_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #2 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #3

declare i32 @__gxx_personality_v0(...)

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}
!13 = !{!14, !14, i64 0}
!14 = !{!"bool", !7, i64 0}
!15 = distinct !{!15, !10}
!16 = !{i8 0, i8 2}
!17 = !{}
!18 = distinct !{!18, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@r = external dso_local local_unnamed_addr global i32, align 4
@c = external dso_local local_unnamed_addr global i32, align 4
@v = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z5relaxRSt6vectorIiSaIiEEii(ptr noundef nonnull align 8 dereferenceable(24), i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z5solvev() local_unnamed_addr #2 personality ptr @__gxx_personality_v0 {
  %1 = alloca i32, align 4
  %2 = alloca %"class.std::vector", align 8
  %3 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %1) #4
  store i32 2147483647, ptr %1, align 4, !tbaa !5
  %4 = load i32, ptr @r, align 4, !tbaa !5
  %.not46 = icmp eq i32 %4, 31
  br i1 %.not46, label %._crit_edge45.thread, label %.lr.ph44

._crit_edge45:                                    ; preds = %.loopexit
  %.pre50 = load i32, ptr %1, align 4
  %.pre50.fr = freeze i32 %.pre50
  %5 = icmp sgt i32 %.pre50.fr, 6
  br i1 %5, label %._crit_edge45.thread, label %6

._crit_edge45.thread:                             ; preds = %0, %._crit_edge45
  br label %6

6:                                                ; preds = %._crit_edge45, %._crit_edge45.thread
  %7 = phi i32 [ -1, %._crit_edge45.thread ], [ %.pre50.fr, %._crit_edge45 ]
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1) #4
  ret i32 %7

.lr.ph44:                                         ; preds = %0, %.loopexit
  %.02742 = phi i32 [ %71, %.loopexit ], [ 0, %0 ]
  call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %2) #4
  call void @_ZNSt6vectorIiSaIiEEC2ERKS1_(ptr noundef nonnull align 8 dereferenceable(24) %2, ptr noundef nonnull align 8 dereferenceable(24) @v)
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #4
  store i32 0, ptr %3, align 4, !tbaa !5
  %8 = load i32, ptr @c, align 4, !tbaa !5
  %9 = icmp sgt i32 %8, 0
  br i1 %9, label %.lr.ph, label %.preheader34

.preheader34:                                     ; preds = %24, %.lr.ph44
  %10 = phi i32 [ %8, %.lr.ph44 ], [ %25, %24 ]
  %11 = load i32, ptr @r, align 4, !tbaa !5
  %12 = icmp sgt i32 %11, 1
  br i1 %12, label %.preheader.lr.ph, label %.preheader33

.preheader.lr.ph:                                 ; preds = %.preheader34
  %13 = icmp sgt i32 %10, 0
  br i1 %13, label %.preheader, label %.critedge

.lr.ph:                                           ; preds = %.lr.ph44, %24
  %14 = phi i32 [ %25, %24 ], [ %8, %.lr.ph44 ]
  %indvars.iv = phi i64 [ %indvars.iv.next, %24 ], [ 0, %.lr.ph44 ]
  %15 = trunc nuw nsw i64 %indvars.iv to i32
  %16 = shl nuw i32 1, %15
  %17 = and i32 %16, %.02742
  %.not32 = icmp eq i32 %17, 0
  br i1 %.not32, label %24, label %18

18:                                               ; preds = %.lr.ph
  %19 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %indvars.iv) #4
  %20 = load i32, ptr %19, align 4, !tbaa !5
  %21 = xor i32 %20, 1
  store i32 %21, ptr %19, align 4, !tbaa !5
  %22 = load i32, ptr %3, align 4, !tbaa !5
  %23 = add nsw i32 %22, 1
  store i32 %23, ptr %3, align 4, !tbaa !5
  call void @_Z5relaxRSt6vectorIiSaIiEEii(ptr noundef nonnull align 8 dereferenceable(24) %2, i32 noundef 0, i32 noundef %15)
  %.pre = load i32, ptr @c, align 4, !tbaa !5
  br label %24

24:                                               ; preds = %.lr.ph, %18
  %25 = phi i32 [ %14, %.lr.ph ], [ %.pre, %18 ]
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %26 = sext i32 %25 to i64
  %27 = icmp slt i64 %indvars.iv.next, %26
  br i1 %27, label %.lr.ph, label %.preheader34, !llvm.loop !9

.preheader33:                                     ; preds = %._crit_edge, %.preheader34
  %28 = phi i32 [ %10, %.preheader34 ], [ %34, %._crit_edge ]
  %.not3039 = icmp sgt i32 %28, 0
  br i1 %.not3039, label %.lr.ph41, label %.critedge

.preheader:                                       ; preds = %.preheader.lr.ph, %._crit_edge
  %29 = phi i32 [ %33, %._crit_edge ], [ %11, %.preheader.lr.ph ]
  %30 = phi i32 [ %34, %._crit_edge ], [ %10, %.preheader.lr.ph ]
  %.02538 = phi i32 [ %35, %._crit_edge ], [ 1, %.preheader.lr.ph ]
  %31 = icmp sgt i32 %30, 0
  br i1 %31, label %.lr.ph37, label %._crit_edge

.lr.ph37:                                         ; preds = %.preheader
  %32 = add nsw i32 %.02538, -1
  br label %37

._crit_edge.loopexit:                             ; preds = %54
  %.pre49 = load i32, ptr @r, align 4, !tbaa !5
  br label %._crit_edge

._crit_edge:                                      ; preds = %._crit_edge.loopexit, %.preheader
  %33 = phi i32 [ %.pre49, %._crit_edge.loopexit ], [ %29, %.preheader ]
  %34 = phi i32 [ %56, %._crit_edge.loopexit ], [ %30, %.preheader ]
  %35 = add nuw nsw i32 %.02538, 1
  %36 = icmp slt i32 %35, %33
  br i1 %36, label %.preheader, label %.preheader33, !llvm.loop !11

37:                                               ; preds = %.lr.ph37, %54
  %38 = phi i32 [ %30, %.lr.ph37 ], [ %56, %54 ]
  %.02436 = phi i32 [ 0, %.lr.ph37 ], [ %55, %54 ]
  %39 = mul nsw i32 %38, %32
  %40 = add nsw i32 %39, %.02436
  %41 = sext i32 %40 to i64
  %42 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %41) #4
  %43 = load i32, ptr %42, align 4, !tbaa !5
  %.not31 = icmp eq i32 %43, 0
  br i1 %.not31, label %44, label %54

44:                                               ; preds = %37
  %45 = load i32, ptr @c, align 4, !tbaa !5
  %46 = mul nsw i32 %45, %.02538
  %47 = add nsw i32 %46, %.02436
  %48 = sext i32 %47 to i64
  %49 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %48) #4
  %50 = load i32, ptr %49, align 4, !tbaa !5
  %51 = xor i32 %50, 1
  store i32 %51, ptr %49, align 4, !tbaa !5
  %52 = load i32, ptr %3, align 4, !tbaa !5
  %53 = add nsw i32 %52, 1
  store i32 %53, ptr %3, align 4, !tbaa !5
  call void @_Z5relaxRSt6vectorIiSaIiEEii(ptr noundef nonnull align 8 dereferenceable(24) %2, i32 noundef %.02538, i32 noundef %.02436)
  br label %54

54:                                               ; preds = %37, %44
  %55 = add nuw nsw i32 %.02436, 1
  %56 = load i32, ptr @c, align 4, !tbaa !5
  %57 = icmp slt i32 %55, %56
  br i1 %57, label %37, label %._crit_edge.loopexit, !llvm.loop !13

58:                                               ; preds = %.lr.ph41
  %59 = add nuw nsw i32 %.040, 1
  %60 = load i32, ptr @c, align 4, !tbaa !5
  %.not30 = icmp slt i32 %59, %60
  br i1 %.not30, label %.lr.ph41, label %.critedge, !llvm.loop !14

.lr.ph41:                                         ; preds = %.preheader33, %58
  %61 = phi i32 [ %60, %58 ], [ %28, %.preheader33 ]
  %.040 = phi i32 [ %59, %58 ], [ 0, %.preheader33 ]
  %62 = load i32, ptr @r, align 4, !tbaa !5
  %63 = add nsw i32 %62, -1
  %64 = mul nsw i32 %63, %61
  %65 = add nsw i32 %64, %.040
  %66 = sext i32 %65 to i64
  %67 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %66) #4
  %68 = load i32, ptr %67, align 4, !tbaa !5
  %.not = icmp eq i32 %68, 0
  br i1 %.not, label %.loopexit, label %58

.critedge:                                        ; preds = %58, %.preheader.lr.ph, %.preheader33
  %69 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %1, ptr noundef nonnull align 4 dereferenceable(4) %3)
  %70 = load i32, ptr %69, align 4, !tbaa !5
  store i32 %70, ptr %1, align 4, !tbaa !5
  br label %.loopexit

.loopexit:                                        ; preds = %.lr.ph41, %.critedge
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #4
  call void @_ZNSt6vectorIiSaIiEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %2) #4
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %2) #4
  %71 = add nuw nsw i32 %.02742, 1
  %72 = load i32, ptr @r, align 4, !tbaa !5
  %73 = shl nuw i32 1, %72
  %74 = icmp slt i32 %71, %73
  br i1 %74, label %.lr.ph44, label %._crit_edge45, !llvm.loop !15
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEEC2ERKS1_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #2 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #3

declare i32 @__gxx_personality_v0(...)

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10, !12}
!12 = !{!"llvm.loop.unswitch.partial.disable"}
!13 = distinct !{!13, !10}
!14 = distinct !{!14, !10}
!15 = distinct !{!15, !10}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimpleLoopUnswitchPass,SimplifyCFGPass