; LLVM IR from upupming/algorithm :: acwing/寒假每日一题（入门组）/week5/703. 数独检查.ll (Z5solvev)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::basic_istream" = type { ptr, i64, %"class.std::basic_ios" }
%"class.std::basic_ios" = type { %"class.std::ios_base", ptr, i8, i8, ptr, ptr, ptr, ptr }
%"class.std::ios_base" = type { ptr, i64, i64, i32, i32, i32, ptr, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, ptr, %"class.std::locale" }
%"struct.std::ios_base::_Words" = type { ptr, i64 }
%"class.std::locale" = type { ptr }

@n = external dso_local global i32, align 4
@m = external dso_local global i32, align 4
@a = external dso_local global i32, align 4
@row = external dso_local global [36 x i64], align 16
@col = external dso_local global [36 x i64], align 16
@cell = external dso_local global [36 x i64], align 16
@_ZSt3cin = external global %"class.std::basic_istream", align 8

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_Z5solvev() #0 {
  %1 = alloca i1, align 1
  %2 = alloca i8, align 1
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  call void @llvm.memset.p0.i64(ptr align 16 @row, i8 0, i64 288, i1 false)
  call void @llvm.memset.p0.i64(ptr align 16 @col, i8 0, i64 288, i1 false)
  call void @llvm.memset.p0.i64(ptr align 16 @cell, i8 0, i64 288, i1 false)
  %8 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 4 dereferenceable(4) @n)
  %9 = load i32, ptr @n, align 4, !tbaa !5
  %10 = load i32, ptr @n, align 4, !tbaa !5
  %11 = mul nsw i32 %9, %10
  store i32 %11, ptr @m, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 1, ptr %2) #4
  store i8 1, ptr %2, align 1, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #4
  store i32 0, ptr %3, align 4, !tbaa !5
  br label %12

12:                                               ; preds = %83, %0
  %13 = load i32, ptr %3, align 4, !tbaa !5
  %14 = load i32, ptr @m, align 4, !tbaa !5
  %15 = icmp slt i32 %13, %14
  br i1 %15, label %17, label %16

16:                                               ; preds = %12
  store i32 2, ptr %4, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #4
  br label %86

17:                                               ; preds = %12
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #4
  store i32 0, ptr %5, align 4, !tbaa !5
  br label %18

18:                                               ; preds = %68, %17
  %19 = load i32, ptr %5, align 4, !tbaa !5
  %20 = load i32, ptr @m, align 4, !tbaa !5
  %21 = icmp slt i32 %19, %20
  br i1 %21, label %23, label %22

22:                                               ; preds = %18
  store i32 5, ptr %4, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #4
  br label %71

23:                                               ; preds = %18
  %24 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 4 dereferenceable(4) @a)
  %25 = load i32, ptr @a, align 4, !tbaa !5
  %26 = icmp slt i32 %25, 1
  br i1 %26, label %31, label %27

27:                                               ; preds = %23
  %28 = load i32, ptr @a, align 4, !tbaa !5
  %29 = load i32, ptr @m, align 4, !tbaa !5
  %30 = icmp sgt i32 %28, %29
  br i1 %30, label %31, label %32

31:                                               ; preds = %27, %23
  store i8 0, ptr %2, align 1, !tbaa !9
  br label %32

32:                                               ; preds = %31, %27
  %33 = load i32, ptr @a, align 4, !tbaa !5
  %34 = sub nsw i32 %33, 1
  %35 = zext i32 %34 to i64
  %36 = shl i64 1, %35
  %37 = load i32, ptr %3, align 4, !tbaa !5
  %38 = sext i32 %37 to i64
  %39 = getelementptr inbounds [36 x i64], ptr @row, i64 0, i64 %38
  %40 = load i64, ptr %39, align 8, !tbaa !11
  %41 = or i64 %40, %36
  store i64 %41, ptr %39, align 8, !tbaa !11
  %42 = load i32, ptr @a, align 4, !tbaa !5
  %43 = sub nsw i32 %42, 1
  %44 = zext i32 %43 to i64
  %45 = shl i64 1, %44
  %46 = load i32, ptr %5, align 4, !tbaa !5
  %47 = sext i32 %46 to i64
  %48 = getelementptr inbounds [36 x i64], ptr @col, i64 0, i64 %47
  %49 = load i64, ptr %48, align 8, !tbaa !11
  %50 = or i64 %49, %45
  store i64 %50, ptr %48, align 8, !tbaa !11
  %51 = load i32, ptr @a, align 4, !tbaa !5
  %52 = sub nsw i32 %51, 1
  %53 = zext i32 %52 to i64
  %54 = shl i64 1, %53
  %55 = load i32, ptr %3, align 4, !tbaa !5
  %56 = load i32, ptr @n, align 4, !tbaa !5
  %57 = sdiv i32 %55, %56
  %58 = load i32, ptr @n, align 4, !tbaa !5
  %59 = mul nsw i32 %57, %58
  %60 = load i32, ptr %5, align 4, !tbaa !5
  %61 = load i32, ptr @n, align 4, !tbaa !5
  %62 = sdiv i32 %60, %61
  %63 = add nsw i32 %59, %62
  %64 = sext i32 %63 to i64
  %65 = getelementptr inbounds [36 x i64], ptr @cell, i64 0, i64 %64
  %66 = load i64, ptr %65, align 8, !tbaa !11
  %67 = or i64 %66, %54
  store i64 %67, ptr %65, align 8, !tbaa !11
  br label %68

68:                                               ; preds = %32
  %69 = load i32, ptr %5, align 4, !tbaa !5
  %70 = add nsw i32 %69, 1
  store i32 %70, ptr %5, align 4, !tbaa !5
  br label %18, !llvm.loop !13

71:                                               ; preds = %22
  %72 = load i32, ptr %3, align 4, !tbaa !5
  %73 = sext i32 %72 to i64
  %74 = getelementptr inbounds [36 x i64], ptr @row, i64 0, i64 %73
  %75 = load i64, ptr %74, align 8, !tbaa !11
  %76 = load i32, ptr @m, align 4, !tbaa !5
  %77 = zext i32 %76 to i64
  %78 = shl i64 1, %77
  %79 = sub nsw i64 %78, 1
  %80 = icmp ne i64 %75, %79
  br i1 %80, label %81, label %82

81:                                               ; preds = %71
  store i8 0, ptr %2, align 1, !tbaa !9
  br label %82

82:                                               ; preds = %81, %71
  br label %83

83:                                               ; preds = %82
  %84 = load i32, ptr %3, align 4, !tbaa !5
  %85 = add nsw i32 %84, 1
  store i32 %85, ptr %3, align 4, !tbaa !5
  br label %12, !llvm.loop !15

86:                                               ; preds = %16
  %87 = load i8, ptr %2, align 1, !tbaa !9, !range !16, !noundef !17
  %88 = trunc i8 %87 to i1
  br i1 %88, label %90, label %89

89:                                               ; preds = %86
  store i1 false, ptr %1, align 1
  store i32 1, ptr %4, align 4
  br label %137

90:                                               ; preds = %86
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #4
  store i32 0, ptr %6, align 4, !tbaa !5
  br label %91

91:                                               ; preds = %108, %90
  %92 = load i32, ptr %6, align 4, !tbaa !5
  %93 = load i32, ptr @m, align 4, !tbaa !5
  %94 = icmp slt i32 %92, %93
  br i1 %94, label %96, label %95

95:                                               ; preds = %91
  store i32 8, ptr %4, align 4
  br label %111

96:                                               ; preds = %91
  %97 = load i32, ptr %6, align 4, !tbaa !5
  %98 = sext i32 %97 to i64
  %99 = getelementptr inbounds [36 x i64], ptr @col, i64 0, i64 %98
  %100 = load i64, ptr %99, align 8, !tbaa !11
  %101 = load i32, ptr @m, align 4, !tbaa !5
  %102 = zext i32 %101 to i64
  %103 = shl i64 1, %102
  %104 = sub nsw i64 %103, 1
  %105 = icmp ne i64 %100, %104
  br i1 %105, label %106, label %107

106:                                              ; preds = %96
  store i1 false, ptr %1, align 1
  store i32 1, ptr %4, align 4
  br label %111

107:                                              ; preds = %96
  br label %108

108:                                              ; preds = %107
  %109 = load i32, ptr %6, align 4, !tbaa !5
  %110 = add nsw i32 %109, 1
  store i32 %110, ptr %6, align 4, !tbaa !5
  br label %91, !llvm.loop !18

111:                                              ; preds = %106, %95
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #4
  %112 = load i32, ptr %4, align 4
  switch i32 %112, label %137 [
    i32 8, label %113
  ]

113:                                              ; preds = %111
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #4
  store i32 0, ptr %7, align 4, !tbaa !5
  br label %114

114:                                              ; preds = %131, %113
  %115 = load i32, ptr %7, align 4, !tbaa !5
  %116 = load i32, ptr @m, align 4, !tbaa !5
  %117 = icmp slt i32 %115, %116
  br i1 %117, label %119, label %118

118:                                              ; preds = %114
  store i32 11, ptr %4, align 4
  br label %134

119:                                              ; preds = %114
  %120 = load i32, ptr %7, align 4, !tbaa !5
  %121 = sext i32 %120 to i64
  %122 = getelementptr inbounds [36 x i64], ptr @cell, i64 0, i64 %121
  %123 = load i64, ptr %122, align 8, !tbaa !11
  %124 = load i32, ptr @m, align 4, !tbaa !5
  %125 = zext i32 %124 to i64
  %126 = shl i64 1, %125
  %127 = sub nsw i64 %126, 1
  %128 = icmp ne i64 %123, %127
  br i1 %128, label %129, label %130

129:                                              ; preds = %119
  store i1 false, ptr %1, align 1
  store i32 1, ptr %4, align 4
  br label %134

130:                                              ; preds = %119
  br label %131

131:                                              ; preds = %130
  %132 = load i32, ptr %7, align 4, !tbaa !5
  %133 = add nsw i32 %132, 1
  store i32 %133, ptr %7, align 4, !tbaa !5
  br label %114, !llvm.loop !19

134:                                              ; preds = %129, %118
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #4
  %135 = load i32, ptr %4, align 4
  switch i32 %135, label %137 [
    i32 11, label %136
  ]

136:                                              ; preds = %134
  store i1 true, ptr %1, align 1
  store i32 1, ptr %4, align 4
  br label %137

137:                                              ; preds = %136, %134, %111, %89
  call void @llvm.lifetime.end.p0(i64 1, ptr %2) #4
  %138 = load i1, ptr %1, align 1
  ret i1 %138
}

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #1

declare noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 4 dereferenceable(4)) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #3

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"bool", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long long", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = distinct !{!15, !14}
!16 = !{i8 0, i8 2}
!17 = !{}
!18 = distinct !{!18, !14}
!19 = distinct !{!19, !14}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::basic_istream" = type { ptr, i64, %"class.std::basic_ios" }
%"class.std::basic_ios" = type { %"class.std::ios_base", ptr, i8, i8, ptr, ptr, ptr, ptr }
%"class.std::ios_base" = type { ptr, i64, i64, i32, i32, i32, ptr, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, ptr, %"class.std::locale" }
%"struct.std::ios_base::_Words" = type { ptr, i64 }
%"class.std::locale" = type { ptr }

@n = external dso_local global i32, align 4
@m = external dso_local local_unnamed_addr global i32, align 4
@a = external dso_local global i32, align 4
@row = external dso_local local_unnamed_addr global [36 x i64], align 16
@col = external dso_local local_unnamed_addr global [36 x i64], align 16
@cell = external dso_local local_unnamed_addr global [36 x i64], align 16
@_ZSt3cin = external global %"class.std::basic_istream", align 8

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_Z5solvev() local_unnamed_addr #0 {
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 16 dereferenceable(288) @row, i8 0, i64 288, i1 false)
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 16 dereferenceable(288) @col, i8 0, i64 288, i1 false)
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 16 dereferenceable(288) @cell, i8 0, i64 288, i1 false)
  %1 = tail call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 4 dereferenceable(4) @n)
  %2 = load i32, ptr @n, align 4, !tbaa !5
  %3 = mul nsw i32 %2, %2
  store i32 %3, ptr @m, align 4, !tbaa !5
  %.not60 = icmp eq i32 %2, 0
  br i1 %.not60, label %.loopexit, label %.preheader41

.preheader41:                                     ; preds = %0, %._crit_edge
  %4 = phi i32 [ %9, %._crit_edge ], [ %3, %0 ]
  %indvars.iv69 = phi i64 [ %indvars.iv.next70, %._crit_edge ], [ 0, %0 ]
  %.02346 = phi i1 [ %spec.select, %._crit_edge ], [ true, %0 ]
  %5 = icmp sgt i32 %4, 0
  %6 = getelementptr inbounds [36 x i64], ptr @row, i64 0, i64 %indvars.iv69
  br i1 %5, label %.lr.ph, label %.preheader41.._crit_edge_crit_edge

.preheader41.._crit_edge_crit_edge:               ; preds = %.preheader41
  %.pre = load i64, ptr %6, align 8, !tbaa !9
  %.pre81 = sext i32 %4 to i64
  br label %._crit_edge

.lr.ph:                                           ; preds = %.preheader41
  %7 = trunc nuw nsw i64 %indvars.iv69 to i32
  br label %14

._crit_edge48:                                    ; preds = %._crit_edge
  br i1 %spec.select, label %.preheader, label %.loopexit

.preheader:                                       ; preds = %._crit_edge48
  %.not3252 = icmp sgt i32 %9, 0
  br i1 %.not3252, label %.lr.ph54, label %.loopexit

.lr.ph54:                                         ; preds = %.preheader
  %8 = zext nneg i32 %9 to i64
  %notmask = shl nsw i64 -1, %8
  br label %43

._crit_edge:                                      ; preds = %14, %.preheader41.._crit_edge_crit_edge
  %.pre-phi = phi i64 [ %.pre81, %.preheader41.._crit_edge_crit_edge ], [ %38, %14 ]
  %9 = phi i32 [ %4, %.preheader41.._crit_edge_crit_edge ], [ %18, %14 ]
  %10 = phi i64 [ %.pre, %.preheader41.._crit_edge_crit_edge ], [ %24, %14 ]
  %.124.lcssa = phi i1 [ %.02346, %.preheader41.._crit_edge_crit_edge ], [ %.2, %14 ]
  %11 = zext nneg i32 %9 to i64
  %notmask36 = shl nsw i64 -1, %11
  %12 = xor i64 %10, %notmask36
  %.not37 = icmp eq i64 %12, -1
  %spec.select = select i1 %.not37, i1 %.124.lcssa, i1 false
  %indvars.iv.next70 = add nuw nsw i64 %indvars.iv69, 1
  %13 = icmp slt i64 %indvars.iv.next70, %.pre-phi
  br i1 %13, label %.preheader41, label %._crit_edge48, !llvm.loop !11

14:                                               ; preds = %.lr.ph, %14
  %indvars.iv67 = phi i64 [ 0, %.lr.ph ], [ %indvars.iv.next68, %14 ]
  %.12443 = phi i1 [ %.02346, %.lr.ph ], [ %.2, %14 ]
  %15 = tail call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 4 dereferenceable(4) @a)
  %16 = load i32, ptr @a, align 4, !tbaa !5
  %17 = icmp sgt i32 %16, 0
  %18 = load i32, ptr @m, align 4
  %19 = icmp sle i32 %16, %18
  %or.cond.not = and i1 %17, %19
  %.2 = select i1 %or.cond.not, i1 %.12443, i1 false
  %20 = add nsw i32 %16, -1
  %21 = zext nneg i32 %20 to i64
  %22 = shl nuw i64 1, %21
  %23 = load i64, ptr %6, align 8, !tbaa !9
  %24 = or i64 %22, %23
  store i64 %24, ptr %6, align 8, !tbaa !9
  %25 = getelementptr inbounds [36 x i64], ptr @col, i64 0, i64 %indvars.iv67
  %26 = load i64, ptr %25, align 8, !tbaa !9
  %27 = or i64 %26, %22
  store i64 %27, ptr %25, align 8, !tbaa !9
  %28 = load i32, ptr @n, align 4, !tbaa !5
  %29 = srem i32 %7, %28
  %30 = sub i32 %7, %29
  %31 = trunc nuw nsw i64 %indvars.iv67 to i32
  %32 = sdiv i32 %31, %28
  %33 = add nsw i32 %30, %32
  %34 = sext i32 %33 to i64
  %35 = getelementptr inbounds [36 x i64], ptr @cell, i64 0, i64 %34
  %36 = load i64, ptr %35, align 8, !tbaa !9
  %37 = or i64 %36, %22
  store i64 %37, ptr %35, align 8, !tbaa !9
  %indvars.iv.next68 = add nuw nsw i64 %indvars.iv67, 1
  %38 = sext i32 %18 to i64
  %39 = icmp slt i64 %indvars.iv.next68, %38
  br i1 %39, label %14, label %._crit_edge, !llvm.loop !14

40:                                               ; preds = %43
  %indvars.iv.next72 = add nuw nsw i64 %indvars.iv71, 1
  %exitcond75.not = icmp eq i64 %indvars.iv.next72, %8
  br i1 %exitcond75.not, label %.lr.ph57, label %43, !llvm.loop !15

.lr.ph57:                                         ; preds = %40
  %41 = zext nneg i32 %9 to i64
  %notmask33 = shl nsw i64 -1, %41
  %42 = zext nneg i32 %9 to i64
  br label %47

43:                                               ; preds = %.lr.ph54, %40
  %indvars.iv71 = phi i64 [ 0, %.lr.ph54 ], [ %indvars.iv.next72, %40 ]
  %44 = getelementptr inbounds [36 x i64], ptr @col, i64 0, i64 %indvars.iv71
  %45 = load i64, ptr %44, align 8, !tbaa !9
  %46 = xor i64 %45, %notmask
  %.not = icmp eq i64 %46, -1
  br i1 %.not, label %40, label %.loopexit

.critedge:                                        ; preds = %47
  %indvars.iv.next77 = add nuw nsw i64 %indvars.iv76, 1
  %exitcond80 = icmp eq i64 %indvars.iv.next77, %41
  br i1 %exitcond80, label %.loopexit.loopexit.split.loop.exit, label %47, !llvm.loop !16

47:                                               ; preds = %.lr.ph57, %.critedge
  %indvars.iv76 = phi i64 [ 0, %.lr.ph57 ], [ %indvars.iv.next77, %.critedge ]
  %48 = getelementptr inbounds [36 x i64], ptr @cell, i64 0, i64 %indvars.iv76
  %49 = load i64, ptr %48, align 8, !tbaa !9
  %50 = xor i64 %49, %notmask33
  %.not34 = icmp eq i64 %50, -1
  br i1 %.not34, label %.critedge, label %.loopexit

.loopexit.loopexit.split.loop.exit:               ; preds = %.critedge
  %.not35.le = icmp uge i64 %indvars.iv.next77, %42
  br label %.loopexit

.loopexit:                                        ; preds = %43, %47, %.loopexit.loopexit.split.loop.exit, %0, %.preheader, %._crit_edge48
  %.227 = phi i1 [ false, %._crit_edge48 ], [ true, %.preheader ], [ true, %0 ], [ %.not35.le, %.loopexit.loopexit.split.loop.exit ], [ false, %47 ], [ false, %43 ]
  ret i1 %.227
}

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #1

declare noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long long", !7, i64 0}
!11 = distinct !{!11, !12, !13}
!12 = !{!"llvm.loop.mustprogress"}
!13 = !{!"llvm.loop.unswitch.partial.disable"}
!14 = distinct !{!14, !12}
!15 = distinct !{!15, !12}
!16 = distinct !{!16, !12}


; Effective O3 passes: AggressiveInstCombinePass,BDCEPass,ConstraintEliminationPass,CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SCCPPass,SROAPass,SimpleLoopUnswitchPass,SimplifyCFGPass,TailCallElimPass