; LLVM IR from AF-GRILL/DISPluginForUnreal :: Source/ThirdParty/include/dis6/ShaftRPMs.ll (ZNK3DIS9ShaftRPMseqERKS0_)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.DIS::ShaftRPMs" = type { ptr, i16, i16, float }

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i1 @_ZNK3DIS9ShaftRPMseqERKS0_(ptr noundef nonnull align 8 dereferenceable(16) %0, ptr noundef nonnull align 8 dereferenceable(16) %1) #0 align 2 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca i8, align 1
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  %6 = load ptr, ptr %3, align 8
  call void @llvm.lifetime.start.p0(i64 1, ptr %5) #2
  store i8 1, ptr %5, align 1, !tbaa !9
  %7 = getelementptr inbounds %"class.DIS::ShaftRPMs", ptr %6, i32 0, i32 1
  %8 = load i16, ptr %7, align 8, !tbaa !11
  %9 = sext i16 %8 to i32
  %10 = load ptr, ptr %4, align 8, !tbaa !5
  %11 = getelementptr inbounds %"class.DIS::ShaftRPMs", ptr %10, i32 0, i32 1
  %12 = load i16, ptr %11, align 8, !tbaa !11
  %13 = sext i16 %12 to i32
  %14 = icmp eq i32 %9, %13
  br i1 %14, label %16, label %15

15:                                               ; preds = %2
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %16

16:                                               ; preds = %15, %2
  %17 = getelementptr inbounds %"class.DIS::ShaftRPMs", ptr %6, i32 0, i32 2
  %18 = load i16, ptr %17, align 2, !tbaa !15
  %19 = sext i16 %18 to i32
  %20 = load ptr, ptr %4, align 8, !tbaa !5
  %21 = getelementptr inbounds %"class.DIS::ShaftRPMs", ptr %20, i32 0, i32 2
  %22 = load i16, ptr %21, align 2, !tbaa !15
  %23 = sext i16 %22 to i32
  %24 = icmp eq i32 %19, %23
  br i1 %24, label %26, label %25

25:                                               ; preds = %16
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %26

26:                                               ; preds = %25, %16
  %27 = getelementptr inbounds %"class.DIS::ShaftRPMs", ptr %6, i32 0, i32 3
  %28 = load float, ptr %27, align 4, !tbaa !16
  %29 = load ptr, ptr %4, align 8, !tbaa !5
  %30 = getelementptr inbounds %"class.DIS::ShaftRPMs", ptr %29, i32 0, i32 3
  %31 = load float, ptr %30, align 4, !tbaa !16
  %32 = fcmp oeq float %28, %31
  br i1 %32, label %34, label %33

33:                                               ; preds = %26
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %34

34:                                               ; preds = %33, %26
  %35 = load i8, ptr %5, align 1, !tbaa !9, !range !17, !noundef !18
  %36 = trunc i8 %35 to i1
  call void @llvm.lifetime.end.p0(i64 1, ptr %5) #2
  ret i1 %36
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"bool", !7, i64 0}
!11 = !{!12, !13, i64 8}
!12 = !{!"_ZTSN3DIS9ShaftRPMsE", !13, i64 8, !13, i64 10, !14, i64 12}
!13 = !{!"short", !7, i64 0}
!14 = !{!"float", !7, i64 0}
!15 = !{!12, !13, i64 10}
!16 = !{!12, !14, i64 12}
!17 = !{i8 0, i8 2}
!18 = !{}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable
define dso_local noundef zeroext i1 @_ZNK3DIS9ShaftRPMseqERKS0_(ptr nocapture noundef nonnull readonly align 8 dereferenceable(16) %0, ptr nocapture noundef nonnull readonly align 8 dereferenceable(16) %1) local_unnamed_addr #0 align 2 {
  %3 = getelementptr inbounds i8, ptr %0, i64 8
  %4 = getelementptr inbounds i8, ptr %1, i64 8
  %5 = load <2 x i16>, ptr %3, align 8, !tbaa !5
  %6 = load <2 x i16>, ptr %4, align 8, !tbaa !5
  %7 = icmp eq <2 x i16> %5, %6
  %8 = extractelement <2 x i1> %7, i64 0
  %9 = extractelement <2 x i1> %7, i64 1
  %.1 = select i1 %9, i1 %8, i1 false
  %10 = getelementptr inbounds i8, ptr %0, i64 12
  %11 = load float, ptr %10, align 4, !tbaa !9
  %12 = getelementptr inbounds i8, ptr %1, i64 12
  %13 = load float, ptr %12, align 4, !tbaa !9
  %14 = fcmp oeq float %11, %13
  br i1 %14, label %16, label %15

15:                                               ; preds = %2
  br label %16

16:                                               ; preds = %15, %2
  %.2 = phi i1 [ %.1, %2 ], [ false, %15 ]
  ret i1 %.2
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"short", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !11, i64 12}
!10 = !{!"_ZTSN3DIS9ShaftRPMsE", !6, i64 8, !6, i64 10, !11, i64 12}
!11 = !{!"float", !7, i64 0}


; Effective O3 passes: GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SLPVectorizerPass,SROAPass,SimplifyCFGPass