; LLVM IR from huawei-noah/bolt :: compute/tensor/src/cpu (eltwise)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.PowerParamSpec = type { float, float, float }
%struct.EltwiseParamSpec = type { i32, %struct.EltwiseSumSpec, i32, %union.ActivationSpec }
%struct.EltwiseSumSpec = type { [8 x float], i32 }
%union.ActivationSpec = type { %struct.ClipParamSpec }
%struct.ClipParamSpec = type { float, float }
%struct.TensorDesc = type { i32, i32, i32, [20 x i32] }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<TensorDesc, std::allocator<TensorDesc>>::_Vector_impl" }
%"struct.std::_Vector_base<TensorDesc, std::allocator<TensorDesc>>::_Vector_impl" = type { %"struct.std::_Vector_base<TensorDesc, std::allocator<TensorDesc>>::_Vector_impl_data" }
%"struct.std::_Vector_base<TensorDesc, std::allocator<TensorDesc>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%struct.ScaleParamSpec = type { i32, i32 }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<void *, std::allocator<void *>>::_Vector_impl" }
%"struct.std::_Vector_base<void *, std::allocator<void *>>::_Vector_impl" = type { %"struct.std::_Vector_base<void *, std::allocator<void *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<void *, std::allocator<void *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%struct.ActivationParamSpec = type { i32, [4 x float] }

@.str = external hidden unnamed_addr constant [20 x i8], align 1
@stdout = external global ptr, align 8
@.str.1 = external hidden unnamed_addr constant [23 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [18 x i8], align 1
@__const._Z11eltwise_cpuSt6vectorI10TensorDescSaIS0_EES_IPvSaIS3_EE16EltwiseParamSpecjS3_S0_S3_4Arch.pp2 = external hidden unnamed_addr constant %struct.PowerParamSpec, align 4

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z11eltwise_cpuSt6vectorI10TensorDescSaIS0_EES_IPvSaIS3_EE16EltwiseParamSpecjS3_S0_S3_4Arch(ptr noundef %0, ptr noundef %1, ptr noundef byval(%struct.EltwiseParamSpec) align 8 %2, i32 noundef %3, ptr noundef %4, ptr noundef byval(%struct.TensorDesc) align 8 %5, ptr noundef %6, i32 noundef %7) #0 personality ptr @__gxx_personality_v0 {
  %9 = alloca i32, align 4
  %10 = alloca ptr, align 8
  %11 = alloca ptr, align 8
  %12 = alloca i32, align 4
  %13 = alloca ptr, align 8
  %14 = alloca ptr, align 8
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca %struct.TensorDesc, align 8
  %19 = alloca i32, align 4
  %20 = alloca i32, align 4
  %21 = alloca %struct.TensorDesc, align 4
  %22 = alloca i32, align 4
  %23 = alloca %"class.std::vector", align 8
  %24 = alloca %struct.TensorDesc, align 8
  %25 = alloca ptr, align 8
  %26 = alloca i32, align 4
  %27 = alloca %struct.ScaleParamSpec, align 4
  %28 = alloca %struct.TensorDesc, align 8
  %29 = alloca %struct.ScaleParamSpec, align 4
  %30 = alloca %struct.TensorDesc, align 8
  %31 = alloca %struct.TensorDesc, align 8
  %32 = alloca %struct.ScaleParamSpec, align 4
  %33 = alloca %struct.TensorDesc, align 8
  %34 = alloca %struct.PowerParamSpec, align 4
  %35 = alloca ptr, align 8
  %36 = alloca ptr, align 8
  %37 = alloca %struct.PowerParamSpec, align 4
  %38 = alloca %struct.PowerParamSpec, align 4
  %39 = alloca %struct.TensorDesc, align 8
  %40 = alloca i32, align 4
  %41 = alloca i32, align 4
  %42 = alloca %struct.TensorDesc, align 8
  %43 = alloca %struct.PowerParamSpec, align 4
  %44 = alloca %struct.TensorDesc, align 8
  %45 = alloca { <2 x float>, float }, align 4
  %46 = alloca i32, align 4
  %47 = alloca %struct.TensorDesc, align 8
  %48 = alloca %struct.ScaleParamSpec, align 4
  %49 = alloca %struct.TensorDesc, align 8
  %50 = alloca i32, align 4
  %51 = alloca %struct.TensorDesc, align 8
  %52 = alloca %struct.PowerParamSpec, align 4
  %53 = alloca %struct.TensorDesc, align 8
  %54 = alloca { <2 x float>, float }, align 4
  %55 = alloca i32, align 4
  %56 = alloca i32, align 4
  %57 = alloca i32, align 4
  %58 = alloca float, align 4
  %59 = alloca %struct.PowerParamSpec, align 4
  %60 = alloca %struct.PowerParamSpec, align 4
  %61 = alloca %struct.PowerParamSpec, align 4
  %62 = alloca %struct.PowerParamSpec, align 4
  %63 = alloca %struct.PowerParamSpec, align 4
  %64 = alloca %struct.PowerParamSpec, align 4
  %65 = alloca %struct.PowerParamSpec, align 4
  %66 = alloca %struct.PowerParamSpec, align 4
  %67 = alloca %struct.PowerParamSpec, align 4
  %68 = alloca ptr, align 8
  %69 = alloca %struct.TensorDesc, align 8
  %70 = alloca %struct.PowerParamSpec, align 4
  %71 = alloca %struct.TensorDesc, align 8
  %72 = alloca { <2 x float>, float }, align 4
  %73 = alloca %struct.TensorDesc, align 8
  %74 = alloca %struct.PowerParamSpec, align 4
  %75 = alloca %struct.TensorDesc, align 8
  %76 = alloca { <2 x float>, float }, align 4
  %77 = alloca %"class.std::vector", align 8
  %78 = alloca %"class.std::vector.0", align 8
  %79 = alloca %struct.EltwiseParamSpec, align 8
  %80 = alloca %struct.TensorDesc, align 8
  %81 = alloca %struct.ActivationParamSpec, align 4
  %82 = alloca %struct.TensorDesc, align 8
  %83 = alloca %struct.ActivationParamSpec, align 8
  %84 = alloca %struct.TensorDesc, align 8
  store ptr %0, ptr %10, align 8, !tbaa !5
  store ptr %1, ptr %11, align 8, !tbaa !5
  store i32 %3, ptr %12, align 4, !tbaa !9
  store ptr %4, ptr %13, align 8, !tbaa !5
  store ptr %6, ptr %14, align 8, !tbaa !5
  store i32 %7, ptr %15, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #10
  %85 = call noundef i64 @_ZNKSt6vectorI10TensorDescSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #10
  %86 = trunc i64 %85 to i32
  store i32 %86, ptr %16, align 4, !tbaa !9
  %87 = load i32, ptr %16, align 4, !tbaa !9
  %88 = icmp ule i32 %87, 1
  br i1 %88, label %93, label %89

89:                                               ; preds = %8
  %90 = getelementptr inbounds %struct.TensorDesc, ptr %5, i32 0, i32 2
  %91 = load i32, ptr %90, align 8, !tbaa !13
  %92 = icmp ult i32 %91, 1
  br i1 %92, label %93, label %94

93:                                               ; preds = %89, %8
  store i32 2, ptr %9, align 4
  store i32 1, ptr %17, align 4
  br label %459

94:                                               ; preds = %89
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %18, ptr align 8 %5, i64 92, i1 false), !tbaa.struct !17
  %95 = call noundef i32 @_Z17tensorNumElements10TensorDesc(ptr noundef byval(%struct.TensorDesc) align 8 %18)
  %96 = icmp eq i32 %95, 0
  br i1 %96, label %97, label %98

97:                                               ; preds = %94
  store i32 0, ptr %9, align 4
  store i32 1, ptr %17, align 4
  br label %459

98:                                               ; preds = %94
  %99 = load ptr, ptr %13, align 8, !tbaa !5
  %100 = call noundef ptr @_Z11align_paramRSt6vectorI10TensorDescSaIS0_EERS_IPvSaIS4_EERjS4_RS0_(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, ptr noundef nonnull align 4 dereferenceable(4) %12, ptr noundef %99, ptr noundef nonnull align 4 dereferenceable(92) %5)
  store ptr %100, ptr %13, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %19) #10
  store i32 51, ptr %19, align 4, !tbaa !21
  call void @llvm.lifetime.start.p0(i64 4, ptr %20) #10
  store i32 -1, ptr %20, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 92, ptr %21) #10
  call void @_ZN10TensorDescC2Ev(ptr noundef nonnull align 4 dereferenceable(92) %21) #10
  call void @llvm.lifetime.start.p0(i64 4, ptr %22) #10
  call void @_ZNSt6vectorI10TensorDescSaIS0_EEC2ERKS2_(ptr noundef nonnull align 8 dereferenceable(24) %23, ptr noundef nonnull align 8 dereferenceable(24) %0)
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %24, ptr align 8 %5, i64 92, i1 false), !tbaa.struct !17
  %101 = invoke noundef i32 @_Z10scale_axisSt6vectorI10TensorDescSaIS0_EES0_PiPS0_(ptr noundef %23, ptr noundef byval(%struct.TensorDesc) align 8 %24, ptr noundef %20, ptr noundef %21)
          to label %102 unwind label %141

102:                                              ; preds = %98
  call void @_ZNSt6vectorI10TensorDescSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %23) #10
  store i32 %101, ptr %22, align 4, !tbaa !9
  %103 = load i32, ptr %22, align 4, !tbaa !9
  %104 = icmp sge i32 %103, 0
  br i1 %104, label %105, label %295

105:                                              ; preds = %102
  %106 = getelementptr inbounds %struct.EltwiseParamSpec, ptr %2, i32 0, i32 0
  %107 = load i32, ptr %106, align 8, !tbaa !23
  %108 = icmp eq i32 %107, 3
  br i1 %108, label %121, label %109

109:                                              ; preds = %105
  %110 = getelementptr inbounds %struct.EltwiseParamSpec, ptr %2, i32 0, i32 0
  %111 = load i32, ptr %110, align 8, !tbaa !23
  %112 = icmp eq i32 %111, 0
  br i1 %112, label %121, label %113

113:                                              ; preds = %109
  %114 = getelementptr inbounds %struct.EltwiseParamSpec, ptr %2, i32 0, i32 0
  %115 = load i32, ptr %114, align 8, !tbaa !23
  %116 = icmp eq i32 %115, 4
  br i1 %116, label %121, label %117

117:                                              ; preds = %113
  %118 = getelementptr inbounds %struct.EltwiseParamSpec, ptr %2, i32 0, i32 0
  %119 = load i32, ptr %118, align 8, !tbaa !23
  %120 = icmp eq i32 %119, 5
  br i1 %120, label %121, label %295

121:                                              ; preds = %117, %113, %109, %105
  call void @llvm.lifetime.start.p0(i64 8, ptr %27) #10
  %122 = load i32, ptr %22, align 4, !tbaa !9
  %123 = getelementptr inbounds %struct.ScaleParamSpec, ptr %27, i32 0, i32 0
  store i32 %122, ptr %123, align 4, !tbaa !28
  %124 = getelementptr inbounds %struct.EltwiseParamSpec, ptr %2, i32 0, i32 0
  %125 = load i32, ptr %124, align 8, !tbaa !23
  %126 = icmp eq i32 %125, 3
  br i1 %126, label %127, label %145

127:                                              ; preds = %121
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %28, ptr align 4 %21, i64 92, i1 false), !tbaa.struct !17
  %128 = load i32, ptr %20, align 4, !tbaa !9
  %129 = sext i32 %128 to i64
  %130 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPvSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %129) #10
  %131 = load ptr, ptr %130, align 8, !tbaa !5
  %132 = load i32, ptr %20, align 4, !tbaa !9
  %133 = sub nsw i32 1, %132
  %134 = sext i32 %133 to i64
  %135 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPvSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %134) #10
  %136 = load ptr, ptr %135, align 8, !tbaa !5
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %29, ptr align 4 %27, i64 8, i1 false), !tbaa.struct !30
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %30, ptr align 4 %21, i64 92, i1 false), !tbaa.struct !17
  %137 = load ptr, ptr %14, align 8, !tbaa !5
  %138 = load i32, ptr %15, align 4, !tbaa !11
  %139 = load i64, ptr %29, align 4
  %140 = call noundef i32 @_Z9scale_cpu10TensorDescPvS0_S0_14ScaleParamSpecS_S0_4Arch(ptr noundef byval(%struct.TensorDesc) align 8 %28, ptr noundef %131, ptr noundef %136, ptr noundef null, i64 %139, ptr noundef byval(%struct.TensorDesc) align 8 %30, ptr noundef %137, i32 noundef %138)
  store i32 %140, ptr %19, align 4, !tbaa !21
  br label %294

141:                                              ; preds = %98
  %142 = landingpad { ptr, i32 }
          cleanup
  %143 = extractvalue { ptr, i32 } %142, 0
  store ptr %143, ptr %25, align 8
  %144 = extractvalue { ptr, i32 } %142, 1
  store i32 %144, ptr %26, align 4
  call void @_ZNSt6vectorI10TensorDescSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %23) #10
  br label %458

145:                                              ; preds = %121
  %146 = getelementptr inbounds %struct.EltwiseParamSpec, ptr %2, i32 0, i32 0
  %147 = load i32, ptr %146, align 8, !tbaa !23
  %148 = icmp eq i32 %147, 0
  br i1 %148, label %149, label %163

149:                                              ; preds = %145
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %31, ptr align 4 %21, i64 92, i1 false), !tbaa.struct !17
  %150 = load i32, ptr %20, align 4, !tbaa !9
  %151 = sext i32 %150 to i64
  %152 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPvSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %151) #10
  %153 = load ptr, ptr %152, align 8, !tbaa !5
  %154 = load i32, ptr %20, align 4, !tbaa !9
  %155 = sub nsw i32 1, %154
  %156 = sext i32 %155 to i64
  %157 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPvSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %156) #10
  %158 = load ptr, ptr %157, align 8, !tbaa !5
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %32, ptr align 4 %27, i64 8, i1 false), !tbaa.struct !30
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %33, ptr align 4 %21, i64 92, i1 false), !tbaa.struct !17
  %159 = load ptr, ptr %14, align 8, !tbaa !5
  %160 = load i32, ptr %15, align 4, !tbaa !11
  %161 = load i64, ptr %32, align 4
  %162 = call noundef i32 @_Z9scale_cpu10TensorDescPvS0_S0_14ScaleParamSpecS_S0_4Arch(ptr noundef byval(%struct.TensorDesc) align 8 %31, ptr noundef %153, ptr noundef null, ptr noundef %158, i64 %161, ptr noundef byval(%struct.TensorDesc) align 8 %33, ptr noundef %159, i32 noundef %160)
  store i32 %162, ptr %19, align 4, !tbaa !21
  br label %293

163:                                              ; preds = %145
  %164 = getelementptr inbounds %struct.EltwiseParamSpec, ptr %2, i32 0, i32 0
  %165 = load i32, ptr %164, align 8, !tbaa !23
  %166 = icmp eq i32 %165, 4
  br i1 %166, label %171, label %167

167:                                              ; preds = %163
  %168 = getelementptr inbounds %struct.EltwiseParamSpec, ptr %2, i32 0, i32 0
  %169 = load i32, ptr %168, align 8, !tbaa !23
  %170 = icmp eq i32 %169, 5
  br i1 %170, label %171, label %276

171:                                              ; preds = %167, %163
  call void @llvm.lifetime.start.p0(i64 12, ptr %34) #10
  call void @llvm.lifetime.start.p0(i64 8, ptr %35) #10
  call void @llvm.lifetime.start.p0(i64 8, ptr %36) #10
  %172 = getelementptr inbounds %struct.EltwiseParamSpec, ptr %2, i32 0, i32 0
  %173 = load i32, ptr %172, align 8, !tbaa !23
  %174 = icmp eq i32 %173, 4
  br i1 %174, label %175, label %180

175:                                              ; preds = %171
  call void @llvm.lifetime.start.p0(i64 12, ptr %37) #10
  %176 = getelementptr inbounds %struct.PowerParamSpec, ptr %37, i32 0, i32 0
  store float -1.000000e+00, ptr %176, align 4, !tbaa !31
  %177 = getelementptr inbounds %struct.PowerParamSpec, ptr %37, i32 0, i32 1
  store float 0.000000e+00, ptr %177, align 4, !tbaa !34
  %178 = getelementptr inbounds %struct.PowerParamSpec, ptr %37, i32 0, i32 2
  store float 1.000000e+00, ptr %178, align 4, !tbaa !35
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %34, ptr align 4 %37, i64 12, i1 false), !tbaa.struct !36
  call void @llvm.lifetime.end.p0(i64 12, ptr %37) #10
  store ptr null, ptr %35, align 8, !tbaa !5
  %179 = load ptr, ptr %13, align 8, !tbaa !5
  store ptr %179, ptr %36, align 8, !tbaa !5
  br label %185

180:                                              ; preds = %171
  call void @llvm.lifetime.start.p0(i64 12, ptr %38) #10
  %181 = getelementptr inbounds %struct.PowerParamSpec, ptr %38, i32 0, i32 0
  store float 1.000000e+00, ptr %181, align 4, !tbaa !31
  %182 = getelementptr inbounds %struct.PowerParamSpec, ptr %38, i32 0, i32 1
  store float 0.000000e+00, ptr %182, align 4, !tbaa !34
  %183 = getelementptr inbounds %struct.PowerParamSpec, ptr %38, i32 0, i32 2
  store float -1.000000e+00, ptr %183, align 4, !tbaa !35
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %34, ptr align 4 %38, i64 12, i1 false), !tbaa.struct !36
  call void @llvm.lifetime.end.p0(i64 12, ptr %38) #10
  %184 = load ptr, ptr %13, align 8, !tbaa !5
  store ptr %184, ptr %35, align 8, !tbaa !5
  store ptr null, ptr %36, align 8, !tbaa !5
  br label %185

185:                                              ; preds = %180, %175
  %186 = load i32, ptr %12, align 4, !tbaa !9
  %187 = load i32, ptr %20, align 4, !tbaa !9
  %188 = sub nsw i32 1, %187
  %189 = sext i32 %188 to i64
  %190 = call noundef nonnull align 4 dereferenceable(92) ptr @_ZNSt6vectorI10TensorDescSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %189) #10
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %39, ptr align 4 %190, i64 92, i1 false), !tbaa.struct !17
  %191 = call noundef i32 @_Z14tensorNumBytes10TensorDesc(ptr noundef byval(%struct.TensorDesc) align 8 %39)
  %192 = icmp uge i32 %186, %191
  br i1 %192, label %203, label %193

193:                                              ; preds = %185
  call void @llvm.lifetime.start.p0(i64 4, ptr %40) #10
  %194 = call i64 (i64, ...) @syscall(i64 noundef 186) #10
  %195 = trunc i64 %194 to i32
  store i32 %195, ptr %40, align 4, !tbaa !9
  %196 = load i32, ptr %40, align 4, !tbaa !9
  %197 = call i32 (ptr, ...) @printf(ptr noundef @.str, i32 noundef %196)
  %198 = load ptr, ptr @stdout, align 8, !tbaa !5
  %199 = call i32 @fflush(ptr noundef %198)
  %200 = call i32 (ptr, ...) @printf(ptr noundef @.str.1)
  %201 = load ptr, ptr @stdout, align 8, !tbaa !5
  %202 = call i32 @fflush(ptr noundef %201)
  call void @exit(i32 noundef 1) #11
  unreachable

203:                                              ; preds = %185
  call void @llvm.lifetime.start.p0(i64 4, ptr %41) #10
  %204 = load i32, ptr %20, align 4, !tbaa !9
  %205 = sub nsw i32 1, %204
  %206 = sext i32 %205 to i64
  %207 = call noundef nonnull align 4 dereferenceable(92) ptr @_ZNSt6vectorI10TensorDescSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %206) #10
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %42, ptr align 4 %207, i64 92, i1 false), !tbaa.struct !17
  %208 = load i32, ptr %20, align 4, !tbaa !9
  %209 = sub nsw i32 1, %208
  %210 = sext i32 %209 to i64
  %211 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPvSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %210) #10
  %212 = load ptr, ptr %211, align 8, !tbaa !5
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %43, ptr align 4 %34, i64 12, i1 false), !tbaa.struct !36
  %213 = load i32, ptr %20, align 4, !tbaa !9
  %214 = sub nsw i32 1, %213
  %215 = sext i32 %214 to i64
  %216 = call noundef nonnull align 4 dereferenceable(92) ptr @_ZNSt6vectorI10TensorDescSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %215) #10
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %44, ptr align 4 %216, i64 92, i1 false), !tbaa.struct !17
  %217 = load ptr, ptr %13, align 8, !tbaa !5
  %218 = load i32, ptr %15, align 4, !tbaa !11
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %45, ptr align 4 %43, i64 12, i1 false)
  %219 = getelementptr inbounds { <2 x float>, float }, ptr %45, i32 0, i32 0
  %220 = load <2 x float>, ptr %219, align 4
  %221 = getelementptr inbounds { <2 x float>, float }, ptr %45, i32 0, i32 1
  %222 = load float, ptr %221, align 4
  %223 = call noundef i32 @_Z9power_cpu10TensorDescPv14PowerParamSpecS_S0_4Arch(ptr noundef byval(%struct.TensorDesc) align 8 %42, ptr noundef %212, <2 x float> %220, float %222, ptr noundef byval(%struct.TensorDesc) align 8 %44, ptr noundef %217, i32 noundef %218)
  store i32 %223, ptr %41, align 4, !tbaa !21
  %224 = load i32, ptr %41, align 4, !tbaa !21
  %225 = icmp ne i32 %224, 0
  br i1 %225, label %226, label %238

226:                                              ; preds = %203
  call void @llvm.lifetime.start.p0(i64 4, ptr %46) #10
  %227 = call i64 (i64, ...) @syscall(i64 noundef 186) #10
  %228 = trunc i64 %227 to i32
  store i32 %228, ptr %46, align 4, !tbaa !9
  %229 = load i32, ptr %46, align 4, !tbaa !9
  %230 = call i32 (ptr, ...) @printf(ptr noundef @.str, i32 noundef %229)
  %231 = load ptr, ptr @stdout, align 8, !tbaa !5
  %232 = call i32 @fflush(ptr noundef %231)
  %233 = load i32, ptr %41, align 4, !tbaa !21
  %234 = call ptr @ee2str(i32 noundef %233)
  %235 = call i32 (ptr, ...) @printf(ptr noundef @.str.2, ptr noundef %234)
  %236 = load ptr, ptr @stdout, align 8, !tbaa !5
  %237 = call i32 @fflush(ptr noundef %236)
  call void @exit(i32 noundef 1) #11
  unreachable

238:                                              ; preds = %203
  call void @llvm.lifetime.end.p0(i64 4, ptr %41) #10
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %47, ptr align 4 %21, i64 92, i1 false), !tbaa.struct !17
  %239 = load i32, ptr %20, align 4, !tbaa !9
  %240 = sext i32 %239 to i64
  %241 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPvSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %240) #10
  %242 = load ptr, ptr %241, align 8, !tbaa !5
  %243 = load ptr, ptr %35, align 8, !tbaa !5
  %244 = load ptr, ptr %36, align 8, !tbaa !5
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %48, ptr align 4 %27, i64 8, i1 false), !tbaa.struct !30
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %49, ptr align 4 %21, i64 92, i1 false), !tbaa.struct !17
  %245 = load ptr, ptr %14, align 8, !tbaa !5
  %246 = load i32, ptr %15, align 4, !tbaa !11
  %247 = load i64, ptr %48, align 4
  %248 = call noundef i32 @_Z9scale_cpu10TensorDescPvS0_S0_14ScaleParamSpecS_S0_4Arch(ptr noundef byval(%struct.TensorDesc) align 8 %47, ptr noundef %242, ptr noundef %243, ptr noundef %244, i64 %247, ptr noundef byval(%struct.TensorDesc) align 8 %49, ptr noundef %245, i32 noundef %246)
  store i32 %248, ptr %19, align 4, !tbaa !21
  %249 = load i32, ptr %20, align 4, !tbaa !9
  %250 = icmp eq i32 %249, 1
  br i1 %250, label %251, label %275

251:                                              ; preds = %238
  call void @llvm.lifetime.start.p0(i64 4, ptr %50) #10
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %51, ptr align 4 %21, i64 92, i1 false), !tbaa.struct !17
  %252 = load ptr, ptr %14, align 8, !tbaa !5
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %52, ptr align 4 %34, i64 12, i1 false), !tbaa.struct !36
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %53, ptr align 4 %21, i64 92, i1 false), !tbaa.struct !17
  %253 = load ptr, ptr %14, align 8, !tbaa !5
  %254 = load i32, ptr %15, align 4, !tbaa !11
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %54, ptr align 4 %52, i64 12, i1 false)
  %255 = getelementptr inbounds { <2 x float>, float }, ptr %54, i32 0, i32 0
  %256 = load <2 x float>, ptr %255, align 4
  %257 = getelementptr inbounds { <2 x float>, float }, ptr %54, i32 0, i32 1
  %258 = load float, ptr %257, align 4
  %259 = call noundef i32 @_Z9power_cpu10TensorDescPv14PowerParamSpecS_S0_4Arch(ptr noundef byval(%struct.TensorDesc) align 8 %51, ptr noundef %252, <2 x float> %256, float %258, ptr noundef byval(%struct.TensorDesc) align 8 %53, ptr noundef %253, i32 noundef %254)
  store i32 %259, ptr %50, align 4, !tbaa !21
  %260 = load i32, ptr %50, align 4, !tbaa !21
  %261 = icmp ne i32 %260, 0
  br i1 %261, label %262, label %274

262:                                              ; preds = %251
  call void @llvm.lifetime.start.p0(i64 4, ptr %55) #10
  %263 = call i64 (i64, ...) @syscall(i64 noundef 186) #10
  %264 = trunc i64 %263 to i32
  store i32 %264, ptr %55, align 4, !tbaa !9
  %265 = load i32, ptr %55, align 4, !tbaa !9
  %266 = call i32 (ptr, ...) @printf(ptr noundef @.str, i32 noundef %265)
  %267 = load ptr, ptr @stdout, align 8, !tbaa !5
  %268 = call i32 @fflush(ptr noundef %267)
  %269 = load i32, ptr %50, align 4, !tbaa !21
  %270 = call ptr @ee2str(i32 noundef %269)
  %271 = call i32 (ptr, ...) @printf(ptr noundef @.str.2, ptr noundef %270)
  %272 = load ptr, ptr @stdout, align 8, !tbaa !5
  %273 = call i32 @fflush(ptr noundef %272)
  call void @exit(i32 noundef 1) #11
  unreachable

274:                                              ; preds = %251
  call void @llvm.lifetime.end.p0(i64 4, ptr %50) #10
  br label %275

275:                                              ; preds = %274, %238
  call void @llvm.lifetime.end.p0(i64 8, ptr %36) #10
  call void @llvm.lifetime.end.p0(i64 8, ptr %35) #10
  call void @llvm.lifetime.end.p0(i64 12, ptr %34) #10
  br label %292

276:                                              ; preds = %167
  call void @llvm.lifetime.start.p0(i64 4, ptr %56) #10
  store i32 51, ptr %56, align 4, !tbaa !21
  %277 = load i32, ptr %56, align 4, !tbaa !21
  %278 = icmp ne i32 %277, 0
  br i1 %278, label %279, label %291

279:                                              ; preds = %276
  call void @llvm.lifetime.start.p0(i64 4, ptr %57) #10
  %280 = call i64 (i64, ...) @syscall(i64 noundef 186) #10
  %281 = trunc i64 %280 to i32
  store i32 %281, ptr %57, align 4, !tbaa !9
  %282 = load i32, ptr %57, align 4, !tbaa !9
  %283 = call i32 (ptr, ...) @printf(ptr noundef @.str, i32 noundef %282)
  %284 = load ptr, ptr @stdout, align 8, !tbaa !5
  %285 = call i32 @fflush(ptr noundef %284)
  %286 = load i32, ptr %56, align 4, !tbaa !21
  %287 = call ptr @ee2str(i32 noundef %286)
  %288 = call i32 (ptr, ...) @printf(ptr noundef @.str.2, ptr noundef %287)
  %289 = load ptr, ptr @stdout, align 8, !tbaa !5
  %290 = call i32 @fflush(ptr noundef %289)
  call void @exit(i32 noundef 1) #11
  unreachable

291:                                              ; preds = %276
  call void @llvm.lifetime.end.p0(i64 4, ptr %56) #10
  br label %292

292:                                              ; preds = %291, %275
  br label %293

293:                                              ; preds = %292, %149
  br label %294

294:                                              ; preds = %293, %127
  call void @llvm.lifetime.end.p0(i64 8, ptr %27) #10
  br label %440

295:                                              ; preds = %117, %102
  %296 = load i32, ptr %22, align 4, !tbaa !9
  %297 = icmp eq i32 %296, -2
  br i1 %297, label %298, label %424

298:                                              ; preds = %295
  %299 = getelementptr inbounds %struct.EltwiseParamSpec, ptr %2, i32 0, i32 0
  %300 = load i32, ptr %299, align 8, !tbaa !23
  %301 = icmp eq i32 %300, 3
  br i1 %301, label %314, label %302

302:                                              ; preds = %298
  %303 = getelementptr inbounds %struct.EltwiseParamSpec, ptr %2, i32 0, i32 0
  %304 = load i32, ptr %303, align 8, !tbaa !23
  %305 = icmp eq i32 %304, 0
  br i1 %305, label %314, label %306

306:                                              ; preds = %302
  %307 = getelementptr inbounds %struct.EltwiseParamSpec, ptr %2, i32 0, i32 0
  %308 = load i32, ptr %307, align 8, !tbaa !23
  %309 = icmp eq i32 %308, 4
  br i1 %309, label %314, label %310

310:                                              ; preds = %306
  %311 = getelementptr inbounds %struct.EltwiseParamSpec, ptr %2, i32 0, i32 0
  %312 = load i32, ptr %311, align 8, !tbaa !23
  %313 = icmp eq i32 %312, 5
  br i1 %313, label %314, label %424

314:                                              ; preds = %310, %306, %302, %298
  call void @llvm.lifetime.start.p0(i64 4, ptr %58) #10
  %315 = load i32, ptr %20, align 4, !tbaa !9
  %316 = sub nsw i32 1, %315
  %317 = sext i32 %316 to i64
  %318 = call noundef nonnull align 4 dereferenceable(92) ptr @_ZNSt6vectorI10TensorDescSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %317) #10
  %319 = getelementptr inbounds %struct.TensorDesc, ptr %318, i32 0, i32 0
  %320 = load i32, ptr %319, align 4, !tbaa !38
  %321 = load i32, ptr %20, align 4, !tbaa !9
  %322 = sub nsw i32 1, %321
  %323 = sext i32 %322 to i64
  %324 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPvSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %323) #10
  %325 = load ptr, ptr %324, align 8, !tbaa !5
  %326 = call noundef i32 @_Z16transformToFloat8DataTypePKvPfif(i32 noundef %320, ptr noundef %325, ptr noundef %58, i32 noundef 1, float noundef 1.000000e+00)
  call void @llvm.lifetime.start.p0(i64 12, ptr %59) #10
  call void @llvm.lifetime.start.p0(i64 12, ptr %60) #10
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %60, ptr align 4 @__const._Z11eltwise_cpuSt6vectorI10TensorDescSaIS0_EES_IPvSaIS3_EE16EltwiseParamSpecjS3_S0_S3_4Arch.pp2, i64 12, i1 false)
  %327 = getelementptr inbounds %struct.EltwiseParamSpec, ptr %2, i32 0, i32 0
  %328 = load i32, ptr %327, align 8, !tbaa !23
  %329 = icmp eq i32 %328, 3
  br i1 %329, label %330, label %335

330:                                              ; preds = %314
  call void @llvm.lifetime.start.p0(i64 12, ptr %61) #10
  %331 = getelementptr inbounds %struct.PowerParamSpec, ptr %61, i32 0, i32 0
  %332 = load float, ptr %58, align 4, !tbaa !37
  store float %332, ptr %331, align 4, !tbaa !31
  %333 = getelementptr inbounds %struct.PowerParamSpec, ptr %61, i32 0, i32 1
  store float 0.000000e+00, ptr %333, align 4, !tbaa !34
  %334 = getelementptr inbounds %struct.PowerParamSpec, ptr %61, i32 0, i32 2
  store float 1.000000e+00, ptr %334, align 4, !tbaa !35
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %59, ptr align 4 %61, i64 12, i1 false), !tbaa.struct !36
  call void @llvm.lifetime.end.p0(i64 12, ptr %61) #10
  br label %389

335:                                              ; preds = %314
  %336 = getelementptr inbounds %struct.EltwiseParamSpec, ptr %2, i32 0, i32 0
  %337 = load i32, ptr %336, align 8, !tbaa !23
  %338 = icmp eq i32 %337, 0
  br i1 %338, label %339, label %344

339:                                              ; preds = %335
  call void @llvm.lifetime.start.p0(i64 12, ptr %62) #10
  %340 = getelementptr inbounds %struct.PowerParamSpec, ptr %62, i32 0, i32 0
  store float 1.000000e+00, ptr %340, align 4, !tbaa !31
  %341 = getelementptr inbounds %struct.PowerParamSpec, ptr %62, i32 0, i32 1
  %342 = load float, ptr %58, align 4, !tbaa !37
  store float %342, ptr %341, align 4, !tbaa !34
  %343 = getelementptr inbounds %struct.PowerParamSpec, ptr %62, i32 0, i32 2
  store float 1.000000e+00, ptr %343, align 4, !tbaa !35
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %59, ptr align 4 %62, i64 12, i1 false), !tbaa.struct !36
  call void @llvm.lifetime.end.p0(i64 12, ptr %62) #10
  br label %388

344:                                              ; preds = %335
  %345 = getelementptr inbounds %struct.EltwiseParamSpec, ptr %2, i32 0, i32 0
  %346 = load i32, ptr %345, align 8, !tbaa !23
  %347 = icmp eq i32 %346, 4
  br i1 %347, label %348, label %363

348:                                              ; preds = %344
  %349 = load i32, ptr %20, align 4, !tbaa !9
  %350 = icmp eq i32 %349, 0
  br i1 %350, label %351, label %357

351:                                              ; preds = %348
  call void @llvm.lifetime.start.p0(i64 12, ptr %63) #10
  %352 = getelementptr inbounds %struct.PowerParamSpec, ptr %63, i32 0, i32 0
  store float 1.000000e+00, ptr %352, align 4, !tbaa !31
  %353 = getelementptr inbounds %struct.PowerParamSpec, ptr %63, i32 0, i32 1
  %354 = load float, ptr %58, align 4, !tbaa !37
  %355 = fneg float %354
  store float %355, ptr %353, align 4, !tbaa !34
  %356 = getelementptr inbounds %struct.PowerParamSpec, ptr %63, i32 0, i32 2
  store float 1.000000e+00, ptr %356, align 4, !tbaa !35
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %59, ptr align 4 %63, i64 12, i1 false), !tbaa.struct !36
  call void @llvm.lifetime.end.p0(i64 12, ptr %63) #10
  br label %362

357:                                              ; preds = %348
  call void @llvm.lifetime.start.p0(i64 12, ptr %64) #10
  %358 = getelementptr inbounds %struct.PowerParamSpec, ptr %64, i32 0, i32 0
  store float -1.000000e+00, ptr %358, align 4, !tbaa !31
  %359 = getelementptr inbounds %struct.PowerParamSpec, ptr %64, i32 0, i32 1
  %360 = load float, ptr %58, align 4, !tbaa !37
  store float %360, ptr %359, align 4, !tbaa !34
  %361 = getelementptr inbounds %struct.PowerParamSpec, ptr %64, i32 0, i32 2
  store float 1.000000e+00, ptr %361, align 4, !tbaa !35
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %59, ptr align 4 %64, i64 12, i1 false), !tbaa.struct !36
  call void @llvm.lifetime.end.p0(i64 12, ptr %64) #10
  br label %362

362:                                              ; preds = %357, %351
  br label %387

363:                                              ; preds = %344
  %364 = getelementptr inbounds %struct.EltwiseParamSpec, ptr %2, i32 0, i32 0
  %365 = load i32, ptr %364, align 8, !tbaa !23
  %366 = icmp eq i32 %365, 5
  br i1 %366, label %367, label %385

367:                                              ; preds = %363
  %368 = load i32, ptr %20, align 4, !tbaa !9
  %369 = icmp eq i32 %368, 0
  br i1 %369, label %370, label %376

370:                                              ; preds = %367
  call void @llvm.lifetime.start.p0(i64 12, ptr %65) #10
  %371 = getelementptr inbounds %struct.PowerParamSpec, ptr %65, i32 0, i32 0
  %372 = load float, ptr %58, align 4, !tbaa !37
  %373 = fdiv float 1.000000e+00, %372
  store float %373, ptr %371, align 4, !tbaa !31
  %374 = getelementptr inbounds %struct.PowerParamSpec, ptr %65, i32 0, i32 1
  store float 0.000000e+00, ptr %374, align 4, !tbaa !34
  %375 = getelementptr inbounds %struct.PowerParamSpec, ptr %65, i32 0, i32 2
  store float 1.000000e+00, ptr %375, align 4, !tbaa !35
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %59, ptr align 4 %65, i64 12, i1 false), !tbaa.struct !36
  call void @llvm.lifetime.end.p0(i64 12, ptr %65) #10
  br label %384

376:                                              ; preds = %367
  call void @llvm.lifetime.start.p0(i64 12, ptr %66) #10
  %377 = getelementptr inbounds %struct.PowerParamSpec, ptr %66, i32 0, i32 0
  store float 1.000000e+00, ptr %377, align 4, !tbaa !31
  %378 = getelementptr inbounds %struct.PowerParamSpec, ptr %66, i32 0, i32 1
  store float 0.000000e+00, ptr %378, align 4, !tbaa !34
  %379 = getelementptr inbounds %struct.PowerParamSpec, ptr %66, i32 0, i32 2
  store float -1.000000e+00, ptr %379, align 4, !tbaa !35
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %59, ptr align 4 %66, i64 12, i1 false), !tbaa.struct !36
  call void @llvm.lifetime.end.p0(i64 12, ptr %66) #10
  call void @llvm.lifetime.start.p0(i64 12, ptr %67) #10
  %380 = getelementptr inbounds %struct.PowerParamSpec, ptr %67, i32 0, i32 0
  %381 = load float, ptr %58, align 4, !tbaa !37
  store float %381, ptr %380, align 4, !tbaa !31
  %382 = getelementptr inbounds %struct.PowerParamSpec, ptr %67, i32 0, i32 1
  store float 0.000000e+00, ptr %382, align 4, !tbaa !34
  %383 = getelementptr inbounds %struct.PowerParamSpec, ptr %67, i32 0, i32 2
  store float 1.000000e+00, ptr %383, align 4, !tbaa !35
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %60, ptr align 4 %67, i64 12, i1 false), !tbaa.struct !36
  call void @llvm.lifetime.end.p0(i64 12, ptr %67) #10
  br label %384

384:                                              ; preds = %376, %370
  br label %386

385:                                              ; preds = %363
  store i32 51, ptr %9, align 4
  store i32 1, ptr %17, align 4
  br label %421

386:                                              ; preds = %384
  br label %387

387:                                              ; preds = %386, %362
  br label %388

388:                                              ; preds = %387, %339
  br label %389

389:                                              ; preds = %388, %330
  call void @llvm.lifetime.start.p0(i64 8, ptr %68) #10
  %390 = load ptr, ptr %14, align 8, !tbaa !5
  store ptr %390, ptr %68, align 8, !tbaa !5
  %391 = load i32, ptr %20, align 4, !tbaa !9
  %392 = sext i32 %391 to i64
  %393 = call noundef nonnull align 4 dereferenceable(92) ptr @_ZNSt6vectorI10TensorDescSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %392) #10
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %69, ptr align 4 %393, i64 92, i1 false), !tbaa.struct !17
  %394 = load i32, ptr %20, align 4, !tbaa !9
  %395 = sext i32 %394 to i64
  %396 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPvSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %395) #10
  %397 = load ptr, ptr %396, align 8, !tbaa !5
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %70, ptr align 4 %59, i64 12, i1 false), !tbaa.struct !36
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %71, ptr align 8 %5, i64 92, i1 false), !tbaa.struct !17
  %398 = load ptr, ptr %14, align 8, !tbaa !5
  %399 = load i32, ptr %15, align 4, !tbaa !11
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %72, ptr align 4 %70, i64 12, i1 false)
  %400 = getelementptr inbounds { <2 x float>, float }, ptr %72, i32 0, i32 0
  %401 = load <2 x float>, ptr %400, align 4
  %402 = getelementptr inbounds { <2 x float>, float }, ptr %72, i32 0, i32 1
  %403 = load float, ptr %402, align 4
  %404 = call noundef i32 @_Z9power_cpu10TensorDescPv14PowerParamSpecS_S0_4Arch(ptr noundef byval(%struct.TensorDesc) align 8 %69, ptr noundef %397, <2 x float> %401, float %403, ptr noundef byval(%struct.TensorDesc) align 8 %71, ptr noundef %398, i32 noundef %399)
  store i32 %404, ptr %19, align 4, !tbaa !21
  %405 = load i32, ptr %19, align 4, !tbaa !21
  %406 = icmp eq i32 %405, 0
  br i1 %406, label %407, label %420

407:                                              ; preds = %389
  %408 = getelementptr inbounds %struct.PowerParamSpec, ptr %60, i32 0, i32 0
  %409 = load float, ptr %408, align 4, !tbaa !31
  %410 = fcmp une float %409, 1.000000e+00
  br i1 %410, label %411, label %420

411:                                              ; preds = %407
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %73, ptr align 8 %5, i64 92, i1 false), !tbaa.struct !17
  %412 = load ptr, ptr %14, align 8, !tbaa !5
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %74, ptr align 4 %60, i64 12, i1 false), !tbaa.struct !36
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %75, ptr align 8 %5, i64 92, i1 false), !tbaa.struct !17
  %413 = load ptr, ptr %14, align 8, !tbaa !5
  %414 = load i32, ptr %15, align 4, !tbaa !11
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %76, ptr align 4 %74, i64 12, i1 false)
  %415 = getelementptr inbounds { <2 x float>, float }, ptr %76, i32 0, i32 0
  %416 = load <2 x float>, ptr %415, align 4
  %417 = getelementptr inbounds { <2 x float>, float }, ptr %76, i32 0, i32 1
  %418 = load float, ptr %417, align 4
  %419 = call noundef i32 @_Z9power_cpu10TensorDescPv14PowerParamSpecS_S0_4Arch(ptr noundef byval(%struct.TensorDesc) align 8 %73, ptr noundef %412, <2 x float> %416, float %418, ptr noundef byval(%struct.TensorDesc) align 8 %75, ptr noundef %413, i32 noundef %414)
  store i32 %419, ptr %19, align 4, !tbaa !21
  br label %420

420:                                              ; preds = %411, %407, %389
  call void @llvm.lifetime.end.p0(i64 8, ptr %68) #10
  store i32 0, ptr %17, align 4
  br label %421

421:                                              ; preds = %420, %385
  call void @llvm.lifetime.end.p0(i64 12, ptr %60) #10
  call void @llvm.lifetime.end.p0(i64 12, ptr %59) #10
  call void @llvm.lifetime.end.p0(i64 4, ptr %58) #10
  %422 = load i32, ptr %17, align 4
  switch i32 %422, label %457 [
    i32 0, label %423
  ]

423:                                              ; preds = %421
  br label %439

424:                                              ; preds = %310, %295
  call void @_ZNSt6vectorI10TensorDescSaIS0_EEC2ERKS2_(ptr noundef nonnull align 8 dereferenceable(24) %77, ptr noundef nonnull align 8 dereferenceable(24) %0)
  invoke void @_ZNSt6vectorIPvSaIS0_EEC2ERKS2_(ptr noundef nonnull align 8 dereferenceable(24) %78, ptr noundef nonnull align 8 dereferenceable(24) %1)
          to label %425 unwind label %430

425:                                              ; preds = %424
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %79, ptr align 8 %2, i64 52, i1 false), !tbaa.struct !39
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %80, ptr align 8 %5, i64 92, i1 false), !tbaa.struct !17
  %426 = load ptr, ptr %14, align 8, !tbaa !5
  %427 = load i32, ptr %15, align 4, !tbaa !11
  %428 = invoke noundef i32 @_ZL14eltwise_kernelSt6vectorI10TensorDescSaIS0_EES_IPvSaIS3_EE16EltwiseParamSpecS0_S3_4Arch(ptr noundef %77, ptr noundef %78, ptr noundef byval(%struct.EltwiseParamSpec) align 8 %79, ptr noundef byval(%struct.TensorDesc) align 8 %80, ptr noundef %426, i32 noundef %427)
          to label %429 unwind label %434

429:                                              ; preds = %425
  store i32 %428, ptr %19, align 4, !tbaa !21
  call void @_ZNSt6vectorIPvSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %78) #10
  call void @_ZNSt6vectorI10TensorDescSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %77) #10
  br label %439

430:                                              ; preds = %424
  %431 = landingpad { ptr, i32 }
          cleanup
  %432 = extractvalue { ptr, i32 } %431, 0
  store ptr %432, ptr %25, align 8
  %433 = extractvalue { ptr, i32 } %431, 1
  store i32 %433, ptr %26, align 4
  br label %438

434:                                              ; preds = %425
  %435 = landingpad { ptr, i32 }
          cleanup
  %436 = extractvalue { ptr, i32 } %435, 0
  store ptr %436, ptr %25, align 8
  %437 = extractvalue { ptr, i32 } %435, 1
  store i32 %437, ptr %26, align 4
  call void @_ZNSt6vectorIPvSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %78) #10
  br label %438

438:                                              ; preds = %434, %430
  call void @_ZNSt6vectorI10TensorDescSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %77) #10
  br label %458

439:                                              ; preds = %429, %423
  br label %440

440:                                              ; preds = %439, %294
  %441 = load i32, ptr %19, align 4, !tbaa !21
  %442 = icmp eq i32 %441, 0
  br i1 %442, label %443, label %455

443:                                              ; preds = %440
  %444 = getelementptr inbounds %struct.EltwiseParamSpec, ptr %2, i32 0, i32 2
  %445 = load i32, ptr %444, align 8, !tbaa !42
  %446 = icmp ne i32 %445, 0
  br i1 %446, label %447, label %455

447:                                              ; preds = %443
  call void @llvm.lifetime.start.p0(i64 20, ptr %81) #10
  call void @_ZN19ActivationParamSpecC2Ev(ptr noundef nonnull align 4 dereferenceable(20) %81) #10
  %448 = getelementptr inbounds %struct.EltwiseParamSpec, ptr %2, i32 0, i32 2
  %449 = load i32, ptr %448, align 8, !tbaa !42
  %450 = getelementptr inbounds %struct.ActivationParamSpec, ptr %81, i32 0, i32 0
  store i32 %449, ptr %450, align 4, !tbaa !43
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %82, ptr align 8 %5, i64 92, i1 false), !tbaa.struct !17
  %451 = load ptr, ptr %14, align 8, !tbaa !5
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %83, ptr align 4 %81, i64 20, i1 false), !tbaa.struct !45
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %84, ptr align 8 %5, i64 92, i1 false), !tbaa.struct !17
  %452 = load ptr, ptr %14, align 8, !tbaa !5
  %453 = load i32, ptr %15, align 4, !tbaa !11
  %454 = call noundef i32 @_Z14activation_cpu10TensorDescPv19ActivationParamSpecS_S0_Pf4Arch(ptr noundef byval(%struct.TensorDesc) align 8 %82, ptr noundef %451, ptr noundef byval(%struct.ActivationParamSpec) align 8 %83, ptr noundef byval(%struct.TensorDesc) align 8 %84, ptr noundef %452, ptr noundef null, i32 noundef %453)
  store i32 %454, ptr %19, align 4, !tbaa !21
  call void @llvm.lifetime.end.p0(i64 20, ptr %81) #10
  br label %455

455:                                              ; preds = %447, %443, %440
  %456 = load i32, ptr %19, align 4, !tbaa !21
  store i32 %456, ptr %9, align 4
  store i32 1, ptr %17, align 4
  br label %457

457:                                              ; preds = %455, %421
  call void @llvm.lifetime.end.p0(i64 4, ptr %22) #10
  call void @llvm.lifetime.end.p0(i64 92, ptr %21) #10
  call void @llvm.lifetime.end.p0(i64 4, ptr %20) #10
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #10
  br label %459

458:                                              ; preds = %438, %141
  call void @llvm.lifetime.end.p0(i64 4, ptr %22) #10
  call void @llvm.lifetime.end.p0(i64 92, ptr %21) #10
  call void @llvm.lifetime.end.p0(i64 4, ptr %20) #10
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #10
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #10
  br label %461

459:                                              ; preds = %457, %97, %93
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #10
  %460 = load i32, ptr %9, align 4
  ret i32 %460

461:                                              ; preds = %458
  %462 = load ptr, ptr %25, align 8
  %463 = load i32, ptr %26, align 4
  %464 = insertvalue { ptr, i32 } poison, ptr %462, 0
  %465 = insertvalue { ptr, i32 } %464, i32 %463, 1
  resume { ptr, i32 } %465
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorI10TensorDescSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #2 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z17tensorNumElements10TensorDesc(ptr noundef byval(%struct.TensorDesc) align 8) #3

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #4

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef ptr @_Z11align_paramRSt6vectorI10TensorDescSaIS0_EERS_IPvSaIS4_EERjS4_RS0_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 4 dereferenceable(4), ptr noundef, ptr noundef nonnull align 4 dereferenceable(92)) #5

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN10TensorDescC2Ev(ptr noundef nonnull align 4 dereferenceable(92)) unnamed_addr #3 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef i32 @_Z10scale_axisSt6vectorI10TensorDescSaIS0_EES0_PiPS0_(ptr noundef, ptr noundef byval(%struct.TensorDesc) align 8, ptr noundef, ptr noundef) #5

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorI10TensorDescSaIS0_EEC2ERKS2_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #6 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorI10TensorDescSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #2 align 2

declare noundef i32 @_Z9scale_cpu10TensorDescPvS0_S0_14ScaleParamSpecS_S0_4Arch(ptr noundef byval(%struct.TensorDesc) align 8, ptr noundef, ptr noundef, ptr noundef, i64, ptr noundef byval(%struct.TensorDesc) align 8, ptr noundef, i32 noundef) #7

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPvSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef i32 @_Z14tensorNumBytes10TensorDesc(ptr noundef byval(%struct.TensorDesc) align 8) #5

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(92) ptr @_ZNSt6vectorI10TensorDescSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: nounwind
declare i64 @syscall(i64 noundef, ...) #8

declare i32 @printf(ptr noundef, ...) #7

declare i32 @fflush(ptr noundef) #7

; Function Attrs: noreturn nounwind
declare void @exit(i32 noundef) #9

declare noundef i32 @_Z9power_cpu10TensorDescPv14PowerParamSpecS_S0_4Arch(ptr noundef byval(%struct.TensorDesc) align 8, ptr noundef, <2 x float>, float, ptr noundef byval(%struct.TensorDesc) align 8, ptr noundef, i32 noundef) #7

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local ptr @ee2str(i32 noundef) #3

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef i32 @_Z16transformToFloat8DataTypePKvPfif(i32 noundef, ptr noundef, ptr noundef, i32 noundef, float noundef) #5

; Function Attrs: mustprogress uwtable
declare hidden noundef i32 @_ZL14eltwise_kernelSt6vectorI10TensorDescSaIS0_EES_IPvSaIS3_EE16EltwiseParamSpecS0_S3_4Arch(ptr noundef, ptr noundef, ptr noundef byval(%struct.EltwiseParamSpec) align 8, ptr noundef byval(%struct.TensorDesc) align 8, ptr noundef, i32 noundef) #6

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIPvSaIS0_EEC2ERKS2_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #6 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIPvSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #2 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN19ActivationParamSpecC2Ev(ptr noundef nonnull align 4 dereferenceable(20)) unnamed_addr #3 align 2

declare noundef i32 @_Z14activation_cpu10TensorDescPv19ActivationParamSpecS_S0_Pf4Arch(ptr noundef byval(%struct.TensorDesc) align 8, ptr noundef, ptr noundef byval(%struct.ActivationParamSpec) align 8, ptr noundef byval(%struct.TensorDesc) align 8, ptr noundef, ptr noundef, i32 noundef) #7

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="64" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #5 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #8 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #9 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #10 = { nounwind }
attributes #11 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"_ZTS4Arch", !7, i64 0}
!13 = !{!14, !10, i64 8}
!14 = !{!"_ZTS10TensorDesc", !15, i64 0, !16, i64 4, !10, i64 8, !7, i64 12}
!15 = !{!"_ZTS8DataType", !7, i64 0}
!16 = !{!"_ZTS10DataFormat", !7, i64 0}
!17 = !{i64 0, i64 4, !18, i64 4, i64 4, !19, i64 8, i64 4, !9, i64 12, i64 80, !20}
!18 = !{!15, !15, i64 0}
!19 = !{!16, !16, i64 0}
!20 = !{!7, !7, i64 0}
!21 = !{!22, !22, i64 0}
!22 = !{!"_ZTS2EE", !7, i64 0}
!23 = !{!24, !25, i64 0}
!24 = !{!"_ZTS16EltwiseParamSpec", !25, i64 0, !26, i64 4, !27, i64 40, !7, i64 44}
!25 = !{!"_ZTS11EltwiseMode", !7, i64 0}
!26 = !{!"_ZTS14EltwiseSumSpec", !7, i64 0, !10, i64 32}
!27 = !{!"_ZTS14ActivationMode", !7, i64 0}
!28 = !{!29, !10, i64 0}
!29 = !{!"_ZTS14ScaleParamSpec", !10, i64 0, !10, i64 4}
!30 = !{i64 0, i64 4, !9, i64 4, i64 4, !9}
!31 = !{!32, !33, i64 0}
!32 = !{!"_ZTS14PowerParamSpec", !33, i64 0, !33, i64 4, !33, i64 8}
!33 = !{!"float", !7, i64 0}
!34 = !{!32, !33, i64 4}
!35 = !{!32, !33, i64 8}
!36 = !{i64 0, i64 4, !37, i64 4, i64 4, !37, i64 8, i64 4, !37}
!37 = !{!33, !33, i64 0}
!38 = !{!14, !15, i64 0}
!39 = !{i64 0, i64 4, !40, i64 4, i64 32, !20, i64 36, i64 4, !9, i64 40, i64 4, !41, i64 44, i64 8, !20}
!40 = !{!25, !25, i64 0}
!41 = !{!27, !27, i64 0}
!42 = !{!24, !27, i64 40}
!43 = !{!44, !27, i64 0}
!44 = !{!"_ZTS19ActivationParamSpec", !27, i64 0, !7, i64 4}
!45 = !{i64 0, i64 4, !41, i64 4, i64 16, !20}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.PowerParamSpec = type { float, float, float }
%struct.EltwiseParamSpec = type { i32, %struct.EltwiseSumSpec, i32, %union.ActivationSpec }
%struct.EltwiseSumSpec = type { [8 x float], i32 }
%union.ActivationSpec = type { %struct.ClipParamSpec }
%struct.ClipParamSpec = type { float, float }
%struct.TensorDesc = type { i32, i32, i32, [20 x i32] }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<TensorDesc, std::allocator<TensorDesc>>::_Vector_impl" }
%"struct.std::_Vector_base<TensorDesc, std::allocator<TensorDesc>>::_Vector_impl" = type { %"struct.std::_Vector_base<TensorDesc, std::allocator<TensorDesc>>::_Vector_impl_data" }
%"struct.std::_Vector_base<TensorDesc, std::allocator<TensorDesc>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<void *, std::allocator<void *>>::_Vector_impl" }
%"struct.std::_Vector_base<void *, std::allocator<void *>>::_Vector_impl" = type { %"struct.std::_Vector_base<void *, std::allocator<void *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<void *, std::allocator<void *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%struct.ActivationParamSpec = type { i32, [4 x float] }

@.str = external hidden unnamed_addr constant [20 x i8], align 1
@stdout = external local_unnamed_addr global ptr, align 8
@.str.1 = external hidden unnamed_addr constant [23 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [18 x i8], align 1
@__const._Z11eltwise_cpuSt6vectorI10TensorDescSaIS0_EES_IPvSaIS3_EE16EltwiseParamSpecjS3_S0_S3_4Arch.pp2 = external hidden unnamed_addr constant %struct.PowerParamSpec, align 4

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z11eltwise_cpuSt6vectorI10TensorDescSaIS0_EES_IPvSaIS3_EE16EltwiseParamSpecjS3_S0_S3_4Arch(ptr noundef nonnull %0, ptr noundef %1, ptr nocapture noundef readonly byval(%struct.EltwiseParamSpec) align 8 %2, i32 noundef %3, ptr noundef %4, ptr noundef byval(%struct.TensorDesc) align 8 %5, ptr noundef %6, i32 noundef %7) local_unnamed_addr #0 personality ptr @__gxx_personality_v0 {
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca %struct.TensorDesc, align 8
  %12 = alloca %"class.std::vector", align 8
  %13 = alloca %struct.TensorDesc, align 8
  %14 = alloca %struct.TensorDesc, align 8
  %15 = alloca %struct.TensorDesc, align 8
  %16 = alloca %struct.TensorDesc, align 8
  %17 = alloca %struct.TensorDesc, align 8
  %18 = alloca %struct.TensorDesc, align 8
  %19 = alloca float, align 4
  %20 = alloca %struct.TensorDesc, align 8
  %21 = alloca %"class.std::vector", align 8
  %22 = alloca %"class.std::vector.0", align 8
  %23 = alloca %struct.ActivationParamSpec, align 8
  store i32 %3, ptr %9, align 4, !tbaa !5
  %24 = tail call noundef i64 @_ZNKSt6vectorI10TensorDescSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #11
  %25 = and i64 %24, 4294967294
  %26 = icmp eq i64 %25, 0
  %27 = getelementptr inbounds i8, ptr %5, i64 8
  %28 = load i32, ptr %27, align 8
  %29 = icmp eq i32 %28, 0
  %or.cond = select i1 %26, i1 true, i1 %29
  br i1 %or.cond, label %190, label %30

30:                                               ; preds = %8
  %31 = tail call noundef i32 @_Z17tensorNumElements10TensorDesc(ptr noundef nonnull byval(%struct.TensorDesc) align 8 %5)
  %32 = icmp eq i32 %31, 0
  br i1 %32, label %190, label %33

33:                                               ; preds = %30
  %34 = call noundef ptr @_Z11align_paramRSt6vectorI10TensorDescSaIS0_EERS_IPvSaIS4_EERjS4_RS0_(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, ptr noundef nonnull align 4 dereferenceable(4) %9, ptr noundef %4, ptr noundef nonnull align 4 dereferenceable(92) %5)
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %10) #11
  store i32 -1, ptr %10, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 92, ptr nonnull %11) #11
  call void @_ZN10TensorDescC2Ev(ptr noundef nonnull align 4 dereferenceable(92) %11) #11
  call void @_ZNSt6vectorI10TensorDescSaIS0_EEC2ERKS2_(ptr noundef nonnull align 8 dereferenceable(24) %12, ptr noundef nonnull align 8 dereferenceable(24) %0)
  %35 = invoke noundef i32 @_Z10scale_axisSt6vectorI10TensorDescSaIS0_EES0_PiPS0_(ptr noundef nonnull %12, ptr noundef nonnull byval(%struct.TensorDesc) align 8 %5, ptr noundef nonnull %10, ptr noundef nonnull %11)
          to label %36 unwind label %51

36:                                               ; preds = %33
  call void @_ZNSt6vectorI10TensorDescSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %12) #11
  %37 = icmp sgt i32 %35, -1
  br i1 %37, label %38, label %126

38:                                               ; preds = %36
  %39 = load i32, ptr %2, align 8
  switch i32 %39, label %.thread [
    i32 3, label %40
    i32 0, label %53
    i32 4, label %64
    i32 5, label %64
  ]

40:                                               ; preds = %38
  call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 8 dereferenceable(92) %13, ptr noundef nonnull align 8 dereferenceable(92) %11, i64 92, i1 false), !tbaa.struct !9
  %41 = load i32, ptr %10, align 4, !tbaa !5
  %42 = sext i32 %41 to i64
  %43 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPvSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %42) #11
  %44 = load ptr, ptr %43, align 8, !tbaa !15
  %45 = load i32, ptr %10, align 4, !tbaa !5
  %46 = sub nsw i32 1, %45
  %47 = sext i32 %46 to i64
  %48 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPvSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %47) #11
  %49 = load ptr, ptr %48, align 8, !tbaa !15
  %.sroa.0114.0.insert.ext118 = zext nneg i32 %35 to i64
  %50 = call noundef i32 @_Z9scale_cpu10TensorDescPvS0_S0_14ScaleParamSpecS_S0_4Arch(ptr noundef nonnull byval(%struct.TensorDesc) align 8 %13, ptr noundef %44, ptr noundef %49, ptr noundef null, i64 %.sroa.0114.0.insert.ext118, ptr noundef nonnull byval(%struct.TensorDesc) align 8 %11, ptr noundef %6, i32 noundef %7)
  br label %181

51:                                               ; preds = %33
  %52 = landingpad { ptr, i32 }
          cleanup
  br label %189

53:                                               ; preds = %38
  call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 8 dereferenceable(92) %14, ptr noundef nonnull align 8 dereferenceable(92) %11, i64 92, i1 false), !tbaa.struct !9
  %54 = load i32, ptr %10, align 4, !tbaa !5
  %55 = sext i32 %54 to i64
  %56 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPvSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %55) #11
  %57 = load ptr, ptr %56, align 8, !tbaa !15
  %58 = load i32, ptr %10, align 4, !tbaa !5
  %59 = sub nsw i32 1, %58
  %60 = sext i32 %59 to i64
  %61 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPvSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %60) #11
  %62 = load ptr, ptr %61, align 8, !tbaa !15
  %.sroa.0114.0.insert.ext115 = zext nneg i32 %35 to i64
  %63 = call noundef i32 @_Z9scale_cpu10TensorDescPvS0_S0_14ScaleParamSpecS_S0_4Arch(ptr noundef nonnull byval(%struct.TensorDesc) align 8 %14, ptr noundef %57, ptr noundef null, ptr noundef %62, i64 %.sroa.0114.0.insert.ext115, ptr noundef nonnull byval(%struct.TensorDesc) align 8 %11, ptr noundef %6, i32 noundef %7)
  br label %181

64:                                               ; preds = %38, %38
  %65 = icmp eq i32 %39, 4
  %. = select i1 %65, ptr %34, ptr null
  %.182 = select i1 %65, ptr null, ptr %34
  %.183 = select i1 %65, <2 x float> <float -1.000000e+00, float 0.000000e+00>, <2 x float> <float 1.000000e+00, float 0.000000e+00>
  %.184 = select i1 %65, float 1.000000e+00, float -1.000000e+00
  %66 = load i32, ptr %9, align 4, !tbaa !5
  %67 = load i32, ptr %10, align 4, !tbaa !5
  %68 = sub nsw i32 1, %67
  %69 = sext i32 %68 to i64
  %70 = call noundef nonnull align 4 dereferenceable(92) ptr @_ZNSt6vectorI10TensorDescSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %69) #11
  call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 8 dereferenceable(92) %15, ptr noundef nonnull align 4 dereferenceable(92) %70, i64 92, i1 false), !tbaa.struct !9
  %71 = call noundef i32 @_Z14tensorNumBytes10TensorDesc(ptr noundef nonnull byval(%struct.TensorDesc) align 8 %15)
  %.not = icmp ult i32 %66, %71
  br i1 %.not, label %72, label %81

72:                                               ; preds = %64
  %73 = call i64 (i64, ...) @syscall(i64 noundef 186) #11
  %74 = trunc i64 %73 to i32
  %75 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str, i32 noundef %74)
  %76 = load ptr, ptr @stdout, align 8, !tbaa !15
  %77 = call i32 @fflush(ptr noundef %76)
  %78 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.1)
  %79 = load ptr, ptr @stdout, align 8, !tbaa !15
  %80 = call i32 @fflush(ptr noundef %79)
  call void @exit(i32 noundef 1) #12
  unreachable

81:                                               ; preds = %64
  %82 = load i32, ptr %10, align 4, !tbaa !5
  %83 = sub nsw i32 1, %82
  %84 = sext i32 %83 to i64
  %85 = call noundef nonnull align 4 dereferenceable(92) ptr @_ZNSt6vectorI10TensorDescSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %84) #11
  call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 8 dereferenceable(92) %16, ptr noundef nonnull align 4 dereferenceable(92) %85, i64 92, i1 false), !tbaa.struct !9
  %86 = load i32, ptr %10, align 4, !tbaa !5
  %87 = sub nsw i32 1, %86
  %88 = sext i32 %87 to i64
  %89 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPvSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %88) #11
  %90 = load ptr, ptr %89, align 8, !tbaa !15
  %91 = load i32, ptr %10, align 4, !tbaa !5
  %92 = sub nsw i32 1, %91
  %93 = sext i32 %92 to i64
  %94 = call noundef nonnull align 4 dereferenceable(92) ptr @_ZNSt6vectorI10TensorDescSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %93) #11
  call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 8 dereferenceable(92) %17, ptr noundef nonnull align 4 dereferenceable(92) %94, i64 92, i1 false), !tbaa.struct !9
  %95 = call noundef i32 @_Z9power_cpu10TensorDescPv14PowerParamSpecS_S0_4Arch(ptr noundef nonnull byval(%struct.TensorDesc) align 8 %16, ptr noundef %90, <2 x float> %.183, float %.184, ptr noundef nonnull byval(%struct.TensorDesc) align 8 %17, ptr noundef %34, i32 noundef %7)
  %.not180 = icmp eq i32 %95, 0
  br i1 %.not180, label %106, label %96

96:                                               ; preds = %81
  %97 = call i64 (i64, ...) @syscall(i64 noundef 186) #11
  %98 = trunc i64 %97 to i32
  %99 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str, i32 noundef %98)
  %100 = load ptr, ptr @stdout, align 8, !tbaa !15
  %101 = call i32 @fflush(ptr noundef %100)
  %102 = call ptr @ee2str(i32 noundef %95)
  %103 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.2, ptr noundef %102)
  %104 = load ptr, ptr @stdout, align 8, !tbaa !15
  %105 = call i32 @fflush(ptr noundef %104)
  call void @exit(i32 noundef 1) #12
  unreachable

106:                                              ; preds = %81
  call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 8 dereferenceable(92) %18, ptr noundef nonnull align 8 dereferenceable(92) %11, i64 92, i1 false), !tbaa.struct !9
  %107 = load i32, ptr %10, align 4, !tbaa !5
  %108 = sext i32 %107 to i64
  %109 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPvSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %108) #11
  %110 = load ptr, ptr %109, align 8, !tbaa !15
  %.sroa.0114.0.insert.ext = zext nneg i32 %35 to i64
  %111 = call noundef i32 @_Z9scale_cpu10TensorDescPvS0_S0_14ScaleParamSpecS_S0_4Arch(ptr noundef nonnull byval(%struct.TensorDesc) align 8 %18, ptr noundef %110, ptr noundef %.182, ptr noundef %., i64 %.sroa.0114.0.insert.ext, ptr noundef nonnull byval(%struct.TensorDesc) align 8 %11, ptr noundef %6, i32 noundef %7)
  %112 = load i32, ptr %10, align 4, !tbaa !5
  %113 = icmp eq i32 %112, 1
  br i1 %113, label %114, label %181

114:                                              ; preds = %106
  %115 = call noundef i32 @_Z9power_cpu10TensorDescPv14PowerParamSpecS_S0_4Arch(ptr noundef nonnull byval(%struct.TensorDesc) align 8 %11, ptr noundef %6, <2 x float> %.183, float %.184, ptr noundef nonnull byval(%struct.TensorDesc) align 8 %11, ptr noundef %6, i32 noundef %7)
  %.not181 = icmp eq i32 %115, 0
  br i1 %.not181, label %181, label %116

116:                                              ; preds = %114
  %117 = call i64 (i64, ...) @syscall(i64 noundef 186) #11
  %118 = trunc i64 %117 to i32
  %119 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str, i32 noundef %118)
  %120 = load ptr, ptr @stdout, align 8, !tbaa !15
  %121 = call i32 @fflush(ptr noundef %120)
  %122 = call ptr @ee2str(i32 noundef %115)
  %123 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.2, ptr noundef %122)
  %124 = load ptr, ptr @stdout, align 8, !tbaa !15
  %125 = call i32 @fflush(ptr noundef %124)
  call void @exit(i32 noundef 1) #12
  unreachable

126:                                              ; preds = %36
  %127 = icmp eq i32 %35, -2
  br i1 %127, label %128, label %.thread

128:                                              ; preds = %126
  %129 = load i32, ptr %2, align 8
  switch i32 %129, label %.thread [
    i32 5, label %130
    i32 4, label %130
    i32 3, label %130
    i32 0, label %130
  ]

130:                                              ; preds = %128, %128, %128, %128
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %19) #11
  %131 = load i32, ptr %10, align 4, !tbaa !5
  %132 = sub nsw i32 1, %131
  %133 = sext i32 %132 to i64
  %134 = call noundef nonnull align 4 dereferenceable(92) ptr @_ZNSt6vectorI10TensorDescSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %133) #11
  %135 = load i32, ptr %134, align 4, !tbaa !17
  %136 = load i32, ptr %10, align 4, !tbaa !5
  %137 = sub nsw i32 1, %136
  %138 = sext i32 %137 to i64
  %139 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPvSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %138) #11
  %140 = load ptr, ptr %139, align 8, !tbaa !15
  %141 = call noundef i32 @_Z16transformToFloat8DataTypePKvPfif(i32 noundef %135, ptr noundef %140, ptr noundef nonnull %19, i32 noundef 1, float noundef 1.000000e+00)
  %.sroa.055.0.copyload = load <2 x float>, ptr @__const._Z11eltwise_cpuSt6vectorI10TensorDescSaIS0_EES_IPvSaIS3_EE16EltwiseParamSpecjS3_S0_S3_4Arch.pp2, align 4
  %.sroa.7.0.copyload = load float, ptr getelementptr inbounds (i8, ptr @__const._Z11eltwise_cpuSt6vectorI10TensorDescSaIS0_EES_IPvSaIS3_EE16EltwiseParamSpecjS3_S0_S3_4Arch.pp2, i64 8), align 4
  switch i32 %129, label %173 [
    i32 3, label %142
    i32 0, label %144
    i32 4, label %146
    i32 5, label %153
  ]

142:                                              ; preds = %130
  %143 = load float, ptr %19, align 4, !tbaa !19
  %.sroa.058.4.vec.insert79 = insertelement <2 x float> <float poison, float 0.000000e+00>, float %143, i64 0
  br label %160

144:                                              ; preds = %130
  %145 = load float, ptr %19, align 4, !tbaa !19
  %.sroa.058.4.vec.insert77 = insertelement <2 x float> <float 1.000000e+00, float poison>, float %145, i64 1
  br label %160

146:                                              ; preds = %130
  %147 = load i32, ptr %10, align 4, !tbaa !5
  %148 = icmp eq i32 %147, 0
  %149 = load float, ptr %19, align 4, !tbaa !19
  br i1 %148, label %150, label %152

150:                                              ; preds = %146
  %151 = fneg float %149
  %.sroa.058.4.vec.insert75 = insertelement <2 x float> <float 1.000000e+00, float poison>, float %151, i64 1
  br label %160

152:                                              ; preds = %146
  %.sroa.058.4.vec.insert73 = insertelement <2 x float> <float -1.000000e+00, float poison>, float %149, i64 1
  br label %160

153:                                              ; preds = %130
  %154 = load i32, ptr %10, align 4, !tbaa !5
  %155 = icmp eq i32 %154, 0
  %156 = load float, ptr %19, align 4, !tbaa !19
  br i1 %155, label %157, label %159

157:                                              ; preds = %153
  %158 = fdiv float 1.000000e+00, %156
  %.sroa.058.4.vec.insert71 = insertelement <2 x float> <float poison, float 0.000000e+00>, float %158, i64 0
  br label %160

159:                                              ; preds = %153
  %.sroa.055.4.vec.insert = insertelement <2 x float> <float poison, float 0.000000e+00>, float %156, i64 0
  br label %160

160:                                              ; preds = %144, %159, %157, %150, %152, %142
  %.sroa.055.0 = phi <2 x float> [ %.sroa.055.0.copyload, %142 ], [ %.sroa.055.0.copyload, %144 ], [ %.sroa.055.0.copyload, %150 ], [ %.sroa.055.0.copyload, %152 ], [ %.sroa.055.0.copyload, %157 ], [ %.sroa.055.4.vec.insert, %159 ]
  %.sroa.7.0 = phi float [ %.sroa.7.0.copyload, %142 ], [ %.sroa.7.0.copyload, %144 ], [ %.sroa.7.0.copyload, %150 ], [ %.sroa.7.0.copyload, %152 ], [ %.sroa.7.0.copyload, %157 ], [ 1.000000e+00, %159 ]
  %.sroa.058.0 = phi <2 x float> [ %.sroa.058.4.vec.insert79, %142 ], [ %.sroa.058.4.vec.insert77, %144 ], [ %.sroa.058.4.vec.insert75, %150 ], [ %.sroa.058.4.vec.insert73, %152 ], [ %.sroa.058.4.vec.insert71, %157 ], [ <float 1.000000e+00, float 0.000000e+00>, %159 ]
  %.sroa.15.0 = phi float [ 1.000000e+00, %142 ], [ 1.000000e+00, %144 ], [ 1.000000e+00, %150 ], [ 1.000000e+00, %152 ], [ 1.000000e+00, %157 ], [ -1.000000e+00, %159 ]
  %161 = load i32, ptr %10, align 4, !tbaa !5
  %162 = sext i32 %161 to i64
  %163 = call noundef nonnull align 4 dereferenceable(92) ptr @_ZNSt6vectorI10TensorDescSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %162) #11
  call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 8 dereferenceable(92) %20, ptr noundef nonnull align 4 dereferenceable(92) %163, i64 92, i1 false), !tbaa.struct !9
  %164 = load i32, ptr %10, align 4, !tbaa !5
  %165 = sext i32 %164 to i64
  %166 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPvSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %165) #11
  %167 = load ptr, ptr %166, align 8, !tbaa !15
  %168 = call noundef i32 @_Z9power_cpu10TensorDescPv14PowerParamSpecS_S0_4Arch(ptr noundef nonnull byval(%struct.TensorDesc) align 8 %20, ptr noundef %167, <2 x float> %.sroa.058.0, float %.sroa.15.0, ptr noundef nonnull byval(%struct.TensorDesc) align 8 %5, ptr noundef %6, i32 noundef %7)
  %169 = icmp eq i32 %168, 0
  %.sroa.055.0.vec.extract = extractelement <2 x float> %.sroa.055.0, i64 0
  %170 = fcmp une float %.sroa.055.0.vec.extract, 1.000000e+00
  %or.cond26 = select i1 %169, i1 %170, i1 false
  br i1 %or.cond26, label %171, label %.thread185

171:                                              ; preds = %160
  %172 = call noundef i32 @_Z9power_cpu10TensorDescPv14PowerParamSpecS_S0_4Arch(ptr noundef nonnull byval(%struct.TensorDesc) align 8 %5, ptr noundef %6, <2 x float> %.sroa.055.0, float %.sroa.7.0, ptr noundef nonnull byval(%struct.TensorDesc) align 8 %5, ptr noundef %6, i32 noundef %7)
  br label %.thread185

.thread185:                                       ; preds = %171, %160
  %.2168.ph = phi i32 [ %168, %160 ], [ %172, %171 ]
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %19) #11
  br label %181

173:                                              ; preds = %130
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %19) #11
  br label %188

.thread:                                          ; preds = %38, %128, %126
  call void @_ZNSt6vectorI10TensorDescSaIS0_EEC2ERKS2_(ptr noundef nonnull align 8 dereferenceable(24) %21, ptr noundef nonnull align 8 dereferenceable(24) %0)
  invoke void @_ZNSt6vectorIPvSaIS0_EEC2ERKS2_(ptr noundef nonnull align 8 dereferenceable(24) %22, ptr noundef nonnull align 8 dereferenceable(24) %1)
          to label %174 unwind label %177

174:                                              ; preds = %.thread
  %175 = invoke noundef i32 @_ZL14eltwise_kernelSt6vectorI10TensorDescSaIS0_EES_IPvSaIS3_EE16EltwiseParamSpecS0_S3_4Arch(ptr noundef nonnull %21, ptr noundef nonnull %22, ptr noundef nonnull byval(%struct.EltwiseParamSpec) align 8 %2, ptr noundef nonnull byval(%struct.TensorDesc) align 8 %5, ptr noundef %6, i32 noundef %7)
          to label %176 unwind label %179

176:                                              ; preds = %174
  call void @_ZNSt6vectorIPvSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %22) #11
  call void @_ZNSt6vectorI10TensorDescSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %21) #11
  br label %181

177:                                              ; preds = %.thread
  %178 = landingpad { ptr, i32 }
          cleanup
  br label %189

179:                                              ; preds = %174
  %180 = landingpad { ptr, i32 }
          cleanup
  call void @_ZNSt6vectorIPvSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %22) #11
  br label %189

181:                                              ; preds = %.thread185, %40, %53, %114, %106, %176
  %.3 = phi i32 [ %175, %176 ], [ %50, %40 ], [ %63, %53 ], [ %111, %114 ], [ %111, %106 ], [ %.2168.ph, %.thread185 ]
  %182 = icmp eq i32 %.3, 0
  %183 = getelementptr inbounds i8, ptr %2, i64 40
  %184 = load i32, ptr %183, align 8
  %185 = icmp ne i32 %184, 0
  %or.cond29 = select i1 %182, i1 %185, i1 false
  br i1 %or.cond29, label %186, label %188

186:                                              ; preds = %181
  call void @llvm.lifetime.start.p0(i64 20, ptr nonnull %23) #11
  call void @_ZN19ActivationParamSpecC2Ev(ptr noundef nonnull align 4 dereferenceable(20) %23) #11
  store i32 %184, ptr %23, align 8, !tbaa !21
  %187 = call noundef i32 @_Z14activation_cpu10TensorDescPv19ActivationParamSpecS_S0_Pf4Arch(ptr noundef nonnull byval(%struct.TensorDesc) align 8 %5, ptr noundef %6, ptr noundef nonnull byval(%struct.ActivationParamSpec) align 8 %23, ptr noundef nonnull byval(%struct.TensorDesc) align 8 %5, ptr noundef %6, ptr noundef null, i32 noundef %7)
  call void @llvm.lifetime.end.p0(i64 20, ptr nonnull %23) #11
  br label %188

188:                                              ; preds = %173, %181, %186
  %.1 = phi i32 [ 51, %173 ], [ %187, %186 ], [ %.3, %181 ]
  call void @llvm.lifetime.end.p0(i64 92, ptr nonnull %11) #11
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %10) #11
  br label %190

189:                                              ; preds = %177, %179, %51
  %.sink = phi ptr [ %12, %51 ], [ %21, %179 ], [ %21, %177 ]
  %.pn.pn = phi { ptr, i32 } [ %52, %51 ], [ %180, %179 ], [ %178, %177 ]
  call void @_ZNSt6vectorI10TensorDescSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %.sink) #11
  call void @llvm.lifetime.end.p0(i64 92, ptr nonnull %11) #11
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %10) #11
  resume { ptr, i32 } %.pn.pn

190:                                              ; preds = %30, %8, %188
  %.2 = phi i32 [ %.1, %188 ], [ 2, %8 ], [ 0, %30 ]
  ret i32 %.2
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorI10TensorDescSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #2 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z17tensorNumElements10TensorDesc(ptr noundef byval(%struct.TensorDesc) align 8) local_unnamed_addr #3

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #4

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef ptr @_Z11align_paramRSt6vectorI10TensorDescSaIS0_EERS_IPvSaIS4_EERjS4_RS0_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 4 dereferenceable(4), ptr noundef, ptr noundef nonnull align 4 dereferenceable(92)) local_unnamed_addr #5

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN10TensorDescC2Ev(ptr noundef nonnull align 4 dereferenceable(92)) unnamed_addr #3 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef i32 @_Z10scale_axisSt6vectorI10TensorDescSaIS0_EES0_PiPS0_(ptr noundef, ptr noundef byval(%struct.TensorDesc) align 8, ptr noundef, ptr noundef) local_unnamed_addr #5

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorI10TensorDescSaIS0_EEC2ERKS2_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #6 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorI10TensorDescSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #2 align 2

declare noundef i32 @_Z9scale_cpu10TensorDescPvS0_S0_14ScaleParamSpecS_S0_4Arch(ptr noundef byval(%struct.TensorDesc) align 8, ptr noundef, ptr noundef, ptr noundef, i64, ptr noundef byval(%struct.TensorDesc) align 8, ptr noundef, i32 noundef) local_unnamed_addr #7

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPvSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef i32 @_Z14tensorNumBytes10TensorDesc(ptr noundef byval(%struct.TensorDesc) align 8) local_unnamed_addr #5

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(92) ptr @_ZNSt6vectorI10TensorDescSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #2 align 2

; Function Attrs: nounwind
declare i64 @syscall(i64 noundef, ...) local_unnamed_addr #8

; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #9

; Function Attrs: nofree nounwind
declare noundef i32 @fflush(ptr nocapture noundef) local_unnamed_addr #9

; Function Attrs: noreturn nounwind
declare void @exit(i32 noundef) local_unnamed_addr #10

declare noundef i32 @_Z9power_cpu10TensorDescPv14PowerParamSpecS_S0_4Arch(ptr noundef byval(%struct.TensorDesc) align 8, ptr noundef, <2 x float>, float, ptr noundef byval(%struct.TensorDesc) align 8, ptr noundef, i32 noundef) local_unnamed_addr #7

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local ptr @ee2str(i32 noundef) local_unnamed_addr #3

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef i32 @_Z16transformToFloat8DataTypePKvPfif(i32 noundef, ptr noundef, ptr noundef, i32 noundef, float noundef) local_unnamed_addr #5

; Function Attrs: mustprogress uwtable
declare hidden noundef i32 @_ZL14eltwise_kernelSt6vectorI10TensorDescSaIS0_EES_IPvSaIS3_EE16EltwiseParamSpecS0_S3_4Arch(ptr noundef, ptr noundef, ptr noundef byval(%struct.EltwiseParamSpec) align 8, ptr noundef byval(%struct.TensorDesc) align 8, ptr noundef, i32 noundef) local_unnamed_addr #6

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIPvSaIS0_EEC2ERKS2_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #6 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIPvSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #2 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN19ActivationParamSpecC2Ev(ptr noundef nonnull align 4 dereferenceable(20)) unnamed_addr #3 align 2

declare noundef i32 @_Z14activation_cpu10TensorDescPv19ActivationParamSpecS_S0_Pf4Arch(ptr noundef byval(%struct.TensorDesc) align 8, ptr noundef, ptr noundef byval(%struct.ActivationParamSpec) align 8, ptr noundef byval(%struct.TensorDesc) align 8, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #7

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="64" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #5 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #8 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #9 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #10 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #11 = { nounwind }
attributes #12 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{i64 0, i64 4, !10, i64 4, i64 4, !12, i64 8, i64 4, !5, i64 12, i64 80, !14}
!10 = !{!11, !11, i64 0}
!11 = !{!"_ZTS8DataType", !7, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"_ZTS10DataFormat", !7, i64 0}
!14 = !{!7, !7, i64 0}
!15 = !{!16, !16, i64 0}
!16 = !{!"any pointer", !7, i64 0}
!17 = !{!18, !11, i64 0}
!18 = !{!"_ZTS10TensorDesc", !11, i64 0, !13, i64 4, !6, i64 8, !7, i64 12}
!19 = !{!20, !20, i64 0}
!20 = !{!"float", !7, i64 0}
!21 = !{!22, !23, i64 0}
!22 = !{!"_ZTS19ActivationParamSpec", !23, i64 0, !7, i64 4}
!23 = !{!"_ZTS14ActivationMode", !7, i64 0}


; Effective O3 passes: CorrelatedValuePropagationPass,DSEPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,MemCpyOptPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass