; LLVM IR from pkurth/D3D12Renderer :: ext/half (half)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint nounwind uwtable
declare hidden zeroext i16 @uint16_sub(i16 noundef zeroext, i16 noundef zeroext) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint nounwind uwtable
declare hidden zeroext i16 @uint16_sll(i16 noundef zeroext, i16 noundef zeroext) #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden zeroext i16 @uint16_and(i16 noundef zeroext, i16 noundef zeroext) #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden zeroext i16 @uint16_xor(i16 noundef zeroext, i16 noundef zeroext) #1

; Function Attrs: nounwind uwtable
define dso_local zeroext i16 @half_div(i16 noundef zeroext %0, i16 noundef zeroext %1) #2 {
  %3 = alloca i16, align 2
  %4 = alloca i16, align 2
  %5 = alloca i16, align 2
  %6 = alloca i16, align 2
  %7 = alloca i16, align 2
  %8 = alloca i16, align 2
  %9 = alloca i16, align 2
  %10 = alloca i16, align 2
  %11 = alloca i16, align 2
  %12 = alloca i16, align 2
  %13 = alloca i16, align 2
  %14 = alloca i16, align 2
  %15 = alloca i16, align 2
  %16 = alloca i16, align 2
  %17 = alloca i16, align 2
  %18 = alloca i16, align 2
  %19 = alloca i16, align 2
  %20 = alloca i16, align 2
  %21 = alloca i16, align 2
  %22 = alloca i16, align 2
  %23 = alloca i16, align 2
  %24 = alloca i16, align 2
  %25 = alloca i16, align 2
  %26 = alloca i16, align 2
  %27 = alloca i16, align 2
  %28 = alloca i32, align 4
  %29 = alloca i16, align 2
  store i16 %0, ptr %3, align 2, !tbaa !5
  store i16 %1, ptr %4, align 2, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 2, ptr %5) #3
  store i16 1, ptr %5, align 2, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 2, ptr %6) #3
  store i16 15, ptr %6, align 2, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 2, ptr %7) #3
  store i16 -32768, ptr %7, align 2, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 2, ptr %8) #3
  store i16 31744, ptr %8, align 2, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 2, ptr %9) #3
  store i16 1023, ptr %9, align 2, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 2, ptr %10) #3
  store i16 8192, ptr %10, align 2, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 2, ptr %11) #3
  store i16 1024, ptr %11, align 2, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 2, ptr %12) #3
  store i16 10, ptr %12, align 2, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 2, ptr %13) #3
  store i16 15, ptr %13, align 2, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 2, ptr %14) #3
  store i16 16384, ptr %14, align 2, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 2, ptr %15) #3
  store i16 14, ptr %15, align 2, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 2, ptr %16) #3
  store i16 3, ptr %16, align 2, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 2, ptr %17) #3
  store i16 -512, ptr %17, align 2, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 2, ptr %18) #3
  %30 = load i16, ptr %5, align 2, !tbaa !5
  %31 = load i16, ptr %16, align 2, !tbaa !5
  %32 = call zeroext i16 @uint16_sll(i16 noundef zeroext %30, i16 noundef zeroext %31)
  store i16 %32, ptr %18, align 2, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 2, ptr %19) #3
  %33 = load i16, ptr %18, align 2, !tbaa !5
  %34 = load i16, ptr %5, align 2, !tbaa !5
  %35 = call zeroext i16 @uint16_sub(i16 noundef zeroext %33, i16 noundef zeroext %34)
  store i16 %35, ptr %19, align 2, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 2, ptr %20) #3
  %36 = load i16, ptr %3, align 2, !tbaa !5
  %37 = load i16, ptr %7, align 2, !tbaa !5
  %38 = call zeroext i16 @uint16_and(i16 noundef zeroext %36, i16 noundef zeroext %37)
  %39 = zext i16 %38 to i32
  %40 = load i16, ptr %6, align 2, !tbaa !5
  %41 = zext i16 %40 to i32
  %42 = ashr i32 %39, %41
  %43 = trunc i32 %42 to i16
  store i16 %43, ptr %20, align 2, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 2, ptr %21) #3
  %44 = load i16, ptr %3, align 2, !tbaa !5
  %45 = load i16, ptr %8, align 2, !tbaa !5
  %46 = call zeroext i16 @uint16_and(i16 noundef zeroext %44, i16 noundef zeroext %45)
  %47 = zext i16 %46 to i32
  %48 = load i16, ptr %12, align 2, !tbaa !5
  %49 = zext i16 %48 to i32
  %50 = ashr i32 %47, %49
  %51 = trunc i32 %50 to i16
  store i16 %51, ptr %21, align 2, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 2, ptr %22) #3
  %52 = load i16, ptr %3, align 2, !tbaa !5
  %53 = load i16, ptr %9, align 2, !tbaa !5
  %54 = call zeroext i16 @uint16_and(i16 noundef zeroext %52, i16 noundef zeroext %53)
  store i16 %54, ptr %22, align 2, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 2, ptr %23) #3
  %55 = load i16, ptr %4, align 2, !tbaa !5
  %56 = load i16, ptr %7, align 2, !tbaa !5
  %57 = call zeroext i16 @uint16_and(i16 noundef zeroext %55, i16 noundef zeroext %56)
  %58 = zext i16 %57 to i32
  %59 = load i16, ptr %6, align 2, !tbaa !5
  %60 = zext i16 %59 to i32
  %61 = ashr i32 %58, %60
  %62 = trunc i32 %61 to i16
  store i16 %62, ptr %23, align 2, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 2, ptr %24) #3
  %63 = load i16, ptr %4, align 2, !tbaa !5
  %64 = load i16, ptr %8, align 2, !tbaa !5
  %65 = call zeroext i16 @uint16_and(i16 noundef zeroext %63, i16 noundef zeroext %64)
  %66 = zext i16 %65 to i32
  %67 = load i16, ptr %12, align 2, !tbaa !5
  %68 = zext i16 %67 to i32
  %69 = ashr i32 %66, %68
  %70 = trunc i32 %69 to i16
  store i16 %70, ptr %24, align 2, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 2, ptr %25) #3
  %71 = load i16, ptr %4, align 2, !tbaa !5
  %72 = load i16, ptr %9, align 2, !tbaa !5
  %73 = call zeroext i16 @uint16_and(i16 noundef zeroext %71, i16 noundef zeroext %72)
  store i16 %73, ptr %25, align 2, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 2, ptr %26) #3
  %74 = load i16, ptr %20, align 2, !tbaa !5
  %75 = load i16, ptr %23, align 2, !tbaa !5
  %76 = call zeroext i16 @uint16_xor(i16 noundef zeroext %74, i16 noundef zeroext %75)
  store i16 %76, ptr %26, align 2, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 2, ptr %27) #3
  %77 = load i16, ptr %21, align 2, !tbaa !5
  %78 = zext i16 %77 to i32
  %79 = load i16, ptr %24, align 2, !tbaa !5
  %80 = zext i16 %79 to i32
  %81 = sub nsw i32 %78, %80
  %82 = add nsw i32 %81, 13
  %83 = trunc i32 %82 to i16
  store i16 %83, ptr %27, align 2, !tbaa !5
  %84 = load i16, ptr %22, align 2, !tbaa !5
  %85 = zext i16 %84 to i32
  %86 = load i16, ptr %11, align 2, !tbaa !5
  %87 = zext i16 %86 to i32
  %88 = or i32 %85, %87
  %89 = shl i32 %88, 4
  %90 = trunc i32 %89 to i16
  store i16 %90, ptr %22, align 2, !tbaa !5
  %91 = load i16, ptr %25, align 2, !tbaa !5
  %92 = zext i16 %91 to i32
  %93 = load i16, ptr %11, align 2, !tbaa !5
  %94 = zext i16 %93 to i32
  %95 = or i32 %92, %94
  %96 = shl i32 %95, 5
  %97 = trunc i32 %96 to i16
  store i16 %97, ptr %25, align 2, !tbaa !5
  %98 = load i16, ptr %25, align 2, !tbaa !5
  %99 = zext i16 %98 to i32
  %100 = load i16, ptr %22, align 2, !tbaa !5
  %101 = zext i16 %100 to i32
  %102 = load i16, ptr %22, align 2, !tbaa !5
  %103 = zext i16 %102 to i32
  %104 = add nsw i32 %101, %103
  %105 = icmp sle i32 %99, %104
  br i1 %105, label %106, label %113

106:                                              ; preds = %2
  %107 = load i16, ptr %22, align 2, !tbaa !5
  %108 = zext i16 %107 to i32
  %109 = ashr i32 %108, 1
  %110 = trunc i32 %109 to i16
  store i16 %110, ptr %22, align 2, !tbaa !5
  %111 = load i16, ptr %27, align 2, !tbaa !5
  %112 = add i16 %111, 1
  store i16 %112, ptr %27, align 2, !tbaa !5
  br label %113

113:                                              ; preds = %106, %2
  call void @llvm.lifetime.start.p0(i64 4, ptr %28) #3
  %114 = load i16, ptr %22, align 2, !tbaa !5
  %115 = zext i16 %114 to i32
  %116 = shl i32 %115, 16
  %117 = load i16, ptr %25, align 2, !tbaa !5
  %118 = zext i16 %117 to i32
  %119 = udiv i32 %116, %118
  store i32 %119, ptr %28, align 4, !tbaa !9
  %120 = load i32, ptr %28, align 4, !tbaa !9
  %121 = and i32 %120, 31
  %122 = icmp eq i32 %121, 0
  br i1 %122, label %123, label %137

123:                                              ; preds = %113
  %124 = load i16, ptr %25, align 2, !tbaa !5
  %125 = zext i16 %124 to i64
  %126 = load i32, ptr %28, align 4, !tbaa !9
  %127 = zext i32 %126 to i64
  %128 = mul i64 %125, %127
  %129 = load i16, ptr %22, align 2, !tbaa !5
  %130 = zext i16 %129 to i32
  %131 = shl i32 %130, 16
  %132 = zext i32 %131 to i64
  %133 = icmp ne i64 %128, %132
  %134 = zext i1 %133 to i32
  %135 = load i32, ptr %28, align 4, !tbaa !9
  %136 = or i32 %135, %134
  store i32 %136, ptr %28, align 4, !tbaa !9
  br label %137

137:                                              ; preds = %123, %113
  call void @llvm.lifetime.start.p0(i64 2, ptr %29) #3
  %138 = load i32, ptr %28, align 4, !tbaa !9
  %139 = lshr i32 %138, 4
  %140 = load i16, ptr %27, align 2, !tbaa !5
  %141 = zext i16 %140 to i32
  %142 = load i16, ptr %12, align 2, !tbaa !5
  %143 = zext i16 %142 to i32
  %144 = shl i32 %141, %143
  %145 = or i32 %139, %144
  %146 = load i16, ptr %26, align 2, !tbaa !5
  %147 = zext i16 %146 to i32
  %148 = load i16, ptr %6, align 2, !tbaa !5
  %149 = zext i16 %148 to i32
  %150 = shl i32 %147, %149
  %151 = or i32 %145, %150
  %152 = trunc i32 %151 to i16
  store i16 %152, ptr %29, align 2, !tbaa !5
  %153 = load i16, ptr %29, align 2, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 2, ptr %29) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %28) #3
  call void @llvm.lifetime.end.p0(i64 2, ptr %27) #3
  call void @llvm.lifetime.end.p0(i64 2, ptr %26) #3
  call void @llvm.lifetime.end.p0(i64 2, ptr %25) #3
  call void @llvm.lifetime.end.p0(i64 2, ptr %24) #3
  call void @llvm.lifetime.end.p0(i64 2, ptr %23) #3
  call void @llvm.lifetime.end.p0(i64 2, ptr %22) #3
  call void @llvm.lifetime.end.p0(i64 2, ptr %21) #3
  call void @llvm.lifetime.end.p0(i64 2, ptr %20) #3
  call void @llvm.lifetime.end.p0(i64 2, ptr %19) #3
  call void @llvm.lifetime.end.p0(i64 2, ptr %18) #3
  call void @llvm.lifetime.end.p0(i64 2, ptr %17) #3
  call void @llvm.lifetime.end.p0(i64 2, ptr %16) #3
  call void @llvm.lifetime.end.p0(i64 2, ptr %15) #3
  call void @llvm.lifetime.end.p0(i64 2, ptr %14) #3
  call void @llvm.lifetime.end.p0(i64 2, ptr %13) #3
  call void @llvm.lifetime.end.p0(i64 2, ptr %12) #3
  call void @llvm.lifetime.end.p0(i64 2, ptr %11) #3
  call void @llvm.lifetime.end.p0(i64 2, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 2, ptr %9) #3
  call void @llvm.lifetime.end.p0(i64 2, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 2, ptr %7) #3
  call void @llvm.lifetime.end.p0(i64 2, ptr %6) #3
  call void @llvm.lifetime.end.p0(i64 2, ptr %5) #3
  ret i16 %153
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"short", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: inlinehint nounwind uwtable
declare hidden zeroext i16 @uint16_sub(i16 noundef zeroext, i16 noundef zeroext) local_unnamed_addr #0

; Function Attrs: inlinehint nounwind uwtable
declare hidden zeroext i16 @uint16_sll(i16 noundef zeroext, i16 noundef zeroext) local_unnamed_addr #0

; Function Attrs: inlinehint nounwind uwtable
declare hidden zeroext i16 @uint16_and(i16 noundef zeroext, i16 noundef zeroext) local_unnamed_addr #0

; Function Attrs: inlinehint nounwind uwtable
declare hidden zeroext i16 @uint16_xor(i16 noundef zeroext, i16 noundef zeroext) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local zeroext i16 @half_div(i16 noundef zeroext %0, i16 noundef zeroext %1) local_unnamed_addr #1 {
  %3 = tail call zeroext i16 @uint16_sll(i16 noundef zeroext 1, i16 noundef zeroext 3)
  %4 = tail call zeroext i16 @uint16_sub(i16 noundef zeroext %3, i16 noundef zeroext 1)
  %5 = tail call zeroext i16 @uint16_and(i16 noundef zeroext %0, i16 noundef zeroext -32768)
  %6 = lshr i16 %5, 15
  %7 = tail call zeroext i16 @uint16_and(i16 noundef zeroext %0, i16 noundef zeroext 31744)
  %8 = tail call zeroext i16 @uint16_and(i16 noundef zeroext %0, i16 noundef zeroext 1023)
  %9 = tail call zeroext i16 @uint16_and(i16 noundef zeroext %1, i16 noundef zeroext -32768)
  %10 = lshr i16 %9, 15
  %11 = tail call zeroext i16 @uint16_and(i16 noundef zeroext %1, i16 noundef zeroext 31744)
  %12 = tail call zeroext i16 @uint16_and(i16 noundef zeroext %1, i16 noundef zeroext 1023)
  %13 = tail call zeroext i16 @uint16_xor(i16 noundef zeroext %6, i16 noundef zeroext %10)
  %14 = shl i16 %8, 4
  %15 = or i16 %14, 16384
  %16 = shl i16 %12, 5
  %17 = or i16 %16, -32768
  %18 = zext i16 %17 to i32
  %19 = zext i16 %15 to i32
  %20 = shl nuw nsw i32 %19, 1
  %.not = icmp uge i32 %20, %18
  %21 = zext i1 %.not to i16
  %.0 = lshr exact i16 %15, %21
  %22 = zext i16 %.0 to i32
  %23 = shl nuw i32 %22, 16
  %24 = udiv i32 %23, %18
  %25 = lshr i16 %7, 10
  %26 = lshr i16 %11, 10
  %27 = sub nsw i16 %25, %26
  %.047.v = select i1 %.not, i16 14, i16 13
  %.047 = add nsw i16 %27, %.047.v
  %28 = lshr i32 %24, 4
  %29 = zext i16 %.047 to i32
  %30 = shl nuw nsw i32 %29, 10
  %31 = zext i16 %13 to i32
  %32 = shl nuw nsw i32 %31, 15
  %33 = or i32 %30, %32
  %34 = or i32 %33, %28
  %35 = trunc i32 %34 to i16
  ret i16 %35
}

attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: ADCEPass,BDCEPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass