; LLVM IR from huawei-noah/bolt :: compute/tensor/src/cpu (embedding)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.TensorDesc = type { i32, i32, i32, [20 x i32] }
%struct.EmbedParamSpec = type { i32, i32, i8, i8, i32 }

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z13embedding_cpu10TensorDescPvS0_14EmbedParamSpecS_S_S0_(ptr noundef byval(%struct.TensorDesc) align 8 %0, ptr noundef %1, ptr noundef %2, i64 %3, i64 %4, ptr noundef byval(%struct.TensorDesc) align 8 %5, ptr noundef byval(%struct.TensorDesc) align 8 %6, ptr noundef %7) #0 {
  %9 = alloca %struct.EmbedParamSpec, align 4
  %10 = alloca ptr, align 8
  %11 = alloca ptr, align 8
  %12 = alloca ptr, align 8
  %13 = alloca ptr, align 8
  %14 = alloca ptr, align 8
  %15 = alloca i32, align 4
  %16 = alloca %struct.TensorDesc, align 8
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  %19 = alloca i32, align 4
  %20 = alloca i32, align 4
  %21 = alloca i32, align 4
  %22 = alloca i32, align 4
  %23 = alloca i32, align 4
  %24 = alloca ptr, align 8
  %25 = alloca ptr, align 8
  %26 = alloca i32, align 4
  %27 = alloca ptr, align 8
  %28 = getelementptr inbounds { i64, i64 }, ptr %9, i32 0, i32 0
  store i64 %3, ptr %28, align 4
  %29 = getelementptr inbounds { i64, i64 }, ptr %9, i32 0, i32 1
  store i64 %4, ptr %29, align 4
  store ptr %1, ptr %10, align 8, !tbaa !5
  store ptr %2, ptr %11, align 8, !tbaa !5
  store ptr %7, ptr %12, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %13) #5
  %30 = load ptr, ptr %11, align 8, !tbaa !5
  store ptr %30, ptr %13, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %14) #5
  %31 = load ptr, ptr %12, align 8, !tbaa !5
  store ptr %31, ptr %14, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #5
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %16, ptr align 8 %0, i64 92, i1 false), !tbaa.struct !9
  %32 = call noundef i32 @_Z17tensorNumElements10TensorDesc(ptr noundef byval(%struct.TensorDesc) align 8 %16)
  store i32 %32, ptr %15, align 4, !tbaa !14
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #5
  %33 = getelementptr inbounds %struct.TensorDesc, ptr %5, i32 0, i32 0
  %34 = load i32, ptr %33, align 8, !tbaa !17
  %35 = call noundef i32 @_Z7bytesOf8DataType(i32 noundef %34)
  store i32 %35, ptr %17, align 4, !tbaa !14
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #5
  %36 = load i32, ptr %17, align 4, !tbaa !14
  %37 = getelementptr inbounds %struct.EmbedParamSpec, ptr %9, i32 0, i32 1
  %38 = load i32, ptr %37, align 4, !tbaa !19
  %39 = mul i32 %36, %38
  store i32 %39, ptr %18, align 4, !tbaa !14
  call void @llvm.lifetime.start.p0(i64 4, ptr %19) #5
  %40 = load i32, ptr %17, align 4, !tbaa !14
  %41 = getelementptr inbounds %struct.EmbedParamSpec, ptr %9, i32 0, i32 0
  %42 = load i32, ptr %41, align 4, !tbaa !22
  %43 = mul i32 %40, %42
  store i32 %43, ptr %19, align 4, !tbaa !14
  call void @llvm.lifetime.start.p0(i64 4, ptr %20) #5
  store i32 0, ptr %20, align 4, !tbaa !23
  call void @llvm.lifetime.start.p0(i64 4, ptr %21) #5
  store i32 0, ptr %21, align 4, !tbaa !14
  br label %44

44:                                               ; preds = %123, %8
  %45 = load i32, ptr %21, align 4, !tbaa !14
  %46 = load i32, ptr %15, align 4, !tbaa !14
  %47 = icmp ult i32 %45, %46
  br i1 %47, label %49, label %48

48:                                               ; preds = %44
  store i32 2, ptr %22, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %21) #5
  br label %126

49:                                               ; preds = %44
  call void @llvm.lifetime.start.p0(i64 4, ptr %23) #5
  store i32 0, ptr %23, align 4, !tbaa !14
  %50 = getelementptr inbounds %struct.TensorDesc, ptr %0, i32 0, i32 0
  %51 = load i32, ptr %50, align 8, !tbaa !17
  switch i32 %51, label %71 [
    i32 2, label %52
    i32 3, label %58
    i32 6, label %64
  ]

52:                                               ; preds = %49
  %53 = load ptr, ptr %10, align 8, !tbaa !5
  %54 = load i32, ptr %21, align 4, !tbaa !14
  %55 = zext i32 %54 to i64
  %56 = getelementptr inbounds i32, ptr %53, i64 %55
  %57 = load i32, ptr %56, align 4, !tbaa !14
  store i32 %57, ptr %23, align 4, !tbaa !14
  br label %72

58:                                               ; preds = %49
  %59 = load ptr, ptr %10, align 8, !tbaa !5
  %60 = load i32, ptr %21, align 4, !tbaa !14
  %61 = zext i32 %60 to i64
  %62 = getelementptr inbounds i32, ptr %59, i64 %61
  %63 = load i32, ptr %62, align 4, !tbaa !14
  store i32 %63, ptr %23, align 4, !tbaa !14
  br label %72

64:                                               ; preds = %49
  %65 = load ptr, ptr %10, align 8, !tbaa !5
  %66 = load i32, ptr %21, align 4, !tbaa !14
  %67 = zext i32 %66 to i64
  %68 = getelementptr inbounds float, ptr %65, i64 %67
  %69 = load float, ptr %68, align 4, !tbaa !25
  %70 = fptoui float %69 to i32
  store i32 %70, ptr %23, align 4, !tbaa !14
  br label %72

71:                                               ; preds = %49
  store i32 51, ptr %20, align 4, !tbaa !23
  br label %72

72:                                               ; preds = %71, %64, %58, %52
  call void @llvm.lifetime.start.p0(i64 8, ptr %24) #5
  %73 = load ptr, ptr %14, align 8, !tbaa !5
  store ptr %73, ptr %24, align 8, !tbaa !5
  %74 = getelementptr inbounds %struct.EmbedParamSpec, ptr %9, i32 0, i32 3
  %75 = load i8, ptr %74, align 1, !tbaa !27, !range !28, !noundef !29
  %76 = trunc i8 %75 to i1
  br i1 %76, label %77, label %107

77:                                               ; preds = %72
  call void @llvm.lifetime.start.p0(i64 8, ptr %25) #5
  %78 = load ptr, ptr %13, align 8, !tbaa !5
  %79 = load i32, ptr %23, align 4, !tbaa !14
  %80 = load i32, ptr %17, align 4, !tbaa !14
  %81 = mul i32 %79, %80
  %82 = zext i32 %81 to i64
  %83 = getelementptr inbounds i8, ptr %78, i64 %82
  store ptr %83, ptr %25, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %26) #5
  store i32 0, ptr %26, align 4, !tbaa !14
  br label %84

84:                                               ; preds = %103, %77
  %85 = load i32, ptr %26, align 4, !tbaa !14
  %86 = getelementptr inbounds %struct.EmbedParamSpec, ptr %9, i32 0, i32 1
  %87 = load i32, ptr %86, align 4, !tbaa !19
  %88 = icmp ult i32 %85, %87
  br i1 %88, label %90, label %89

89:                                               ; preds = %84
  store i32 6, ptr %22, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %26) #5
  br label %106

90:                                               ; preds = %84
  %91 = load ptr, ptr %24, align 8, !tbaa !5
  %92 = load ptr, ptr %25, align 8, !tbaa !5
  %93 = load i32, ptr %17, align 4, !tbaa !14
  %94 = zext i32 %93 to i64
  call void @_Z10UNI_MEMCPYPvPKvm(ptr noundef %91, ptr noundef %92, i64 noundef %94)
  %95 = load i32, ptr %19, align 4, !tbaa !14
  %96 = load ptr, ptr %25, align 8, !tbaa !5
  %97 = zext i32 %95 to i64
  %98 = getelementptr inbounds i8, ptr %96, i64 %97
  store ptr %98, ptr %25, align 8, !tbaa !5
  %99 = load i32, ptr %17, align 4, !tbaa !14
  %100 = load ptr, ptr %24, align 8, !tbaa !5
  %101 = zext i32 %99 to i64
  %102 = getelementptr inbounds i8, ptr %100, i64 %101
  store ptr %102, ptr %24, align 8, !tbaa !5
  br label %103

103:                                              ; preds = %90
  %104 = load i32, ptr %26, align 4, !tbaa !14
  %105 = add i32 %104, 1
  store i32 %105, ptr %26, align 4, !tbaa !14
  br label %84, !llvm.loop !30

106:                                              ; preds = %89
  call void @llvm.lifetime.end.p0(i64 8, ptr %25) #5
  br label %118

107:                                              ; preds = %72
  call void @llvm.lifetime.start.p0(i64 8, ptr %27) #5
  %108 = load ptr, ptr %13, align 8, !tbaa !5
  %109 = load i32, ptr %23, align 4, !tbaa !14
  %110 = load i32, ptr %18, align 4, !tbaa !14
  %111 = mul i32 %109, %110
  %112 = zext i32 %111 to i64
  %113 = getelementptr inbounds i8, ptr %108, i64 %112
  store ptr %113, ptr %27, align 8, !tbaa !5
  %114 = load ptr, ptr %24, align 8, !tbaa !5
  %115 = load ptr, ptr %27, align 8, !tbaa !5
  %116 = load i32, ptr %18, align 4, !tbaa !14
  %117 = zext i32 %116 to i64
  call void @_Z10UNI_MEMCPYPvPKvm(ptr noundef %114, ptr noundef %115, i64 noundef %117)
  call void @llvm.lifetime.end.p0(i64 8, ptr %27) #5
  br label %118

118:                                              ; preds = %107, %106
  %119 = load i32, ptr %18, align 4, !tbaa !14
  %120 = load ptr, ptr %14, align 8, !tbaa !5
  %121 = zext i32 %119 to i64
  %122 = getelementptr inbounds i8, ptr %120, i64 %121
  store ptr %122, ptr %14, align 8, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 8, ptr %24) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %23) #5
  br label %123

123:                                              ; preds = %118
  %124 = load i32, ptr %21, align 4, !tbaa !14
  %125 = add i32 %124, 1
  store i32 %125, ptr %21, align 4, !tbaa !14
  br label %44, !llvm.loop !32

126:                                              ; preds = %48
  %127 = load i32, ptr %20, align 4, !tbaa !23
  store i32 1, ptr %22, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %20) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #5
  ret i32 %127
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z17tensorNumElements10TensorDesc(ptr noundef byval(%struct.TensorDesc) align 8) #2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #3

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef i32 @_Z7bytesOf8DataType(i32 noundef) #4

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_Z10UNI_MEMCPYPvPKvm(ptr noundef, ptr noundef, i64 noundef) #4

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{i64 0, i64 4, !10, i64 4, i64 4, !12, i64 8, i64 4, !14, i64 12, i64 80, !16}
!10 = !{!11, !11, i64 0}
!11 = !{!"_ZTS8DataType", !7, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"_ZTS10DataFormat", !7, i64 0}
!14 = !{!15, !15, i64 0}
!15 = !{!"int", !7, i64 0}
!16 = !{!7, !7, i64 0}
!17 = !{!18, !11, i64 0}
!18 = !{!"_ZTS10TensorDesc", !11, i64 0, !13, i64 4, !15, i64 8, !7, i64 12}
!19 = !{!20, !15, i64 4}
!20 = !{!"_ZTS14EmbedParamSpec", !15, i64 0, !15, i64 4, !21, i64 8, !21, i64 9, !15, i64 12}
!21 = !{!"bool", !7, i64 0}
!22 = !{!20, !15, i64 0}
!23 = !{!24, !24, i64 0}
!24 = !{!"_ZTS2EE", !7, i64 0}
!25 = !{!26, !26, i64 0}
!26 = !{!"float", !7, i64 0}
!27 = !{!20, !21, i64 9}
!28 = !{i8 0, i8 2}
!29 = !{}
!30 = distinct !{!30, !31}
!31 = !{!"llvm.loop.mustprogress"}
!32 = distinct !{!32, !31}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.TensorDesc = type { i32, i32, i32, [20 x i32] }

@switch.table._Z13embedding_cpu10TensorDescPvS0_14EmbedParamSpecS_S_S0_ = private unnamed_addr constant [5 x i32] [i32 0, i32 0, i32 51, i32 51, i32 0], align 4

; Function Attrs: mustprogress uwtable
define dso_local noundef range(i32 0, 52) i32 @_Z13embedding_cpu10TensorDescPvS0_14EmbedParamSpecS_S_S0_(ptr nocapture noundef readonly byval(%struct.TensorDesc) align 8 %0, ptr nocapture noundef readonly %1, ptr noundef %2, i64 %3, i64 %4, ptr nocapture noundef readonly byval(%struct.TensorDesc) align 8 %5, ptr nocapture noundef readnone byval(%struct.TensorDesc) align 8 %6, ptr noundef %7) local_unnamed_addr #0 {
  %.sroa.2.0.extract.shift = lshr i64 %3, 32
  %.sroa.2.0.extract.trunc = trunc nuw i64 %.sroa.2.0.extract.shift to i32
  %9 = tail call noundef i32 @_Z17tensorNumElements10TensorDesc(ptr noundef nonnull byval(%struct.TensorDesc) align 8 %0)
  %10 = load i32, ptr %5, align 8, !tbaa !5
  %11 = tail call noundef i32 @_Z7bytesOf8DataType(i32 noundef %10)
  %12 = mul i32 %11, %.sroa.2.0.extract.trunc
  %.not79 = icmp eq i32 %9, 0
  br i1 %.not79, label %._crit_edge, label %.lr.ph48

.lr.ph48:                                         ; preds = %8
  %.sroa.0.0.extract.trunc = trunc i64 %3 to i32
  %13 = mul i32 %11, %.sroa.0.0.extract.trunc
  %14 = load i32, ptr %0, align 8, !tbaa !5
  %15 = and i64 %4, 256
  %.not = icmp eq i64 %15, 0
  %16 = zext i32 %11 to i64
  %17 = zext i32 %13 to i64
  %18 = zext i32 %12 to i64
  br i1 %.not, label %.lr.ph48.split.us.preheader, label %.lr.ph48.split

.lr.ph48.split.us.preheader:                      ; preds = %.lr.ph48
  %wide.trip.count91 = zext i32 %9 to i64
  br label %.lr.ph48.split.us

.lr.ph48.split.us:                                ; preds = %.lr.ph48.split.us.preheader, %29
  %indvars.iv88 = phi i64 [ 0, %.lr.ph48.split.us.preheader ], [ %indvars.iv.next89, %29 ]
  %.046.us = phi ptr [ %7, %.lr.ph48.split.us.preheader ], [ %33, %29 ]
  %.04044.us = phi i32 [ 0, %.lr.ph48.split.us.preheader ], [ %.1.us, %29 ]
  switch i32 %14, label %29 [
    i32 2, label %26
    i32 3, label %23
    i32 6, label %19
  ]

19:                                               ; preds = %.lr.ph48.split.us
  %20 = getelementptr inbounds float, ptr %1, i64 %indvars.iv88
  %21 = load float, ptr %20, align 4, !tbaa !12
  %22 = fptoui float %21 to i32
  br label %29

23:                                               ; preds = %.lr.ph48.split.us
  %24 = getelementptr inbounds i32, ptr %1, i64 %indvars.iv88
  %25 = load i32, ptr %24, align 4, !tbaa !14
  br label %29

26:                                               ; preds = %.lr.ph48.split.us
  %27 = getelementptr inbounds i32, ptr %1, i64 %indvars.iv88
  %28 = load i32, ptr %27, align 4, !tbaa !14
  br label %29

29:                                               ; preds = %26, %23, %19, %.lr.ph48.split.us
  %.1.us = phi i32 [ %.04044.us, %19 ], [ %.04044.us, %23 ], [ %.04044.us, %26 ], [ 51, %.lr.ph48.split.us ]
  %.038.us = phi i32 [ %22, %19 ], [ %25, %23 ], [ %28, %26 ], [ 0, %.lr.ph48.split.us ]
  %30 = mul i32 %.038.us, %12
  %31 = zext i32 %30 to i64
  %32 = getelementptr inbounds i8, ptr %2, i64 %31
  tail call void @_Z10UNI_MEMCPYPvPKvm(ptr noundef %.046.us, ptr noundef %32, i64 noundef %18)
  %33 = getelementptr inbounds i8, ptr %.046.us, i64 %18
  %indvars.iv.next89 = add nuw nsw i64 %indvars.iv88, 1
  %exitcond92.not = icmp eq i64 %indvars.iv.next89, %wide.trip.count91
  br i1 %exitcond92.not, label %._crit_edge, label %.lr.ph48.split.us, !llvm.loop !15

.lr.ph48.split:                                   ; preds = %.lr.ph48
  %.not80 = icmp ult i64 %3, 4294967296
  br i1 %.not80, label %.lr.ph48.split.split, label %.lr.ph48.split.split.us.preheader

.lr.ph48.split.split.us.preheader:                ; preds = %.lr.ph48.split
  %wide.trip.count = zext i32 %9 to i64
  br label %.lr.ph48.split.split.us

.lr.ph48.split.split.us:                          ; preds = %.lr.ph48.split.split.us.preheader, %..loopexit_crit_edge.us
  %indvars.iv = phi i64 [ 0, %.lr.ph48.split.split.us.preheader ], [ %indvars.iv.next, %..loopexit_crit_edge.us ]
  %.046.us49 = phi ptr [ %7, %.lr.ph48.split.split.us.preheader ], [ %51, %..loopexit_crit_edge.us ]
  %.04044.us51 = phi i32 [ 0, %.lr.ph48.split.split.us.preheader ], [ %.1.us52, %..loopexit_crit_edge.us ]
  switch i32 %14, label %.lr.ph.us [
    i32 2, label %41
    i32 3, label %38
    i32 6, label %34
  ]

34:                                               ; preds = %.lr.ph48.split.split.us
  %35 = getelementptr inbounds float, ptr %1, i64 %indvars.iv
  %36 = load float, ptr %35, align 4, !tbaa !12
  %37 = fptoui float %36 to i32
  br label %.lr.ph.us

38:                                               ; preds = %.lr.ph48.split.split.us
  %39 = getelementptr inbounds i32, ptr %1, i64 %indvars.iv
  %40 = load i32, ptr %39, align 4, !tbaa !14
  br label %.lr.ph.us

41:                                               ; preds = %.lr.ph48.split.split.us
  %42 = getelementptr inbounds i32, ptr %1, i64 %indvars.iv
  %43 = load i32, ptr %42, align 4, !tbaa !14
  br label %.lr.ph.us

.lr.ph.us:                                        ; preds = %41, %38, %34, %.lr.ph48.split.split.us
  %.1.us52 = phi i32 [ %.04044.us51, %34 ], [ %.04044.us51, %38 ], [ %.04044.us51, %41 ], [ 51, %.lr.ph48.split.split.us ]
  %.038.us53 = phi i32 [ %37, %34 ], [ %40, %38 ], [ %43, %41 ], [ 0, %.lr.ph48.split.split.us ]
  %44 = mul i32 %.038.us53, %11
  %45 = zext i32 %44 to i64
  %46 = getelementptr inbounds i8, ptr %2, i64 %45
  br label %47

47:                                               ; preds = %.lr.ph.us, %47
  %.03543.us = phi i32 [ 0, %.lr.ph.us ], [ %50, %47 ]
  %.03642.us = phi ptr [ %46, %.lr.ph.us ], [ %48, %47 ]
  %.03741.us = phi ptr [ %.046.us49, %.lr.ph.us ], [ %49, %47 ]
  tail call void @_Z10UNI_MEMCPYPvPKvm(ptr noundef %.03741.us, ptr noundef %.03642.us, i64 noundef %16)
  %48 = getelementptr inbounds i8, ptr %.03642.us, i64 %17
  %49 = getelementptr inbounds i8, ptr %.03741.us, i64 %16
  %50 = add nuw i32 %.03543.us, 1
  %exitcond.not = icmp eq i32 %50, %.sroa.2.0.extract.trunc
  br i1 %exitcond.not, label %..loopexit_crit_edge.us, label %47, !llvm.loop !17

..loopexit_crit_edge.us:                          ; preds = %47
  %51 = getelementptr inbounds i8, ptr %.046.us49, i64 %18
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond87.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
  br i1 %exitcond87.not, label %._crit_edge, label %.lr.ph48.split.split.us, !llvm.loop !15

.lr.ph48.split.split:                             ; preds = %.lr.ph48.split
  %switch.tableidx = add i32 %14, -2
  %52 = icmp ult i32 %switch.tableidx, 5
  br i1 %52, label %switch.lookup, label %._crit_edge

switch.lookup:                                    ; preds = %.lr.ph48.split.split
  %53 = zext nneg i32 %switch.tableidx to i64
  %switch.gep = getelementptr inbounds [5 x i32], ptr @switch.table._Z13embedding_cpu10TensorDescPvS0_14EmbedParamSpecS_S_S0_, i64 0, i64 %53
  %switch.load = load i32, ptr %switch.gep, align 4
  br label %._crit_edge

._crit_edge:                                      ; preds = %..loopexit_crit_edge.us, %29, %.lr.ph48.split.split, %switch.lookup, %8
  %.040.lcssa = phi i32 [ 0, %8 ], [ %switch.load, %switch.lookup ], [ 51, %.lr.ph48.split.split ], [ %.1.us, %29 ], [ %.1.us52, %..loopexit_crit_edge.us ]
  ret i32 %.040.lcssa
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z17tensorNumElements10TensorDesc(ptr noundef byval(%struct.TensorDesc) align 8) local_unnamed_addr #1

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef i32 @_Z7bytesOf8DataType(i32 noundef) local_unnamed_addr #2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_Z10UNI_MEMCPYPvPKvm(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"_ZTS10TensorDesc", !7, i64 0, !10, i64 4, !11, i64 8, !8, i64 12}
!7 = !{!"_ZTS8DataType", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"_ZTS10DataFormat", !8, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"float", !8, i64 0}
!14 = !{!11, !11, i64 0}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
!17 = distinct !{!17, !16}


; Effective O3 passes: CorrelatedValuePropagationPass,DSEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,MemCpyOptPass,PostOrderFunctionAttrsPass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass