; LLVM IR from AF-GRILL/DISPluginForUnreal :: Source/ThirdParty/include/dis6/ActionRequestPdu.ll (ZNK3DIS16ActionRequestPdueqERKS0_)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.DIS::ActionRequestPdu" = type { %"class.DIS::SimulationManagementFamilyPdu", i32, i32, i32, i32, %"class.std::vector", %"class.std::vector.0" }
%"class.DIS::SimulationManagementFamilyPdu" = type { %"class.DIS::Pdu.base", [4 x i8], %"class.DIS::EntityID", %"class.DIS::EntityID" }
%"class.DIS::Pdu.base" = type <{ ptr, i8, i8, i8, i8, i32, i16, i16 }>
%"class.DIS::EntityID" = type <{ ptr, i16, i16, i16, [2 x i8] }>
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<DIS::FixedDatum, std::allocator<DIS::FixedDatum>>::_Vector_impl" }
%"struct.std::_Vector_base<DIS::FixedDatum, std::allocator<DIS::FixedDatum>>::_Vector_impl" = type { %"struct.std::_Vector_base<DIS::FixedDatum, std::allocator<DIS::FixedDatum>>::_Vector_impl_data" }
%"struct.std::_Vector_base<DIS::FixedDatum, std::allocator<DIS::FixedDatum>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<DIS::VariableDatum, std::allocator<DIS::VariableDatum>>::_Vector_impl" }
%"struct.std::_Vector_base<DIS::VariableDatum, std::allocator<DIS::VariableDatum>>::_Vector_impl" = type { %"struct.std::_Vector_base<DIS::VariableDatum, std::allocator<DIS::VariableDatum>>::_Vector_impl_data" }
%"struct.std::_Vector_base<DIS::VariableDatum, std::allocator<DIS::VariableDatum>>::_Vector_impl_data" = type { ptr, ptr, ptr }

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIN3DIS10FixedDatumESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIN3DIS13VariableDatumESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(16) ptr @_ZNKSt6vectorIN3DIS10FixedDatumESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(44) ptr @_ZNKSt6vectorIN3DIS13VariableDatumESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZNK3DIS16ActionRequestPdueqERKS0_(ptr noundef nonnull align 8 dereferenceable(120) %0, ptr noundef nonnull align 8 dereferenceable(120) %1) #2 align 2 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca i8, align 1
  %6 = alloca i64, align 8
  %7 = alloca i64, align 8
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  %8 = load ptr, ptr %3, align 8
  call void @llvm.lifetime.start.p0(i64 1, ptr %5) #4
  store i8 1, ptr %5, align 1, !tbaa !9
  %9 = load ptr, ptr %4, align 8, !tbaa !5
  %10 = call noundef zeroext i1 @_ZNK3DIS29SimulationManagementFamilyPdueqERKS0_(ptr noundef nonnull align 8 dereferenceable(56) %8, ptr noundef nonnull align 8 dereferenceable(56) %9)
  %11 = zext i1 %10 to i8
  store i8 %11, ptr %5, align 1, !tbaa !9
  %12 = getelementptr inbounds %"class.DIS::ActionRequestPdu", ptr %8, i32 0, i32 1
  %13 = load i32, ptr %12, align 8, !tbaa !11
  %14 = load ptr, ptr %4, align 8, !tbaa !5
  %15 = getelementptr inbounds %"class.DIS::ActionRequestPdu", ptr %14, i32 0, i32 1
  %16 = load i32, ptr %15, align 8, !tbaa !11
  %17 = icmp eq i32 %13, %16
  br i1 %17, label %19, label %18

18:                                               ; preds = %2
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %19

19:                                               ; preds = %18, %2
  %20 = getelementptr inbounds %"class.DIS::ActionRequestPdu", ptr %8, i32 0, i32 2
  %21 = load i32, ptr %20, align 4, !tbaa !26
  %22 = load ptr, ptr %4, align 8, !tbaa !5
  %23 = getelementptr inbounds %"class.DIS::ActionRequestPdu", ptr %22, i32 0, i32 2
  %24 = load i32, ptr %23, align 4, !tbaa !26
  %25 = icmp eq i32 %21, %24
  br i1 %25, label %27, label %26

26:                                               ; preds = %19
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %27

27:                                               ; preds = %26, %19
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #4
  store i64 0, ptr %6, align 8, !tbaa !27
  br label %28

28:                                               ; preds = %45, %27
  %29 = load i64, ptr %6, align 8, !tbaa !27
  %30 = getelementptr inbounds %"class.DIS::ActionRequestPdu", ptr %8, i32 0, i32 5
  %31 = call noundef i64 @_ZNKSt6vectorIN3DIS10FixedDatumESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %30) #4
  %32 = icmp ult i64 %29, %31
  br i1 %32, label %34, label %33

33:                                               ; preds = %28
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #4
  br label %48

34:                                               ; preds = %28
  %35 = getelementptr inbounds %"class.DIS::ActionRequestPdu", ptr %8, i32 0, i32 5
  %36 = load i64, ptr %6, align 8, !tbaa !27
  %37 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNKSt6vectorIN3DIS10FixedDatumESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %35, i64 noundef %36) #4
  %38 = load ptr, ptr %4, align 8, !tbaa !5
  %39 = getelementptr inbounds %"class.DIS::ActionRequestPdu", ptr %38, i32 0, i32 5
  %40 = load i64, ptr %6, align 8, !tbaa !27
  %41 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNKSt6vectorIN3DIS10FixedDatumESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %39, i64 noundef %40) #4
  %42 = call noundef zeroext i1 @_ZNK3DIS10FixedDatumeqERKS0_(ptr noundef nonnull align 8 dereferenceable(16) %37, ptr noundef nonnull align 8 dereferenceable(16) %41)
  br i1 %42, label %44, label %43

43:                                               ; preds = %34
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %44

44:                                               ; preds = %43, %34
  br label %45

45:                                               ; preds = %44
  %46 = load i64, ptr %6, align 8, !tbaa !27
  %47 = add i64 %46, 1
  store i64 %47, ptr %6, align 8, !tbaa !27
  br label %28, !llvm.loop !29

48:                                               ; preds = %33
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #4
  store i64 0, ptr %7, align 8, !tbaa !27
  br label %49

49:                                               ; preds = %66, %48
  %50 = load i64, ptr %7, align 8, !tbaa !27
  %51 = getelementptr inbounds %"class.DIS::ActionRequestPdu", ptr %8, i32 0, i32 6
  %52 = call noundef i64 @_ZNKSt6vectorIN3DIS13VariableDatumESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %51) #4
  %53 = icmp ult i64 %50, %52
  br i1 %53, label %55, label %54

54:                                               ; preds = %49
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #4
  br label %69

55:                                               ; preds = %49
  %56 = getelementptr inbounds %"class.DIS::ActionRequestPdu", ptr %8, i32 0, i32 6
  %57 = load i64, ptr %7, align 8, !tbaa !27
  %58 = call noundef nonnull align 8 dereferenceable(44) ptr @_ZNKSt6vectorIN3DIS13VariableDatumESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %56, i64 noundef %57) #4
  %59 = load ptr, ptr %4, align 8, !tbaa !5
  %60 = getelementptr inbounds %"class.DIS::ActionRequestPdu", ptr %59, i32 0, i32 6
  %61 = load i64, ptr %7, align 8, !tbaa !27
  %62 = call noundef nonnull align 8 dereferenceable(44) ptr @_ZNKSt6vectorIN3DIS13VariableDatumESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %60, i64 noundef %61) #4
  %63 = call noundef zeroext i1 @_ZNK3DIS13VariableDatumeqERKS0_(ptr noundef nonnull align 8 dereferenceable(44) %58, ptr noundef nonnull align 8 dereferenceable(44) %62)
  br i1 %63, label %65, label %64

64:                                               ; preds = %55
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %65

65:                                               ; preds = %64, %55
  br label %66

66:                                               ; preds = %65
  %67 = load i64, ptr %7, align 8, !tbaa !27
  %68 = add i64 %67, 1
  store i64 %68, ptr %7, align 8, !tbaa !27
  br label %49, !llvm.loop !31

69:                                               ; preds = %54
  %70 = load i8, ptr %5, align 1, !tbaa !9, !range !32, !noundef !33
  %71 = trunc i8 %70 to i1
  call void @llvm.lifetime.end.p0(i64 1, ptr %5) #4
  ret i1 %71
}

declare noundef zeroext i1 @_ZNK3DIS29SimulationManagementFamilyPdueqERKS0_(ptr noundef nonnull align 8 dereferenceable(56), ptr noundef nonnull align 8 dereferenceable(56)) #3

declare noundef zeroext i1 @_ZNK3DIS10FixedDatumeqERKS0_(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 8 dereferenceable(16)) #3

declare noundef zeroext i1 @_ZNK3DIS13VariableDatumeqERKS0_(ptr noundef nonnull align 8 dereferenceable(44), ptr noundef nonnull align 8 dereferenceable(44)) #3

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"bool", !7, i64 0}
!11 = !{!12, !15, i64 56}
!12 = !{!"_ZTSN3DIS16ActionRequestPduE", !13, i64 0, !15, i64 56, !15, i64 60, !15, i64 64, !15, i64 68, !18, i64 72, !22, i64 96}
!13 = !{!"_ZTSN3DIS29SimulationManagementFamilyPduE", !14, i64 0, !17, i64 24, !17, i64 40}
!14 = !{!"_ZTSN3DIS3PduE", !7, i64 8, !7, i64 9, !7, i64 10, !7, i64 11, !15, i64 12, !16, i64 16, !16, i64 18}
!15 = !{!"int", !7, i64 0}
!16 = !{!"short", !7, i64 0}
!17 = !{!"_ZTSN3DIS8EntityIDE", !16, i64 8, !16, i64 10, !16, i64 12}
!18 = !{!"_ZTSSt6vectorIN3DIS10FixedDatumESaIS1_EE", !19, i64 0}
!19 = !{!"_ZTSSt12_Vector_baseIN3DIS10FixedDatumESaIS1_EE", !20, i64 0}
!20 = !{!"_ZTSNSt12_Vector_baseIN3DIS10FixedDatumESaIS1_EE12_Vector_implE", !21, i64 0}
!21 = !{!"_ZTSNSt12_Vector_baseIN3DIS10FixedDatumESaIS1_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!22 = !{!"_ZTSSt6vectorIN3DIS13VariableDatumESaIS1_EE", !23, i64 0}
!23 = !{!"_ZTSSt12_Vector_baseIN3DIS13VariableDatumESaIS1_EE", !24, i64 0}
!24 = !{!"_ZTSNSt12_Vector_baseIN3DIS13VariableDatumESaIS1_EE12_Vector_implE", !25, i64 0}
!25 = !{!"_ZTSNSt12_Vector_baseIN3DIS13VariableDatumESaIS1_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!26 = !{!12, !15, i64 60}
!27 = !{!28, !28, i64 0}
!28 = !{!"long", !7, i64 0}
!29 = distinct !{!29, !30}
!30 = !{!"llvm.loop.mustprogress"}
!31 = distinct !{!31, !30}
!32 = !{i8 0, i8 2}
!33 = !{}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIN3DIS10FixedDatumESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIN3DIS13VariableDatumESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(16) ptr @_ZNKSt6vectorIN3DIS10FixedDatumESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(44) ptr @_ZNKSt6vectorIN3DIS13VariableDatumESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZNK3DIS16ActionRequestPdueqERKS0_(ptr noundef nonnull align 8 dereferenceable(120) %0, ptr noundef nonnull align 8 dereferenceable(120) %1) local_unnamed_addr #1 align 2 {
  %3 = tail call noundef zeroext i1 @_ZNK3DIS29SimulationManagementFamilyPdueqERKS0_(ptr noundef nonnull align 8 dereferenceable(56) %0, ptr noundef nonnull align 8 dereferenceable(56) %1)
  %4 = getelementptr inbounds i8, ptr %0, i64 56
  %5 = getelementptr inbounds i8, ptr %1, i64 56
  %6 = load <2 x i32>, ptr %4, align 8, !tbaa !5
  %7 = load <2 x i32>, ptr %5, align 8, !tbaa !5
  %8 = icmp eq <2 x i32> %6, %7
  %9 = extractelement <2 x i1> %8, i64 0
  %narrow = and i1 %3, %9
  %10 = extractelement <2 x i1> %8, i64 1
  %narrow17 = select i1 %10, i1 %narrow, i1 false
  %11 = getelementptr inbounds i8, ptr %0, i64 72
  %12 = tail call noundef i64 @_ZNKSt6vectorIN3DIS10FixedDatumESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %11) #3
  %.not = icmp eq i64 %12, 0
  br i1 %.not, label %.preheader, label %.lr.ph

.lr.ph:                                           ; preds = %2
  %13 = getelementptr inbounds i8, ptr %1, i64 72
  br label %17

.preheader:                                       ; preds = %17, %2
  %.016.lcssa = phi i1 [ %narrow17, %2 ], [ %spec.select, %17 ]
  %14 = getelementptr inbounds i8, ptr %0, i64 96
  %15 = tail call noundef i64 @_ZNKSt6vectorIN3DIS13VariableDatumESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %14) #3
  %.not25 = icmp eq i64 %15, 0
  br i1 %.not25, label %._crit_edge, label %.lr.ph23

.lr.ph23:                                         ; preds = %.preheader
  %16 = getelementptr inbounds i8, ptr %1, i64 96
  br label %24

17:                                               ; preds = %.lr.ph, %17
  %.01520 = phi i64 [ 0, %.lr.ph ], [ %21, %17 ]
  %.01619 = phi i1 [ %narrow17, %.lr.ph ], [ %spec.select, %17 ]
  %18 = tail call noundef nonnull align 8 dereferenceable(16) ptr @_ZNKSt6vectorIN3DIS10FixedDatumESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %11, i64 noundef %.01520) #3
  %19 = tail call noundef nonnull align 8 dereferenceable(16) ptr @_ZNKSt6vectorIN3DIS10FixedDatumESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %13, i64 noundef %.01520) #3
  %20 = tail call noundef zeroext i1 @_ZNK3DIS10FixedDatumeqERKS0_(ptr noundef nonnull align 8 dereferenceable(16) %18, ptr noundef nonnull align 8 dereferenceable(16) %19)
  %spec.select = select i1 %20, i1 %.01619, i1 false
  %21 = add nuw i64 %.01520, 1
  %22 = tail call noundef i64 @_ZNKSt6vectorIN3DIS10FixedDatumESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %11) #3
  %23 = icmp ult i64 %21, %22
  br i1 %23, label %17, label %.preheader, !llvm.loop !9

._crit_edge:                                      ; preds = %24, %.preheader
  %.2.lcssa = phi i1 [ %.016.lcssa, %.preheader ], [ %spec.select18, %24 ]
  ret i1 %.2.lcssa

24:                                               ; preds = %.lr.ph23, %24
  %.022 = phi i64 [ 0, %.lr.ph23 ], [ %28, %24 ]
  %.221 = phi i1 [ %.016.lcssa, %.lr.ph23 ], [ %spec.select18, %24 ]
  %25 = tail call noundef nonnull align 8 dereferenceable(44) ptr @_ZNKSt6vectorIN3DIS13VariableDatumESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %14, i64 noundef %.022) #3
  %26 = tail call noundef nonnull align 8 dereferenceable(44) ptr @_ZNKSt6vectorIN3DIS13VariableDatumESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %16, i64 noundef %.022) #3
  %27 = tail call noundef zeroext i1 @_ZNK3DIS13VariableDatumeqERKS0_(ptr noundef nonnull align 8 dereferenceable(44) %25, ptr noundef nonnull align 8 dereferenceable(44) %26)
  %spec.select18 = select i1 %27, i1 %.221, i1 false
  %28 = add nuw i64 %.022, 1
  %29 = tail call noundef i64 @_ZNKSt6vectorIN3DIS13VariableDatumESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %14) #3
  %30 = icmp ult i64 %28, %29
  br i1 %30, label %24, label %._crit_edge, !llvm.loop !11
}

declare noundef zeroext i1 @_ZNK3DIS29SimulationManagementFamilyPdueqERKS0_(ptr noundef nonnull align 8 dereferenceable(56), ptr noundef nonnull align 8 dereferenceable(56)) local_unnamed_addr #2

declare noundef zeroext i1 @_ZNK3DIS10FixedDatumeqERKS0_(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 8 dereferenceable(16)) local_unnamed_addr #2

declare noundef zeroext i1 @_ZNK3DIS13VariableDatumeqERKS0_(ptr noundef nonnull align 8 dereferenceable(44), ptr noundef nonnull align 8 dereferenceable(44)) local_unnamed_addr #2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Effective O3 passes: AggressiveInstCombinePass,CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SLPVectorizerPass,SROAPass,SimplifyCFGPass,TailCallElimPass