; LLVM IR from huawei-noah/bolt :: compute/tensor/src (gather)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.TensorDesc = type { i32, i32, i32, [20 x i32] }
%struct.GatherParamSpec = type { i32, i8, i32 }
%struct.ArchInfo = type { i32, ptr }

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN6Tensor8get_descEv(ptr dead_on_unwind noalias writable sret(%struct.TensorDesc) align 4, ptr noundef nonnull align 8 dereferenceable(32)) #2 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z30gather_infer_forward_tmp_bytes6TensorS_15GatherParamSpecS_PjP8ArchInfo(ptr noundef %0, ptr noundef %1, i64 %2, i32 %3, ptr noundef %4, ptr noundef %5, ptr noundef %6) #2 {
  %8 = alloca %struct.GatherParamSpec, align 4
  %9 = alloca { i64, i32 }, align 4
  %10 = alloca ptr, align 8
  %11 = alloca ptr, align 8
  %12 = alloca ptr, align 8
  %13 = alloca ptr, align 8
  %14 = alloca ptr, align 8
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca %struct.TensorDesc, align 4
  %18 = getelementptr inbounds { i64, i32 }, ptr %9, i32 0, i32 0
  store i64 %2, ptr %18, align 4
  %19 = getelementptr inbounds { i64, i32 }, ptr %9, i32 0, i32 1
  store i32 %3, ptr %19, align 4
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %8, ptr align 4 %9, i64 12, i1 false)
  store ptr %0, ptr %10, align 8, !tbaa !5
  store ptr %1, ptr %11, align 8, !tbaa !5
  store ptr %4, ptr %12, align 8, !tbaa !5
  store ptr %5, ptr %13, align 8, !tbaa !5
  store ptr %6, ptr %14, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #3
  %20 = load ptr, ptr %14, align 8, !tbaa !5
  %21 = getelementptr inbounds %struct.ArchInfo, ptr %20, i32 0, i32 0
  %22 = load i32, ptr %21, align 8, !tbaa !9
  store i32 %22, ptr %15, align 4, !tbaa !12
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #3
  store i32 51, ptr %16, align 4, !tbaa !13
  %23 = load i32, ptr %15, align 4, !tbaa !12
  %24 = icmp eq i32 %23, 1
  br i1 %24, label %52, label %25

25:                                               ; preds = %7
  %26 = load i32, ptr %15, align 4, !tbaa !12
  %27 = icmp eq i32 %26, 8
  br i1 %27, label %52, label %28

28:                                               ; preds = %25
  %29 = load i32, ptr %15, align 4, !tbaa !12
  %30 = icmp eq i32 %29, 9
  br i1 %30, label %52, label %31

31:                                               ; preds = %28
  %32 = load i32, ptr %15, align 4, !tbaa !12
  %33 = icmp eq i32 %32, 10
  br i1 %33, label %52, label %34

34:                                               ; preds = %31
  %35 = load i32, ptr %15, align 4, !tbaa !12
  %36 = icmp eq i32 %35, 9
  br i1 %36, label %52, label %37

37:                                               ; preds = %34
  %38 = load i32, ptr %15, align 4, !tbaa !12
  %39 = icmp eq i32 %38, 10
  br i1 %39, label %52, label %40

40:                                               ; preds = %37
  %41 = load i32, ptr %15, align 4, !tbaa !12
  %42 = icmp eq i32 %41, 5
  br i1 %42, label %52, label %43

43:                                               ; preds = %40
  %44 = load i32, ptr %15, align 4, !tbaa !12
  %45 = icmp eq i32 %44, 6
  br i1 %45, label %52, label %46

46:                                               ; preds = %43
  %47 = load i32, ptr %15, align 4, !tbaa !12
  %48 = icmp eq i32 %47, 4
  br i1 %48, label %52, label %49

49:                                               ; preds = %46
  %50 = load i32, ptr %15, align 4, !tbaa !12
  %51 = icmp eq i32 %50, 3
  br i1 %51, label %52, label %62

52:                                               ; preds = %49, %46, %43, %40, %37, %34, %31, %28, %25, %7
  call void @llvm.lifetime.start.p0(i64 92, ptr %17) #3
  call void @_ZN6Tensor8get_descEv(ptr dead_on_unwind writable sret(%struct.TensorDesc) align 4 %17, ptr noundef nonnull align 8 dereferenceable(32) %0)
  %53 = getelementptr inbounds %struct.TensorDesc, ptr %17, i32 0, i32 1
  %54 = load i32, ptr %53, align 4, !tbaa !15
  %55 = icmp eq i32 %54, 2
  call void @llvm.lifetime.end.p0(i64 92, ptr %17) #3
  br i1 %55, label %56, label %59

56:                                               ; preds = %52
  %57 = call noundef i32 @_ZN6Tensor5bytesEv(ptr noundef nonnull align 8 dereferenceable(32) %0)
  %58 = load ptr, ptr %13, align 8, !tbaa !5
  store i32 %57, ptr %58, align 4, !tbaa !20
  br label %61

59:                                               ; preds = %52
  %60 = load ptr, ptr %13, align 8, !tbaa !5
  store i32 0, ptr %60, align 4, !tbaa !20
  br label %61

61:                                               ; preds = %59, %56
  store i32 0, ptr %16, align 4, !tbaa !13
  br label %62

62:                                               ; preds = %61, %49
  %63 = load i32, ptr %16, align 4, !tbaa !13
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #3
  ret i32 %63
}

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_ZN6Tensor5bytesEv(ptr noundef nonnull align 8 dereferenceable(32)) #2 align 2

attributes #0 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"_ZTS8ArchInfo", !11, i64 0, !6, i64 8}
!11 = !{!"_ZTS4Arch", !7, i64 0}
!12 = !{!11, !11, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"_ZTS2EE", !7, i64 0}
!15 = !{!16, !18, i64 4}
!16 = !{!"_ZTS10TensorDesc", !17, i64 0, !18, i64 4, !19, i64 8, !7, i64 12}
!17 = !{!"_ZTS8DataType", !7, i64 0}
!18 = !{!"_ZTS10DataFormat", !7, i64 0}
!19 = !{!"int", !7, i64 0}
!20 = !{!19, !19, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.TensorDesc = type { i32, i32, i32, [20 x i32] }

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN6Tensor8get_descEv(ptr dead_on_unwind noalias writable sret(%struct.TensorDesc) align 4, ptr noundef nonnull align 8 dereferenceable(32)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local noundef range(i32 0, 52) i32 @_Z30gather_infer_forward_tmp_bytes6TensorS_15GatherParamSpecS_PjP8ArchInfo(ptr noundef %0, ptr nocapture noundef readnone %1, i64 %2, i32 %3, ptr nocapture noundef readnone %4, ptr nocapture noundef writeonly %5, ptr nocapture noundef readonly %6) local_unnamed_addr #1 {
  %8 = alloca %struct.TensorDesc, align 4
  %9 = load i32, ptr %6, align 8, !tbaa !5
  switch i32 %9, label %17 [
    i32 10, label %10
    i32 9, label %10
    i32 8, label %10
    i32 6, label %10
    i32 5, label %10
    i32 4, label %10
    i32 3, label %10
    i32 1, label %10
  ]

10:                                               ; preds = %7, %7, %7, %7, %7, %7, %7, %7
  call void @llvm.lifetime.start.p0(i64 92, ptr nonnull %8) #2
  call void @_ZN6Tensor8get_descEv(ptr dead_on_unwind nonnull writable sret(%struct.TensorDesc) align 4 %8, ptr noundef nonnull align 8 dereferenceable(32) %0)
  %11 = getelementptr inbounds i8, ptr %8, i64 4
  %12 = load i32, ptr %11, align 4, !tbaa !11
  %13 = icmp eq i32 %12, 2
  call void @llvm.lifetime.end.p0(i64 92, ptr nonnull %8) #2
  br i1 %13, label %14, label %16

14:                                               ; preds = %10
  %15 = call noundef i32 @_ZN6Tensor5bytesEv(ptr noundef nonnull align 8 dereferenceable(32) %0)
  br label %16

16:                                               ; preds = %10, %14
  %storemerge = phi i32 [ %15, %14 ], [ 0, %10 ]
  store i32 %storemerge, ptr %5, align 4, !tbaa !16
  br label %17

17:                                               ; preds = %7, %16
  %.0 = phi i32 [ 0, %16 ], [ 51, %7 ]
  ret i32 %.0
}

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_ZN6Tensor5bytesEv(ptr noundef nonnull align 8 dereferenceable(32)) local_unnamed_addr #1 align 2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"_ZTS8ArchInfo", !7, i64 0, !10, i64 8}
!7 = !{!"_ZTS4Arch", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!12, !14, i64 4}
!12 = !{!"_ZTS10TensorDesc", !13, i64 0, !14, i64 4, !15, i64 8, !8, i64 12}
!13 = !{!"_ZTS8DataType", !8, i64 0}
!14 = !{!"_ZTS10DataFormat", !8, i64 0}
!15 = !{!"int", !8, i64 0}
!16 = !{!15, !15, i64 0}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass