; LLVM IR from Chasmiccoder/Algos-for-Amigos :: IIITH-Coursework/2-Automata-Theory/Programming-Assignment-2 (rps)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_Z19did_i_win_the_roundii(i32 noundef, i32 noundef) #1

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef float @_Z10play_matchSt6vectorIS_IiSaIiEESaIS1_EEiS3_i(ptr noundef %0, i32 noundef %1, ptr noundef %2, i32 noundef %3) #1 {
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i8, align 1
  %19 = alloca float, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !9
  store ptr %2, ptr %7, align 8, !tbaa !5
  store i32 %3, ptr %8, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #2
  store i32 0, ptr %9, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #2
  store i32 0, ptr %10, align 4, !tbaa !9
  br label %20

20:                                               ; preds = %75, %4
  %21 = load i32, ptr %10, align 4, !tbaa !9
  %22 = load i32, ptr %8, align 4, !tbaa !9
  %23 = icmp slt i32 %21, %22
  br i1 %23, label %25, label %24

24:                                               ; preds = %20
  store i32 2, ptr %11, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #2
  br label %78

25:                                               ; preds = %20
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #2
  store i32 0, ptr %12, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #2
  %26 = load i32, ptr %10, align 4, !tbaa !9
  store i32 %26, ptr %13, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #2
  store i32 0, ptr %14, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #2
  store i32 0, ptr %15, align 4, !tbaa !9
  br label %27

27:                                               ; preds = %68, %25
  %28 = load i32, ptr %15, align 4, !tbaa !9
  %29 = icmp slt i32 %28, 300
  br i1 %29, label %31, label %30

30:                                               ; preds = %27
  store i32 5, ptr %11, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #2
  br label %71

31:                                               ; preds = %27
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #2
  %32 = load i32, ptr %14, align 4, !tbaa !9
  %33 = sext i32 %32 to i64
  %34 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %33) #2
  %35 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %34, i64 noundef 0) #2
  %36 = load i32, ptr %35, align 4, !tbaa !9
  store i32 %36, ptr %16, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #2
  %37 = load i32, ptr %13, align 4, !tbaa !9
  %38 = sext i32 %37 to i64
  %39 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %38) #2
  %40 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %39, i64 noundef 0) #2
  %41 = load i32, ptr %40, align 4, !tbaa !9
  store i32 %41, ptr %17, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 1, ptr %18) #2
  %42 = load i32, ptr %16, align 4, !tbaa !9
  %43 = load i32, ptr %17, align 4, !tbaa !9
  %44 = call noundef zeroext i1 @_Z19did_i_win_the_roundii(i32 noundef %42, i32 noundef %43)
  %45 = zext i1 %44 to i8
  store i8 %45, ptr %18, align 1, !tbaa !11
  %46 = load i8, ptr %18, align 1, !tbaa !11, !range !13, !noundef !14
  %47 = trunc i8 %46 to i1
  br i1 %47, label %48, label %51

48:                                               ; preds = %31
  %49 = load i32, ptr %12, align 4, !tbaa !9
  %50 = add nsw i32 %49, 1
  store i32 %50, ptr %12, align 4, !tbaa !9
  br label %51

51:                                               ; preds = %48, %31
  %52 = load i32, ptr %14, align 4, !tbaa !9
  %53 = sext i32 %52 to i64
  %54 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %53) #2
  %55 = load i32, ptr %17, align 4, !tbaa !9
  %56 = add nsw i32 %55, 1
  %57 = sext i32 %56 to i64
  %58 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %54, i64 noundef %57) #2
  %59 = load i32, ptr %58, align 4, !tbaa !9
  store i32 %59, ptr %14, align 4, !tbaa !9
  %60 = load i32, ptr %13, align 4, !tbaa !9
  %61 = sext i32 %60 to i64
  %62 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %61) #2
  %63 = load i32, ptr %16, align 4, !tbaa !9
  %64 = add nsw i32 %63, 1
  %65 = sext i32 %64 to i64
  %66 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %62, i64 noundef %65) #2
  %67 = load i32, ptr %66, align 4, !tbaa !9
  store i32 %67, ptr %13, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 1, ptr %18) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #2
  br label %68

68:                                               ; preds = %51
  %69 = load i32, ptr %15, align 4, !tbaa !9
  %70 = add nsw i32 %69, 1
  store i32 %70, ptr %15, align 4, !tbaa !9
  br label %27, !llvm.loop !15

71:                                               ; preds = %30
  %72 = load i32, ptr %12, align 4, !tbaa !9
  %73 = load i32, ptr %9, align 4, !tbaa !9
  %74 = add nsw i32 %73, %72
  store i32 %74, ptr %9, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #2
  br label %75

75:                                               ; preds = %71
  %76 = load i32, ptr %10, align 4, !tbaa !9
  %77 = add nsw i32 %76, 1
  store i32 %77, ptr %10, align 4, !tbaa !9
  br label %20, !llvm.loop !17

78:                                               ; preds = %24
  call void @llvm.lifetime.start.p0(i64 4, ptr %19) #2
  %79 = load i32, ptr %9, align 4, !tbaa !9
  %80 = sitofp i32 %79 to float
  %81 = fmul float %80, 1.000000e+02
  %82 = load i32, ptr %8, align 4, !tbaa !9
  %83 = mul nsw i32 300, %82
  %84 = sitofp i32 %83 to float
  %85 = fdiv float %81, %84
  store float %85, ptr %19, align 4, !tbaa !18
  %86 = load float, ptr %19, align 4, !tbaa !18
  store i32 1, ptr %11, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #2
  ret float %86
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"bool", !7, i64 0}
!13 = !{i8 0, i8 2}
!14 = !{}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
!17 = distinct !{!17, !16}
!18 = !{!19, !19, i64 0}
!19 = !{!"float", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_Z19did_i_win_the_roundii(i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef float @_Z10play_matchSt6vectorIS_IiSaIiEESaIS1_EEiS3_i(ptr noundef %0, i32 noundef %1, ptr noundef %2, i32 noundef %3) local_unnamed_addr #0 {
  %5 = icmp sgt i32 %3, 0
  br i1 %5, label %.preheader, label %._crit_edge

.preheader:                                       ; preds = %4, %11
  %.031 = phi i32 [ %12, %11 ], [ 0, %4 ]
  %.02030 = phi i32 [ %13, %11 ], [ 0, %4 ]
  br label %14

._crit_edge.loopexit:                             ; preds = %11
  %6 = uitofp nneg i32 %12 to float
  %7 = fmul float %6, 1.000000e+02
  br label %._crit_edge

._crit_edge:                                      ; preds = %._crit_edge.loopexit, %4
  %.0.lcssa = phi float [ 0.000000e+00, %4 ], [ %7, %._crit_edge.loopexit ]
  %8 = mul nsw i32 %3, 300
  %9 = sitofp i32 %8 to float
  %10 = fdiv float %.0.lcssa, %9
  ret float %10

11:                                               ; preds = %14
  %12 = add nuw nsw i32 %spec.select, %.031
  %13 = add nuw nsw i32 %.02030, 1
  %exitcond32.not = icmp eq i32 %13, %3
  br i1 %exitcond32.not, label %._crit_edge.loopexit, label %.preheader, !llvm.loop !5

14:                                               ; preds = %.preheader, %14
  %.02129 = phi i32 [ 0, %.preheader ], [ %spec.select, %14 ]
  %.02228 = phi i32 [ 0, %.preheader ], [ %35, %14 ]
  %.02327 = phi i32 [ 0, %.preheader ], [ %29, %14 ]
  %.02426 = phi i32 [ %.02030, %.preheader ], [ %34, %14 ]
  %15 = sext i32 %.02327 to i64
  %16 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %15) #1
  %17 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %16, i64 noundef 0) #1
  %18 = load i32, ptr %17, align 4, !tbaa !7
  %19 = sext i32 %.02426 to i64
  %20 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %19) #1
  %21 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %20, i64 noundef 0) #1
  %22 = load i32, ptr %21, align 4, !tbaa !7
  %23 = tail call noundef zeroext i1 @_Z19did_i_win_the_roundii(i32 noundef %18, i32 noundef %22)
  %24 = zext i1 %23 to i32
  %spec.select = add nuw nsw i32 %.02129, %24
  %25 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %15) #1
  %26 = add nsw i32 %22, 1
  %27 = sext i32 %26 to i64
  %28 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %25, i64 noundef %27) #1
  %29 = load i32, ptr %28, align 4, !tbaa !7
  %30 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %19) #1
  %31 = add nsw i32 %18, 1
  %32 = sext i32 %31 to i64
  %33 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %30, i64 noundef %32) #1
  %34 = load i32, ptr %33, align 4, !tbaa !7
  %35 = add nuw nsw i32 %.02228, 1
  %exitcond.not = icmp eq i32 %35, 300
  br i1 %exitcond.not, label %11, label %14, !llvm.loop !11
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = !{!8, !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C++ TBAA"}
!11 = distinct !{!11, !6}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass