; LLVM IR from upupming/algorithm :: acwing/算法基础课/第一讲 基础算法/快速排序/786. 第k个数.ll (Z10quick_sortPiiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z10quick_sortPiiii(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) #0 {
  %5 = alloca i32, align 4
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  store ptr %0, ptr %6, align 8, !tbaa !5
  store i32 %1, ptr %7, align 4, !tbaa !9
  store i32 %2, ptr %8, align 4, !tbaa !9
  store i32 %3, ptr %9, align 4, !tbaa !9
  %15 = load i32, ptr %7, align 4, !tbaa !9
  %16 = load i32, ptr %8, align 4, !tbaa !9
  %17 = icmp sge i32 %15, %16
  br i1 %17, label %18, label %24

18:                                               ; preds = %4
  %19 = load ptr, ptr %6, align 8, !tbaa !5
  %20 = load i32, ptr %7, align 4, !tbaa !9
  %21 = sext i32 %20 to i64
  %22 = getelementptr inbounds i32, ptr %19, i64 %21
  %23 = load i32, ptr %22, align 4, !tbaa !9
  store i32 %23, ptr %5, align 4
  br label %103

24:                                               ; preds = %4
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  %25 = load i32, ptr %7, align 4, !tbaa !9
  %26 = sub nsw i32 %25, 1
  store i32 %26, ptr %10, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #3
  %27 = load i32, ptr %8, align 4, !tbaa !9
  %28 = add nsw i32 %27, 1
  store i32 %28, ptr %11, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #3
  %29 = load ptr, ptr %6, align 8, !tbaa !5
  %30 = load i32, ptr %7, align 4, !tbaa !9
  %31 = load i32, ptr %8, align 4, !tbaa !9
  %32 = add nsw i32 %30, %31
  %33 = ashr i32 %32, 1
  %34 = sext i32 %33 to i64
  %35 = getelementptr inbounds i32, ptr %29, i64 %34
  %36 = load i32, ptr %35, align 4, !tbaa !9
  store i32 %36, ptr %12, align 4, !tbaa !9
  br label %37

37:                                               ; preds = %78, %24
  %38 = load i32, ptr %10, align 4, !tbaa !9
  %39 = load i32, ptr %11, align 4, !tbaa !9
  %40 = icmp slt i32 %38, %39
  br i1 %40, label %41, label %79

41:                                               ; preds = %37
  br label %42

42:                                               ; preds = %45, %41
  %43 = load i32, ptr %10, align 4, !tbaa !9
  %44 = add nsw i32 %43, 1
  store i32 %44, ptr %10, align 4, !tbaa !9
  br label %45

45:                                               ; preds = %42
  %46 = load ptr, ptr %6, align 8, !tbaa !5
  %47 = load i32, ptr %10, align 4, !tbaa !9
  %48 = sext i32 %47 to i64
  %49 = getelementptr inbounds i32, ptr %46, i64 %48
  %50 = load i32, ptr %49, align 4, !tbaa !9
  %51 = load i32, ptr %12, align 4, !tbaa !9
  %52 = icmp slt i32 %50, %51
  br i1 %52, label %42, label %53, !llvm.loop !11

53:                                               ; preds = %45
  br label %54

54:                                               ; preds = %57, %53
  %55 = load i32, ptr %11, align 4, !tbaa !9
  %56 = add nsw i32 %55, -1
  store i32 %56, ptr %11, align 4, !tbaa !9
  br label %57

57:                                               ; preds = %54
  %58 = load ptr, ptr %6, align 8, !tbaa !5
  %59 = load i32, ptr %11, align 4, !tbaa !9
  %60 = sext i32 %59 to i64
  %61 = getelementptr inbounds i32, ptr %58, i64 %60
  %62 = load i32, ptr %61, align 4, !tbaa !9
  %63 = load i32, ptr %12, align 4, !tbaa !9
  %64 = icmp sgt i32 %62, %63
  br i1 %64, label %54, label %65, !llvm.loop !13

65:                                               ; preds = %57
  %66 = load i32, ptr %10, align 4, !tbaa !9
  %67 = load i32, ptr %11, align 4, !tbaa !9
  %68 = icmp slt i32 %66, %67
  br i1 %68, label %69, label %78

69:                                               ; preds = %65
  %70 = load ptr, ptr %6, align 8, !tbaa !5
  %71 = load i32, ptr %10, align 4, !tbaa !9
  %72 = sext i32 %71 to i64
  %73 = getelementptr inbounds i32, ptr %70, i64 %72
  %74 = load ptr, ptr %6, align 8, !tbaa !5
  %75 = load i32, ptr %11, align 4, !tbaa !9
  %76 = sext i32 %75 to i64
  %77 = getelementptr inbounds i32, ptr %74, i64 %76
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %73, ptr noundef nonnull align 4 dereferenceable(4) %77) #3
  br label %78

78:                                               ; preds = %69, %65
  br label %37, !llvm.loop !14

79:                                               ; preds = %37
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #3
  %80 = load i32, ptr %11, align 4, !tbaa !9
  %81 = load i32, ptr %7, align 4, !tbaa !9
  %82 = sub nsw i32 %80, %81
  %83 = add nsw i32 %82, 1
  store i32 %83, ptr %13, align 4, !tbaa !9
  %84 = load i32, ptr %13, align 4, !tbaa !9
  %85 = load i32, ptr %9, align 4, !tbaa !9
  %86 = icmp sge i32 %84, %85
  br i1 %86, label %87, label %93

87:                                               ; preds = %79
  %88 = load ptr, ptr %6, align 8, !tbaa !5
  %89 = load i32, ptr %7, align 4, !tbaa !9
  %90 = load i32, ptr %11, align 4, !tbaa !9
  %91 = load i32, ptr %9, align 4, !tbaa !9
  %92 = call noundef i32 @_Z10quick_sortPiiii(ptr noundef %88, i32 noundef %89, i32 noundef %90, i32 noundef %91)
  store i32 %92, ptr %5, align 4
  store i32 1, ptr %14, align 4
  br label %102

93:                                               ; preds = %79
  %94 = load ptr, ptr %6, align 8, !tbaa !5
  %95 = load i32, ptr %11, align 4, !tbaa !9
  %96 = add nsw i32 %95, 1
  %97 = load i32, ptr %8, align 4, !tbaa !9
  %98 = load i32, ptr %9, align 4, !tbaa !9
  %99 = load i32, ptr %13, align 4, !tbaa !9
  %100 = sub nsw i32 %98, %99
  %101 = call noundef i32 @_Z10quick_sortPiiii(ptr noundef %94, i32 noundef %96, i32 noundef %97, i32 noundef %100)
  store i32 %101, ptr %5, align 4
  store i32 1, ptr %14, align 4
  br label %102

102:                                              ; preds = %93, %87
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #3
  br label %103

103:                                              ; preds = %102, %18
  %104 = load i32, ptr %5, align 4
  ret i32 %104
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}
!14 = distinct !{!14, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z10quick_sortPiiii(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #0 {
  br label %tailrecurse.outer

tailrecurse.outer:                                ; preds = %36, %4
  %.tr49.ph = phi i32 [ %37, %36 ], [ %1, %4 ]
  %.tr50.ph = phi i32 [ %.tr50, %36 ], [ %2, %4 ]
  %.tr51.ph = phi i32 [ %38, %36 ], [ %3, %4 ]
  %5 = add nsw i32 %.tr49.ph, -1
  br label %tailrecurse

tailrecurse:                                      ; preds = %tailrecurse.outer, %._crit_edge
  %.tr50 = phi i32 [ %.040.lcssa, %._crit_edge ], [ %.tr50.ph, %tailrecurse.outer ]
  %.not = icmp slt i32 %.tr49.ph, %.tr50
  br i1 %.not, label %10, label %6

6:                                                ; preds = %tailrecurse
  %7 = sext i32 %.tr49.ph to i64
  %8 = getelementptr inbounds i32, ptr %0, i64 %7
  %9 = load i32, ptr %8, align 4, !tbaa !5
  ret i32 %9

10:                                               ; preds = %tailrecurse
  %11 = add nsw i32 %.tr50, 1
  %12 = add nsw i32 %.tr50, %.tr49.ph
  %13 = ashr i32 %12, 1
  %14 = sext i32 %13 to i64
  %15 = getelementptr inbounds i32, ptr %0, i64 %14
  %16 = load i32, ptr %15, align 4, !tbaa !5
  %.not61 = icmp sgt i32 %.tr49.ph, %11
  br i1 %.not61, label %._crit_edge, label %.preheader52

.preheader52:                                     ; preds = %10, %32
  %.03860 = phi i32 [ %23, %32 ], [ %5, %10 ]
  %.04059 = phi i32 [ %30, %32 ], [ %11, %10 ]
  %17 = sext i32 %.03860 to i64
  br label %18

18:                                               ; preds = %.preheader52, %18
  %indvars.iv = phi i64 [ %17, %.preheader52 ], [ %indvars.iv.next, %18 ]
  %indvars.iv.next = add nsw i64 %indvars.iv, 1
  %19 = getelementptr inbounds i32, ptr %0, i64 %indvars.iv.next
  %20 = load i32, ptr %19, align 4, !tbaa !5
  %21 = icmp slt i32 %20, %16
  br i1 %21, label %18, label %.preheader, !llvm.loop !9

.preheader:                                       ; preds = %18
  %22 = getelementptr inbounds i32, ptr %0, i64 %indvars.iv.next
  %23 = trunc nsw i64 %indvars.iv.next to i32
  %24 = sext i32 %.04059 to i64
  br label %25

25:                                               ; preds = %.preheader, %25
  %indvars.iv68 = phi i64 [ %24, %.preheader ], [ %indvars.iv.next69, %25 ]
  %indvars.iv.next69 = add nsw i64 %indvars.iv68, -1
  %26 = getelementptr inbounds i32, ptr %0, i64 %indvars.iv.next69
  %27 = load i32, ptr %26, align 4, !tbaa !5
  %28 = icmp sgt i32 %27, %16
  br i1 %28, label %25, label %29, !llvm.loop !11

29:                                               ; preds = %25
  %30 = trunc nsw i64 %indvars.iv.next69 to i32
  %31 = icmp slt i64 %indvars.iv.next, %indvars.iv.next69
  br i1 %31, label %32, label %._crit_edge

32:                                               ; preds = %29
  %33 = getelementptr inbounds i32, ptr %0, i64 %indvars.iv.next69
  tail call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %22, ptr noundef nonnull align 4 dereferenceable(4) %33) #2
  br label %.preheader52

._crit_edge:                                      ; preds = %29, %10
  %.040.lcssa = phi i32 [ %11, %10 ], [ %30, %29 ]
  %34 = sub nsw i32 %.040.lcssa, %.tr49.ph
  %35 = add nsw i32 %34, 1
  %.not48 = icmp slt i32 %35, %.tr51.ph
  br i1 %.not48, label %36, label %tailrecurse

36:                                               ; preds = %._crit_edge
  %37 = add nsw i32 %.040.lcssa, 1
  %38 = sub nsw i32 %.tr51.ph, %35
  br label %tailrecurse.outer
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass