; LLVM IR from AF-GRILL/DISPluginForUnreal :: Source/ThirdParty/include/dis6/TransmitterPdu.ll (ZNK3DIS14TransmitterPdueqERKS0_)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.DIS::TransmitterPdu" = type { %"class.DIS::RadioCommunicationsFamilyPdu.base", %"class.DIS::RadioEntityType", i8, i8, i16, %"class.DIS::Vector3Double", %"class.DIS::Vector3Float", i16, i16, i64, float, float, %"class.DIS::ModulationType", i16, i16, i8, i16, i8, %"class.std::vector", %"class.std::vector" }
%"class.DIS::RadioCommunicationsFamilyPdu.base" = type { %"class.DIS::Pdu.base", [4 x i8], %"class.DIS::EntityID", i16 }
%"class.DIS::Pdu.base" = type <{ ptr, i8, i8, i8, i8, i32, i16, i16 }>
%"class.DIS::EntityID" = type <{ ptr, i16, i16, i16, [2 x i8] }>
%"class.DIS::RadioEntityType" = type { ptr, i8, i8, i16, i8, i8, i16 }
%"class.DIS::Vector3Double" = type { ptr, double, double, double }
%"class.DIS::Vector3Float" = type <{ ptr, float, float, float, [4 x i8] }>
%"class.DIS::ModulationType" = type { ptr, i16, i16, i16, i16 }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<DIS::Vector3Float, std::allocator<DIS::Vector3Float>>::_Vector_impl" }
%"struct.std::_Vector_base<DIS::Vector3Float, std::allocator<DIS::Vector3Float>>::_Vector_impl" = type { %"struct.std::_Vector_base<DIS::Vector3Float, std::allocator<DIS::Vector3Float>>::_Vector_impl_data" }
%"struct.std::_Vector_base<DIS::Vector3Float, std::allocator<DIS::Vector3Float>>::_Vector_impl_data" = type { ptr, ptr, ptr }

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIN3DIS12Vector3FloatESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(20) ptr @_ZNKSt6vectorIN3DIS12Vector3FloatESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZNK3DIS14TransmitterPdueqERKS0_(ptr noundef nonnull align 8 dereferenceable(232) %0, ptr noundef nonnull align 8 dereferenceable(232) %1) #2 align 2 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca i8, align 1
  %6 = alloca i64, align 8
  %7 = alloca i64, align 8
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  %8 = load ptr, ptr %3, align 8
  call void @llvm.lifetime.start.p0(i64 1, ptr %5) #4
  store i8 1, ptr %5, align 1, !tbaa !9
  %9 = load ptr, ptr %4, align 8, !tbaa !5
  %10 = call noundef zeroext i1 @_ZNK3DIS28RadioCommunicationsFamilyPdueqERKS0_(ptr noundef nonnull align 8 dereferenceable(42) %8, ptr noundef nonnull align 8 dereferenceable(42) %9)
  %11 = zext i1 %10 to i8
  store i8 %11, ptr %5, align 1, !tbaa !9
  %12 = getelementptr inbounds %"class.DIS::TransmitterPdu", ptr %8, i32 0, i32 1
  %13 = load ptr, ptr %4, align 8, !tbaa !5
  %14 = getelementptr inbounds %"class.DIS::TransmitterPdu", ptr %13, i32 0, i32 1
  %15 = call noundef zeroext i1 @_ZNK3DIS15RadioEntityTypeeqERKS0_(ptr noundef nonnull align 8 dereferenceable(16) %12, ptr noundef nonnull align 8 dereferenceable(16) %14)
  br i1 %15, label %17, label %16

16:                                               ; preds = %2
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %17

17:                                               ; preds = %16, %2
  %18 = getelementptr inbounds %"class.DIS::TransmitterPdu", ptr %8, i32 0, i32 2
  %19 = load i8, ptr %18, align 8, !tbaa !11
  %20 = zext i8 %19 to i32
  %21 = load ptr, ptr %4, align 8, !tbaa !5
  %22 = getelementptr inbounds %"class.DIS::TransmitterPdu", ptr %21, i32 0, i32 2
  %23 = load i8, ptr %22, align 8, !tbaa !11
  %24 = zext i8 %23 to i32
  %25 = icmp eq i32 %20, %24
  br i1 %25, label %27, label %26

26:                                               ; preds = %17
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %27

27:                                               ; preds = %26, %17
  %28 = getelementptr inbounds %"class.DIS::TransmitterPdu", ptr %8, i32 0, i32 3
  %29 = load i8, ptr %28, align 1, !tbaa !29
  %30 = zext i8 %29 to i32
  %31 = load ptr, ptr %4, align 8, !tbaa !5
  %32 = getelementptr inbounds %"class.DIS::TransmitterPdu", ptr %31, i32 0, i32 3
  %33 = load i8, ptr %32, align 1, !tbaa !29
  %34 = zext i8 %33 to i32
  %35 = icmp eq i32 %30, %34
  br i1 %35, label %37, label %36

36:                                               ; preds = %27
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %37

37:                                               ; preds = %36, %27
  %38 = getelementptr inbounds %"class.DIS::TransmitterPdu", ptr %8, i32 0, i32 4
  %39 = load i16, ptr %38, align 2, !tbaa !30
  %40 = zext i16 %39 to i32
  %41 = load ptr, ptr %4, align 8, !tbaa !5
  %42 = getelementptr inbounds %"class.DIS::TransmitterPdu", ptr %41, i32 0, i32 4
  %43 = load i16, ptr %42, align 2, !tbaa !30
  %44 = zext i16 %43 to i32
  %45 = icmp eq i32 %40, %44
  br i1 %45, label %47, label %46

46:                                               ; preds = %37
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %47

47:                                               ; preds = %46, %37
  %48 = getelementptr inbounds %"class.DIS::TransmitterPdu", ptr %8, i32 0, i32 5
  %49 = load ptr, ptr %4, align 8, !tbaa !5
  %50 = getelementptr inbounds %"class.DIS::TransmitterPdu", ptr %49, i32 0, i32 5
  %51 = call noundef zeroext i1 @_ZNK3DIS13Vector3DoubleeqERKS0_(ptr noundef nonnull align 8 dereferenceable(32) %48, ptr noundef nonnull align 8 dereferenceable(32) %50)
  br i1 %51, label %53, label %52

52:                                               ; preds = %47
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %53

53:                                               ; preds = %52, %47
  %54 = getelementptr inbounds %"class.DIS::TransmitterPdu", ptr %8, i32 0, i32 6
  %55 = load ptr, ptr %4, align 8, !tbaa !5
  %56 = getelementptr inbounds %"class.DIS::TransmitterPdu", ptr %55, i32 0, i32 6
  %57 = call noundef zeroext i1 @_ZNK3DIS12Vector3FloateqERKS0_(ptr noundef nonnull align 8 dereferenceable(20) %54, ptr noundef nonnull align 8 dereferenceable(20) %56)
  br i1 %57, label %59, label %58

58:                                               ; preds = %53
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %59

59:                                               ; preds = %58, %53
  %60 = getelementptr inbounds %"class.DIS::TransmitterPdu", ptr %8, i32 0, i32 7
  %61 = load i16, ptr %60, align 8, !tbaa !31
  %62 = zext i16 %61 to i32
  %63 = load ptr, ptr %4, align 8, !tbaa !5
  %64 = getelementptr inbounds %"class.DIS::TransmitterPdu", ptr %63, i32 0, i32 7
  %65 = load i16, ptr %64, align 8, !tbaa !31
  %66 = zext i16 %65 to i32
  %67 = icmp eq i32 %62, %66
  br i1 %67, label %69, label %68

68:                                               ; preds = %59
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %69

69:                                               ; preds = %68, %59
  %70 = getelementptr inbounds %"class.DIS::TransmitterPdu", ptr %8, i32 0, i32 9
  %71 = load i64, ptr %70, align 8, !tbaa !32
  %72 = load ptr, ptr %4, align 8, !tbaa !5
  %73 = getelementptr inbounds %"class.DIS::TransmitterPdu", ptr %72, i32 0, i32 9
  %74 = load i64, ptr %73, align 8, !tbaa !32
  %75 = icmp eq i64 %71, %74
  br i1 %75, label %77, label %76

76:                                               ; preds = %69
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %77

77:                                               ; preds = %76, %69
  %78 = getelementptr inbounds %"class.DIS::TransmitterPdu", ptr %8, i32 0, i32 10
  %79 = load float, ptr %78, align 8, !tbaa !33
  %80 = load ptr, ptr %4, align 8, !tbaa !5
  %81 = getelementptr inbounds %"class.DIS::TransmitterPdu", ptr %80, i32 0, i32 10
  %82 = load float, ptr %81, align 8, !tbaa !33
  %83 = fcmp oeq float %79, %82
  br i1 %83, label %85, label %84

84:                                               ; preds = %77
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %85

85:                                               ; preds = %84, %77
  %86 = getelementptr inbounds %"class.DIS::TransmitterPdu", ptr %8, i32 0, i32 11
  %87 = load float, ptr %86, align 4, !tbaa !34
  %88 = load ptr, ptr %4, align 8, !tbaa !5
  %89 = getelementptr inbounds %"class.DIS::TransmitterPdu", ptr %88, i32 0, i32 11
  %90 = load float, ptr %89, align 4, !tbaa !34
  %91 = fcmp oeq float %87, %90
  br i1 %91, label %93, label %92

92:                                               ; preds = %85
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %93

93:                                               ; preds = %92, %85
  %94 = getelementptr inbounds %"class.DIS::TransmitterPdu", ptr %8, i32 0, i32 12
  %95 = load ptr, ptr %4, align 8, !tbaa !5
  %96 = getelementptr inbounds %"class.DIS::TransmitterPdu", ptr %95, i32 0, i32 12
  %97 = call noundef zeroext i1 @_ZNK3DIS14ModulationTypeeqERKS0_(ptr noundef nonnull align 8 dereferenceable(16) %94, ptr noundef nonnull align 8 dereferenceable(16) %96)
  br i1 %97, label %99, label %98

98:                                               ; preds = %93
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %99

99:                                               ; preds = %98, %93
  %100 = getelementptr inbounds %"class.DIS::TransmitterPdu", ptr %8, i32 0, i32 13
  %101 = load i16, ptr %100, align 8, !tbaa !35
  %102 = zext i16 %101 to i32
  %103 = load ptr, ptr %4, align 8, !tbaa !5
  %104 = getelementptr inbounds %"class.DIS::TransmitterPdu", ptr %103, i32 0, i32 13
  %105 = load i16, ptr %104, align 8, !tbaa !35
  %106 = zext i16 %105 to i32
  %107 = icmp eq i32 %102, %106
  br i1 %107, label %109, label %108

108:                                              ; preds = %99
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %109

109:                                              ; preds = %108, %99
  %110 = getelementptr inbounds %"class.DIS::TransmitterPdu", ptr %8, i32 0, i32 14
  %111 = load i16, ptr %110, align 2, !tbaa !36
  %112 = zext i16 %111 to i32
  %113 = load ptr, ptr %4, align 8, !tbaa !5
  %114 = getelementptr inbounds %"class.DIS::TransmitterPdu", ptr %113, i32 0, i32 14
  %115 = load i16, ptr %114, align 2, !tbaa !36
  %116 = zext i16 %115 to i32
  %117 = icmp eq i32 %112, %116
  br i1 %117, label %119, label %118

118:                                              ; preds = %109
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %119

119:                                              ; preds = %118, %109
  %120 = getelementptr inbounds %"class.DIS::TransmitterPdu", ptr %8, i32 0, i32 16
  %121 = load i16, ptr %120, align 2, !tbaa !37
  %122 = zext i16 %121 to i32
  %123 = load ptr, ptr %4, align 8, !tbaa !5
  %124 = getelementptr inbounds %"class.DIS::TransmitterPdu", ptr %123, i32 0, i32 16
  %125 = load i16, ptr %124, align 2, !tbaa !37
  %126 = zext i16 %125 to i32
  %127 = icmp eq i32 %122, %126
  br i1 %127, label %129, label %128

128:                                              ; preds = %119
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %129

129:                                              ; preds = %128, %119
  %130 = getelementptr inbounds %"class.DIS::TransmitterPdu", ptr %8, i32 0, i32 17
  %131 = load i8, ptr %130, align 8, !tbaa !38
  %132 = zext i8 %131 to i32
  %133 = load ptr, ptr %4, align 8, !tbaa !5
  %134 = getelementptr inbounds %"class.DIS::TransmitterPdu", ptr %133, i32 0, i32 17
  %135 = load i8, ptr %134, align 8, !tbaa !38
  %136 = zext i8 %135 to i32
  %137 = icmp eq i32 %132, %136
  br i1 %137, label %139, label %138

138:                                              ; preds = %129
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %139

139:                                              ; preds = %138, %129
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #4
  store i64 0, ptr %6, align 8, !tbaa !39
  br label %140

140:                                              ; preds = %157, %139
  %141 = load i64, ptr %6, align 8, !tbaa !39
  %142 = getelementptr inbounds %"class.DIS::TransmitterPdu", ptr %8, i32 0, i32 18
  %143 = call noundef i64 @_ZNKSt6vectorIN3DIS12Vector3FloatESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %142) #4
  %144 = icmp ult i64 %141, %143
  br i1 %144, label %146, label %145

145:                                              ; preds = %140
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #4
  br label %160

146:                                              ; preds = %140
  %147 = getelementptr inbounds %"class.DIS::TransmitterPdu", ptr %8, i32 0, i32 18
  %148 = load i64, ptr %6, align 8, !tbaa !39
  %149 = call noundef nonnull align 8 dereferenceable(20) ptr @_ZNKSt6vectorIN3DIS12Vector3FloatESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %147, i64 noundef %148) #4
  %150 = load ptr, ptr %4, align 8, !tbaa !5
  %151 = getelementptr inbounds %"class.DIS::TransmitterPdu", ptr %150, i32 0, i32 18
  %152 = load i64, ptr %6, align 8, !tbaa !39
  %153 = call noundef nonnull align 8 dereferenceable(20) ptr @_ZNKSt6vectorIN3DIS12Vector3FloatESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %151, i64 noundef %152) #4
  %154 = call noundef zeroext i1 @_ZNK3DIS12Vector3FloateqERKS0_(ptr noundef nonnull align 8 dereferenceable(20) %149, ptr noundef nonnull align 8 dereferenceable(20) %153)
  br i1 %154, label %156, label %155

155:                                              ; preds = %146
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %156

156:                                              ; preds = %155, %146
  br label %157

157:                                              ; preds = %156
  %158 = load i64, ptr %6, align 8, !tbaa !39
  %159 = add i64 %158, 1
  store i64 %159, ptr %6, align 8, !tbaa !39
  br label %140, !llvm.loop !41

160:                                              ; preds = %145
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #4
  store i64 0, ptr %7, align 8, !tbaa !39
  br label %161

161:                                              ; preds = %178, %160
  %162 = load i64, ptr %7, align 8, !tbaa !39
  %163 = getelementptr inbounds %"class.DIS::TransmitterPdu", ptr %8, i32 0, i32 19
  %164 = call noundef i64 @_ZNKSt6vectorIN3DIS12Vector3FloatESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %163) #4
  %165 = icmp ult i64 %162, %164
  br i1 %165, label %167, label %166

166:                                              ; preds = %161
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #4
  br label %181

167:                                              ; preds = %161
  %168 = getelementptr inbounds %"class.DIS::TransmitterPdu", ptr %8, i32 0, i32 19
  %169 = load i64, ptr %7, align 8, !tbaa !39
  %170 = call noundef nonnull align 8 dereferenceable(20) ptr @_ZNKSt6vectorIN3DIS12Vector3FloatESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %168, i64 noundef %169) #4
  %171 = load ptr, ptr %4, align 8, !tbaa !5
  %172 = getelementptr inbounds %"class.DIS::TransmitterPdu", ptr %171, i32 0, i32 19
  %173 = load i64, ptr %7, align 8, !tbaa !39
  %174 = call noundef nonnull align 8 dereferenceable(20) ptr @_ZNKSt6vectorIN3DIS12Vector3FloatESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %172, i64 noundef %173) #4
  %175 = call noundef zeroext i1 @_ZNK3DIS12Vector3FloateqERKS0_(ptr noundef nonnull align 8 dereferenceable(20) %170, ptr noundef nonnull align 8 dereferenceable(20) %174)
  br i1 %175, label %177, label %176

176:                                              ; preds = %167
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %177

177:                                              ; preds = %176, %167
  br label %178

178:                                              ; preds = %177
  %179 = load i64, ptr %7, align 8, !tbaa !39
  %180 = add i64 %179, 1
  store i64 %180, ptr %7, align 8, !tbaa !39
  br label %161, !llvm.loop !43

181:                                              ; preds = %166
  %182 = load i8, ptr %5, align 1, !tbaa !9, !range !44, !noundef !45
  %183 = trunc i8 %182 to i1
  call void @llvm.lifetime.end.p0(i64 1, ptr %5) #4
  ret i1 %183
}

declare noundef zeroext i1 @_ZNK3DIS28RadioCommunicationsFamilyPdueqERKS0_(ptr noundef nonnull align 8 dereferenceable(42), ptr noundef nonnull align 8 dereferenceable(42)) #3

declare noundef zeroext i1 @_ZNK3DIS15RadioEntityTypeeqERKS0_(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 8 dereferenceable(16)) #3

declare noundef zeroext i1 @_ZNK3DIS13Vector3DoubleeqERKS0_(ptr noundef nonnull align 8 dereferenceable(32), ptr noundef nonnull align 8 dereferenceable(32)) #3

declare noundef zeroext i1 @_ZNK3DIS12Vector3FloateqERKS0_(ptr noundef nonnull align 8 dereferenceable(20), ptr noundef nonnull align 8 dereferenceable(20)) #3

declare noundef zeroext i1 @_ZNK3DIS14ModulationTypeeqERKS0_(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 8 dereferenceable(16)) #3

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"bool", !7, i64 0}
!11 = !{!12, !7, i64 64}
!12 = !{!"_ZTSN3DIS14TransmitterPduE", !13, i64 0, !18, i64 48, !7, i64 64, !7, i64 65, !16, i64 66, !19, i64 72, !21, i64 104, !16, i64 128, !16, i64 130, !23, i64 136, !22, i64 144, !22, i64 148, !24, i64 152, !16, i64 168, !16, i64 170, !7, i64 172, !16, i64 174, !7, i64 176, !25, i64 184, !25, i64 208}
!13 = !{!"_ZTSN3DIS28RadioCommunicationsFamilyPduE", !14, i64 0, !17, i64 24, !16, i64 40}
!14 = !{!"_ZTSN3DIS3PduE", !7, i64 8, !7, i64 9, !7, i64 10, !7, i64 11, !15, i64 12, !16, i64 16, !16, i64 18}
!15 = !{!"int", !7, i64 0}
!16 = !{!"short", !7, i64 0}
!17 = !{!"_ZTSN3DIS8EntityIDE", !16, i64 8, !16, i64 10, !16, i64 12}
!18 = !{!"_ZTSN3DIS15RadioEntityTypeE", !7, i64 8, !7, i64 9, !16, i64 10, !7, i64 12, !7, i64 13, !16, i64 14}
!19 = !{!"_ZTSN3DIS13Vector3DoubleE", !20, i64 8, !20, i64 16, !20, i64 24}
!20 = !{!"double", !7, i64 0}
!21 = !{!"_ZTSN3DIS12Vector3FloatE", !22, i64 8, !22, i64 12, !22, i64 16}
!22 = !{!"float", !7, i64 0}
!23 = !{!"long long", !7, i64 0}
!24 = !{!"_ZTSN3DIS14ModulationTypeE", !16, i64 8, !16, i64 10, !16, i64 12, !16, i64 14}
!25 = !{!"_ZTSSt6vectorIN3DIS12Vector3FloatESaIS1_EE", !26, i64 0}
!26 = !{!"_ZTSSt12_Vector_baseIN3DIS12Vector3FloatESaIS1_EE", !27, i64 0}
!27 = !{!"_ZTSNSt12_Vector_baseIN3DIS12Vector3FloatESaIS1_EE12_Vector_implE", !28, i64 0}
!28 = !{!"_ZTSNSt12_Vector_baseIN3DIS12Vector3FloatESaIS1_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!29 = !{!12, !7, i64 65}
!30 = !{!12, !16, i64 66}
!31 = !{!12, !16, i64 128}
!32 = !{!12, !23, i64 136}
!33 = !{!12, !22, i64 144}
!34 = !{!12, !22, i64 148}
!35 = !{!12, !16, i64 168}
!36 = !{!12, !16, i64 170}
!37 = !{!12, !16, i64 174}
!38 = !{!12, !7, i64 176}
!39 = !{!40, !40, i64 0}
!40 = !{!"long", !7, i64 0}
!41 = distinct !{!41, !42}
!42 = !{!"llvm.loop.mustprogress"}
!43 = distinct !{!43, !42}
!44 = !{i8 0, i8 2}
!45 = !{}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIN3DIS12Vector3FloatESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(20) ptr @_ZNKSt6vectorIN3DIS12Vector3FloatESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZNK3DIS14TransmitterPdueqERKS0_(ptr noundef nonnull align 8 dereferenceable(232) %0, ptr noundef nonnull align 8 dereferenceable(232) %1) local_unnamed_addr #1 align 2 {
  %3 = tail call noundef zeroext i1 @_ZNK3DIS28RadioCommunicationsFamilyPdueqERKS0_(ptr noundef nonnull align 8 dereferenceable(42) %0, ptr noundef nonnull align 8 dereferenceable(42) %1)
  %4 = getelementptr inbounds i8, ptr %0, i64 48
  %5 = getelementptr inbounds i8, ptr %1, i64 48
  %6 = tail call noundef zeroext i1 @_ZNK3DIS15RadioEntityTypeeqERKS0_(ptr noundef nonnull align 8 dereferenceable(16) %4, ptr noundef nonnull align 8 dereferenceable(16) %5)
  %narrow = and i1 %3, %6
  %7 = getelementptr inbounds i8, ptr %0, i64 64
  %8 = load i8, ptr %7, align 8, !tbaa !5
  %9 = getelementptr inbounds i8, ptr %1, i64 64
  %10 = load i8, ptr %9, align 8, !tbaa !5
  %11 = icmp eq i8 %8, %10
  %narrow31 = and i1 %narrow, %11
  %12 = getelementptr inbounds i8, ptr %0, i64 65
  %13 = load i8, ptr %12, align 1, !tbaa !26
  %14 = getelementptr inbounds i8, ptr %1, i64 65
  %15 = load i8, ptr %14, align 1, !tbaa !26
  %16 = icmp eq i8 %13, %15
  %17 = getelementptr inbounds i8, ptr %0, i64 66
  %18 = load i16, ptr %17, align 2, !tbaa !27
  %19 = getelementptr inbounds i8, ptr %1, i64 66
  %20 = load i16, ptr %19, align 2, !tbaa !27
  %21 = icmp eq i16 %18, %20
  %22 = getelementptr inbounds i8, ptr %0, i64 72
  %23 = getelementptr inbounds i8, ptr %1, i64 72
  %24 = tail call noundef zeroext i1 @_ZNK3DIS13Vector3DoubleeqERKS0_(ptr noundef nonnull align 8 dereferenceable(32) %22, ptr noundef nonnull align 8 dereferenceable(32) %23)
  %25 = getelementptr inbounds i8, ptr %0, i64 104
  %26 = getelementptr inbounds i8, ptr %1, i64 104
  %27 = tail call noundef zeroext i1 @_ZNK3DIS12Vector3FloateqERKS0_(ptr noundef nonnull align 8 dereferenceable(20) %25, ptr noundef nonnull align 8 dereferenceable(20) %26)
  %28 = and i1 %24, %27
  %29 = getelementptr inbounds i8, ptr %0, i64 128
  %30 = load i16, ptr %29, align 8, !tbaa !28
  %31 = getelementptr inbounds i8, ptr %1, i64 128
  %32 = load i16, ptr %31, align 8, !tbaa !28
  %33 = icmp eq i16 %30, %32
  %34 = and i1 %28, %33
  %35 = getelementptr inbounds i8, ptr %0, i64 136
  %36 = load i64, ptr %35, align 8, !tbaa !29
  %37 = getelementptr inbounds i8, ptr %1, i64 136
  %38 = load i64, ptr %37, align 8, !tbaa !29
  %39 = icmp eq i64 %36, %38
  %40 = getelementptr inbounds i8, ptr %0, i64 144
  %41 = load float, ptr %40, align 8, !tbaa !30
  %42 = getelementptr inbounds i8, ptr %1, i64 144
  %43 = load float, ptr %42, align 8, !tbaa !30
  %44 = fcmp oeq float %41, %43
  %45 = getelementptr inbounds i8, ptr %0, i64 148
  %46 = load float, ptr %45, align 4, !tbaa !31
  %47 = getelementptr inbounds i8, ptr %1, i64 148
  %48 = load float, ptr %47, align 4, !tbaa !31
  %49 = fcmp oeq float %46, %48
  %50 = getelementptr inbounds i8, ptr %0, i64 152
  %51 = getelementptr inbounds i8, ptr %1, i64 152
  %52 = tail call noundef zeroext i1 @_ZNK3DIS14ModulationTypeeqERKS0_(ptr noundef nonnull align 8 dereferenceable(16) %50, ptr noundef nonnull align 8 dereferenceable(16) %51)
  %53 = getelementptr inbounds i8, ptr %0, i64 168
  %54 = load i16, ptr %53, align 8, !tbaa !32
  %55 = getelementptr inbounds i8, ptr %1, i64 168
  %56 = load i16, ptr %55, align 8, !tbaa !32
  %57 = icmp eq i16 %54, %56
  %58 = and i1 %52, %57
  %59 = getelementptr inbounds i8, ptr %0, i64 170
  %60 = load i16, ptr %59, align 2, !tbaa !33
  %61 = getelementptr inbounds i8, ptr %1, i64 170
  %62 = load i16, ptr %61, align 2, !tbaa !33
  %63 = icmp eq i16 %60, %62
  %64 = getelementptr inbounds i8, ptr %0, i64 174
  %65 = load i16, ptr %64, align 2, !tbaa !34
  %66 = getelementptr inbounds i8, ptr %1, i64 174
  %67 = load i16, ptr %66, align 2, !tbaa !34
  %68 = icmp eq i16 %65, %67
  %69 = getelementptr inbounds i8, ptr %0, i64 176
  %70 = load i8, ptr %69, align 8, !tbaa !35
  %71 = getelementptr inbounds i8, ptr %1, i64 176
  %72 = load i8, ptr %71, align 8, !tbaa !35
  %73 = icmp eq i8 %70, %72
  %74 = select i1 %73, i1 %68, i1 false
  %75 = select i1 %74, i1 %63, i1 false
  %76 = select i1 %75, i1 %58, i1 false
  %77 = select i1 %76, i1 %49, i1 false
  %78 = select i1 %77, i1 %44, i1 false
  %79 = select i1 %78, i1 %39, i1 false
  %80 = select i1 %79, i1 %34, i1 false
  %81 = select i1 %80, i1 %21, i1 false
  %82 = select i1 %81, i1 %16, i1 false
  %narrow44 = select i1 %82, i1 %narrow31, i1 false
  %83 = getelementptr inbounds i8, ptr %0, i64 184
  %84 = tail call noundef i64 @_ZNKSt6vectorIN3DIS12Vector3FloatESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %83) #3
  %.not = icmp eq i64 %84, 0
  br i1 %.not, label %.preheader, label %.lr.ph

.lr.ph:                                           ; preds = %2
  %85 = getelementptr inbounds i8, ptr %1, i64 184
  br label %89

.preheader:                                       ; preds = %89, %2
  %.15.lcssa = phi i1 [ %narrow44, %2 ], [ %spec.select29, %89 ]
  %86 = getelementptr inbounds i8, ptr %0, i64 208
  %87 = tail call noundef i64 @_ZNKSt6vectorIN3DIS12Vector3FloatESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %86) #3
  %.not51 = icmp eq i64 %87, 0
  br i1 %.not51, label %._crit_edge, label %.lr.ph49

.lr.ph49:                                         ; preds = %.preheader
  %88 = getelementptr inbounds i8, ptr %1, i64 208
  br label %96

89:                                               ; preds = %.lr.ph, %89
  %.02746 = phi i64 [ 0, %.lr.ph ], [ %93, %89 ]
  %.1545 = phi i1 [ %narrow44, %.lr.ph ], [ %spec.select29, %89 ]
  %90 = tail call noundef nonnull align 8 dereferenceable(20) ptr @_ZNKSt6vectorIN3DIS12Vector3FloatESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %83, i64 noundef %.02746) #3
  %91 = tail call noundef nonnull align 8 dereferenceable(20) ptr @_ZNKSt6vectorIN3DIS12Vector3FloatESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %85, i64 noundef %.02746) #3
  %92 = tail call noundef zeroext i1 @_ZNK3DIS12Vector3FloateqERKS0_(ptr noundef nonnull align 8 dereferenceable(20) %90, ptr noundef nonnull align 8 dereferenceable(20) %91)
  %spec.select29 = select i1 %92, i1 %.1545, i1 false
  %93 = add nuw i64 %.02746, 1
  %94 = tail call noundef i64 @_ZNKSt6vectorIN3DIS12Vector3FloatESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %83) #3
  %95 = icmp ult i64 %93, %94
  br i1 %95, label %89, label %.preheader, !llvm.loop !36

._crit_edge:                                      ; preds = %96, %.preheader
  %.17.lcssa = phi i1 [ %.15.lcssa, %.preheader ], [ %spec.select30, %96 ]
  ret i1 %.17.lcssa

96:                                               ; preds = %.lr.ph49, %96
  %.048 = phi i64 [ 0, %.lr.ph49 ], [ %100, %96 ]
  %.1747 = phi i1 [ %.15.lcssa, %.lr.ph49 ], [ %spec.select30, %96 ]
  %97 = tail call noundef nonnull align 8 dereferenceable(20) ptr @_ZNKSt6vectorIN3DIS12Vector3FloatESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %86, i64 noundef %.048) #3
  %98 = tail call noundef nonnull align 8 dereferenceable(20) ptr @_ZNKSt6vectorIN3DIS12Vector3FloatESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %88, i64 noundef %.048) #3
  %99 = tail call noundef zeroext i1 @_ZNK3DIS12Vector3FloateqERKS0_(ptr noundef nonnull align 8 dereferenceable(20) %97, ptr noundef nonnull align 8 dereferenceable(20) %98)
  %spec.select30 = select i1 %99, i1 %.1747, i1 false
  %100 = add nuw i64 %.048, 1
  %101 = tail call noundef i64 @_ZNKSt6vectorIN3DIS12Vector3FloatESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %86) #3
  %102 = icmp ult i64 %100, %101
  br i1 %102, label %96, label %._crit_edge, !llvm.loop !38
}

declare noundef zeroext i1 @_ZNK3DIS28RadioCommunicationsFamilyPdueqERKS0_(ptr noundef nonnull align 8 dereferenceable(42), ptr noundef nonnull align 8 dereferenceable(42)) local_unnamed_addr #2

declare noundef zeroext i1 @_ZNK3DIS15RadioEntityTypeeqERKS0_(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 8 dereferenceable(16)) local_unnamed_addr #2

declare noundef zeroext i1 @_ZNK3DIS13Vector3DoubleeqERKS0_(ptr noundef nonnull align 8 dereferenceable(32), ptr noundef nonnull align 8 dereferenceable(32)) local_unnamed_addr #2

declare noundef zeroext i1 @_ZNK3DIS12Vector3FloateqERKS0_(ptr noundef nonnull align 8 dereferenceable(20), ptr noundef nonnull align 8 dereferenceable(20)) local_unnamed_addr #2

declare noundef zeroext i1 @_ZNK3DIS14ModulationTypeeqERKS0_(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 8 dereferenceable(16)) local_unnamed_addr #2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !9, i64 64}
!6 = !{!"_ZTSN3DIS14TransmitterPduE", !7, i64 0, !14, i64 48, !9, i64 64, !9, i64 65, !12, i64 66, !15, i64 72, !17, i64 104, !12, i64 128, !12, i64 130, !19, i64 136, !18, i64 144, !18, i64 148, !20, i64 152, !12, i64 168, !12, i64 170, !9, i64 172, !12, i64 174, !9, i64 176, !21, i64 184, !21, i64 208}
!7 = !{!"_ZTSN3DIS28RadioCommunicationsFamilyPduE", !8, i64 0, !13, i64 24, !12, i64 40}
!8 = !{!"_ZTSN3DIS3PduE", !9, i64 8, !9, i64 9, !9, i64 10, !9, i64 11, !11, i64 12, !12, i64 16, !12, i64 18}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!"short", !9, i64 0}
!13 = !{!"_ZTSN3DIS8EntityIDE", !12, i64 8, !12, i64 10, !12, i64 12}
!14 = !{!"_ZTSN3DIS15RadioEntityTypeE", !9, i64 8, !9, i64 9, !12, i64 10, !9, i64 12, !9, i64 13, !12, i64 14}
!15 = !{!"_ZTSN3DIS13Vector3DoubleE", !16, i64 8, !16, i64 16, !16, i64 24}
!16 = !{!"double", !9, i64 0}
!17 = !{!"_ZTSN3DIS12Vector3FloatE", !18, i64 8, !18, i64 12, !18, i64 16}
!18 = !{!"float", !9, i64 0}
!19 = !{!"long long", !9, i64 0}
!20 = !{!"_ZTSN3DIS14ModulationTypeE", !12, i64 8, !12, i64 10, !12, i64 12, !12, i64 14}
!21 = !{!"_ZTSSt6vectorIN3DIS12Vector3FloatESaIS1_EE", !22, i64 0}
!22 = !{!"_ZTSSt12_Vector_baseIN3DIS12Vector3FloatESaIS1_EE", !23, i64 0}
!23 = !{!"_ZTSNSt12_Vector_baseIN3DIS12Vector3FloatESaIS1_EE12_Vector_implE", !24, i64 0}
!24 = !{!"_ZTSNSt12_Vector_baseIN3DIS12Vector3FloatESaIS1_EE17_Vector_impl_dataE", !25, i64 0, !25, i64 8, !25, i64 16}
!25 = !{!"any pointer", !9, i64 0}
!26 = !{!6, !9, i64 65}
!27 = !{!6, !12, i64 66}
!28 = !{!6, !12, i64 128}
!29 = !{!6, !19, i64 136}
!30 = !{!6, !18, i64 144}
!31 = !{!6, !18, i64 148}
!32 = !{!6, !12, i64 168}
!33 = !{!6, !12, i64 170}
!34 = !{!6, !12, i64 174}
!35 = !{!6, !9, i64 176}
!36 = distinct !{!36, !37}
!37 = !{!"llvm.loop.mustprogress"}
!38 = distinct !{!38, !37}


; Effective O3 passes: AggressiveInstCombinePass,CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass