; LLVM IR from eclipse-threadx/threadx :: utility/benchmarks/thread_metric (tm_preemptive_scheduling_test)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@tm_preemptive_thread_0_counter = external dso_local global i64, align 8
@tm_preemptive_thread_1_counter = external dso_local global i64, align 8
@tm_preemptive_thread_2_counter = external dso_local global i64, align 8
@tm_preemptive_thread_3_counter = external dso_local global i64, align 8
@tm_preemptive_thread_4_counter = external dso_local global i64, align 8
@.str = external hidden unnamed_addr constant [71 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [108 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [26 x i8], align 1

; Function Attrs: nounwind uwtable
define dso_local void @tm_preemptive_thread_report() #0 {
  %1 = alloca i64, align 8
  %2 = alloca i64, align 8
  %3 = alloca i64, align 8
  %4 = alloca i64, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr %1) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %2) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %3) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #3
  store i64 0, ptr %3, align 8, !tbaa !5
  store i64 0, ptr %2, align 8, !tbaa !5
  br label %5

5:                                                ; preds = %73, %0
  br label %6

6:                                                ; preds = %5
  call void @tm_thread_sleep(i32 noundef 30)
  %7 = load i64, ptr %2, align 8, !tbaa !5
  %8 = add i64 %7, 30
  store i64 %8, ptr %2, align 8, !tbaa !5
  %9 = load i64, ptr %2, align 8, !tbaa !5
  %10 = call i32 (ptr, ...) @printf(ptr noundef @.str, i64 noundef %9)
  %11 = load i64, ptr @tm_preemptive_thread_0_counter, align 8, !tbaa !5
  %12 = load i64, ptr @tm_preemptive_thread_1_counter, align 8, !tbaa !5
  %13 = add i64 %11, %12
  %14 = load i64, ptr @tm_preemptive_thread_2_counter, align 8, !tbaa !5
  %15 = add i64 %13, %14
  %16 = load i64, ptr @tm_preemptive_thread_3_counter, align 8, !tbaa !5
  %17 = add i64 %15, %16
  %18 = load i64, ptr @tm_preemptive_thread_4_counter, align 8, !tbaa !5
  %19 = add i64 %17, %18
  store i64 %19, ptr %1, align 8, !tbaa !5
  %20 = load i64, ptr %1, align 8, !tbaa !5
  %21 = udiv i64 %20, 5
  store i64 %21, ptr %4, align 8, !tbaa !5
  %22 = load i64, ptr @tm_preemptive_thread_0_counter, align 8, !tbaa !5
  %23 = load i64, ptr %4, align 8, !tbaa !5
  %24 = sub i64 %23, 1
  %25 = icmp ult i64 %22, %24
  br i1 %25, label %71, label %26

26:                                               ; preds = %6
  %27 = load i64, ptr @tm_preemptive_thread_0_counter, align 8, !tbaa !5
  %28 = load i64, ptr %4, align 8, !tbaa !5
  %29 = add i64 %28, 1
  %30 = icmp ugt i64 %27, %29
  br i1 %30, label %71, label %31

31:                                               ; preds = %26
  %32 = load i64, ptr @tm_preemptive_thread_1_counter, align 8, !tbaa !5
  %33 = load i64, ptr %4, align 8, !tbaa !5
  %34 = sub i64 %33, 1
  %35 = icmp ult i64 %32, %34
  br i1 %35, label %71, label %36

36:                                               ; preds = %31
  %37 = load i64, ptr @tm_preemptive_thread_1_counter, align 8, !tbaa !5
  %38 = load i64, ptr %4, align 8, !tbaa !5
  %39 = add i64 %38, 1
  %40 = icmp ugt i64 %37, %39
  br i1 %40, label %71, label %41

41:                                               ; preds = %36
  %42 = load i64, ptr @tm_preemptive_thread_2_counter, align 8, !tbaa !5
  %43 = load i64, ptr %4, align 8, !tbaa !5
  %44 = sub i64 %43, 1
  %45 = icmp ult i64 %42, %44
  br i1 %45, label %71, label %46

46:                                               ; preds = %41
  %47 = load i64, ptr @tm_preemptive_thread_2_counter, align 8, !tbaa !5
  %48 = load i64, ptr %4, align 8, !tbaa !5
  %49 = add i64 %48, 1
  %50 = icmp ugt i64 %47, %49
  br i1 %50, label %71, label %51

51:                                               ; preds = %46
  %52 = load i64, ptr @tm_preemptive_thread_3_counter, align 8, !tbaa !5
  %53 = load i64, ptr %4, align 8, !tbaa !5
  %54 = sub i64 %53, 1
  %55 = icmp ult i64 %52, %54
  br i1 %55, label %71, label %56

56:                                               ; preds = %51
  %57 = load i64, ptr @tm_preemptive_thread_3_counter, align 8, !tbaa !5
  %58 = load i64, ptr %4, align 8, !tbaa !5
  %59 = add i64 %58, 1
  %60 = icmp ugt i64 %57, %59
  br i1 %60, label %71, label %61

61:                                               ; preds = %56
  %62 = load i64, ptr @tm_preemptive_thread_4_counter, align 8, !tbaa !5
  %63 = load i64, ptr %4, align 8, !tbaa !5
  %64 = sub i64 %63, 1
  %65 = icmp ult i64 %62, %64
  br i1 %65, label %71, label %66

66:                                               ; preds = %61
  %67 = load i64, ptr @tm_preemptive_thread_4_counter, align 8, !tbaa !5
  %68 = load i64, ptr %4, align 8, !tbaa !5
  %69 = add i64 %68, 1
  %70 = icmp ugt i64 %67, %69
  br i1 %70, label %71, label %73

71:                                               ; preds = %66, %61, %56, %51, %46, %41, %36, %31, %26, %6
  %72 = call i32 (ptr, ...) @printf(ptr noundef @.str.1)
  br label %73

73:                                               ; preds = %71, %66
  %74 = load i64, ptr %1, align 8, !tbaa !5
  %75 = load i64, ptr %3, align 8, !tbaa !5
  %76 = sub i64 %74, %75
  %77 = call i32 (ptr, ...) @printf(ptr noundef @.str.2, i64 noundef %76)
  %78 = load i64, ptr %1, align 8, !tbaa !5
  store i64 %78, ptr %3, align 8, !tbaa !5
  br label %5
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare void @tm_thread_sleep(i32 noundef) #2

declare i32 @printf(ptr noundef, ...) #2

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@tm_preemptive_thread_0_counter = external dso_local local_unnamed_addr global i64, align 8
@tm_preemptive_thread_1_counter = external dso_local local_unnamed_addr global i64, align 8
@tm_preemptive_thread_2_counter = external dso_local local_unnamed_addr global i64, align 8
@tm_preemptive_thread_3_counter = external dso_local local_unnamed_addr global i64, align 8
@tm_preemptive_thread_4_counter = external dso_local local_unnamed_addr global i64, align 8
@.str = external hidden unnamed_addr constant [71 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [108 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [26 x i8], align 1

; Function Attrs: noreturn nounwind uwtable
define dso_local void @tm_preemptive_thread_report() local_unnamed_addr #0 {
  br label %1

1:                                                ; preds = %29, %0
  %.016 = phi i64 [ 0, %0 ], [ %12, %29 ]
  %.0 = phi i64 [ 0, %0 ], [ %2, %29 ]
  tail call void @tm_thread_sleep(i32 noundef 30) #3
  %2 = add i64 %.0, 30
  %3 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str, i64 noundef %2)
  %4 = load i64, ptr @tm_preemptive_thread_0_counter, align 8, !tbaa !5
  %5 = load i64, ptr @tm_preemptive_thread_1_counter, align 8, !tbaa !5
  %6 = add i64 %5, %4
  %7 = load i64, ptr @tm_preemptive_thread_2_counter, align 8, !tbaa !5
  %8 = add i64 %6, %7
  %9 = load i64, ptr @tm_preemptive_thread_3_counter, align 8, !tbaa !5
  %10 = add i64 %8, %9
  %11 = load i64, ptr @tm_preemptive_thread_4_counter, align 8, !tbaa !5
  %12 = add i64 %10, %11
  %13 = udiv i64 %12, 5
  %14 = add nsw i64 %13, -1
  %15 = icmp ult i64 %4, %14
  br i1 %15, label %27, label %16

16:                                               ; preds = %1
  %17 = add nuw nsw i64 %13, 1
  %18 = icmp ugt i64 %4, %17
  %19 = icmp ult i64 %5, %14
  %or.cond = or i1 %18, %19
  %20 = icmp ugt i64 %5, %17
  %or.cond24 = or i1 %20, %or.cond
  %21 = icmp ult i64 %7, %14
  %or.cond25 = or i1 %21, %or.cond24
  %22 = icmp ugt i64 %7, %17
  %or.cond26 = or i1 %22, %or.cond25
  %23 = icmp ult i64 %9, %14
  %or.cond27 = or i1 %23, %or.cond26
  %24 = icmp ugt i64 %9, %17
  %or.cond28 = or i1 %24, %or.cond27
  %25 = icmp ult i64 %11, %14
  %or.cond29 = or i1 %25, %or.cond28
  %26 = icmp ugt i64 %11, %17
  %or.cond30 = or i1 %26, %or.cond29
  br i1 %or.cond30, label %27, label %29

27:                                               ; preds = %16, %1
  %28 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.1)
  br label %29

29:                                               ; preds = %16, %27
  %30 = sub i64 %12, %.016
  %31 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.2, i64 noundef %30)
  br label %1
}

declare void @tm_thread_sleep(i32 noundef) local_unnamed_addr #1

; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #2

attributes #0 = { noreturn nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass