; LLVM IR from upupming/algorithm :: CCCC-GPLT/L2-011. 玩转二叉树.ll (Z4postiiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@in = external dso_local global %"class.std::vector", align 8
@pre = external dso_local global %"class.std::vector", align 8
@level = external dso_local global %"class.std::vector", align 8

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_Z4postiiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) #1 {
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  store i32 %0, ptr %5, align 4, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !5
  store i32 %2, ptr %7, align 4, !tbaa !5
  store i32 %3, ptr %8, align 4, !tbaa !5
  %10 = load i32, ptr %6, align 4, !tbaa !5
  %11 = load i32, ptr %7, align 4, !tbaa !5
  %12 = icmp sgt i32 %10, %11
  br i1 %12, label %13, label %14

13:                                               ; preds = %4
  br label %63

14:                                               ; preds = %4
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  %15 = load i32, ptr %6, align 4, !tbaa !5
  store i32 %15, ptr %9, align 4, !tbaa !5
  br label %16

16:                                               ; preds = %32, %14
  %17 = load i32, ptr %9, align 4, !tbaa !5
  %18 = load i32, ptr %7, align 4, !tbaa !5
  %19 = icmp slt i32 %17, %18
  br i1 %19, label %20, label %30

20:                                               ; preds = %16
  %21 = load i32, ptr %9, align 4, !tbaa !5
  %22 = sext i32 %21 to i64
  %23 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @in, i64 noundef %22) #3
  %24 = load i32, ptr %23, align 4, !tbaa !5
  %25 = load i32, ptr %5, align 4, !tbaa !5
  %26 = sext i32 %25 to i64
  %27 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @pre, i64 noundef %26) #3
  %28 = load i32, ptr %27, align 4, !tbaa !5
  %29 = icmp ne i32 %24, %28
  br label %30

30:                                               ; preds = %20, %16
  %31 = phi i1 [ false, %16 ], [ %29, %20 ]
  br i1 %31, label %32, label %35

32:                                               ; preds = %30
  %33 = load i32, ptr %9, align 4, !tbaa !5
  %34 = add nsw i32 %33, 1
  store i32 %34, ptr %9, align 4, !tbaa !5
  br label %16, !llvm.loop !9

35:                                               ; preds = %30
  %36 = load i32, ptr %5, align 4, !tbaa !5
  %37 = sext i32 %36 to i64
  %38 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @pre, i64 noundef %37) #3
  %39 = load i32, ptr %38, align 4, !tbaa !5
  %40 = load i32, ptr %8, align 4, !tbaa !5
  %41 = sext i32 %40 to i64
  %42 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @level, i64 noundef %41) #3
  store i32 %39, ptr %42, align 4, !tbaa !5
  %43 = load i32, ptr %5, align 4, !tbaa !5
  %44 = add nsw i32 %43, 1
  %45 = load i32, ptr %6, align 4, !tbaa !5
  %46 = load i32, ptr %9, align 4, !tbaa !5
  %47 = sub nsw i32 %46, 1
  %48 = load i32, ptr %8, align 4, !tbaa !5
  %49 = mul nsw i32 2, %48
  %50 = add nsw i32 %49, 2
  call void @_Z4postiiii(i32 noundef %44, i32 noundef %45, i32 noundef %47, i32 noundef %50)
  %51 = load i32, ptr %5, align 4, !tbaa !5
  %52 = add nsw i32 %51, 1
  %53 = load i32, ptr %9, align 4, !tbaa !5
  %54 = add nsw i32 %52, %53
  %55 = load i32, ptr %6, align 4, !tbaa !5
  %56 = sub nsw i32 %54, %55
  %57 = load i32, ptr %9, align 4, !tbaa !5
  %58 = add nsw i32 %57, 1
  %59 = load i32, ptr %7, align 4, !tbaa !5
  %60 = load i32, ptr %8, align 4, !tbaa !5
  %61 = mul nsw i32 2, %60
  %62 = add nsw i32 %61, 1
  call void @_Z4postiiii(i32 noundef %56, i32 noundef %58, i32 noundef %59, i32 noundef %62)
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  br label %63

63:                                               ; preds = %35, %13
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@in = external dso_local global %"class.std::vector", align 8
@pre = external dso_local global %"class.std::vector", align 8
@level = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z4postiiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #0 {
  %5 = icmp sgt i32 %1, %2
  br i1 %5, label %tailrecurse._crit_edge, label %.preheader.preheader

.preheader.preheader:                             ; preds = %4
  %6 = sext i32 %2 to i64
  br label %.preheader

.preheader:                                       ; preds = %.preheader.preheader, %.critedge
  %.tr2430 = phi i32 [ %28, %.critedge ], [ %3, %.preheader.preheader ]
  %.tr2229 = phi i32 [ %27, %.critedge ], [ %1, %.preheader.preheader ]
  %.tr28 = phi i32 [ %26, %.critedge ], [ %0, %.preheader.preheader ]
  %7 = icmp slt i32 %.tr2229, %2
  %8 = sext i32 %.tr28 to i64
  br i1 %7, label %.lr.ph, label %.critedge

.lr.ph:                                           ; preds = %.preheader
  %9 = sext i32 %.tr2229 to i64
  br label %10

10:                                               ; preds = %.lr.ph, %15
  %indvars.iv = phi i64 [ %9, %.lr.ph ], [ %indvars.iv.next, %15 ]
  %11 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @in, i64 noundef %indvars.iv) #1
  %12 = load i32, ptr %11, align 4, !tbaa !5
  %13 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @pre, i64 noundef %8) #1
  %14 = load i32, ptr %13, align 4, !tbaa !5
  %.not = icmp eq i32 %12, %14
  br i1 %.not, label %.critedge.loopexit.split.loop.exit33, label %15

15:                                               ; preds = %10
  %indvars.iv.next = add nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, %6
  br i1 %exitcond.not, label %.critedge, label %10, !llvm.loop !9

.critedge.loopexit.split.loop.exit33:             ; preds = %10
  %16 = trunc nsw i64 %indvars.iv to i32
  br label %.critedge

.critedge:                                        ; preds = %15, %.critedge.loopexit.split.loop.exit33, %.preheader
  %.0.lcssa = phi i32 [ %.tr2229, %.preheader ], [ %16, %.critedge.loopexit.split.loop.exit33 ], [ %2, %15 ]
  %17 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @pre, i64 noundef %8) #1
  %18 = load i32, ptr %17, align 4, !tbaa !5
  %19 = sext i32 %.tr2430 to i64
  %20 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @level, i64 noundef %19) #1
  store i32 %18, ptr %20, align 4, !tbaa !5
  %21 = add nsw i32 %.tr28, 1
  %22 = add nsw i32 %.0.lcssa, -1
  %23 = shl nsw i32 %.tr2430, 1
  %24 = add nsw i32 %23, 2
  tail call void @_Z4postiiii(i32 noundef %21, i32 noundef %.tr2229, i32 noundef %22, i32 noundef %24)
  %25 = sub i32 %21, %.tr2229
  %26 = add i32 %25, %.0.lcssa
  %27 = add nsw i32 %.0.lcssa, 1
  %28 = or disjoint i32 %23, 1
  %.not31 = icmp slt i32 %.0.lcssa, %2
  br i1 %.not31, label %.preheader, label %tailrecurse._crit_edge

tailrecurse._crit_edge:                           ; preds = %.critedge, %4
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass