; LLVM IR from upupming/algorithm :: acwing/周赛/week-4/3695. 扩充序列.ll (Z2dpxx)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local noundef i64 @_Z2dpxx(i64 noundef %0, i64 noundef %1) #0 {
  %3 = alloca i64, align 8
  %4 = alloca i64, align 8
  %5 = alloca i64, align 8
  %6 = alloca i64, align 8
  %7 = alloca i64, align 8
  %8 = alloca i32, align 4
  store i64 %0, ptr %4, align 8, !tbaa !5
  store i64 %1, ptr %5, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #2
  %9 = load i64, ptr %4, align 8, !tbaa !5
  %10 = shl i64 1, %9
  %11 = sub nsw i64 %10, 1
  store i64 %11, ptr %6, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #2
  %12 = load i64, ptr %6, align 8, !tbaa !5
  %13 = add nsw i64 %12, 1
  %14 = sdiv i64 %13, 2
  store i64 %14, ptr %7, align 8, !tbaa !5
  %15 = load i64, ptr %5, align 8, !tbaa !5
  %16 = load i64, ptr %7, align 8, !tbaa !5
  %17 = icmp eq i64 %15, %16
  br i1 %17, label %18, label %20

18:                                               ; preds = %2
  %19 = load i64, ptr %4, align 8, !tbaa !5
  store i64 %19, ptr %3, align 8
  store i32 1, ptr %8, align 4
  br label %37

20:                                               ; preds = %2
  %21 = load i64, ptr %5, align 8, !tbaa !5
  %22 = load i64, ptr %7, align 8, !tbaa !5
  %23 = icmp slt i64 %21, %22
  br i1 %23, label %24, label %29

24:                                               ; preds = %20
  %25 = load i64, ptr %4, align 8, !tbaa !5
  %26 = sub nsw i64 %25, 1
  %27 = load i64, ptr %5, align 8, !tbaa !5
  %28 = call noundef i64 @_Z2dpxx(i64 noundef %26, i64 noundef %27)
  store i64 %28, ptr %3, align 8
  store i32 1, ptr %8, align 4
  br label %37

29:                                               ; preds = %20
  br label %30

30:                                               ; preds = %29
  %31 = load i64, ptr %4, align 8, !tbaa !5
  %32 = sub nsw i64 %31, 1
  %33 = load i64, ptr %5, align 8, !tbaa !5
  %34 = load i64, ptr %7, align 8, !tbaa !5
  %35 = sub nsw i64 %33, %34
  %36 = call noundef i64 @_Z2dpxx(i64 noundef %32, i64 noundef %35)
  store i64 %36, ptr %3, align 8
  store i32 1, ptr %8, align 4
  br label %37

37:                                               ; preds = %30, %24, %18
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #2
  %38 = load i64, ptr %3, align 8
  ret i64 %38
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define dso_local noundef i64 @_Z2dpxx(i64 noundef %0, i64 noundef %1) local_unnamed_addr #0 {
  %3 = shl nuw i64 1, %0
  %4 = sdiv i64 %3, 2
  %5 = icmp eq i64 %4, %1
  br i1 %5, label %tailrecurse.outer._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %2, %tailrecurse.outer
  %6 = phi i64 [ %16, %tailrecurse.outer ], [ %4, %2 ]
  %.tr15.ph21 = phi i64 [ %14, %tailrecurse.outer ], [ %1, %2 ]
  %.tr.ph20 = phi i64 [ %10, %tailrecurse.outer ], [ %0, %2 ]
  br label %7

7:                                                ; preds = %.lr.ph, %tailrecurse
  %8 = phi i64 [ %6, %.lr.ph ], [ %12, %tailrecurse ]
  %.tr18 = phi i64 [ %.tr.ph20, %.lr.ph ], [ %10, %tailrecurse ]
  %9 = icmp sgt i64 %8, %.tr15.ph21
  %10 = add nsw i64 %.tr18, -1
  br i1 %9, label %tailrecurse, label %tailrecurse.outer

tailrecurse:                                      ; preds = %7
  %11 = shl nuw i64 1, %10
  %12 = sdiv i64 %11, 2
  %13 = icmp eq i64 %12, %.tr15.ph21
  br i1 %13, label %tailrecurse.outer._crit_edge, label %7

tailrecurse.outer:                                ; preds = %7
  %14 = sub nsw i64 %.tr15.ph21, %8
  %15 = shl nuw i64 1, %10
  %16 = sdiv i64 %15, 2
  %17 = icmp eq i64 %16, %14
  br i1 %17, label %tailrecurse.outer._crit_edge, label %.lr.ph

tailrecurse.outer._crit_edge:                     ; preds = %tailrecurse.outer, %tailrecurse, %2
  %.tr.lcssa = phi i64 [ %0, %2 ], [ %10, %tailrecurse ], [ %10, %tailrecurse.outer ]
  ret i64 %.tr.lcssa
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass