; LLVM IR from huawei-noah/bolt :: compute/tensor/src/cpu/arm (depthwise_convolution)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.TensorDesc = type { i32, i32, i32, [20 x i32] }

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z42depthwise_convolution_transform_filter_arm10TensorDescPKv36DepthwiseConvolutionForwardAlgorithmPS_Pv(ptr noundef byval(%struct.TensorDesc) align 8 %0, ptr noundef %1, i32 noundef %2, ptr noundef %3, ptr noundef %4) #0 {
  %6 = alloca i32, align 4
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  %9 = alloca ptr, align 8
  %10 = alloca ptr, align 8
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca %struct.TensorDesc, align 8
  %15 = alloca %struct.TensorDesc, align 8
  %16 = alloca %struct.TensorDesc, align 8
  store ptr %1, ptr %7, align 8, !tbaa !5
  store i32 %2, ptr %8, align 4, !tbaa !9
  store ptr %3, ptr %9, align 8, !tbaa !5
  store ptr %4, ptr %10, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #5
  %17 = load i32, ptr %8, align 4, !tbaa !9
  switch i32 %17, label %19 [
    i32 0, label %18
  ]

18:                                               ; preds = %5
  store i32 2, ptr %11, align 4, !tbaa !11
  br label %20

19:                                               ; preds = %5
  store i32 2, ptr %6, align 4
  store i32 1, ptr %12, align 4
  br label %50

20:                                               ; preds = %18
  %21 = load ptr, ptr %9, align 8, !tbaa !5
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %21, ptr align 8 %0, i64 92, i1 false), !tbaa.struct !13
  %22 = load i32, ptr %11, align 4, !tbaa !11
  %23 = load ptr, ptr %9, align 8, !tbaa !5
  %24 = getelementptr inbounds %struct.TensorDesc, ptr %23, i32 0, i32 1
  store i32 %22, ptr %24, align 4, !tbaa !19
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #5
  store i32 51, ptr %13, align 4, !tbaa !21
  %25 = getelementptr inbounds %struct.TensorDesc, ptr %0, i32 0, i32 1
  %26 = load i32, ptr %25, align 4, !tbaa !19
  %27 = load i32, ptr %11, align 4, !tbaa !11
  %28 = icmp eq i32 %26, %27
  br i1 %28, label %29, label %34

29:                                               ; preds = %20
  %30 = load ptr, ptr %10, align 8, !tbaa !5
  %31 = load ptr, ptr %7, align 8, !tbaa !5
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %14, ptr align 8 %0, i64 92, i1 false), !tbaa.struct !13
  %32 = call noundef i32 @_Z14tensorNumBytes10TensorDesc(ptr noundef byval(%struct.TensorDesc) align 8 %14)
  %33 = zext i32 %32 to i64
  call void @_Z10UNI_MEMCPYPvPKvm(ptr noundef %30, ptr noundef %31, i64 noundef %33)
  store i32 0, ptr %13, align 4, !tbaa !21
  br label %48

34:                                               ; preds = %20
  %35 = getelementptr inbounds %struct.TensorDesc, ptr %0, i32 0, i32 1
  %36 = load i32, ptr %35, align 4, !tbaa !19
  %37 = icmp eq i32 %36, 0
  br i1 %37, label %38, label %47

38:                                               ; preds = %34
  %39 = load i32, ptr %11, align 4, !tbaa !11
  %40 = icmp eq i32 %39, 2
  br i1 %40, label %41, label %46

41:                                               ; preds = %38
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %15, ptr align 8 %0, i64 92, i1 false), !tbaa.struct !13
  %42 = load ptr, ptr %7, align 8, !tbaa !5
  %43 = load ptr, ptr %9, align 8, !tbaa !5
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %16, ptr align 4 %43, i64 92, i1 false), !tbaa.struct !13
  %44 = load ptr, ptr %10, align 8, !tbaa !5
  %45 = call noundef i32 @_Z21transformNCHWToNCHWC810TensorDescPKvS_Pv(ptr noundef byval(%struct.TensorDesc) align 8 %15, ptr noundef %42, ptr noundef byval(%struct.TensorDesc) align 8 %16, ptr noundef %44)
  store i32 %45, ptr %13, align 4, !tbaa !21
  br label %46

46:                                               ; preds = %41, %38
  br label %47

47:                                               ; preds = %46, %34
  br label %48

48:                                               ; preds = %47, %29
  %49 = load i32, ptr %13, align 4, !tbaa !21
  store i32 %49, ptr %6, align 4
  store i32 1, ptr %12, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #5
  br label %50

50:                                               ; preds = %48, %19
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #5
  %51 = load i32, ptr %6, align 4
  ret i32 %51
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_Z10UNI_MEMCPYPvPKvm(ptr noundef, ptr noundef, i64 noundef) #3

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef i32 @_Z14tensorNumBytes10TensorDesc(ptr noundef byval(%struct.TensorDesc) align 8) #3

declare noundef i32 @_Z21transformNCHWToNCHWC810TensorDescPKvS_Pv(ptr noundef byval(%struct.TensorDesc) align 8, ptr noundef, ptr noundef byval(%struct.TensorDesc) align 8, ptr noundef) #4

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"_ZTS36DepthwiseConvolutionForwardAlgorithm", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"_ZTS10DataFormat", !7, i64 0}
!13 = !{i64 0, i64 4, !14, i64 4, i64 4, !11, i64 8, i64 4, !16, i64 12, i64 80, !18}
!14 = !{!15, !15, i64 0}
!15 = !{!"_ZTS8DataType", !7, i64 0}
!16 = !{!17, !17, i64 0}
!17 = !{!"int", !7, i64 0}
!18 = !{!7, !7, i64 0}
!19 = !{!20, !12, i64 4}
!20 = !{!"_ZTS10TensorDesc", !15, i64 0, !12, i64 4, !17, i64 8, !7, i64 12}
!21 = !{!22, !22, i64 0}
!22 = !{!"_ZTS2EE", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.TensorDesc = type { i32, i32, i32, [20 x i32] }

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z42depthwise_convolution_transform_filter_arm10TensorDescPKv36DepthwiseConvolutionForwardAlgorithmPS_Pv(ptr nocapture noundef readonly byval(%struct.TensorDesc) align 8 %0, ptr noundef %1, i32 noundef %2, ptr nocapture noundef %3, ptr noundef %4) local_unnamed_addr #0 {
  %6 = alloca %struct.TensorDesc, align 8
  %cond = icmp eq i32 %2, 0
  br i1 %cond, label %7, label %16

7:                                                ; preds = %5
  call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 4 dereferenceable(92) %3, ptr noundef nonnull align 8 dereferenceable(92) %0, i64 92, i1 false), !tbaa.struct !5
  %8 = getelementptr inbounds i8, ptr %3, i64 4
  store i32 2, ptr %8, align 4, !tbaa !15
  %9 = getelementptr inbounds i8, ptr %0, i64 4
  %10 = load i32, ptr %9, align 4, !tbaa !15
  switch i32 %10, label %16 [
    i32 2, label %11
    i32 0, label %14
  ]

11:                                               ; preds = %7
  %12 = tail call noundef i32 @_Z14tensorNumBytes10TensorDesc(ptr noundef nonnull byval(%struct.TensorDesc) align 8 %0)
  %13 = zext i32 %12 to i64
  tail call void @_Z10UNI_MEMCPYPvPKvm(ptr noundef %4, ptr noundef %1, i64 noundef %13)
  br label %16

14:                                               ; preds = %7
  call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 8 dereferenceable(92) %6, ptr noundef nonnull align 4 dereferenceable(92) %3, i64 92, i1 false), !tbaa.struct !5
  %15 = tail call noundef i32 @_Z21transformNCHWToNCHWC810TensorDescPKvS_Pv(ptr noundef nonnull byval(%struct.TensorDesc) align 8 %0, ptr noundef %1, ptr noundef nonnull byval(%struct.TensorDesc) align 8 %6, ptr noundef %4)
  br label %16

16:                                               ; preds = %11, %14, %7, %5
  %.013 = phi i32 [ 2, %5 ], [ 0, %11 ], [ %15, %14 ], [ 51, %7 ]
  ret i32 %.013
}

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #1

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_Z10UNI_MEMCPYPvPKvm(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef i32 @_Z14tensorNumBytes10TensorDesc(ptr noundef byval(%struct.TensorDesc) align 8) local_unnamed_addr #2

declare noundef i32 @_Z21transformNCHWToNCHWC810TensorDescPKvS_Pv(ptr noundef byval(%struct.TensorDesc) align 8, ptr noundef, ptr noundef byval(%struct.TensorDesc) align 8, ptr noundef) local_unnamed_addr #3

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{i64 0, i64 4, !6, i64 4, i64 4, !10, i64 8, i64 4, !12, i64 12, i64 80, !14}
!6 = !{!7, !7, i64 0}
!7 = !{!"_ZTS8DataType", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"_ZTS10DataFormat", !8, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"int", !8, i64 0}
!14 = !{!8, !8, i64 0}
!15 = !{!16, !11, i64 4}
!16 = !{!"_ZTS10TensorDesc", !7, i64 0, !11, i64 4, !13, i64 8, !8, i64 12}


; Effective O3 passes: DSEPass,EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,MemCpyOptPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass