; LLVM IR from huawei-noah/bolt :: compute/tensor/src (concat)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.ConcatParamSpec = type { i32, i32 }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<TensorDesc, std::allocator<TensorDesc>>::_Vector_impl" }
%"struct.std::_Vector_base<TensorDesc, std::allocator<TensorDesc>>::_Vector_impl" = type { %"struct.std::_Vector_base<TensorDesc, std::allocator<TensorDesc>>::_Vector_impl_data" }
%"struct.std::_Vector_base<TensorDesc, std::allocator<TensorDesc>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<Tensor *, std::allocator<Tensor *>>::_Vector_impl" }
%"struct.std::_Vector_base<Tensor *, std::allocator<Tensor *>>::_Vector_impl" = type { %"struct.std::_Vector_base<Tensor *, std::allocator<Tensor *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Tensor *, std::allocator<Tensor *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%struct.TensorDesc = type { i32, i32, i32, [20 x i32] }
%struct.ArchInfo = type { i32, ptr }

@.str = external hidden unnamed_addr constant [20 x i8], align 1
@stdout = external global ptr, align 8
@.str.1 = external hidden unnamed_addr constant [18 x i8], align 1

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z24concat_infer_output_sizeSt6vectorIP6TensorSaIS1_EE15ConcatParamSpecS1_P8ArchInfo(ptr noundef %0, i64 %1, ptr noundef %2, ptr noundef %3) #0 personality ptr @__gxx_personality_v0 {
  %5 = alloca %struct.ConcatParamSpec, align 4
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca %"class.std::vector.0", align 8
  %12 = alloca %"class.std::vector", align 8
  %13 = alloca ptr, align 8
  %14 = alloca i32, align 4
  %15 = alloca %struct.TensorDesc, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca %"class.std::vector.0", align 8
  %19 = alloca %struct.ConcatParamSpec, align 4
  %20 = alloca %struct.TensorDesc, align 8
  store i64 %1, ptr %5, align 4
  store ptr %0, ptr %6, align 8, !tbaa !5
  store ptr %2, ptr %7, align 8, !tbaa !5
  store ptr %3, ptr %8, align 8, !tbaa !5
  %21 = load ptr, ptr %7, align 8, !tbaa !5
  %22 = icmp eq ptr %21, null
  br i1 %22, label %23, label %39

23:                                               ; preds = %4
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #9
  store i32 1, ptr %9, align 4, !tbaa !9
  %24 = load i32, ptr %9, align 4, !tbaa !9
  %25 = icmp ne i32 %24, 0
  br i1 %25, label %26, label %38

26:                                               ; preds = %23
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #9
  %27 = call i64 (i64, ...) @syscall(i64 noundef 186) #9
  %28 = trunc i64 %27 to i32
  store i32 %28, ptr %10, align 4, !tbaa !11
  %29 = load i32, ptr %10, align 4, !tbaa !11
  %30 = call i32 (ptr, ...) @printf(ptr noundef @.str, i32 noundef %29)
  %31 = load ptr, ptr @stdout, align 8, !tbaa !5
  %32 = call i32 @fflush(ptr noundef %31)
  %33 = load i32, ptr %9, align 4, !tbaa !9
  %34 = call ptr @ee2str(i32 noundef %33)
  %35 = call i32 (ptr, ...) @printf(ptr noundef @.str.1, ptr noundef %34)
  %36 = load ptr, ptr @stdout, align 8, !tbaa !5
  %37 = call i32 @fflush(ptr noundef %36)
  call void @exit(i32 noundef 1) #10
  unreachable

38:                                               ; preds = %23
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #9
  br label %39

39:                                               ; preds = %38, %4
  call void @llvm.lifetime.start.p0(i64 24, ptr %11) #9
  call void @_ZNSt6vectorIP6TensorSaIS1_EEC2ERKS3_(ptr noundef nonnull align 8 dereferenceable(24) %12, ptr noundef nonnull align 8 dereferenceable(24) %0)
  invoke void @_Z25get_desc_from_tensor_ptrsSt6vectorIP6TensorSaIS1_EE(ptr dead_on_unwind writable sret(%"class.std::vector.0") align 8 %11, ptr noundef %12)
          to label %40 unwind label %52

40:                                               ; preds = %39
  call void @_ZNSt6vectorIP6TensorSaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %12) #9
  call void @llvm.lifetime.start.p0(i64 92, ptr %15) #9
  %41 = load ptr, ptr %7, align 8, !tbaa !5
  invoke void @_ZN6Tensor8get_descEv(ptr dead_on_unwind writable sret(%struct.TensorDesc) align 4 %15, ptr noundef nonnull align 8 dereferenceable(32) %41)
          to label %42 unwind label %56

42:                                               ; preds = %40
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #9
  store i32 51, ptr %16, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #9
  %43 = load ptr, ptr %8, align 8, !tbaa !5
  %44 = getelementptr inbounds %struct.ArchInfo, ptr %43, i32 0, i32 0
  %45 = load i32, ptr %44, align 8, !tbaa !13
  store i32 %45, ptr %17, align 4, !tbaa !16
  %46 = load i32, ptr %17, align 4, !tbaa !16
  %47 = icmp eq i32 %46, 2
  br i1 %47, label %51, label %48

48:                                               ; preds = %42
  %49 = load i32, ptr %17, align 4, !tbaa !16
  %50 = icmp eq i32 %49, 7
  br i1 %50, label %51, label %60

51:                                               ; preds = %48, %42
  br label %77

52:                                               ; preds = %39
  %53 = landingpad { ptr, i32 }
          cleanup
  %54 = extractvalue { ptr, i32 } %53, 0
  store ptr %54, ptr %13, align 8
  %55 = extractvalue { ptr, i32 } %53, 1
  store i32 %55, ptr %14, align 4
  call void @_ZNSt6vectorIP6TensorSaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %12) #9
  br label %83

56:                                               ; preds = %40
  %57 = landingpad { ptr, i32 }
          cleanup
  %58 = extractvalue { ptr, i32 } %57, 0
  store ptr %58, ptr %13, align 8
  %59 = extractvalue { ptr, i32 } %57, 1
  store i32 %59, ptr %14, align 4
  br label %82

60:                                               ; preds = %48
  %61 = getelementptr inbounds %struct.ConcatParamSpec, ptr %5, i32 0, i32 0
  %62 = load i32, ptr %61, align 4, !tbaa !17
  invoke void @_Z17processInputDescsPSt6vectorI10TensorDescSaIS0_EEi(ptr noundef %11, i32 noundef %62)
          to label %63 unwind label %69

63:                                               ; preds = %60
  invoke void @_ZNSt6vectorI10TensorDescSaIS0_EEC2ERKS2_(ptr noundef nonnull align 8 dereferenceable(24) %18, ptr noundef nonnull align 8 dereferenceable(24) %11)
          to label %64 unwind label %69

64:                                               ; preds = %63
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %19, ptr align 4 %5, i64 8, i1 false), !tbaa.struct !19
  %65 = load i32, ptr %17, align 4, !tbaa !16
  %66 = load i64, ptr %19, align 4
  %67 = invoke noundef i32 @_Z28concat_infer_output_size_cpuSt6vectorI10TensorDescSaIS0_EE15ConcatParamSpecPS0_4Arch(ptr noundef %18, i64 %66, ptr noundef %15, i32 noundef %65)
          to label %68 unwind label %73

68:                                               ; preds = %64
  store i32 %67, ptr %16, align 4, !tbaa !9
  call void @_ZNSt6vectorI10TensorDescSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %18) #9
  br label %77

69:                                               ; preds = %77, %63, %60
  %70 = landingpad { ptr, i32 }
          cleanup
  %71 = extractvalue { ptr, i32 } %70, 0
  store ptr %71, ptr %13, align 8
  %72 = extractvalue { ptr, i32 } %70, 1
  store i32 %72, ptr %14, align 4
  br label %81

73:                                               ; preds = %64
  %74 = landingpad { ptr, i32 }
          cleanup
  %75 = extractvalue { ptr, i32 } %74, 0
  store ptr %75, ptr %13, align 8
  %76 = extractvalue { ptr, i32 } %74, 1
  store i32 %76, ptr %14, align 4
  call void @_ZNSt6vectorI10TensorDescSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %18) #9
  br label %81

77:                                               ; preds = %68, %51
  %78 = load ptr, ptr %7, align 8, !tbaa !5
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %20, ptr align 4 %15, i64 92, i1 false), !tbaa.struct !20
  invoke void @_ZN6Tensor6resizeE10TensorDesc(ptr noundef nonnull align 8 dereferenceable(32) %78, ptr noundef byval(%struct.TensorDesc) align 8 %20)
          to label %79 unwind label %69

79:                                               ; preds = %77
  %80 = load i32, ptr %16, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #9
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #9
  call void @llvm.lifetime.end.p0(i64 92, ptr %15) #9
  call void @_ZNSt6vectorI10TensorDescSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %11) #9
  call void @llvm.lifetime.end.p0(i64 24, ptr %11) #9
  ret i32 %80

81:                                               ; preds = %73, %69
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #9
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #9
  br label %82

82:                                               ; preds = %81, %56
  call void @llvm.lifetime.end.p0(i64 92, ptr %15) #9
  call void @_ZNSt6vectorI10TensorDescSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %11) #9
  br label %83

83:                                               ; preds = %82, %52
  call void @llvm.lifetime.end.p0(i64 24, ptr %11) #9
  br label %84

84:                                               ; preds = %83
  %85 = load ptr, ptr %13, align 8
  %86 = load i32, ptr %14, align 4
  %87 = insertvalue { ptr, i32 } poison, ptr %85, 0
  %88 = insertvalue { ptr, i32 } %87, i32 %86, 1
  resume { ptr, i32 } %88
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind
declare i64 @syscall(i64 noundef, ...) #2

declare i32 @printf(ptr noundef, ...) #3

declare i32 @fflush(ptr noundef) #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local ptr @ee2str(i32 noundef) #4

; Function Attrs: noreturn nounwind
declare void @exit(i32 noundef) #5

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_Z25get_desc_from_tensor_ptrsSt6vectorIP6TensorSaIS1_EE(ptr dead_on_unwind noalias writable sret(%"class.std::vector.0") align 8, ptr noundef) #6

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIP6TensorSaIS1_EEC2ERKS3_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #0 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIP6TensorSaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #7 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN6Tensor8get_descEv(ptr dead_on_unwind noalias writable sret(%struct.TensorDesc) align 4, ptr noundef nonnull align 8 dereferenceable(32)) #0 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_Z17processInputDescsPSt6vectorI10TensorDescSaIS0_EEi(ptr noundef, i32 noundef) #4

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef i32 @_Z28concat_infer_output_size_cpuSt6vectorI10TensorDescSaIS0_EE15ConcatParamSpecPS0_4Arch(ptr noundef, i64, ptr noundef, i32 noundef) #6

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorI10TensorDescSaIS0_EEC2ERKS2_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #0 align 2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #8

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorI10TensorDescSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #7 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN6Tensor6resizeE10TensorDesc(ptr noundef nonnull align 8 dereferenceable(32), ptr noundef byval(%struct.TensorDesc) align 8) #0 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #8 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #9 = { nounwind }
attributes #10 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"_ZTS2EE", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!14, !15, i64 0}
!14 = !{!"_ZTS8ArchInfo", !15, i64 0, !6, i64 8}
!15 = !{!"_ZTS4Arch", !7, i64 0}
!16 = !{!15, !15, i64 0}
!17 = !{!18, !12, i64 0}
!18 = !{!"_ZTS15ConcatParamSpec", !12, i64 0, !12, i64 4}
!19 = !{i64 0, i64 4, !11, i64 4, i64 4, !11}
!20 = !{i64 0, i64 4, !21, i64 4, i64 4, !23, i64 8, i64 4, !11, i64 12, i64 80, !25}
!21 = !{!22, !22, i64 0}
!22 = !{!"_ZTS8DataType", !7, i64 0}
!23 = !{!24, !24, i64 0}
!24 = !{!"_ZTS10DataFormat", !7, i64 0}
!25 = !{!7, !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<TensorDesc, std::allocator<TensorDesc>>::_Vector_impl" }
%"struct.std::_Vector_base<TensorDesc, std::allocator<TensorDesc>>::_Vector_impl" = type { %"struct.std::_Vector_base<TensorDesc, std::allocator<TensorDesc>>::_Vector_impl_data" }
%"struct.std::_Vector_base<TensorDesc, std::allocator<TensorDesc>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<Tensor *, std::allocator<Tensor *>>::_Vector_impl" }
%"struct.std::_Vector_base<Tensor *, std::allocator<Tensor *>>::_Vector_impl" = type { %"struct.std::_Vector_base<Tensor *, std::allocator<Tensor *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Tensor *, std::allocator<Tensor *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%struct.TensorDesc = type { i32, i32, i32, [20 x i32] }

@.str = external hidden unnamed_addr constant [20 x i8], align 1
@stdout = external local_unnamed_addr global ptr, align 8
@.str.1 = external hidden unnamed_addr constant [18 x i8], align 1

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z24concat_infer_output_sizeSt6vectorIP6TensorSaIS1_EE15ConcatParamSpecS1_P8ArchInfo(ptr noundef %0, i64 %1, ptr noundef %2, ptr nocapture noundef readonly %3) local_unnamed_addr #0 personality ptr @__gxx_personality_v0 {
  %5 = alloca %"class.std::vector.0", align 8
  %6 = alloca %"class.std::vector", align 8
  %7 = alloca %struct.TensorDesc, align 8
  %8 = alloca %"class.std::vector.0", align 8
  %.sroa.013.0.extract.trunc = trunc i64 %1 to i32
  %9 = icmp eq ptr %2, null
  br i1 %9, label %10, label %20

10:                                               ; preds = %4
  %11 = tail call i64 (i64, ...) @syscall(i64 noundef 186) #8
  %12 = trunc i64 %11 to i32
  %13 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str, i32 noundef %12)
  %14 = load ptr, ptr @stdout, align 8, !tbaa !5
  %15 = tail call i32 @fflush(ptr noundef %14)
  %16 = tail call ptr @ee2str(i32 noundef 1)
  %17 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.1, ptr noundef %16)
  %18 = load ptr, ptr @stdout, align 8, !tbaa !5
  %19 = tail call i32 @fflush(ptr noundef %18)
  tail call void @exit(i32 noundef 1) #9
  unreachable

20:                                               ; preds = %4
  call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %5) #8
  call void @_ZNSt6vectorIP6TensorSaIS1_EEC2ERKS3_(ptr noundef nonnull align 8 dereferenceable(24) %6, ptr noundef nonnull align 8 dereferenceable(24) %0)
  invoke void @_Z25get_desc_from_tensor_ptrsSt6vectorIP6TensorSaIS1_EE(ptr dead_on_unwind nonnull writable sret(%"class.std::vector.0") align 8 %5, ptr noundef nonnull %6)
          to label %21 unwind label %24

21:                                               ; preds = %20
  call void @_ZNSt6vectorIP6TensorSaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %6) #8
  call void @llvm.lifetime.start.p0(i64 92, ptr nonnull %7) #8
  invoke void @_ZN6Tensor8get_descEv(ptr dead_on_unwind nonnull writable sret(%struct.TensorDesc) align 4 %7, ptr noundef nonnull align 8 dereferenceable(32) %2)
          to label %22 unwind label %26

22:                                               ; preds = %21
  %23 = load i32, ptr %3, align 8, !tbaa !9
  switch i32 %23, label %28 [
    i32 7, label %36
    i32 2, label %36
  ]

24:                                               ; preds = %20
  %25 = landingpad { ptr, i32 }
          cleanup
  call void @_ZNSt6vectorIP6TensorSaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %6) #8
  br label %39

26:                                               ; preds = %21
  %27 = landingpad { ptr, i32 }
          cleanup
  br label %38

28:                                               ; preds = %22
  call void @_Z17processInputDescsPSt6vectorI10TensorDescSaIS0_EEi(ptr noundef nonnull %5, i32 noundef %.sroa.013.0.extract.trunc)
  invoke void @_ZNSt6vectorI10TensorDescSaIS0_EEC2ERKS2_(ptr noundef nonnull align 8 dereferenceable(24) %8, ptr noundef nonnull align 8 dereferenceable(24) %5)
          to label %29 unwind label %32

29:                                               ; preds = %28
  %30 = invoke noundef i32 @_Z28concat_infer_output_size_cpuSt6vectorI10TensorDescSaIS0_EE15ConcatParamSpecPS0_4Arch(ptr noundef nonnull %8, i64 %1, ptr noundef nonnull %7, i32 noundef %23)
          to label %31 unwind label %34

31:                                               ; preds = %29
  call void @_ZNSt6vectorI10TensorDescSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %8) #8
  br label %36

32:                                               ; preds = %36, %28
  %33 = landingpad { ptr, i32 }
          cleanup
  br label %38

34:                                               ; preds = %29
  %35 = landingpad { ptr, i32 }
          cleanup
  call void @_ZNSt6vectorI10TensorDescSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %8) #8
  br label %38

36:                                               ; preds = %22, %22, %31
  %.017 = phi i32 [ 51, %22 ], [ %30, %31 ], [ 51, %22 ]
  invoke void @_ZN6Tensor6resizeE10TensorDesc(ptr noundef nonnull align 8 dereferenceable(32) %2, ptr noundef nonnull byval(%struct.TensorDesc) align 8 %7)
          to label %37 unwind label %32

37:                                               ; preds = %36
  call void @llvm.lifetime.end.p0(i64 92, ptr nonnull %7) #8
  call void @_ZNSt6vectorI10TensorDescSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %5) #8
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %5) #8
  ret i32 %.017

38:                                               ; preds = %32, %34, %26
  %.pn.pn = phi { ptr, i32 } [ %27, %26 ], [ %33, %32 ], [ %35, %34 ]
  call void @llvm.lifetime.end.p0(i64 92, ptr nonnull %7) #8
  call void @_ZNSt6vectorI10TensorDescSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %5) #8
  br label %39

39:                                               ; preds = %38, %24
  %.pn.pn.pn = phi { ptr, i32 } [ %.pn.pn, %38 ], [ %25, %24 ]
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %5) #8
  resume { ptr, i32 } %.pn.pn.pn
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind
declare i64 @syscall(i64 noundef, ...) local_unnamed_addr #2

; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #3

; Function Attrs: nofree nounwind
declare noundef i32 @fflush(ptr nocapture noundef) local_unnamed_addr #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local ptr @ee2str(i32 noundef) local_unnamed_addr #4

; Function Attrs: noreturn nounwind
declare void @exit(i32 noundef) local_unnamed_addr #5

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_Z25get_desc_from_tensor_ptrsSt6vectorIP6TensorSaIS1_EE(ptr dead_on_unwind noalias writable sret(%"class.std::vector.0") align 8, ptr noundef) local_unnamed_addr #6

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIP6TensorSaIS1_EEC2ERKS3_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #0 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIP6TensorSaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #7 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN6Tensor8get_descEv(ptr dead_on_unwind noalias writable sret(%struct.TensorDesc) align 4, ptr noundef nonnull align 8 dereferenceable(32)) local_unnamed_addr #0 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_Z17processInputDescsPSt6vectorI10TensorDescSaIS0_EEi(ptr noundef, i32 noundef) local_unnamed_addr #4

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef i32 @_Z28concat_infer_output_size_cpuSt6vectorI10TensorDescSaIS0_EE15ConcatParamSpecPS0_4Arch(ptr noundef, i64, ptr noundef, i32 noundef) local_unnamed_addr #6

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorI10TensorDescSaIS0_EEC2ERKS2_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorI10TensorDescSaIS0_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #7 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN6Tensor6resizeE10TensorDesc(ptr noundef nonnull align 8 dereferenceable(32), ptr noundef byval(%struct.TensorDesc) align 8) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #8 = { nounwind }
attributes #9 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"_ZTS8ArchInfo", !11, i64 0, !6, i64 8}
!11 = !{!"_ZTS4Arch", !7, i64 0}


; Effective O3 passes: DSEPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,MemCpyOptPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass