; LLVM IR from AF-GRILL/DISPluginForUnreal :: Source/ThirdParty/include/dis6 (ActionRequestReliablePdu)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.DIS::ActionRequestReliablePdu" = type { %"class.DIS::SimulationManagementWithReliabilityFamilyPdu", i8, i16, i8, i32, i32, i32, i32, %"class.std::vector", %"class.std::vector.0" }
%"class.DIS::SimulationManagementWithReliabilityFamilyPdu" = type { %"class.DIS::Pdu.base", [4 x i8], %"class.DIS::EntityID", %"class.DIS::EntityID" }
%"class.DIS::Pdu.base" = type <{ ptr, i8, i8, i8, i8, i32, i16, i16 }>
%"class.DIS::EntityID" = type <{ ptr, i16, i16, i16, [2 x i8] }>
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<DIS::FixedDatum, std::allocator<DIS::FixedDatum>>::_Vector_impl" }
%"struct.std::_Vector_base<DIS::FixedDatum, std::allocator<DIS::FixedDatum>>::_Vector_impl" = type { %"struct.std::_Vector_base<DIS::FixedDatum, std::allocator<DIS::FixedDatum>>::_Vector_impl_data" }
%"struct.std::_Vector_base<DIS::FixedDatum, std::allocator<DIS::FixedDatum>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<DIS::VariableDatum, std::allocator<DIS::VariableDatum>>::_Vector_impl" }
%"struct.std::_Vector_base<DIS::VariableDatum, std::allocator<DIS::VariableDatum>>::_Vector_impl" = type { %"struct.std::_Vector_base<DIS::VariableDatum, std::allocator<DIS::VariableDatum>>::_Vector_impl_data" }
%"struct.std::_Vector_base<DIS::VariableDatum, std::allocator<DIS::VariableDatum>>::_Vector_impl_data" = type { ptr, ptr, ptr }

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIN3DIS10FixedDatumESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIN3DIS13VariableDatumESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(16) ptr @_ZNKSt6vectorIN3DIS10FixedDatumESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(44) ptr @_ZNKSt6vectorIN3DIS13VariableDatumESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZNK3DIS24ActionRequestReliablePdueqERKS0_(ptr noundef nonnull align 8 dereferenceable(128) %0, ptr noundef nonnull align 8 dereferenceable(128) %1) #2 align 2 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca i8, align 1
  %6 = alloca i64, align 8
  %7 = alloca i64, align 8
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  %8 = load ptr, ptr %3, align 8
  call void @llvm.lifetime.start.p0(i64 1, ptr %5) #4
  store i8 1, ptr %5, align 1, !tbaa !9
  %9 = load ptr, ptr %4, align 8, !tbaa !5
  %10 = call noundef zeroext i1 @_ZNK3DIS44SimulationManagementWithReliabilityFamilyPdueqERKS0_(ptr noundef nonnull align 8 dereferenceable(56) %8, ptr noundef nonnull align 8 dereferenceable(56) %9)
  %11 = zext i1 %10 to i8
  store i8 %11, ptr %5, align 1, !tbaa !9
  %12 = getelementptr inbounds %"class.DIS::ActionRequestReliablePdu", ptr %8, i32 0, i32 1
  %13 = load i8, ptr %12, align 8, !tbaa !11
  %14 = zext i8 %13 to i32
  %15 = load ptr, ptr %4, align 8, !tbaa !5
  %16 = getelementptr inbounds %"class.DIS::ActionRequestReliablePdu", ptr %15, i32 0, i32 1
  %17 = load i8, ptr %16, align 8, !tbaa !11
  %18 = zext i8 %17 to i32
  %19 = icmp eq i32 %14, %18
  br i1 %19, label %21, label %20

20:                                               ; preds = %2
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %21

21:                                               ; preds = %20, %2
  %22 = getelementptr inbounds %"class.DIS::ActionRequestReliablePdu", ptr %8, i32 0, i32 2
  %23 = load i16, ptr %22, align 2, !tbaa !26
  %24 = zext i16 %23 to i32
  %25 = load ptr, ptr %4, align 8, !tbaa !5
  %26 = getelementptr inbounds %"class.DIS::ActionRequestReliablePdu", ptr %25, i32 0, i32 2
  %27 = load i16, ptr %26, align 2, !tbaa !26
  %28 = zext i16 %27 to i32
  %29 = icmp eq i32 %24, %28
  br i1 %29, label %31, label %30

30:                                               ; preds = %21
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %31

31:                                               ; preds = %30, %21
  %32 = getelementptr inbounds %"class.DIS::ActionRequestReliablePdu", ptr %8, i32 0, i32 3
  %33 = load i8, ptr %32, align 4, !tbaa !27
  %34 = zext i8 %33 to i32
  %35 = load ptr, ptr %4, align 8, !tbaa !5
  %36 = getelementptr inbounds %"class.DIS::ActionRequestReliablePdu", ptr %35, i32 0, i32 3
  %37 = load i8, ptr %36, align 4, !tbaa !27
  %38 = zext i8 %37 to i32
  %39 = icmp eq i32 %34, %38
  br i1 %39, label %41, label %40

40:                                               ; preds = %31
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %41

41:                                               ; preds = %40, %31
  %42 = getelementptr inbounds %"class.DIS::ActionRequestReliablePdu", ptr %8, i32 0, i32 4
  %43 = load i32, ptr %42, align 8, !tbaa !28
  %44 = load ptr, ptr %4, align 8, !tbaa !5
  %45 = getelementptr inbounds %"class.DIS::ActionRequestReliablePdu", ptr %44, i32 0, i32 4
  %46 = load i32, ptr %45, align 8, !tbaa !28
  %47 = icmp eq i32 %43, %46
  br i1 %47, label %49, label %48

48:                                               ; preds = %41
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %49

49:                                               ; preds = %48, %41
  %50 = getelementptr inbounds %"class.DIS::ActionRequestReliablePdu", ptr %8, i32 0, i32 5
  %51 = load i32, ptr %50, align 4, !tbaa !29
  %52 = load ptr, ptr %4, align 8, !tbaa !5
  %53 = getelementptr inbounds %"class.DIS::ActionRequestReliablePdu", ptr %52, i32 0, i32 5
  %54 = load i32, ptr %53, align 4, !tbaa !29
  %55 = icmp eq i32 %51, %54
  br i1 %55, label %57, label %56

56:                                               ; preds = %49
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %57

57:                                               ; preds = %56, %49
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #4
  store i64 0, ptr %6, align 8, !tbaa !30
  br label %58

58:                                               ; preds = %75, %57
  %59 = load i64, ptr %6, align 8, !tbaa !30
  %60 = getelementptr inbounds %"class.DIS::ActionRequestReliablePdu", ptr %8, i32 0, i32 8
  %61 = call noundef i64 @_ZNKSt6vectorIN3DIS10FixedDatumESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %60) #4
  %62 = icmp ult i64 %59, %61
  br i1 %62, label %64, label %63

63:                                               ; preds = %58
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #4
  br label %78

64:                                               ; preds = %58
  %65 = getelementptr inbounds %"class.DIS::ActionRequestReliablePdu", ptr %8, i32 0, i32 8
  %66 = load i64, ptr %6, align 8, !tbaa !30
  %67 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNKSt6vectorIN3DIS10FixedDatumESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %65, i64 noundef %66) #4
  %68 = load ptr, ptr %4, align 8, !tbaa !5
  %69 = getelementptr inbounds %"class.DIS::ActionRequestReliablePdu", ptr %68, i32 0, i32 8
  %70 = load i64, ptr %6, align 8, !tbaa !30
  %71 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNKSt6vectorIN3DIS10FixedDatumESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %69, i64 noundef %70) #4
  %72 = call noundef zeroext i1 @_ZNK3DIS10FixedDatumeqERKS0_(ptr noundef nonnull align 8 dereferenceable(16) %67, ptr noundef nonnull align 8 dereferenceable(16) %71)
  br i1 %72, label %74, label %73

73:                                               ; preds = %64
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %74

74:                                               ; preds = %73, %64
  br label %75

75:                                               ; preds = %74
  %76 = load i64, ptr %6, align 8, !tbaa !30
  %77 = add i64 %76, 1
  store i64 %77, ptr %6, align 8, !tbaa !30
  br label %58, !llvm.loop !32

78:                                               ; preds = %63
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #4
  store i64 0, ptr %7, align 8, !tbaa !30
  br label %79

79:                                               ; preds = %96, %78
  %80 = load i64, ptr %7, align 8, !tbaa !30
  %81 = getelementptr inbounds %"class.DIS::ActionRequestReliablePdu", ptr %8, i32 0, i32 9
  %82 = call noundef i64 @_ZNKSt6vectorIN3DIS13VariableDatumESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %81) #4
  %83 = icmp ult i64 %80, %82
  br i1 %83, label %85, label %84

84:                                               ; preds = %79
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #4
  br label %99

85:                                               ; preds = %79
  %86 = getelementptr inbounds %"class.DIS::ActionRequestReliablePdu", ptr %8, i32 0, i32 9
  %87 = load i64, ptr %7, align 8, !tbaa !30
  %88 = call noundef nonnull align 8 dereferenceable(44) ptr @_ZNKSt6vectorIN3DIS13VariableDatumESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %86, i64 noundef %87) #4
  %89 = load ptr, ptr %4, align 8, !tbaa !5
  %90 = getelementptr inbounds %"class.DIS::ActionRequestReliablePdu", ptr %89, i32 0, i32 9
  %91 = load i64, ptr %7, align 8, !tbaa !30
  %92 = call noundef nonnull align 8 dereferenceable(44) ptr @_ZNKSt6vectorIN3DIS13VariableDatumESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %90, i64 noundef %91) #4
  %93 = call noundef zeroext i1 @_ZNK3DIS13VariableDatumeqERKS0_(ptr noundef nonnull align 8 dereferenceable(44) %88, ptr noundef nonnull align 8 dereferenceable(44) %92)
  br i1 %93, label %95, label %94

94:                                               ; preds = %85
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %95

95:                                               ; preds = %94, %85
  br label %96

96:                                               ; preds = %95
  %97 = load i64, ptr %7, align 8, !tbaa !30
  %98 = add i64 %97, 1
  store i64 %98, ptr %7, align 8, !tbaa !30
  br label %79, !llvm.loop !34

99:                                               ; preds = %84
  %100 = load i8, ptr %5, align 1, !tbaa !9, !range !35, !noundef !36
  %101 = trunc i8 %100 to i1
  call void @llvm.lifetime.end.p0(i64 1, ptr %5) #4
  ret i1 %101
}

declare noundef zeroext i1 @_ZNK3DIS44SimulationManagementWithReliabilityFamilyPdueqERKS0_(ptr noundef nonnull align 8 dereferenceable(56), ptr noundef nonnull align 8 dereferenceable(56)) #3

declare noundef zeroext i1 @_ZNK3DIS10FixedDatumeqERKS0_(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 8 dereferenceable(16)) #3

declare noundef zeroext i1 @_ZNK3DIS13VariableDatumeqERKS0_(ptr noundef nonnull align 8 dereferenceable(44), ptr noundef nonnull align 8 dereferenceable(44)) #3

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"bool", !7, i64 0}
!11 = !{!12, !7, i64 56}
!12 = !{!"_ZTSN3DIS24ActionRequestReliablePduE", !13, i64 0, !7, i64 56, !16, i64 58, !7, i64 60, !15, i64 64, !15, i64 68, !15, i64 72, !15, i64 76, !18, i64 80, !22, i64 104}
!13 = !{!"_ZTSN3DIS44SimulationManagementWithReliabilityFamilyPduE", !14, i64 0, !17, i64 24, !17, i64 40}
!14 = !{!"_ZTSN3DIS3PduE", !7, i64 8, !7, i64 9, !7, i64 10, !7, i64 11, !15, i64 12, !16, i64 16, !16, i64 18}
!15 = !{!"int", !7, i64 0}
!16 = !{!"short", !7, i64 0}
!17 = !{!"_ZTSN3DIS8EntityIDE", !16, i64 8, !16, i64 10, !16, i64 12}
!18 = !{!"_ZTSSt6vectorIN3DIS10FixedDatumESaIS1_EE", !19, i64 0}
!19 = !{!"_ZTSSt12_Vector_baseIN3DIS10FixedDatumESaIS1_EE", !20, i64 0}
!20 = !{!"_ZTSNSt12_Vector_baseIN3DIS10FixedDatumESaIS1_EE12_Vector_implE", !21, i64 0}
!21 = !{!"_ZTSNSt12_Vector_baseIN3DIS10FixedDatumESaIS1_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!22 = !{!"_ZTSSt6vectorIN3DIS13VariableDatumESaIS1_EE", !23, i64 0}
!23 = !{!"_ZTSSt12_Vector_baseIN3DIS13VariableDatumESaIS1_EE", !24, i64 0}
!24 = !{!"_ZTSNSt12_Vector_baseIN3DIS13VariableDatumESaIS1_EE12_Vector_implE", !25, i64 0}
!25 = !{!"_ZTSNSt12_Vector_baseIN3DIS13VariableDatumESaIS1_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!26 = !{!12, !16, i64 58}
!27 = !{!12, !7, i64 60}
!28 = !{!12, !15, i64 64}
!29 = !{!12, !15, i64 68}
!30 = !{!31, !31, i64 0}
!31 = !{!"long", !7, i64 0}
!32 = distinct !{!32, !33}
!33 = !{!"llvm.loop.mustprogress"}
!34 = distinct !{!34, !33}
!35 = !{i8 0, i8 2}
!36 = !{}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIN3DIS10FixedDatumESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIN3DIS13VariableDatumESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(16) ptr @_ZNKSt6vectorIN3DIS10FixedDatumESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(44) ptr @_ZNKSt6vectorIN3DIS13VariableDatumESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZNK3DIS24ActionRequestReliablePdueqERKS0_(ptr noundef nonnull align 8 dereferenceable(128) %0, ptr noundef nonnull align 8 dereferenceable(128) %1) local_unnamed_addr #1 align 2 {
  %3 = tail call noundef zeroext i1 @_ZNK3DIS44SimulationManagementWithReliabilityFamilyPdueqERKS0_(ptr noundef nonnull align 8 dereferenceable(56) %0, ptr noundef nonnull align 8 dereferenceable(56) %1)
  %4 = getelementptr inbounds i8, ptr %0, i64 56
  %5 = load i8, ptr %4, align 8, !tbaa !5
  %6 = getelementptr inbounds i8, ptr %1, i64 56
  %7 = load i8, ptr %6, align 8, !tbaa !5
  %8 = icmp eq i8 %5, %7
  %narrow = and i1 %3, %8
  %9 = getelementptr inbounds i8, ptr %0, i64 58
  %10 = load i16, ptr %9, align 2, !tbaa !23
  %11 = getelementptr inbounds i8, ptr %1, i64 58
  %12 = load i16, ptr %11, align 2, !tbaa !23
  %13 = icmp eq i16 %10, %12
  %14 = getelementptr inbounds i8, ptr %0, i64 60
  %15 = load i8, ptr %14, align 4, !tbaa !24
  %16 = getelementptr inbounds i8, ptr %1, i64 60
  %17 = load i8, ptr %16, align 4, !tbaa !24
  %18 = icmp eq i8 %15, %17
  %19 = getelementptr inbounds i8, ptr %0, i64 64
  %20 = load i32, ptr %19, align 8, !tbaa !25
  %21 = getelementptr inbounds i8, ptr %1, i64 64
  %22 = load i32, ptr %21, align 8, !tbaa !25
  %23 = icmp eq i32 %20, %22
  %24 = getelementptr inbounds i8, ptr %0, i64 68
  %25 = load i32, ptr %24, align 4, !tbaa !26
  %26 = getelementptr inbounds i8, ptr %1, i64 68
  %27 = load i32, ptr %26, align 4, !tbaa !26
  %28 = icmp eq i32 %25, %27
  %29 = select i1 %28, i1 %23, i1 false
  %30 = select i1 %29, i1 %18, i1 false
  %31 = select i1 %30, i1 %13, i1 false
  %narrow24 = select i1 %31, i1 %narrow, i1 false
  %32 = getelementptr inbounds i8, ptr %0, i64 80
  %33 = tail call noundef i64 @_ZNKSt6vectorIN3DIS10FixedDatumESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %32) #3
  %.not = icmp eq i64 %33, 0
  br i1 %.not, label %.preheader, label %.lr.ph

.lr.ph:                                           ; preds = %2
  %34 = getelementptr inbounds i8, ptr %1, i64 80
  br label %38

.preheader:                                       ; preds = %38, %2
  %.5.lcssa = phi i1 [ %narrow24, %2 ], [ %spec.select19, %38 ]
  %35 = getelementptr inbounds i8, ptr %0, i64 104
  %36 = tail call noundef i64 @_ZNKSt6vectorIN3DIS13VariableDatumESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %35) #3
  %.not31 = icmp eq i64 %36, 0
  br i1 %.not31, label %._crit_edge, label %.lr.ph29

.lr.ph29:                                         ; preds = %.preheader
  %37 = getelementptr inbounds i8, ptr %1, i64 104
  br label %45

38:                                               ; preds = %.lr.ph, %38
  %.01726 = phi i64 [ 0, %.lr.ph ], [ %42, %38 ]
  %.525 = phi i1 [ %narrow24, %.lr.ph ], [ %spec.select19, %38 ]
  %39 = tail call noundef nonnull align 8 dereferenceable(16) ptr @_ZNKSt6vectorIN3DIS10FixedDatumESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %32, i64 noundef %.01726) #3
  %40 = tail call noundef nonnull align 8 dereferenceable(16) ptr @_ZNKSt6vectorIN3DIS10FixedDatumESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %34, i64 noundef %.01726) #3
  %41 = tail call noundef zeroext i1 @_ZNK3DIS10FixedDatumeqERKS0_(ptr noundef nonnull align 8 dereferenceable(16) %39, ptr noundef nonnull align 8 dereferenceable(16) %40)
  %spec.select19 = select i1 %41, i1 %.525, i1 false
  %42 = add nuw i64 %.01726, 1
  %43 = tail call noundef i64 @_ZNKSt6vectorIN3DIS10FixedDatumESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %32) #3
  %44 = icmp ult i64 %42, %43
  br i1 %44, label %38, label %.preheader, !llvm.loop !27

._crit_edge:                                      ; preds = %45, %.preheader
  %.7.lcssa = phi i1 [ %.5.lcssa, %.preheader ], [ %spec.select20, %45 ]
  ret i1 %.7.lcssa

45:                                               ; preds = %.lr.ph29, %45
  %.028 = phi i64 [ 0, %.lr.ph29 ], [ %49, %45 ]
  %.727 = phi i1 [ %.5.lcssa, %.lr.ph29 ], [ %spec.select20, %45 ]
  %46 = tail call noundef nonnull align 8 dereferenceable(44) ptr @_ZNKSt6vectorIN3DIS13VariableDatumESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %35, i64 noundef %.028) #3
  %47 = tail call noundef nonnull align 8 dereferenceable(44) ptr @_ZNKSt6vectorIN3DIS13VariableDatumESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %37, i64 noundef %.028) #3
  %48 = tail call noundef zeroext i1 @_ZNK3DIS13VariableDatumeqERKS0_(ptr noundef nonnull align 8 dereferenceable(44) %46, ptr noundef nonnull align 8 dereferenceable(44) %47)
  %spec.select20 = select i1 %48, i1 %.727, i1 false
  %49 = add nuw i64 %.028, 1
  %50 = tail call noundef i64 @_ZNKSt6vectorIN3DIS13VariableDatumESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %35) #3
  %51 = icmp ult i64 %49, %50
  br i1 %51, label %45, label %._crit_edge, !llvm.loop !29
}

declare noundef zeroext i1 @_ZNK3DIS44SimulationManagementWithReliabilityFamilyPdueqERKS0_(ptr noundef nonnull align 8 dereferenceable(56), ptr noundef nonnull align 8 dereferenceable(56)) local_unnamed_addr #2

declare noundef zeroext i1 @_ZNK3DIS10FixedDatumeqERKS0_(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 8 dereferenceable(16)) local_unnamed_addr #2

declare noundef zeroext i1 @_ZNK3DIS13VariableDatumeqERKS0_(ptr noundef nonnull align 8 dereferenceable(44), ptr noundef nonnull align 8 dereferenceable(44)) local_unnamed_addr #2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !9, i64 56}
!6 = !{!"_ZTSN3DIS24ActionRequestReliablePduE", !7, i64 0, !9, i64 56, !12, i64 58, !9, i64 60, !11, i64 64, !11, i64 68, !11, i64 72, !11, i64 76, !14, i64 80, !19, i64 104}
!7 = !{!"_ZTSN3DIS44SimulationManagementWithReliabilityFamilyPduE", !8, i64 0, !13, i64 24, !13, i64 40}
!8 = !{!"_ZTSN3DIS3PduE", !9, i64 8, !9, i64 9, !9, i64 10, !9, i64 11, !11, i64 12, !12, i64 16, !12, i64 18}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!"short", !9, i64 0}
!13 = !{!"_ZTSN3DIS8EntityIDE", !12, i64 8, !12, i64 10, !12, i64 12}
!14 = !{!"_ZTSSt6vectorIN3DIS10FixedDatumESaIS1_EE", !15, i64 0}
!15 = !{!"_ZTSSt12_Vector_baseIN3DIS10FixedDatumESaIS1_EE", !16, i64 0}
!16 = !{!"_ZTSNSt12_Vector_baseIN3DIS10FixedDatumESaIS1_EE12_Vector_implE", !17, i64 0}
!17 = !{!"_ZTSNSt12_Vector_baseIN3DIS10FixedDatumESaIS1_EE17_Vector_impl_dataE", !18, i64 0, !18, i64 8, !18, i64 16}
!18 = !{!"any pointer", !9, i64 0}
!19 = !{!"_ZTSSt6vectorIN3DIS13VariableDatumESaIS1_EE", !20, i64 0}
!20 = !{!"_ZTSSt12_Vector_baseIN3DIS13VariableDatumESaIS1_EE", !21, i64 0}
!21 = !{!"_ZTSNSt12_Vector_baseIN3DIS13VariableDatumESaIS1_EE12_Vector_implE", !22, i64 0}
!22 = !{!"_ZTSNSt12_Vector_baseIN3DIS13VariableDatumESaIS1_EE17_Vector_impl_dataE", !18, i64 0, !18, i64 8, !18, i64 16}
!23 = !{!6, !12, i64 58}
!24 = !{!6, !9, i64 60}
!25 = !{!6, !11, i64 64}
!26 = !{!6, !11, i64 68}
!27 = distinct !{!27, !28}
!28 = !{!"llvm.loop.mustprogress"}
!29 = distinct !{!29, !28}


; Effective O3 passes: AggressiveInstCombinePass,CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass