; LLVM IR from tezc/sc :: perf (perf_example)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local i32 @main() #0 {
  %1 = alloca i32, align 4
  %2 = alloca i64, align 8
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  store i32 0, ptr %1, align 4
  call void @llvm.lifetime.start.p0(i64 8, ptr %2) #4
  store i64 0, ptr %2, align 8, !tbaa !5
  call void @sc_perf_start()
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #4
  store i32 0, ptr %3, align 4, !tbaa !9
  br label %5

5:                                                ; preds = %16, %0
  %6 = load i32, ptr %3, align 4, !tbaa !9
  %7 = icmp slt i32 %6, 100000000
  br i1 %7, label %9, label %8

8:                                                ; preds = %5
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #4
  br label %19

9:                                                ; preds = %5
  %10 = call i32 @rand() #4
  %11 = srem i32 %10, 331
  %12 = xor i32 %11, 33
  %13 = sext i32 %12 to i64
  %14 = load i64, ptr %2, align 8, !tbaa !5
  %15 = add i64 %14, %13
  store i64 %15, ptr %2, align 8, !tbaa !5
  br label %16

16:                                               ; preds = %9
  %17 = load i32, ptr %3, align 4, !tbaa !9
  %18 = add nsw i32 %17, 1
  store i32 %18, ptr %3, align 4, !tbaa !9
  br label %5, !llvm.loop !11

19:                                               ; preds = %8
  call void @sc_perf_pause()
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #4
  store i32 0, ptr %4, align 4, !tbaa !9
  br label %20

20:                                               ; preds = %31, %19
  %21 = load i32, ptr %4, align 4, !tbaa !9
  %22 = icmp slt i32 %21, 100000000
  br i1 %22, label %24, label %23

23:                                               ; preds = %20
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #4
  br label %34

24:                                               ; preds = %20
  %25 = call i32 @rand() #4
  %26 = srem i32 %25, 327
  %27 = xor i32 %26, 37
  %28 = sext i32 %27 to i64
  %29 = load i64, ptr %2, align 8, !tbaa !5
  %30 = add i64 %29, %28
  store i64 %30, ptr %2, align 8, !tbaa !5
  br label %31

31:                                               ; preds = %24
  %32 = load i32, ptr %4, align 4, !tbaa !9
  %33 = add nsw i32 %32, 1
  store i32 %33, ptr %4, align 4, !tbaa !9
  br label %20, !llvm.loop !13

34:                                               ; preds = %23
  call void @sc_perf_end()
  %35 = load i64, ptr %2, align 8, !tbaa !5
  %36 = trunc i64 %35 to i32
  call void @llvm.lifetime.end.p0(i64 8, ptr %2) #4
  ret i32 %36
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare void @sc_perf_start() #2

; Function Attrs: nounwind
declare i32 @rand() #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

declare void @sc_perf_pause() #2

declare void @sc_perf_end() #2

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local i32 @main() local_unnamed_addr #0 {
  tail call void @sc_perf_start() #3
  br label %2

1:                                                ; preds = %2
  tail call void @sc_perf_pause() #3
  br label %9

2:                                                ; preds = %0, %2
  %.0710 = phi i32 [ 0, %0 ], [ %7, %2 ]
  %.089 = phi i32 [ 0, %0 ], [ %6, %2 ]
  %3 = tail call i32 @rand() #3
  %4 = srem i32 %3, 331
  %5 = xor i32 %4, 33
  %6 = add i32 %5, %.089
  %7 = add nuw nsw i32 %.0710, 1
  %exitcond.not = icmp eq i32 %7, 100000000
  br i1 %exitcond.not, label %1, label %2, !llvm.loop !5

8:                                                ; preds = %9
  tail call void @sc_perf_end() #3
  ret i32 %13

9:                                                ; preds = %1, %9
  %.012 = phi i32 [ 0, %1 ], [ %14, %9 ]
  %.111 = phi i32 [ %6, %1 ], [ %13, %9 ]
  %10 = tail call i32 @rand() #3
  %11 = srem i32 %10, 327
  %12 = xor i32 %11, 37
  %13 = add i32 %12, %.111
  %14 = add nuw nsw i32 %.012, 1
  %exitcond14.not = icmp eq i32 %14, 100000000
  br i1 %exitcond14.not, label %8, label %9, !llvm.loop !7
}

declare void @sc_perf_start() local_unnamed_addr #1

; Function Attrs: nounwind
declare i32 @rand() local_unnamed_addr #2

declare void @sc_perf_pause() local_unnamed_addr #1

declare void @sc_perf_end() local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = distinct !{!7, !6}


; Effective O3 passes: AggressiveInstCombinePass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,LCSSAPass,LoopRotatePass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass