; LLVM IR from upupming/algorithm :: BasicLevel_C++/1068. 万绿丛中一点红(20).ll (Z5judgeii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@m = external dso_local global i32, align 4
@n = external dso_local global i32, align 4
@tol = external dso_local global i32, align 4
@v = external dso_local global %"class.std::vector", align 8
@dir = external dso_local global [8 x [2 x i32]], align 16

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i1 @_Z5judgeii(i32 noundef %0, i32 noundef %1) #0 {
  %3 = alloca i1, align 1
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  store i32 %0, ptr %4, align 4, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #2
  store i32 0, ptr %6, align 4, !tbaa !5
  br label %10

10:                                               ; preds = %84, %2
  %11 = load i32, ptr %6, align 4, !tbaa !5
  %12 = icmp slt i32 %11, 8
  br i1 %12, label %14, label %13

13:                                               ; preds = %10
  store i32 2, ptr %7, align 4
  br label %87

14:                                               ; preds = %10
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #2
  %15 = load i32, ptr %4, align 4, !tbaa !5
  %16 = load i32, ptr %6, align 4, !tbaa !5
  %17 = sext i32 %16 to i64
  %18 = getelementptr inbounds [8 x [2 x i32]], ptr @dir, i64 0, i64 %17
  %19 = getelementptr inbounds [2 x i32], ptr %18, i64 0, i64 0
  %20 = load i32, ptr %19, align 8, !tbaa !5
  %21 = add nsw i32 %15, %20
  store i32 %21, ptr %8, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #2
  %22 = load i32, ptr %5, align 4, !tbaa !5
  %23 = load i32, ptr %6, align 4, !tbaa !5
  %24 = sext i32 %23 to i64
  %25 = getelementptr inbounds [8 x [2 x i32]], ptr @dir, i64 0, i64 %24
  %26 = getelementptr inbounds [2 x i32], ptr %25, i64 0, i64 1
  %27 = load i32, ptr %26, align 4, !tbaa !5
  %28 = add nsw i32 %22, %27
  store i32 %28, ptr %9, align 4, !tbaa !5
  %29 = load i32, ptr %8, align 4, !tbaa !5
  %30 = icmp sge i32 %29, 0
  br i1 %30, label %31, label %80

31:                                               ; preds = %14
  %32 = load i32, ptr %8, align 4, !tbaa !5
  %33 = load i32, ptr @n, align 4, !tbaa !5
  %34 = icmp slt i32 %32, %33
  br i1 %34, label %35, label %80

35:                                               ; preds = %31
  %36 = load i32, ptr %9, align 4, !tbaa !5
  %37 = icmp sge i32 %36, 0
  br i1 %37, label %38, label %80

38:                                               ; preds = %35
  %39 = load i32, ptr %9, align 4, !tbaa !5
  %40 = load i32, ptr @m, align 4, !tbaa !5
  %41 = icmp slt i32 %39, %40
  br i1 %41, label %42, label %80

42:                                               ; preds = %38
  %43 = load i32, ptr %4, align 4, !tbaa !5
  %44 = sext i32 %43 to i64
  %45 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %44) #2
  %46 = load i32, ptr %5, align 4, !tbaa !5
  %47 = sext i32 %46 to i64
  %48 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %45, i64 noundef %47) #2
  %49 = load i32, ptr %48, align 4, !tbaa !5
  %50 = load i32, ptr %8, align 4, !tbaa !5
  %51 = sext i32 %50 to i64
  %52 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %51) #2
  %53 = load i32, ptr %9, align 4, !tbaa !5
  %54 = sext i32 %53 to i64
  %55 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %52, i64 noundef %54) #2
  %56 = load i32, ptr %55, align 4, !tbaa !5
  %57 = sub nsw i32 %49, %56
  %58 = load i32, ptr @tol, align 4, !tbaa !5
  %59 = sub nsw i32 0, %58
  %60 = icmp sge i32 %57, %59
  br i1 %60, label %61, label %80

61:                                               ; preds = %42
  %62 = load i32, ptr %4, align 4, !tbaa !5
  %63 = sext i32 %62 to i64
  %64 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %63) #2
  %65 = load i32, ptr %5, align 4, !tbaa !5
  %66 = sext i32 %65 to i64
  %67 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %64, i64 noundef %66) #2
  %68 = load i32, ptr %67, align 4, !tbaa !5
  %69 = load i32, ptr %8, align 4, !tbaa !5
  %70 = sext i32 %69 to i64
  %71 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %70) #2
  %72 = load i32, ptr %9, align 4, !tbaa !5
  %73 = sext i32 %72 to i64
  %74 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %71, i64 noundef %73) #2
  %75 = load i32, ptr %74, align 4, !tbaa !5
  %76 = sub nsw i32 %68, %75
  %77 = load i32, ptr @tol, align 4, !tbaa !5
  %78 = icmp sle i32 %76, %77
  br i1 %78, label %79, label %80

79:                                               ; preds = %61
  store i1 false, ptr %3, align 1
  store i32 1, ptr %7, align 4
  br label %81

80:                                               ; preds = %61, %42, %38, %35, %31, %14
  store i32 0, ptr %7, align 4
  br label %81

81:                                               ; preds = %80, %79
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #2
  %82 = load i32, ptr %7, align 4
  switch i32 %82, label %87 [
    i32 0, label %83
  ]

83:                                               ; preds = %81
  br label %84

84:                                               ; preds = %83
  %85 = load i32, ptr %6, align 4, !tbaa !5
  %86 = add nsw i32 %85, 1
  store i32 %86, ptr %6, align 4, !tbaa !5
  br label %10, !llvm.loop !9

87:                                               ; preds = %81, %13
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #2
  %88 = load i32, ptr %7, align 4
  switch i32 %88, label %92 [
    i32 2, label %89
    i32 1, label %90
  ]

89:                                               ; preds = %87
  store i1 true, ptr %3, align 1
  br label %90

90:                                               ; preds = %89, %87
  %91 = load i1, ptr %3, align 1
  ret i1 %91

92:                                               ; preds = %87
  unreachable
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@m = external dso_local local_unnamed_addr global i32, align 4
@n = external dso_local local_unnamed_addr global i32, align 4
@tol = external dso_local local_unnamed_addr global i32, align 4
@v = external dso_local global %"class.std::vector", align 8
@dir = external dso_local local_unnamed_addr global [8 x [2 x i32]], align 16

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i1 @_Z5judgeii(i32 noundef %0, i32 noundef %1) local_unnamed_addr #0 {
  %3 = sext i32 %0 to i64
  %4 = sext i32 %1 to i64
  br label %5

5:                                                ; preds = %2, %.critedge
  %indvars.iv = phi i64 [ 0, %2 ], [ %indvars.iv.next, %.critedge ]
  %6 = phi i1 [ false, %2 ], [ %41, %.critedge ]
  %7 = getelementptr inbounds [8 x [2 x i32]], ptr @dir, i64 0, i64 %indvars.iv
  %8 = load i32, ptr %7, align 8, !tbaa !5
  %9 = add nsw i32 %8, %0
  %10 = getelementptr inbounds i8, ptr %7, i64 4
  %11 = load i32, ptr %10, align 4, !tbaa !5
  %12 = add nsw i32 %11, %1
  %13 = icmp sgt i32 %9, -1
  br i1 %13, label %14, label %.critedge

14:                                               ; preds = %5
  %15 = load i32, ptr @n, align 4, !tbaa !5
  %16 = icmp slt i32 %9, %15
  %17 = icmp sgt i32 %12, -1
  %or.cond = select i1 %16, i1 %17, i1 false
  %18 = load i32, ptr @m, align 4
  %19 = icmp slt i32 %12, %18
  %or.cond28 = select i1 %or.cond, i1 %19, i1 false
  br i1 %or.cond28, label %20, label %.critedge

20:                                               ; preds = %14
  %21 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %3) #1
  %22 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %21, i64 noundef %4) #1
  %23 = load i32, ptr %22, align 4, !tbaa !5
  %24 = zext nneg i32 %9 to i64
  %25 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %24) #1
  %26 = zext nneg i32 %12 to i64
  %27 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %25, i64 noundef %26) #1
  %28 = load i32, ptr %27, align 4, !tbaa !5
  %29 = sub nsw i32 %23, %28
  %30 = load i32, ptr @tol, align 4, !tbaa !5
  %31 = sub nsw i32 0, %30
  %.not = icmp slt i32 %29, %31
  br i1 %.not, label %.critedge, label %32

32:                                               ; preds = %20
  %33 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %3) #1
  %34 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %33, i64 noundef %4) #1
  %35 = load i32, ptr %34, align 4, !tbaa !5
  %36 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %24) #1
  %37 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %36, i64 noundef %26) #1
  %38 = load i32, ptr %37, align 4, !tbaa !5
  %39 = sub nsw i32 %35, %38
  %40 = load i32, ptr @tol, align 4, !tbaa !5
  %.not26 = icmp sgt i32 %39, %40
  br i1 %.not26, label %.critedge, label %42

.critedge:                                        ; preds = %32, %20, %14, %5
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %41 = icmp ugt i64 %indvars.iv, 6
  %exitcond = icmp eq i64 %indvars.iv.next, 8
  br i1 %exitcond, label %42, label %5, !llvm.loop !9

42:                                               ; preds = %32, %.critedge
  %.lcssa = phi i1 [ %6, %32 ], [ %41, %.critedge ]
  ret i1 %.lcssa
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,LCSSAPass,LICMPass,LoopRotatePass,SROAPass,SimplifyCFGPass,TailCallElimPass