; LLVM IR from AF-GRILL/DISPluginForUnreal :: Source/ThirdParty/include/dis6 (StopFreezeReliablePdu)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.DIS::StopFreezeReliablePdu" = type { %"class.DIS::SimulationManagementWithReliabilityFamilyPdu", %"class.DIS::ClockTime", i8, i8, i8, i8, i32 }
%"class.DIS::SimulationManagementWithReliabilityFamilyPdu" = type { %"class.DIS::Pdu.base", [4 x i8], %"class.DIS::EntityID", %"class.DIS::EntityID" }
%"class.DIS::Pdu.base" = type <{ ptr, i8, i8, i8, i8, i32, i16, i16 }>
%"class.DIS::EntityID" = type <{ ptr, i16, i16, i16, [2 x i8] }>
%"class.DIS::ClockTime" = type { ptr, i32, i32 }

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZNK3DIS21StopFreezeReliablePdueqERKS0_(ptr noundef nonnull align 8 dereferenceable(80) %0, ptr noundef nonnull align 8 dereferenceable(80) %1) #0 align 2 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca i8, align 1
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  %6 = load ptr, ptr %3, align 8
  call void @llvm.lifetime.start.p0(i64 1, ptr %5) #3
  store i8 1, ptr %5, align 1, !tbaa !9
  %7 = load ptr, ptr %4, align 8, !tbaa !5
  %8 = call noundef zeroext i1 @_ZNK3DIS44SimulationManagementWithReliabilityFamilyPdueqERKS0_(ptr noundef nonnull align 8 dereferenceable(56) %6, ptr noundef nonnull align 8 dereferenceable(56) %7)
  %9 = zext i1 %8 to i8
  store i8 %9, ptr %5, align 1, !tbaa !9
  %10 = getelementptr inbounds %"class.DIS::StopFreezeReliablePdu", ptr %6, i32 0, i32 1
  %11 = load ptr, ptr %4, align 8, !tbaa !5
  %12 = getelementptr inbounds %"class.DIS::StopFreezeReliablePdu", ptr %11, i32 0, i32 1
  %13 = call noundef zeroext i1 @_ZNK3DIS9ClockTimeeqERKS0_(ptr noundef nonnull align 8 dereferenceable(16) %10, ptr noundef nonnull align 8 dereferenceable(16) %12)
  br i1 %13, label %15, label %14

14:                                               ; preds = %2
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %15

15:                                               ; preds = %14, %2
  %16 = getelementptr inbounds %"class.DIS::StopFreezeReliablePdu", ptr %6, i32 0, i32 2
  %17 = load i8, ptr %16, align 8, !tbaa !11
  %18 = zext i8 %17 to i32
  %19 = load ptr, ptr %4, align 8, !tbaa !5
  %20 = getelementptr inbounds %"class.DIS::StopFreezeReliablePdu", ptr %19, i32 0, i32 2
  %21 = load i8, ptr %20, align 8, !tbaa !11
  %22 = zext i8 %21 to i32
  %23 = icmp eq i32 %18, %22
  br i1 %23, label %25, label %24

24:                                               ; preds = %15
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %25

25:                                               ; preds = %24, %15
  %26 = getelementptr inbounds %"class.DIS::StopFreezeReliablePdu", ptr %6, i32 0, i32 3
  %27 = load i8, ptr %26, align 1, !tbaa !19
  %28 = zext i8 %27 to i32
  %29 = load ptr, ptr %4, align 8, !tbaa !5
  %30 = getelementptr inbounds %"class.DIS::StopFreezeReliablePdu", ptr %29, i32 0, i32 3
  %31 = load i8, ptr %30, align 1, !tbaa !19
  %32 = zext i8 %31 to i32
  %33 = icmp eq i32 %28, %32
  br i1 %33, label %35, label %34

34:                                               ; preds = %25
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %35

35:                                               ; preds = %34, %25
  %36 = getelementptr inbounds %"class.DIS::StopFreezeReliablePdu", ptr %6, i32 0, i32 4
  %37 = load i8, ptr %36, align 2, !tbaa !20
  %38 = zext i8 %37 to i32
  %39 = load ptr, ptr %4, align 8, !tbaa !5
  %40 = getelementptr inbounds %"class.DIS::StopFreezeReliablePdu", ptr %39, i32 0, i32 4
  %41 = load i8, ptr %40, align 2, !tbaa !20
  %42 = zext i8 %41 to i32
  %43 = icmp eq i32 %38, %42
  br i1 %43, label %45, label %44

44:                                               ; preds = %35
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %45

45:                                               ; preds = %44, %35
  %46 = getelementptr inbounds %"class.DIS::StopFreezeReliablePdu", ptr %6, i32 0, i32 5
  %47 = load i8, ptr %46, align 1, !tbaa !21
  %48 = zext i8 %47 to i32
  %49 = load ptr, ptr %4, align 8, !tbaa !5
  %50 = getelementptr inbounds %"class.DIS::StopFreezeReliablePdu", ptr %49, i32 0, i32 5
  %51 = load i8, ptr %50, align 1, !tbaa !21
  %52 = zext i8 %51 to i32
  %53 = icmp eq i32 %48, %52
  br i1 %53, label %55, label %54

54:                                               ; preds = %45
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %55

55:                                               ; preds = %54, %45
  %56 = getelementptr inbounds %"class.DIS::StopFreezeReliablePdu", ptr %6, i32 0, i32 6
  %57 = load i32, ptr %56, align 4, !tbaa !22
  %58 = load ptr, ptr %4, align 8, !tbaa !5
  %59 = getelementptr inbounds %"class.DIS::StopFreezeReliablePdu", ptr %58, i32 0, i32 6
  %60 = load i32, ptr %59, align 4, !tbaa !22
  %61 = icmp eq i32 %57, %60
  br i1 %61, label %63, label %62

62:                                               ; preds = %55
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %63

63:                                               ; preds = %62, %55
  %64 = load i8, ptr %5, align 1, !tbaa !9, !range !23, !noundef !24
  %65 = trunc i8 %64 to i1
  call void @llvm.lifetime.end.p0(i64 1, ptr %5) #3
  ret i1 %65
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare noundef zeroext i1 @_ZNK3DIS44SimulationManagementWithReliabilityFamilyPdueqERKS0_(ptr noundef nonnull align 8 dereferenceable(56), ptr noundef nonnull align 8 dereferenceable(56)) #2

declare noundef zeroext i1 @_ZNK3DIS9ClockTimeeqERKS0_(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 8 dereferenceable(16)) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"bool", !7, i64 0}
!11 = !{!12, !7, i64 72}
!12 = !{!"_ZTSN3DIS21StopFreezeReliablePduE", !13, i64 0, !18, i64 56, !7, i64 72, !7, i64 73, !7, i64 74, !7, i64 75, !15, i64 76}
!13 = !{!"_ZTSN3DIS44SimulationManagementWithReliabilityFamilyPduE", !14, i64 0, !17, i64 24, !17, i64 40}
!14 = !{!"_ZTSN3DIS3PduE", !7, i64 8, !7, i64 9, !7, i64 10, !7, i64 11, !15, i64 12, !16, i64 16, !16, i64 18}
!15 = !{!"int", !7, i64 0}
!16 = !{!"short", !7, i64 0}
!17 = !{!"_ZTSN3DIS8EntityIDE", !16, i64 8, !16, i64 10, !16, i64 12}
!18 = !{!"_ZTSN3DIS9ClockTimeE", !15, i64 8, !15, i64 12}
!19 = !{!12, !7, i64 73}
!20 = !{!12, !7, i64 74}
!21 = !{!12, !7, i64 75}
!22 = !{!12, !15, i64 76}
!23 = !{i8 0, i8 2}
!24 = !{}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZNK3DIS21StopFreezeReliablePdueqERKS0_(ptr noundef nonnull align 8 dereferenceable(80) %0, ptr noundef nonnull align 8 dereferenceable(80) %1) local_unnamed_addr #0 align 2 {
  %3 = tail call noundef zeroext i1 @_ZNK3DIS44SimulationManagementWithReliabilityFamilyPdueqERKS0_(ptr noundef nonnull align 8 dereferenceable(56) %0, ptr noundef nonnull align 8 dereferenceable(56) %1)
  %4 = getelementptr inbounds i8, ptr %0, i64 56
  %5 = getelementptr inbounds i8, ptr %1, i64 56
  %6 = tail call noundef zeroext i1 @_ZNK3DIS9ClockTimeeqERKS0_(ptr noundef nonnull align 8 dereferenceable(16) %4, ptr noundef nonnull align 8 dereferenceable(16) %5)
  %7 = getelementptr inbounds i8, ptr %0, i64 72
  %8 = getelementptr inbounds i8, ptr %1, i64 72
  %9 = load <4 x i8>, ptr %7, align 8, !tbaa !5
  %10 = load <4 x i8>, ptr %8, align 8, !tbaa !5
  %11 = icmp eq <4 x i8> %9, %10
  %12 = getelementptr inbounds i8, ptr %0, i64 76
  %13 = load i32, ptr %12, align 4, !tbaa !8
  %14 = getelementptr inbounds i8, ptr %1, i64 76
  %15 = load i32, ptr %14, align 4, !tbaa !8
  %16 = icmp eq i32 %13, %15
  %17 = freeze <4 x i1> %11
  %18 = bitcast <4 x i1> %17 to i4
  %19 = icmp eq i4 %18, -1
  %.fr = freeze i1 %16
  %op.rdx = and i1 %.fr, %19
  %op.rdx13 = and i1 %6, %3
  %op.rdx14 = and i1 %op.rdx, %op.rdx13
  ret i1 %op.rdx14
}

declare noundef zeroext i1 @_ZNK3DIS44SimulationManagementWithReliabilityFamilyPdueqERKS0_(ptr noundef nonnull align 8 dereferenceable(56), ptr noundef nonnull align 8 dereferenceable(56)) local_unnamed_addr #1

declare noundef zeroext i1 @_ZNK3DIS9ClockTimeeqERKS0_(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 8 dereferenceable(16)) local_unnamed_addr #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}
!8 = !{!9, !12, i64 76}
!9 = !{!"_ZTSN3DIS21StopFreezeReliablePduE", !10, i64 0, !15, i64 56, !6, i64 72, !6, i64 73, !6, i64 74, !6, i64 75, !12, i64 76}
!10 = !{!"_ZTSN3DIS44SimulationManagementWithReliabilityFamilyPduE", !11, i64 0, !14, i64 24, !14, i64 40}
!11 = !{!"_ZTSN3DIS3PduE", !6, i64 8, !6, i64 9, !6, i64 10, !6, i64 11, !12, i64 12, !13, i64 16, !13, i64 18}
!12 = !{!"int", !6, i64 0}
!13 = !{!"short", !6, i64 0}
!14 = !{!"_ZTSN3DIS8EntityIDE", !13, i64 8, !13, i64 10, !13, i64 12}
!15 = !{!"_ZTSN3DIS9ClockTimeE", !12, i64 8, !12, i64 12}


; Effective O3 passes: GlobalDCEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SLPVectorizerPass,SROAPass,SimplifyCFGPass,TailCallElimPass