; LLVM IR from huawei-noah/bolt :: compute/tensor/src/cpu/x86 (scale)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.TensorDesc = type { i32, i32, i32, [20 x i32] }
%struct.ScaleParamSpec = type { i32, i32 }

@.str = external hidden unnamed_addr constant [20 x i8], align 1
@stdout = external global ptr, align 8
@.str.1 = external hidden unnamed_addr constant [23 x i8], align 1

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z9scale_x8610TensorDescPvS0_S0_14ScaleParamSpecS_S0_(ptr noundef byval(%struct.TensorDesc) align 8 %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, i64 %4, ptr noundef byval(%struct.TensorDesc) align 8 %5, ptr noundef %6) #0 {
  %8 = alloca %struct.ScaleParamSpec, align 4
  %9 = alloca ptr, align 8
  %10 = alloca ptr, align 8
  %11 = alloca ptr, align 8
  %12 = alloca ptr, align 8
  %13 = alloca i32, align 4
  %14 = alloca %struct.TensorDesc, align 8
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  %19 = alloca i32, align 4
  %20 = alloca i32, align 4
  %21 = alloca i32, align 4
  store i64 %4, ptr %8, align 4
  store ptr %1, ptr %9, align 8, !tbaa !5
  store ptr %2, ptr %10, align 8, !tbaa !5
  store ptr %3, ptr %11, align 8, !tbaa !5
  store ptr %6, ptr %12, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #7
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %14, ptr align 8 %5, i64 92, i1 false), !tbaa.struct !9
  %22 = call noundef i32 @_Z17tensorNumElements10TensorDesc(ptr noundef byval(%struct.TensorDesc) align 8 %14)
  store i32 %22, ptr %13, align 4, !tbaa !14
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #7
  %23 = getelementptr inbounds %struct.ScaleParamSpec, ptr %8, i32 0, i32 0
  %24 = load i32, ptr %23, align 4, !tbaa !17
  %25 = getelementptr inbounds %struct.TensorDesc, ptr %5, i32 0, i32 2
  %26 = load i32, ptr %25, align 8, !tbaa !19
  %27 = add i32 %24, %26
  %28 = getelementptr inbounds %struct.TensorDesc, ptr %5, i32 0, i32 2
  %29 = load i32, ptr %28, align 8, !tbaa !19
  %30 = urem i32 %27, %29
  store i32 %30, ptr %15, align 4, !tbaa !14
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #7
  %31 = getelementptr inbounds %struct.TensorDesc, ptr %5, i32 0, i32 3
  %32 = getelementptr inbounds %struct.TensorDesc, ptr %5, i32 0, i32 2
  %33 = load i32, ptr %32, align 8, !tbaa !19
  %34 = sub i32 %33, 1
  %35 = zext i32 %34 to i64
  %36 = getelementptr inbounds [20 x i32], ptr %31, i64 0, i64 %35
  %37 = load i32, ptr %36, align 4, !tbaa !14
  store i32 %37, ptr %16, align 4, !tbaa !14
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #7
  %38 = getelementptr inbounds %struct.TensorDesc, ptr %5, i32 0, i32 3
  %39 = getelementptr inbounds %struct.TensorDesc, ptr %5, i32 0, i32 2
  %40 = load i32, ptr %39, align 8, !tbaa !19
  %41 = sub i32 %40, 1
  %42 = load i32, ptr %15, align 4, !tbaa !14
  %43 = sub i32 %41, %42
  %44 = zext i32 %43 to i64
  %45 = getelementptr inbounds [20 x i32], ptr %38, i64 0, i64 %44
  %46 = load i32, ptr %45, align 4, !tbaa !14
  store i32 %46, ptr %17, align 4, !tbaa !14
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #7
  %47 = getelementptr inbounds %struct.TensorDesc, ptr %0, i32 0, i32 3
  %48 = getelementptr inbounds %struct.TensorDesc, ptr %0, i32 0, i32 2
  %49 = load i32, ptr %48, align 8, !tbaa !19
  %50 = sub i32 %49, 1
  %51 = load i32, ptr %15, align 4, !tbaa !14
  %52 = sub i32 %50, %51
  %53 = zext i32 %52 to i64
  %54 = getelementptr inbounds [20 x i32], ptr %47, i64 0, i64 %53
  %55 = load i32, ptr %54, align 4, !tbaa !14
  store i32 %55, ptr %18, align 4, !tbaa !14
  %56 = load i32, ptr %15, align 4, !tbaa !14
  %57 = icmp eq i32 %56, 0
  br i1 %57, label %58, label %59

58:                                               ; preds = %7
  store i32 1, ptr %16, align 4, !tbaa !14
  br label %59

59:                                               ; preds = %58, %7
  call void @llvm.lifetime.start.p0(i64 4, ptr %19) #7
  %60 = load i32, ptr %13, align 4, !tbaa !14
  %61 = load i32, ptr %16, align 4, !tbaa !14
  %62 = load i32, ptr %17, align 4, !tbaa !14
  %63 = mul nsw i32 %61, %62
  %64 = udiv i32 %60, %63
  store i32 %64, ptr %19, align 4, !tbaa !14
  %65 = getelementptr inbounds %struct.TensorDesc, ptr %5, i32 0, i32 1
  %66 = load i32, ptr %65, align 4, !tbaa !21
  %67 = icmp eq i32 %66, 2
  br i1 %67, label %68, label %71

68:                                               ; preds = %59
  %69 = getelementptr inbounds %struct.TensorDesc, ptr %5, i32 0, i32 2
  %70 = load i32, ptr %69, align 8, !tbaa !19
  store i32 %70, ptr %15, align 4, !tbaa !14
  br label %71

71:                                               ; preds = %68, %59
  %72 = getelementptr inbounds %struct.TensorDesc, ptr %5, i32 0, i32 1
  %73 = load i32, ptr %72, align 4, !tbaa !21
  %74 = icmp eq i32 %73, 41
  br i1 %74, label %75, label %93

75:                                               ; preds = %71
  %76 = load i32, ptr %17, align 4, !tbaa !14
  %77 = srem i32 %76, 16
  %78 = icmp eq i32 %77, 0
  br i1 %78, label %89, label %79

79:                                               ; preds = %75
  call void @llvm.lifetime.start.p0(i64 4, ptr %20) #7
  %80 = call i64 (i64, ...) @syscall(i64 noundef 186) #7
  %81 = trunc i64 %80 to i32
  store i32 %81, ptr %20, align 4, !tbaa !14
  %82 = load i32, ptr %20, align 4, !tbaa !14
  %83 = call i32 (ptr, ...) @printf(ptr noundef @.str, i32 noundef %82)
  %84 = load ptr, ptr @stdout, align 8, !tbaa !5
  %85 = call i32 @fflush(ptr noundef %84)
  %86 = call i32 (ptr, ...) @printf(ptr noundef @.str.1)
  %87 = load ptr, ptr @stdout, align 8, !tbaa !5
  %88 = call i32 @fflush(ptr noundef %87)
  call void @exit(i32 noundef 1) #8
  unreachable

89:                                               ; preds = %75
  %90 = getelementptr inbounds %struct.TensorDesc, ptr %5, i32 0, i32 2
  %91 = load i32, ptr %90, align 8, !tbaa !19
  %92 = add i32 %91, 1
  store i32 %92, ptr %15, align 4, !tbaa !14
  br label %93

93:                                               ; preds = %89, %71
  call void @llvm.lifetime.start.p0(i64 4, ptr %21) #7
  store i32 51, ptr %21, align 4, !tbaa !22
  %94 = getelementptr inbounds %struct.TensorDesc, ptr %5, i32 0, i32 0
  %95 = load i32, ptr %94, align 8, !tbaa !24
  switch i32 %95, label %109 [
    i32 3, label %96
  ]

96:                                               ; preds = %93
  %97 = load ptr, ptr %9, align 8, !tbaa !5
  %98 = load i32, ptr %15, align 4, !tbaa !14
  %99 = getelementptr inbounds %struct.TensorDesc, ptr %5, i32 0, i32 2
  %100 = load i32, ptr %99, align 8, !tbaa !19
  %101 = load ptr, ptr %10, align 8, !tbaa !5
  %102 = load ptr, ptr %11, align 8, !tbaa !5
  %103 = load i32, ptr %16, align 4, !tbaa !14
  %104 = load i32, ptr %17, align 4, !tbaa !14
  %105 = load i32, ptr %19, align 4, !tbaa !14
  %106 = load i32, ptr %18, align 4, !tbaa !14
  %107 = load ptr, ptr %12, align 8, !tbaa !5
  %108 = call noundef i32 @_Z11scale_int32PiiiS_S_iiiiS_(ptr noundef %97, i32 noundef %98, i32 noundef %100, ptr noundef %101, ptr noundef %102, i32 noundef %103, i32 noundef %104, i32 noundef %105, i32 noundef %106, ptr noundef %107)
  store i32 %108, ptr %21, align 4, !tbaa !22
  br label %110

109:                                              ; preds = %93
  br label %110

110:                                              ; preds = %109, %96
  %111 = load i32, ptr %21, align 4, !tbaa !22
  call void @llvm.lifetime.end.p0(i64 4, ptr %21) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #7
  ret i32 %111
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z17tensorNumElements10TensorDesc(ptr noundef byval(%struct.TensorDesc) align 8) #2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #3

; Function Attrs: nounwind
declare i64 @syscall(i64 noundef, ...) #4

declare i32 @printf(ptr noundef, ...) #5

declare i32 @fflush(ptr noundef) #5

; Function Attrs: noreturn nounwind
declare void @exit(i32 noundef) #6

declare noundef i32 @_Z11scale_int32PiiiS_S_iiiiS_(ptr noundef, i32 noundef, i32 noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef) #5

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { nounwind }
attributes #8 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{i64 0, i64 4, !10, i64 4, i64 4, !12, i64 8, i64 4, !14, i64 12, i64 80, !16}
!10 = !{!11, !11, i64 0}
!11 = !{!"_ZTS8DataType", !7, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"_ZTS10DataFormat", !7, i64 0}
!14 = !{!15, !15, i64 0}
!15 = !{!"int", !7, i64 0}
!16 = !{!7, !7, i64 0}
!17 = !{!18, !15, i64 0}
!18 = !{!"_ZTS14ScaleParamSpec", !15, i64 0, !15, i64 4}
!19 = !{!20, !15, i64 8}
!20 = !{!"_ZTS10TensorDesc", !11, i64 0, !13, i64 4, !15, i64 8, !7, i64 12}
!21 = !{!20, !13, i64 4}
!22 = !{!23, !23, i64 0}
!23 = !{!"_ZTS2EE", !7, i64 0}
!24 = !{!20, !11, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.TensorDesc = type { i32, i32, i32, [20 x i32] }

@.str = external hidden unnamed_addr constant [20 x i8], align 1
@stdout = external local_unnamed_addr global ptr, align 8
@.str.1 = external hidden unnamed_addr constant [23 x i8], align 1

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z9scale_x8610TensorDescPvS0_S0_14ScaleParamSpecS_S0_(ptr nocapture noundef readonly byval(%struct.TensorDesc) align 8 %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, i64 %4, ptr nocapture noundef readonly byval(%struct.TensorDesc) align 8 %5, ptr noundef %6) local_unnamed_addr #0 {
  %.sroa.0.0.extract.trunc = trunc i64 %4 to i32
  %8 = tail call noundef i32 @_Z17tensorNumElements10TensorDesc(ptr noundef nonnull byval(%struct.TensorDesc) align 8 %5)
  %9 = getelementptr inbounds i8, ptr %5, i64 8
  %10 = load i32, ptr %9, align 8
  %11 = add i32 %10, %.sroa.0.0.extract.trunc
  %12 = urem i32 %11, %10
  %13 = getelementptr inbounds i8, ptr %5, i64 12
  %14 = add i32 %10, -1
  %15 = zext i32 %14 to i64
  %16 = getelementptr inbounds [20 x i32], ptr %13, i64 0, i64 %15
  %17 = load i32, ptr %16, align 4, !tbaa !5
  %18 = sub i32 %14, %12
  %19 = zext i32 %18 to i64
  %20 = getelementptr inbounds [20 x i32], ptr %13, i64 0, i64 %19
  %21 = load i32, ptr %20, align 4, !tbaa !5
  %22 = getelementptr inbounds i8, ptr %0, i64 12
  %23 = getelementptr inbounds i8, ptr %0, i64 8
  %24 = load i32, ptr %23, align 8, !tbaa !9
  %25 = xor i32 %12, -1
  %26 = add i32 %24, %25
  %27 = zext i32 %26 to i64
  %28 = getelementptr inbounds [20 x i32], ptr %22, i64 0, i64 %27
  %29 = load i32, ptr %28, align 4, !tbaa !5
  %30 = icmp eq i32 %12, 0
  %spec.select = select i1 %30, i32 1, i32 %17
  %31 = mul nsw i32 %spec.select, %21
  %32 = udiv i32 %8, %31
  %33 = getelementptr inbounds i8, ptr %5, i64 4
  %34 = load i32, ptr %33, align 4, !tbaa !13
  %35 = icmp eq i32 %34, 2
  %.017 = select i1 %35, i32 %10, i32 %12
  %36 = icmp eq i32 %34, 41
  br i1 %36, label %37, label %51

37:                                               ; preds = %7
  %38 = and i32 %21, 15
  %39 = icmp eq i32 %38, 0
  br i1 %39, label %49, label %40

40:                                               ; preds = %37
  %41 = tail call i64 (i64, ...) @syscall(i64 noundef 186) #6
  %42 = trunc i64 %41 to i32
  %43 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str, i32 noundef %42)
  %44 = load ptr, ptr @stdout, align 8, !tbaa !14
  %45 = tail call i32 @fflush(ptr noundef %44)
  %46 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.1)
  %47 = load ptr, ptr @stdout, align 8, !tbaa !14
  %48 = tail call i32 @fflush(ptr noundef %47)
  tail call void @exit(i32 noundef 1) #7
  unreachable

49:                                               ; preds = %37
  %50 = add i32 %10, 1
  br label %51

51:                                               ; preds = %49, %7
  %.1 = phi i32 [ %50, %49 ], [ %.017, %7 ]
  %52 = load i32, ptr %5, align 8, !tbaa !16
  %cond = icmp eq i32 %52, 3
  br i1 %cond, label %53, label %55

53:                                               ; preds = %51
  %54 = tail call noundef i32 @_Z11scale_int32PiiiS_S_iiiiS_(ptr noundef %1, i32 noundef %.1, i32 noundef %10, ptr noundef %2, ptr noundef %3, i32 noundef %spec.select, i32 noundef %21, i32 noundef %32, i32 noundef %29, ptr noundef %6)
  br label %55

55:                                               ; preds = %51, %53
  %.0 = phi i32 [ %54, %53 ], [ 51, %51 ]
  ret i32 %.0
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z17tensorNumElements10TensorDesc(ptr noundef byval(%struct.TensorDesc) align 8) local_unnamed_addr #1

; Function Attrs: nounwind
declare i64 @syscall(i64 noundef, ...) local_unnamed_addr #2

; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #3

; Function Attrs: nofree nounwind
declare noundef i32 @fflush(ptr nocapture noundef) local_unnamed_addr #3

; Function Attrs: noreturn nounwind
declare void @exit(i32 noundef) local_unnamed_addr #4

declare noundef i32 @_Z11scale_int32PiiiS_S_iiiiS_(ptr noundef, i32 noundef, i32 noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #5

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind }
attributes #7 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !6, i64 8}
!10 = !{!"_ZTS10TensorDesc", !11, i64 0, !12, i64 4, !6, i64 8, !7, i64 12}
!11 = !{!"_ZTS8DataType", !7, i64 0}
!12 = !{!"_ZTS10DataFormat", !7, i64 0}
!13 = !{!10, !12, i64 4}
!14 = !{!15, !15, i64 0}
!15 = !{!"any pointer", !7, i64 0}
!16 = !{!10, !11, i64 0}


; Effective O3 passes: DSEPass,EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,MemCpyOptPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass