; LLVM IR from huawei-noah/bolt :: compute/tensor/src/cpu/arm (depthwise_pointwise_convolution)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.TensorDesc = type { i32, i32, i32, [20 x i32] }
%struct.ConvolutionParamSpec = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %union.ActivationSpec, i32, i32, i32, i32 }
%union.ActivationSpec = type { %struct.ClipParamSpec }
%struct.ClipParamSpec = type { float, float }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #1

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z52depthwise_pointwise_convolution_transform_filter_arm10TensorDescPKvS_S1_20ConvolutionParamSpec36DepthwiseConvolutionForwardAlgorithmPS_PvS4_S5_(ptr noundef byval(%struct.TensorDesc) align 8 %0, ptr noundef %1, ptr noundef byval(%struct.TensorDesc) align 8 %2, ptr noundef %3, ptr noundef byval(%struct.ConvolutionParamSpec) align 8 %4, i32 noundef %5, ptr noundef %6, ptr noundef %7, ptr noundef %8, ptr noundef %9) #2 {
  %11 = alloca ptr, align 8
  %12 = alloca ptr, align 8
  %13 = alloca i32, align 4
  %14 = alloca ptr, align 8
  %15 = alloca ptr, align 8
  %16 = alloca ptr, align 8
  %17 = alloca ptr, align 8
  %18 = alloca i32, align 4
  %19 = alloca %struct.TensorDesc, align 8
  %20 = alloca %struct.TensorDesc, align 8
  %21 = alloca %struct.ConvolutionParamSpec, align 8
  store ptr %1, ptr %11, align 8, !tbaa !5
  store ptr %3, ptr %12, align 8, !tbaa !5
  store i32 %5, ptr %13, align 4, !tbaa !9
  store ptr %6, ptr %14, align 8, !tbaa !5
  store ptr %7, ptr %15, align 8, !tbaa !5
  store ptr %8, ptr %16, align 8, !tbaa !5
  store ptr %9, ptr %17, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #4
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %19, ptr align 8 %0, i64 92, i1 false), !tbaa.struct !11
  %22 = load ptr, ptr %11, align 8, !tbaa !5
  %23 = load ptr, ptr %14, align 8, !tbaa !5
  %24 = load ptr, ptr %15, align 8, !tbaa !5
  %25 = call noundef i32 @_Z42depthwise_convolution_transform_filter_arm10TensorDescPKv36DepthwiseConvolutionForwardAlgorithmPS_Pv(ptr noundef byval(%struct.TensorDesc) align 8 %19, ptr noundef %22, i32 noundef 0, ptr noundef %23, ptr noundef %24)
  store i32 %25, ptr %18, align 4, !tbaa !19
  %26 = load i32, ptr %18, align 4, !tbaa !19
  %27 = icmp eq i32 %26, 0
  br i1 %27, label %28, label %34

28:                                               ; preds = %10
  %29 = getelementptr inbounds %struct.ConvolutionParamSpec, ptr %4, i32 0, i32 13
  store i32 1, ptr %29, align 4, !tbaa !21
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %20, ptr align 8 %2, i64 92, i1 false), !tbaa.struct !11
  %30 = load ptr, ptr %12, align 8, !tbaa !5
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %21, ptr align 8 %4, i64 108, i1 false), !tbaa.struct !26
  %31 = load ptr, ptr %16, align 8, !tbaa !5
  %32 = load ptr, ptr %17, align 8, !tbaa !5
  %33 = call noundef i32 @_Z32convolution_transform_filter_arm10TensorDescPKv20ConvolutionParamSpec27ConvolutionForwardAlgorithmPS_Pv(ptr noundef byval(%struct.TensorDesc) align 8 %20, ptr noundef %30, ptr noundef byval(%struct.ConvolutionParamSpec) align 8 %21, i32 noundef 3, ptr noundef %31, ptr noundef %32)
  store i32 %33, ptr %18, align 4, !tbaa !19
  br label %34

34:                                               ; preds = %28, %10
  %35 = load i32, ptr %18, align 4, !tbaa !19
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #4
  ret i32 %35
}

declare noundef i32 @_Z42depthwise_convolution_transform_filter_arm10TensorDescPKv36DepthwiseConvolutionForwardAlgorithmPS_Pv(ptr noundef byval(%struct.TensorDesc) align 8, ptr noundef, i32 noundef, ptr noundef, ptr noundef) #3

declare noundef i32 @_Z32convolution_transform_filter_arm10TensorDescPKv20ConvolutionParamSpec27ConvolutionForwardAlgorithmPS_Pv(ptr noundef byval(%struct.TensorDesc) align 8, ptr noundef, ptr noundef byval(%struct.ConvolutionParamSpec) align 8, i32 noundef, ptr noundef, ptr noundef) #3

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"_ZTS36DepthwiseConvolutionForwardAlgorithm", !7, i64 0}
!11 = !{i64 0, i64 4, !12, i64 4, i64 4, !14, i64 8, i64 4, !16, i64 12, i64 80, !18}
!12 = !{!13, !13, i64 0}
!13 = !{!"_ZTS8DataType", !7, i64 0}
!14 = !{!15, !15, i64 0}
!15 = !{!"_ZTS10DataFormat", !7, i64 0}
!16 = !{!17, !17, i64 0}
!17 = !{!"int", !7, i64 0}
!18 = !{!7, !7, i64 0}
!19 = !{!20, !20, i64 0}
!20 = !{!"_ZTS2EE", !7, i64 0}
!21 = !{!22, !17, i64 52}
!22 = !{!"_ZTS20ConvolutionParamSpec", !17, i64 0, !17, i64 4, !17, i64 8, !17, i64 12, !17, i64 16, !17, i64 20, !17, i64 24, !17, i64 28, !17, i64 32, !17, i64 36, !17, i64 40, !17, i64 44, !17, i64 48, !17, i64 52, !17, i64 56, !17, i64 60, !17, i64 64, !17, i64 68, !23, i64 72, !24, i64 76, !24, i64 80, !7, i64 84, !25, i64 92, !17, i64 96, !17, i64 100, !17, i64 104}
!23 = !{!"_ZTS15ConvolutionMode", !7, i64 0}
!24 = !{!"_ZTS14ActivationMode", !7, i64 0}
!25 = !{!"_ZTS9RoundMode", !7, i64 0}
!26 = !{i64 0, i64 4, !16, i64 4, i64 4, !16, i64 8, i64 4, !16, i64 12, i64 4, !16, i64 16, i64 4, !16, i64 20, i64 4, !16, i64 24, i64 4, !16, i64 28, i64 4, !16, i64 32, i64 4, !16, i64 36, i64 4, !16, i64 40, i64 4, !16, i64 44, i64 4, !16, i64 48, i64 4, !16, i64 52, i64 4, !16, i64 56, i64 4, !16, i64 60, i64 4, !16, i64 64, i64 4, !16, i64 68, i64 4, !16, i64 72, i64 4, !27, i64 76, i64 4, !28, i64 80, i64 4, !28, i64 84, i64 8, !18, i64 92, i64 4, !29, i64 96, i64 4, !16, i64 100, i64 4, !16, i64 104, i64 4, !16}
!27 = !{!23, !23, i64 0}
!28 = !{!24, !24, i64 0}
!29 = !{!25, !25, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.TensorDesc = type { i32, i32, i32, [20 x i32] }
%struct.ConvolutionParamSpec = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %union.ActivationSpec, i32, i32, i32, i32 }
%union.ActivationSpec = type { %struct.ClipParamSpec }
%struct.ClipParamSpec = type { float, float }

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z52depthwise_pointwise_convolution_transform_filter_arm10TensorDescPKvS_S1_20ConvolutionParamSpec36DepthwiseConvolutionForwardAlgorithmPS_PvS4_S5_(ptr nocapture noundef readonly byval(%struct.TensorDesc) align 8 %0, ptr noundef %1, ptr nocapture noundef readonly byval(%struct.TensorDesc) align 8 %2, ptr noundef %3, ptr nocapture noundef byval(%struct.ConvolutionParamSpec) align 8 %4, i32 noundef %5, ptr noundef %6, ptr noundef %7, ptr noundef %8, ptr noundef %9) local_unnamed_addr #0 {
  %11 = tail call noundef i32 @_Z42depthwise_convolution_transform_filter_arm10TensorDescPKv36DepthwiseConvolutionForwardAlgorithmPS_Pv(ptr noundef nonnull byval(%struct.TensorDesc) align 8 %0, ptr noundef %1, i32 noundef 0, ptr noundef %6, ptr noundef %7)
  %12 = icmp eq i32 %11, 0
  br i1 %12, label %13, label %16

13:                                               ; preds = %10
  %14 = getelementptr inbounds i8, ptr %4, i64 52
  store i32 1, ptr %14, align 4, !tbaa !5
  %15 = tail call noundef i32 @_Z32convolution_transform_filter_arm10TensorDescPKv20ConvolutionParamSpec27ConvolutionForwardAlgorithmPS_Pv(ptr noundef nonnull byval(%struct.TensorDesc) align 8 %2, ptr noundef %3, ptr noundef nonnull byval(%struct.ConvolutionParamSpec) align 8 %4, i32 noundef 3, ptr noundef %8, ptr noundef %9)
  br label %16

16:                                               ; preds = %13, %10
  %.0 = phi i32 [ %15, %13 ], [ %11, %10 ]
  ret i32 %.0
}

declare noundef i32 @_Z42depthwise_convolution_transform_filter_arm10TensorDescPKv36DepthwiseConvolutionForwardAlgorithmPS_Pv(ptr noundef byval(%struct.TensorDesc) align 8, ptr noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1

declare noundef i32 @_Z32convolution_transform_filter_arm10TensorDescPKv20ConvolutionParamSpec27ConvolutionForwardAlgorithmPS_Pv(ptr noundef byval(%struct.TensorDesc) align 8, ptr noundef, ptr noundef byval(%struct.ConvolutionParamSpec) align 8, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 52}
!6 = !{!"_ZTS20ConvolutionParamSpec", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36, !7, i64 40, !7, i64 44, !7, i64 48, !7, i64 52, !7, i64 56, !7, i64 60, !7, i64 64, !7, i64 68, !10, i64 72, !11, i64 76, !11, i64 80, !8, i64 84, !12, i64 92, !7, i64 96, !7, i64 100, !7, i64 104}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"_ZTS15ConvolutionMode", !8, i64 0}
!11 = !{!"_ZTS14ActivationMode", !8, i64 0}
!12 = !{!"_ZTS9RoundMode", !8, i64 0}


; Effective O3 passes: DSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,MemCpyOptPass,PostOrderFunctionAttrsPass,SROAPass,TailCallElimPass