; LLVM IR from qc-tum/chemtensor :: src/util (pcg_basic)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.pcg32x2_random = type { [2 x %struct.pcg32_random] }
%struct.pcg32_random = type { i64, i64 }

; Function Attrs: nounwind uwtable
declare dso_local void @pcg32_srandom_r(i64 noundef, i64 noundef, ptr noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind uwtable
define dso_local void @pcg32x2_srandom_r(i64 noundef %0, i64 noundef %1, i64 noundef %2, i64 noundef %3, ptr noundef %4) #0 {
  %6 = alloca i64, align 8
  %7 = alloca i64, align 8
  %8 = alloca i64, align 8
  %9 = alloca i64, align 8
  %10 = alloca ptr, align 8
  %11 = alloca i64, align 8
  store i64 %0, ptr %6, align 8, !tbaa !5
  store i64 %1, ptr %7, align 8, !tbaa !5
  store i64 %2, ptr %8, align 8, !tbaa !5
  store i64 %3, ptr %9, align 8, !tbaa !5
  store ptr %4, ptr %10, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #2
  store i64 9223372036854775807, ptr %11, align 8, !tbaa !5
  %12 = load i64, ptr %8, align 8, !tbaa !5
  %13 = load i64, ptr %11, align 8, !tbaa !5
  %14 = and i64 %12, %13
  %15 = load i64, ptr %9, align 8, !tbaa !5
  %16 = load i64, ptr %11, align 8, !tbaa !5
  %17 = and i64 %15, %16
  %18 = icmp eq i64 %14, %17
  br i1 %18, label %19, label %22

19:                                               ; preds = %5
  %20 = load i64, ptr %9, align 8, !tbaa !5
  %21 = xor i64 %20, -1
  store i64 %21, ptr %9, align 8, !tbaa !5
  br label %22

22:                                               ; preds = %19, %5
  %23 = load i64, ptr %6, align 8, !tbaa !5
  %24 = load i64, ptr %8, align 8, !tbaa !5
  %25 = load ptr, ptr %10, align 8, !tbaa !9
  %26 = getelementptr inbounds %struct.pcg32x2_random, ptr %25, i32 0, i32 0
  %27 = getelementptr inbounds [2 x %struct.pcg32_random], ptr %26, i64 0, i64 0
  call void @pcg32_srandom_r(i64 noundef %23, i64 noundef %24, ptr noundef %27)
  %28 = load i64, ptr %7, align 8, !tbaa !5
  %29 = load i64, ptr %9, align 8, !tbaa !5
  %30 = load ptr, ptr %10, align 8, !tbaa !9
  %31 = getelementptr inbounds %struct.pcg32x2_random, ptr %30, i32 0, i32 0
  %32 = getelementptr inbounds [2 x %struct.pcg32_random], ptr %31, i64 0, i64 1
  call void @pcg32_srandom_r(i64 noundef %28, i64 noundef %29, ptr noundef %32)
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #2
  ret void
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
declare dso_local void @pcg32_srandom_r(i64 noundef, i64 noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @pcg32x2_srandom_r(i64 noundef %0, i64 noundef %1, i64 noundef %2, i64 noundef %3, ptr noundef %4) local_unnamed_addr #0 {
  %6 = xor i64 %3, %2
  %7 = and i64 %6, 9223372036854775807
  %8 = icmp eq i64 %7, 0
  %9 = sext i1 %8 to i64
  %spec.select = xor i64 %9, %3
  tail call void @pcg32_srandom_r(i64 noundef %0, i64 noundef %2, ptr noundef %4)
  %10 = getelementptr inbounds i8, ptr %4, i64 16
  tail call void @pcg32_srandom_r(i64 noundef %1, i64 noundef %spec.select, ptr noundef nonnull %10)
  ret void
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass