; LLVM IR from huawei-noah/bolt :: compute/tensor/src/cpu (split)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.TensorDesc = type { i32, i32, i32, [20 x i32] }

@.str = external hidden unnamed_addr constant [20 x i8], align 1
@stdout = external global ptr, align 8
@.str.1 = external hidden unnamed_addr constant [18 x i8], align 1

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z9split_cpu10TensorDescPvSt6vectorIS_SaIS_EEPS1_IS0_SaIS0_EE(ptr noundef byval(%struct.TensorDesc) align 8 %0, ptr noundef %1, ptr noundef %2, ptr noundef %3) #0 {
  %5 = alloca i32, align 4
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca %struct.TensorDesc, align 8
  store ptr %1, ptr %6, align 8, !tbaa !5
  store ptr %2, ptr %7, align 8, !tbaa !5
  store ptr %3, ptr %8, align 8, !tbaa !5
  %15 = load ptr, ptr %6, align 8, !tbaa !5
  %16 = icmp eq ptr null, %15
  br i1 %16, label %20, label %17

17:                                               ; preds = %4
  %18 = load ptr, ptr %8, align 8, !tbaa !5
  %19 = icmp eq ptr null, %18
  br i1 %19, label %20, label %36

20:                                               ; preds = %17, %4
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #9
  store i32 1, ptr %9, align 4, !tbaa !9
  %21 = load i32, ptr %9, align 4, !tbaa !9
  %22 = icmp ne i32 %21, 0
  br i1 %22, label %23, label %35

23:                                               ; preds = %20
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #9
  %24 = call i64 (i64, ...) @syscall(i64 noundef 186) #9
  %25 = trunc i64 %24 to i32
  store i32 %25, ptr %10, align 4, !tbaa !11
  %26 = load i32, ptr %10, align 4, !tbaa !11
  %27 = call i32 (ptr, ...) @printf(ptr noundef @.str, i32 noundef %26)
  %28 = load ptr, ptr @stdout, align 8, !tbaa !5
  %29 = call i32 @fflush(ptr noundef %28)
  %30 = load i32, ptr %9, align 4, !tbaa !9
  %31 = call ptr @ee2str(i32 noundef %30)
  %32 = call i32 (ptr, ...) @printf(ptr noundef @.str.1, ptr noundef %31)
  %33 = load ptr, ptr @stdout, align 8, !tbaa !5
  %34 = call i32 @fflush(ptr noundef %33)
  call void @exit(i32 noundef 1) #10
  unreachable

35:                                               ; preds = %20
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #9
  br label %36

36:                                               ; preds = %35, %17
  %37 = call noundef i64 @_ZNKSt6vectorI10TensorDescSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %2) #9
  %38 = icmp ule i64 %37, 1
  br i1 %38, label %39, label %40

39:                                               ; preds = %36
  store i32 2, ptr %5, align 4
  br label %87

40:                                               ; preds = %36
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #9
  store i32 0, ptr %11, align 4, !tbaa !11
  br label %41

41:                                               ; preds = %83, %40
  %42 = load i32, ptr %11, align 4, !tbaa !11
  %43 = zext i32 %42 to i64
  %44 = load ptr, ptr %8, align 8, !tbaa !5
  %45 = call noundef i64 @_ZNKSt6vectorIPvSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %44) #9
  %46 = icmp ult i64 %43, %45
  br i1 %46, label %48, label %47

47:                                               ; preds = %41
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #9
  br label %86

48:                                               ; preds = %41
  %49 = load ptr, ptr %8, align 8, !tbaa !5
  %50 = load i32, ptr %11, align 4, !tbaa !11
  %51 = zext i32 %50 to i64
  %52 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPvSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %49, i64 noundef %51) #9
  %53 = load ptr, ptr %52, align 8, !tbaa !5
  %54 = icmp eq ptr null, %53
  br i1 %54, label %55, label %71

55:                                               ; preds = %48
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #9
  store i32 1, ptr %12, align 4, !tbaa !9
  %56 = load i32, ptr %12, align 4, !tbaa !9
  %57 = icmp ne i32 %56, 0
  br i1 %57, label %58, label %70

58:                                               ; preds = %55
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #9
  %59 = call i64 (i64, ...) @syscall(i64 noundef 186) #9
  %60 = trunc i64 %59 to i32
  store i32 %60, ptr %13, align 4, !tbaa !11
  %61 = load i32, ptr %13, align 4, !tbaa !11
  %62 = call i32 (ptr, ...) @printf(ptr noundef @.str, i32 noundef %61)
  %63 = load ptr, ptr @stdout, align 8, !tbaa !5
  %64 = call i32 @fflush(ptr noundef %63)
  %65 = load i32, ptr %12, align 4, !tbaa !9
  %66 = call ptr @ee2str(i32 noundef %65)
  %67 = call i32 (ptr, ...) @printf(ptr noundef @.str.1, ptr noundef %66)
  %68 = load ptr, ptr @stdout, align 8, !tbaa !5
  %69 = call i32 @fflush(ptr noundef %68)
  call void @exit(i32 noundef 1) #10
  unreachable

70:                                               ; preds = %55
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #9
  br label %71

71:                                               ; preds = %70, %48
  %72 = load ptr, ptr %8, align 8, !tbaa !5
  %73 = load i32, ptr %11, align 4, !tbaa !11
  %74 = zext i32 %73 to i64
  %75 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPvSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %72, i64 noundef %74) #9
  %76 = load ptr, ptr %75, align 8, !tbaa !5
  %77 = load ptr, ptr %6, align 8, !tbaa !5
  %78 = load i32, ptr %11, align 4, !tbaa !11
  %79 = zext i32 %78 to i64
  %80 = call noundef nonnull align 4 dereferenceable(92) ptr @_ZNSt6vectorI10TensorDescSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %79) #9
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %14, ptr align 4 %80, i64 92, i1 false), !tbaa.struct !13
  %81 = call noundef i32 @_Z14tensorNumBytes10TensorDesc(ptr noundef byval(%struct.TensorDesc) align 8 %14)
  %82 = zext i32 %81 to i64
  call void @_Z10UNI_MEMCPYPvPKvm(ptr noundef %76, ptr noundef %77, i64 noundef %82)
  br label %83

83:                                               ; preds = %71
  %84 = load i32, ptr %11, align 4, !tbaa !11
  %85 = add i32 %84, 1
  store i32 %85, ptr %11, align 4, !tbaa !11
  br label %41, !llvm.loop !19

86:                                               ; preds = %47
  store i32 0, ptr %5, align 4
  br label %87

87:                                               ; preds = %86, %39
  %88 = load i32, ptr %5, align 4
  ret i32 %88
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind
declare i64 @syscall(i64 noundef, ...) #2

declare i32 @printf(ptr noundef, ...) #3

declare i32 @fflush(ptr noundef) #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local ptr @ee2str(i32 noundef) #4

; Function Attrs: noreturn nounwind
declare void @exit(i32 noundef) #5

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorI10TensorDescSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #6 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIPvSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #6 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPvSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #6 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_Z10UNI_MEMCPYPvPKvm(ptr noundef, ptr noundef, i64 noundef) #7

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef i32 @_Z14tensorNumBytes10TensorDesc(ptr noundef byval(%struct.TensorDesc) align 8) #7

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(92) ptr @_ZNSt6vectorI10TensorDescSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #6 align 2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #8

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #8 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #9 = { nounwind }
attributes #10 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"_ZTS2EE", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{i64 0, i64 4, !14, i64 4, i64 4, !16, i64 8, i64 4, !11, i64 12, i64 80, !18}
!14 = !{!15, !15, i64 0}
!15 = !{!"_ZTS8DataType", !7, i64 0}
!16 = !{!17, !17, i64 0}
!17 = !{!"_ZTS10DataFormat", !7, i64 0}
!18 = !{!7, !7, i64 0}
!19 = distinct !{!19, !20}
!20 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.TensorDesc = type { i32, i32, i32, [20 x i32] }

@.str = external hidden unnamed_addr constant [20 x i8], align 1
@stdout = external local_unnamed_addr global ptr, align 8
@.str.1 = external hidden unnamed_addr constant [18 x i8], align 1

; Function Attrs: mustprogress uwtable
define dso_local noundef range(i32 0, 3) i32 @_Z9split_cpu10TensorDescPvSt6vectorIS_SaIS_EEPS1_IS0_SaIS0_EE(ptr nocapture noundef readnone byval(%struct.TensorDesc) align 8 %0, ptr noundef %1, ptr noundef %2, ptr noundef %3) local_unnamed_addr #0 {
  %5 = alloca %struct.TensorDesc, align 8
  %6 = icmp eq ptr %1, null
  %7 = icmp eq ptr %3, null
  %or.cond = or i1 %6, %7
  br i1 %or.cond, label %8, label %18

8:                                                ; preds = %4
  %9 = tail call i64 (i64, ...) @syscall(i64 noundef 186) #8
  %10 = trunc i64 %9 to i32
  %11 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str, i32 noundef %10)
  %12 = load ptr, ptr @stdout, align 8, !tbaa !5
  %13 = tail call i32 @fflush(ptr noundef %12)
  %14 = tail call ptr @ee2str(i32 noundef 1)
  %15 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.1, ptr noundef %14)
  %16 = load ptr, ptr @stdout, align 8, !tbaa !5
  %17 = tail call i32 @fflush(ptr noundef %16)
  tail call void @exit(i32 noundef 1) #9
  unreachable

18:                                               ; preds = %4
  %19 = tail call noundef i64 @_ZNKSt6vectorI10TensorDescSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %2) #8
  %20 = icmp ult i64 %19, 2
  br i1 %20, label %.loopexit, label %.preheader

.preheader:                                       ; preds = %18
  %21 = tail call noundef i64 @_ZNKSt6vectorIPvSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %3) #8
  %.not = icmp eq i64 %21, 0
  br i1 %.not, label %.loopexit, label %.lr.ph

.lr.ph:                                           ; preds = %.preheader, %36
  %22 = phi i64 [ %43, %36 ], [ 0, %.preheader ]
  %.01820 = phi i32 [ %42, %36 ], [ 0, %.preheader ]
  %23 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPvSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %22) #8
  %24 = load ptr, ptr %23, align 8, !tbaa !5
  %25 = icmp eq ptr %24, null
  br i1 %25, label %26, label %36

26:                                               ; preds = %.lr.ph
  %27 = tail call i64 (i64, ...) @syscall(i64 noundef 186) #8
  %28 = trunc i64 %27 to i32
  %29 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str, i32 noundef %28)
  %30 = load ptr, ptr @stdout, align 8, !tbaa !5
  %31 = tail call i32 @fflush(ptr noundef %30)
  %32 = tail call ptr @ee2str(i32 noundef 1)
  %33 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.1, ptr noundef %32)
  %34 = load ptr, ptr @stdout, align 8, !tbaa !5
  %35 = tail call i32 @fflush(ptr noundef %34)
  tail call void @exit(i32 noundef 1) #9
  unreachable

36:                                               ; preds = %.lr.ph
  %37 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPvSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %22) #8
  %38 = load ptr, ptr %37, align 8, !tbaa !5
  %39 = tail call noundef nonnull align 4 dereferenceable(92) ptr @_ZNSt6vectorI10TensorDescSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %22) #8
  call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 8 dereferenceable(92) %5, ptr noundef nonnull align 4 dereferenceable(92) %39, i64 92, i1 false), !tbaa.struct !9
  %40 = tail call noundef i32 @_Z14tensorNumBytes10TensorDesc(ptr noundef nonnull byval(%struct.TensorDesc) align 8 %5)
  %41 = zext i32 %40 to i64
  tail call void @_Z10UNI_MEMCPYPvPKvm(ptr noundef %38, ptr noundef %1, i64 noundef %41)
  %42 = add i32 %.01820, 1
  %43 = zext i32 %42 to i64
  %44 = tail call noundef i64 @_ZNKSt6vectorIPvSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %3) #8
  %45 = icmp ugt i64 %44, %43
  br i1 %45, label %.lr.ph, label %.loopexit, !llvm.loop !17

.loopexit:                                        ; preds = %36, %.preheader, %18
  %.0 = phi i32 [ 2, %18 ], [ 0, %.preheader ], [ 0, %36 ]
  ret i32 %.0
}

; Function Attrs: nounwind
declare i64 @syscall(i64 noundef, ...) local_unnamed_addr #1

; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #2

; Function Attrs: nofree nounwind
declare noundef i32 @fflush(ptr nocapture noundef) local_unnamed_addr #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local ptr @ee2str(i32 noundef) local_unnamed_addr #3

; Function Attrs: noreturn nounwind
declare void @exit(i32 noundef) local_unnamed_addr #4

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorI10TensorDescSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #5 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIPvSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #5 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPvSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #5 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_Z10UNI_MEMCPYPvPKvm(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #6

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef i32 @_Z14tensorNumBytes10TensorDesc(ptr noundef byval(%struct.TensorDesc) align 8) local_unnamed_addr #6

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(92) ptr @_ZNSt6vectorI10TensorDescSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #5 align 2

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #7

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #8 = { nounwind }
attributes #9 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{i64 0, i64 4, !10, i64 4, i64 4, !12, i64 8, i64 4, !14, i64 12, i64 80, !16}
!10 = !{!11, !11, i64 0}
!11 = !{!"_ZTS8DataType", !7, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"_ZTS10DataFormat", !7, i64 0}
!14 = !{!15, !15, i64 0}
!15 = !{!"int", !7, i64 0}
!16 = !{!7, !7, i64 0}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass