; LLVM IR from huawei-noah/bolt :: compute/tensor/src/attention_mask.ll (Z32attention_mask_infer_output_sizeP6TensorS0_)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.TensorDesc = type { i32, i32, i32, [20 x i32] }

@.str = external hidden unnamed_addr constant [20 x i8], align 1
@stdout = external global ptr, align 8
@.str.1 = external hidden unnamed_addr constant [18 x i8], align 1

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN6Tensor8get_descEv(ptr dead_on_unwind noalias writable sret(%struct.TensorDesc) align 4, ptr noundef nonnull align 8 dereferenceable(32)) #2 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z32attention_mask_infer_output_sizeP6TensorS0_(ptr noundef %0, ptr noundef %1) #2 {
  %3 = alloca i32, align 4
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca %struct.TensorDesc, align 4
  %11 = alloca i32, align 4
  %12 = alloca %struct.TensorDesc, align 8
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  %13 = load ptr, ptr %4, align 8, !tbaa !5
  %14 = icmp eq ptr %13, null
  br i1 %14, label %15, label %31

15:                                               ; preds = %2
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #7
  store i32 1, ptr %6, align 4, !tbaa !9
  %16 = load i32, ptr %6, align 4, !tbaa !9
  %17 = icmp ne i32 %16, 0
  br i1 %17, label %18, label %30

18:                                               ; preds = %15
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #7
  %19 = call i64 (i64, ...) @syscall(i64 noundef 186) #7
  %20 = trunc i64 %19 to i32
  store i32 %20, ptr %7, align 4, !tbaa !11
  %21 = load i32, ptr %7, align 4, !tbaa !11
  %22 = call i32 (ptr, ...) @printf(ptr noundef @.str, i32 noundef %21)
  %23 = load ptr, ptr @stdout, align 8, !tbaa !5
  %24 = call i32 @fflush(ptr noundef %23)
  %25 = load i32, ptr %6, align 4, !tbaa !9
  %26 = call ptr @ee2str(i32 noundef %25)
  %27 = call i32 (ptr, ...) @printf(ptr noundef @.str.1, ptr noundef %26)
  %28 = load ptr, ptr @stdout, align 8, !tbaa !5
  %29 = call i32 @fflush(ptr noundef %28)
  call void @exit(i32 noundef 1) #8
  unreachable

30:                                               ; preds = %15
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #7
  br label %31

31:                                               ; preds = %30, %2
  %32 = load ptr, ptr %5, align 8, !tbaa !5
  %33 = icmp eq ptr %32, null
  br i1 %33, label %34, label %50

34:                                               ; preds = %31
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #7
  store i32 1, ptr %8, align 4, !tbaa !9
  %35 = load i32, ptr %8, align 4, !tbaa !9
  %36 = icmp ne i32 %35, 0
  br i1 %36, label %37, label %49

37:                                               ; preds = %34
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #7
  %38 = call i64 (i64, ...) @syscall(i64 noundef 186) #7
  %39 = trunc i64 %38 to i32
  store i32 %39, ptr %9, align 4, !tbaa !11
  %40 = load i32, ptr %9, align 4, !tbaa !11
  %41 = call i32 (ptr, ...) @printf(ptr noundef @.str, i32 noundef %40)
  %42 = load ptr, ptr @stdout, align 8, !tbaa !5
  %43 = call i32 @fflush(ptr noundef %42)
  %44 = load i32, ptr %8, align 4, !tbaa !9
  %45 = call ptr @ee2str(i32 noundef %44)
  %46 = call i32 (ptr, ...) @printf(ptr noundef @.str.1, ptr noundef %45)
  %47 = load ptr, ptr @stdout, align 8, !tbaa !5
  %48 = call i32 @fflush(ptr noundef %47)
  call void @exit(i32 noundef 1) #8
  unreachable

49:                                               ; preds = %34
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #7
  br label %50

50:                                               ; preds = %49, %31
  call void @llvm.lifetime.start.p0(i64 92, ptr %10) #7
  %51 = load ptr, ptr %4, align 8, !tbaa !5
  call void @_ZN6Tensor8get_descEv(ptr dead_on_unwind writable sret(%struct.TensorDesc) align 4 %10, ptr noundef nonnull align 8 dereferenceable(32) %51)
  %52 = getelementptr inbounds %struct.TensorDesc, ptr %10, i32 0, i32 2
  %53 = load i32, ptr %52, align 4, !tbaa !13
  %54 = icmp ult i32 %53, 2
  br i1 %54, label %55, label %56

55:                                               ; preds = %50
  store i32 2, ptr %3, align 4
  store i32 1, ptr %11, align 4
  br label %58

56:                                               ; preds = %50
  %57 = load ptr, ptr %5, align 8, !tbaa !5
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %12, ptr align 4 %10, i64 92, i1 false), !tbaa.struct !17
  call void @_ZN6Tensor6resizeE10TensorDesc(ptr noundef nonnull align 8 dereferenceable(32) %57, ptr noundef byval(%struct.TensorDesc) align 8 %12)
  store i32 0, ptr %3, align 4
  store i32 1, ptr %11, align 4
  br label %58

58:                                               ; preds = %56, %55
  call void @llvm.lifetime.end.p0(i64 92, ptr %10) #7
  %59 = load i32, ptr %3, align 4
  ret i32 %59
}

; Function Attrs: nounwind
declare i64 @syscall(i64 noundef, ...) #3

declare i32 @printf(ptr noundef, ...) #4

declare i32 @fflush(ptr noundef) #4

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local ptr @ee2str(i32 noundef) #5

; Function Attrs: noreturn nounwind
declare void @exit(i32 noundef) #6

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN6Tensor6resizeE10TensorDesc(ptr noundef nonnull align 8 dereferenceable(32), ptr noundef byval(%struct.TensorDesc) align 8) #2 align 2

attributes #0 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { nounwind }
attributes #8 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"_ZTS2EE", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!14, !12, i64 8}
!14 = !{!"_ZTS10TensorDesc", !15, i64 0, !16, i64 4, !12, i64 8, !7, i64 12}
!15 = !{!"_ZTS8DataType", !7, i64 0}
!16 = !{!"_ZTS10DataFormat", !7, i64 0}
!17 = !{i64 0, i64 4, !18, i64 4, i64 4, !19, i64 8, i64 4, !11, i64 12, i64 80, !20}
!18 = !{!15, !15, i64 0}
!19 = !{!16, !16, i64 0}
!20 = !{!7, !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.TensorDesc = type { i32, i32, i32, [20 x i32] }

@.str = external hidden unnamed_addr constant [20 x i8], align 1
@stdout = external local_unnamed_addr global ptr, align 8
@.str.1 = external hidden unnamed_addr constant [18 x i8], align 1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN6Tensor8get_descEv(ptr dead_on_unwind noalias writable sret(%struct.TensorDesc) align 4, ptr noundef nonnull align 8 dereferenceable(32)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local noundef range(i32 0, 3) i32 @_Z32attention_mask_infer_output_sizeP6TensorS0_(ptr noundef %0, ptr noundef %1) local_unnamed_addr #1 {
  %3 = alloca %struct.TensorDesc, align 8
  %4 = icmp eq ptr %0, null
  br i1 %4, label %5, label %15

5:                                                ; preds = %2
  %6 = tail call i64 (i64, ...) @syscall(i64 noundef 186) #6
  %7 = trunc i64 %6 to i32
  %8 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str, i32 noundef %7)
  %9 = load ptr, ptr @stdout, align 8, !tbaa !5
  %10 = tail call i32 @fflush(ptr noundef %9)
  %11 = tail call ptr @ee2str(i32 noundef 1)
  %12 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.1, ptr noundef %11)
  %13 = load ptr, ptr @stdout, align 8, !tbaa !5
  %14 = tail call i32 @fflush(ptr noundef %13)
  tail call void @exit(i32 noundef 1) #7
  unreachable

15:                                               ; preds = %2
  %16 = icmp eq ptr %1, null
  br i1 %16, label %17, label %27

17:                                               ; preds = %15
  %18 = tail call i64 (i64, ...) @syscall(i64 noundef 186) #6
  %19 = trunc i64 %18 to i32
  %20 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str, i32 noundef %19)
  %21 = load ptr, ptr @stdout, align 8, !tbaa !5
  %22 = tail call i32 @fflush(ptr noundef %21)
  %23 = tail call ptr @ee2str(i32 noundef 1)
  %24 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.1, ptr noundef %23)
  %25 = load ptr, ptr @stdout, align 8, !tbaa !5
  %26 = tail call i32 @fflush(ptr noundef %25)
  tail call void @exit(i32 noundef 1) #7
  unreachable

27:                                               ; preds = %15
  call void @llvm.lifetime.start.p0(i64 92, ptr nonnull %3) #6
  call void @_ZN6Tensor8get_descEv(ptr dead_on_unwind nonnull writable sret(%struct.TensorDesc) align 4 %3, ptr noundef nonnull align 8 dereferenceable(32) %0)
  %28 = getelementptr inbounds i8, ptr %3, i64 8
  %29 = load i32, ptr %28, align 8, !tbaa !9
  %30 = icmp ult i32 %29, 2
  br i1 %30, label %32, label %31

31:                                               ; preds = %27
  call void @_ZN6Tensor6resizeE10TensorDesc(ptr noundef nonnull align 8 dereferenceable(32) %1, ptr noundef nonnull byval(%struct.TensorDesc) align 8 %3)
  br label %32

32:                                               ; preds = %27, %31
  %.0 = phi i32 [ 0, %31 ], [ 2, %27 ]
  call void @llvm.lifetime.end.p0(i64 92, ptr nonnull %3) #6
  ret i32 %.0
}

; Function Attrs: nounwind
declare i64 @syscall(i64 noundef, ...) local_unnamed_addr #2

; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #3

; Function Attrs: nofree nounwind
declare noundef i32 @fflush(ptr nocapture noundef) local_unnamed_addr #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local ptr @ee2str(i32 noundef) local_unnamed_addr #4

; Function Attrs: noreturn nounwind
declare void @exit(i32 noundef) local_unnamed_addr #5

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN6Tensor6resizeE10TensorDesc(ptr noundef nonnull align 8 dereferenceable(32), ptr noundef byval(%struct.TensorDesc) align 8) local_unnamed_addr #1 align 2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind }
attributes #7 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !13, i64 8}
!10 = !{!"_ZTS10TensorDesc", !11, i64 0, !12, i64 4, !13, i64 8, !7, i64 12}
!11 = !{!"_ZTS8DataType", !7, i64 0}
!12 = !{!"_ZTS10DataFormat", !7, i64 0}
!13 = !{!"int", !7, i64 0}


; Effective O3 passes: DSEPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,MemCpyOptPass,SROAPass,SimplifyCFGPass,TailCallElimPass