; LLVM IR from trustwallet/wallet-core :: trezor-crypto/crypto (nem)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.nem_transaction_ctx = type { [32 x i8], ptr, i64, i64 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local zeroext i1 @nem_transaction_write_common(ptr noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, i64 noundef, i32 noundef) #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden zeroext i1 @nem_write_u32(ptr noundef, i32 noundef) #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden zeroext i1 @nem_write_tagged(ptr noundef, ptr noundef, i32 noundef) #2

; Function Attrs: nounwind uwtable
define dso_local zeroext i1 @nem_transaction_create_importance_transfer(ptr noundef %0, i8 noundef zeroext %1, i32 noundef %2, ptr noundef %3, i64 noundef %4, i32 noundef %5, i32 noundef %6, ptr noundef %7) #1 {
  %9 = alloca i1, align 1
  %10 = alloca ptr, align 8
  %11 = alloca i8, align 1
  %12 = alloca i32, align 4
  %13 = alloca ptr, align 8
  %14 = alloca i64, align 8
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca ptr, align 8
  %18 = alloca i8, align 1
  %19 = alloca i32, align 4
  store ptr %0, ptr %10, align 8, !tbaa !5
  store i8 %1, ptr %11, align 1, !tbaa !9
  store i32 %2, ptr %12, align 4, !tbaa !10
  store ptr %3, ptr %13, align 8, !tbaa !5
  store i64 %4, ptr %14, align 8, !tbaa !12
  store i32 %5, ptr %15, align 4, !tbaa !10
  store i32 %6, ptr %16, align 4, !tbaa !10
  store ptr %7, ptr %17, align 8, !tbaa !5
  %20 = load ptr, ptr %13, align 8, !tbaa !5
  %21 = icmp ne ptr %20, null
  br i1 %21, label %26, label %22

22:                                               ; preds = %8
  %23 = load ptr, ptr %10, align 8, !tbaa !5
  %24 = getelementptr inbounds %struct.nem_transaction_ctx, ptr %23, i32 0, i32 0
  %25 = getelementptr inbounds [32 x i8], ptr %24, i64 0, i64 0
  store ptr %25, ptr %13, align 8, !tbaa !5
  br label %26

26:                                               ; preds = %22, %8
  call void @llvm.lifetime.start.p0(i64 1, ptr %18) #3
  %27 = load ptr, ptr %10, align 8, !tbaa !5
  %28 = load i8, ptr %11, align 1, !tbaa !9
  %29 = zext i8 %28 to i32
  %30 = shl i32 %29, 24
  %31 = or i32 %30, 1
  %32 = load i32, ptr %12, align 4, !tbaa !10
  %33 = load ptr, ptr %13, align 8, !tbaa !5
  %34 = load i64, ptr %14, align 8, !tbaa !12
  %35 = load i32, ptr %15, align 4, !tbaa !10
  %36 = call zeroext i1 @nem_transaction_write_common(ptr noundef %27, i32 noundef 2049, i32 noundef %31, i32 noundef %32, ptr noundef %33, i64 noundef %34, i32 noundef %35)
  %37 = zext i1 %36 to i8
  store i8 %37, ptr %18, align 1, !tbaa !14
  %38 = load i8, ptr %18, align 1, !tbaa !14, !range !16, !noundef !17
  %39 = trunc i8 %38 to i1
  br i1 %39, label %41, label %40

40:                                               ; preds = %26
  store i1 false, ptr %9, align 1
  store i32 1, ptr %19, align 4
  br label %58

41:                                               ; preds = %26
  br label %42

42:                                               ; preds = %41
  %43 = load ptr, ptr %10, align 8, !tbaa !5
  %44 = load i32, ptr %16, align 4, !tbaa !10
  %45 = call zeroext i1 @nem_write_u32(ptr noundef %43, i32 noundef %44)
  br i1 %45, label %47, label %46

46:                                               ; preds = %42
  store i1 false, ptr %9, align 1
  store i32 1, ptr %19, align 4
  br label %58

47:                                               ; preds = %42
  br label %48

48:                                               ; preds = %47
  br label %49

49:                                               ; preds = %48
  br label %50

50:                                               ; preds = %49
  %51 = load ptr, ptr %10, align 8, !tbaa !5
  %52 = load ptr, ptr %17, align 8, !tbaa !5
  %53 = call zeroext i1 @nem_write_tagged(ptr noundef %51, ptr noundef %52, i32 noundef 32)
  br i1 %53, label %55, label %54

54:                                               ; preds = %50
  store i1 false, ptr %9, align 1
  store i32 1, ptr %19, align 4
  br label %58

55:                                               ; preds = %50
  br label %56

56:                                               ; preds = %55
  br label %57

57:                                               ; preds = %56
  store i1 true, ptr %9, align 1
  store i32 1, ptr %19, align 4
  br label %58

58:                                               ; preds = %57, %54, %46, %40
  call void @llvm.lifetime.end.p0(i64 1, ptr %18) #3
  %59 = load i1, ptr %9, align 1
  ret i1 %59
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !7, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"long", !7, i64 0}
!14 = !{!15, !15, i64 0}
!15 = !{!"_Bool", !7, i64 0}
!16 = !{i8 0, i8 2}
!17 = !{}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
declare dso_local zeroext i1 @nem_transaction_write_common(ptr noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, i64 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: inlinehint nounwind uwtable
declare hidden zeroext i1 @nem_write_u32(ptr noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden zeroext i1 @nem_write_tagged(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local zeroext i1 @nem_transaction_create_importance_transfer(ptr noundef %0, i8 noundef zeroext %1, i32 noundef %2, ptr noundef %3, i64 noundef %4, i32 noundef %5, i32 noundef %6, ptr noundef %7) local_unnamed_addr #0 {
  %.not = icmp eq ptr %3, null
  %spec.select = select i1 %.not, ptr %0, ptr %3
  %9 = zext i8 %1 to i32
  %10 = shl nuw i32 %9, 24
  %11 = or disjoint i32 %10, 1
  %12 = tail call zeroext i1 @nem_transaction_write_common(ptr noundef %0, i32 noundef 2049, i32 noundef %11, i32 noundef %2, ptr noundef %spec.select, i64 noundef %4, i32 noundef %5)
  br i1 %12, label %13, label %17

13:                                               ; preds = %8
  %14 = tail call zeroext i1 @nem_write_u32(ptr noundef %0, i32 noundef %6)
  br i1 %14, label %15, label %17

15:                                               ; preds = %13
  %16 = tail call zeroext i1 @nem_write_tagged(ptr noundef %0, ptr noundef %7, i32 noundef 32)
  br label %17

17:                                               ; preds = %15, %13, %8
  %.0 = phi i1 [ false, %8 ], [ false, %13 ], [ %16, %15 ]
  ret i1 %.0
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass