; LLVM IR from huawei-noah/bolt :: compute/tensor/src/select.ll (Z24select_infer_output_sizeP6TensorS0_P8ArchInfo)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.TensorDesc = type { i32, i32, i32, [20 x i32] }
%struct.ArchInfo = type { i32, ptr }

@.str = external hidden unnamed_addr constant [20 x i8], align 1
@stdout = external global ptr, align 8
@.str.2 = external hidden unnamed_addr constant [18 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN6Tensor8get_descEv(ptr dead_on_unwind noalias writable sret(%struct.TensorDesc) align 4, ptr noundef nonnull align 8 dereferenceable(32)) #1 align 2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2

; Function Attrs: nounwind
declare i64 @syscall(i64 noundef, ...) #3

declare i32 @printf(ptr noundef, ...) #4

declare i32 @fflush(ptr noundef) #4

; Function Attrs: noreturn nounwind
declare void @exit(i32 noundef) #5

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z24select_infer_output_sizeP6TensorS0_P8ArchInfo(ptr noundef %0, ptr noundef %1, ptr noundef %2) #1 {
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca %struct.TensorDesc, align 4
  %12 = alloca %struct.TensorDesc, align 4
  %13 = alloca i32, align 4
  %14 = alloca %struct.TensorDesc, align 8
  %15 = alloca %struct.TensorDesc, align 8
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  store ptr %2, ptr %6, align 8, !tbaa !5
  %16 = load ptr, ptr %4, align 8, !tbaa !5
  %17 = icmp eq ptr %16, null
  br i1 %17, label %18, label %34

18:                                               ; preds = %3
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #8
  store i32 1, ptr %7, align 4, !tbaa !9
  %19 = load i32, ptr %7, align 4, !tbaa !9
  %20 = icmp ne i32 %19, 0
  br i1 %20, label %21, label %33

21:                                               ; preds = %18
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #8
  %22 = call i64 (i64, ...) @syscall(i64 noundef 186) #8
  %23 = trunc i64 %22 to i32
  store i32 %23, ptr %8, align 4, !tbaa !11
  %24 = load i32, ptr %8, align 4, !tbaa !11
  %25 = call i32 (ptr, ...) @printf(ptr noundef @.str, i32 noundef %24)
  %26 = load ptr, ptr @stdout, align 8, !tbaa !5
  %27 = call i32 @fflush(ptr noundef %26)
  %28 = load i32, ptr %7, align 4, !tbaa !9
  %29 = call ptr @ee2str(i32 noundef %28)
  %30 = call i32 (ptr, ...) @printf(ptr noundef @.str.2, ptr noundef %29)
  %31 = load ptr, ptr @stdout, align 8, !tbaa !5
  %32 = call i32 @fflush(ptr noundef %31)
  call void @exit(i32 noundef 1) #9
  unreachable

33:                                               ; preds = %18
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #8
  br label %34

34:                                               ; preds = %33, %3
  %35 = load ptr, ptr %5, align 8, !tbaa !5
  %36 = icmp eq ptr %35, null
  br i1 %36, label %37, label %53

37:                                               ; preds = %34
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #8
  store i32 1, ptr %9, align 4, !tbaa !9
  %38 = load i32, ptr %9, align 4, !tbaa !9
  %39 = icmp ne i32 %38, 0
  br i1 %39, label %40, label %52

40:                                               ; preds = %37
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #8
  %41 = call i64 (i64, ...) @syscall(i64 noundef 186) #8
  %42 = trunc i64 %41 to i32
  store i32 %42, ptr %10, align 4, !tbaa !11
  %43 = load i32, ptr %10, align 4, !tbaa !11
  %44 = call i32 (ptr, ...) @printf(ptr noundef @.str, i32 noundef %43)
  %45 = load ptr, ptr @stdout, align 8, !tbaa !5
  %46 = call i32 @fflush(ptr noundef %45)
  %47 = load i32, ptr %9, align 4, !tbaa !9
  %48 = call ptr @ee2str(i32 noundef %47)
  %49 = call i32 (ptr, ...) @printf(ptr noundef @.str.2, ptr noundef %48)
  %50 = load ptr, ptr @stdout, align 8, !tbaa !5
  %51 = call i32 @fflush(ptr noundef %50)
  call void @exit(i32 noundef 1) #9
  unreachable

52:                                               ; preds = %37
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #8
  br label %53

53:                                               ; preds = %52, %34
  call void @llvm.lifetime.start.p0(i64 92, ptr %11) #8
  %54 = load ptr, ptr %4, align 8, !tbaa !5
  call void @_ZN6Tensor8get_descEv(ptr dead_on_unwind writable sret(%struct.TensorDesc) align 4 %11, ptr noundef nonnull align 8 dereferenceable(32) %54)
  call void @llvm.lifetime.start.p0(i64 92, ptr %12) #8
  %55 = load ptr, ptr %5, align 8, !tbaa !5
  call void @_ZN6Tensor8get_descEv(ptr dead_on_unwind writable sret(%struct.TensorDesc) align 4 %12, ptr noundef nonnull align 8 dereferenceable(32) %55)
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #8
  store i32 51, ptr %13, align 4, !tbaa !9
  %56 = load ptr, ptr %6, align 8, !tbaa !5
  %57 = getelementptr inbounds %struct.ArchInfo, ptr %56, i32 0, i32 0
  %58 = load i32, ptr %57, align 8, !tbaa !13
  %59 = icmp eq i32 %58, 1
  br i1 %59, label %105, label %60

60:                                               ; preds = %53
  %61 = load ptr, ptr %6, align 8, !tbaa !5
  %62 = getelementptr inbounds %struct.ArchInfo, ptr %61, i32 0, i32 0
  %63 = load i32, ptr %62, align 8, !tbaa !13
  %64 = icmp eq i32 %63, 8
  br i1 %64, label %105, label %65

65:                                               ; preds = %60
  %66 = load ptr, ptr %6, align 8, !tbaa !5
  %67 = getelementptr inbounds %struct.ArchInfo, ptr %66, i32 0, i32 0
  %68 = load i32, ptr %67, align 8, !tbaa !13
  %69 = icmp eq i32 %68, 9
  br i1 %69, label %105, label %70

70:                                               ; preds = %65
  %71 = load ptr, ptr %6, align 8, !tbaa !5
  %72 = getelementptr inbounds %struct.ArchInfo, ptr %71, i32 0, i32 0
  %73 = load i32, ptr %72, align 8, !tbaa !13
  %74 = icmp eq i32 %73, 10
  br i1 %74, label %105, label %75

75:                                               ; preds = %70
  %76 = load ptr, ptr %6, align 8, !tbaa !5
  %77 = getelementptr inbounds %struct.ArchInfo, ptr %76, i32 0, i32 0
  %78 = load i32, ptr %77, align 8, !tbaa !13
  %79 = icmp eq i32 %78, 9
  br i1 %79, label %105, label %80

80:                                               ; preds = %75
  %81 = load ptr, ptr %6, align 8, !tbaa !5
  %82 = getelementptr inbounds %struct.ArchInfo, ptr %81, i32 0, i32 0
  %83 = load i32, ptr %82, align 8, !tbaa !13
  %84 = icmp eq i32 %83, 10
  br i1 %84, label %105, label %85

85:                                               ; preds = %80
  %86 = load ptr, ptr %6, align 8, !tbaa !5
  %87 = getelementptr inbounds %struct.ArchInfo, ptr %86, i32 0, i32 0
  %88 = load i32, ptr %87, align 8, !tbaa !13
  %89 = icmp eq i32 %88, 5
  br i1 %89, label %105, label %90

90:                                               ; preds = %85
  %91 = load ptr, ptr %6, align 8, !tbaa !5
  %92 = getelementptr inbounds %struct.ArchInfo, ptr %91, i32 0, i32 0
  %93 = load i32, ptr %92, align 8, !tbaa !13
  %94 = icmp eq i32 %93, 6
  br i1 %94, label %105, label %95

95:                                               ; preds = %90
  %96 = load ptr, ptr %6, align 8, !tbaa !5
  %97 = getelementptr inbounds %struct.ArchInfo, ptr %96, i32 0, i32 0
  %98 = load i32, ptr %97, align 8, !tbaa !13
  %99 = icmp eq i32 %98, 4
  br i1 %99, label %105, label %100

100:                                              ; preds = %95
  %101 = load ptr, ptr %6, align 8, !tbaa !5
  %102 = getelementptr inbounds %struct.ArchInfo, ptr %101, i32 0, i32 0
  %103 = load i32, ptr %102, align 8, !tbaa !13
  %104 = icmp eq i32 %103, 3
  br i1 %104, label %105, label %107

105:                                              ; preds = %100, %95, %90, %85, %80, %75, %70, %65, %60, %53
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %14, ptr align 4 %11, i64 92, i1 false), !tbaa.struct !16
  %106 = call noundef i32 @_Z28select_infer_output_size_cpu10TensorDescPS_(ptr noundef byval(%struct.TensorDesc) align 8 %14, ptr noundef %12)
  store i32 %106, ptr %13, align 4, !tbaa !9
  br label %107

107:                                              ; preds = %105, %100
  %108 = load ptr, ptr %5, align 8, !tbaa !5
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %15, ptr align 4 %12, i64 92, i1 false), !tbaa.struct !16
  call void @_ZN6Tensor6resizeE10TensorDesc(ptr noundef nonnull align 8 dereferenceable(32) %108, ptr noundef byval(%struct.TensorDesc) align 8 %15)
  %109 = load i32, ptr %13, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #8
  call void @llvm.lifetime.end.p0(i64 92, ptr %12) #8
  call void @llvm.lifetime.end.p0(i64 92, ptr %11) #8
  ret i32 %109
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local ptr @ee2str(i32 noundef) #6

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef i32 @_Z28select_infer_output_size_cpu10TensorDescPS_(ptr noundef byval(%struct.TensorDesc) align 8, ptr noundef) #7

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN6Tensor6resizeE10TensorDesc(ptr noundef nonnull align 8 dereferenceable(32), ptr noundef byval(%struct.TensorDesc) align 8) #1 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #8 = { nounwind }
attributes #9 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"_ZTS2EE", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!14, !15, i64 0}
!14 = !{!"_ZTS8ArchInfo", !15, i64 0, !6, i64 8}
!15 = !{!"_ZTS4Arch", !7, i64 0}
!16 = !{i64 0, i64 4, !17, i64 4, i64 4, !19, i64 8, i64 4, !11, i64 12, i64 80, !21}
!17 = !{!18, !18, i64 0}
!18 = !{!"_ZTS8DataType", !7, i64 0}
!19 = !{!20, !20, i64 0}
!20 = !{!"_ZTS10DataFormat", !7, i64 0}
!21 = !{!7, !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.TensorDesc = type { i32, i32, i32, [20 x i32] }

@.str = external hidden unnamed_addr constant [20 x i8], align 1
@stdout = external local_unnamed_addr global ptr, align 8
@.str.2 = external hidden unnamed_addr constant [18 x i8], align 1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN6Tensor8get_descEv(ptr dead_on_unwind noalias writable sret(%struct.TensorDesc) align 4, ptr noundef nonnull align 8 dereferenceable(32)) local_unnamed_addr #1 align 2

; Function Attrs: nounwind
declare i64 @syscall(i64 noundef, ...) local_unnamed_addr #2

; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #3

; Function Attrs: nofree nounwind
declare noundef i32 @fflush(ptr nocapture noundef) local_unnamed_addr #3

; Function Attrs: noreturn nounwind
declare void @exit(i32 noundef) local_unnamed_addr #4

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z24select_infer_output_sizeP6TensorS0_P8ArchInfo(ptr noundef %0, ptr noundef %1, ptr nocapture noundef readonly %2) local_unnamed_addr #1 {
  %4 = alloca %struct.TensorDesc, align 8
  %5 = alloca %struct.TensorDesc, align 8
  %6 = icmp eq ptr %0, null
  br i1 %6, label %7, label %17

7:                                                ; preds = %3
  %8 = tail call i64 (i64, ...) @syscall(i64 noundef 186) #7
  %9 = trunc i64 %8 to i32
  %10 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str, i32 noundef %9)
  %11 = load ptr, ptr @stdout, align 8, !tbaa !5
  %12 = tail call i32 @fflush(ptr noundef %11)
  %13 = tail call ptr @ee2str(i32 noundef 1)
  %14 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.2, ptr noundef %13)
  %15 = load ptr, ptr @stdout, align 8, !tbaa !5
  %16 = tail call i32 @fflush(ptr noundef %15)
  tail call void @exit(i32 noundef 1) #8
  unreachable

17:                                               ; preds = %3
  %18 = icmp eq ptr %1, null
  br i1 %18, label %19, label %29

19:                                               ; preds = %17
  %20 = tail call i64 (i64, ...) @syscall(i64 noundef 186) #7
  %21 = trunc i64 %20 to i32
  %22 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str, i32 noundef %21)
  %23 = load ptr, ptr @stdout, align 8, !tbaa !5
  %24 = tail call i32 @fflush(ptr noundef %23)
  %25 = tail call ptr @ee2str(i32 noundef 1)
  %26 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.2, ptr noundef %25)
  %27 = load ptr, ptr @stdout, align 8, !tbaa !5
  %28 = tail call i32 @fflush(ptr noundef %27)
  tail call void @exit(i32 noundef 1) #8
  unreachable

29:                                               ; preds = %17
  call void @llvm.lifetime.start.p0(i64 92, ptr nonnull %4) #7
  call void @_ZN6Tensor8get_descEv(ptr dead_on_unwind nonnull writable sret(%struct.TensorDesc) align 4 %4, ptr noundef nonnull align 8 dereferenceable(32) %0)
  call void @llvm.lifetime.start.p0(i64 92, ptr nonnull %5) #7
  call void @_ZN6Tensor8get_descEv(ptr dead_on_unwind nonnull writable sret(%struct.TensorDesc) align 4 %5, ptr noundef nonnull align 8 dereferenceable(32) %1)
  %30 = load i32, ptr %2, align 8, !tbaa !9
  switch i32 %30, label %33 [
    i32 1, label %31
    i32 8, label %31
    i32 9, label %31
    i32 10, label %31
    i32 5, label %31
    i32 6, label %31
    i32 4, label %31
    i32 3, label %31
  ]

31:                                               ; preds = %29, %29, %29, %29, %29, %29, %29, %29
  %32 = call noundef i32 @_Z28select_infer_output_size_cpu10TensorDescPS_(ptr noundef nonnull byval(%struct.TensorDesc) align 8 %4, ptr noundef nonnull %5)
  br label %33

33:                                               ; preds = %29, %31
  %.0 = phi i32 [ %32, %31 ], [ 51, %29 ]
  call void @_ZN6Tensor6resizeE10TensorDesc(ptr noundef nonnull align 8 dereferenceable(32) %1, ptr noundef nonnull byval(%struct.TensorDesc) align 8 %5)
  call void @llvm.lifetime.end.p0(i64 92, ptr nonnull %5) #7
  call void @llvm.lifetime.end.p0(i64 92, ptr nonnull %4) #7
  ret i32 %.0
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local ptr @ee2str(i32 noundef) local_unnamed_addr #5

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef i32 @_Z28select_infer_output_size_cpu10TensorDescPS_(ptr noundef byval(%struct.TensorDesc) align 8, ptr noundef) local_unnamed_addr #6

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN6Tensor6resizeE10TensorDesc(ptr noundef nonnull align 8 dereferenceable(32), ptr noundef byval(%struct.TensorDesc) align 8) local_unnamed_addr #1 align 2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { nounwind }
attributes #8 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"_ZTS8ArchInfo", !11, i64 0, !6, i64 8}
!11 = !{!"_ZTS4Arch", !7, i64 0}


; Effective O3 passes: DSEPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,MemCpyOptPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass