; LLVM IR from AdaptiveCpp/AdaptiveCpp :: src/runtime/ocl (ocl_hardware_manager)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.cl::Context" = type { %"class.cl::detail::Wrapper" }
%"class.cl::detail::Wrapper" = type { ptr }
%"class.hipsycl::rt::device_id" = type { %"struct.hipsycl::rt::backend_descriptor", i32 }
%"struct.hipsycl::rt::backend_descriptor" = type { i32, i32, i32 }

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNK7hipsycl2rt20ocl_hardware_context14get_cl_contextEv(ptr dead_on_unwind noalias writable sret(%"class.cl::Context") align 8, ptr noundef nonnull align 8 dereferenceable(89)) #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN7hipsycl2rt20ocl_hardware_manager11get_contextENS0_9device_idE(ptr dead_on_unwind noalias writable sret(%"class.cl::Context") align 8 %0, ptr noundef nonnull align 8 dereferenceable(60) %1, i64 %2, i64 %3) #0 align 2 {
  %5 = alloca ptr, align 8
  %6 = alloca %"class.hipsycl::rt::device_id", align 4
  %7 = alloca ptr, align 8
  store ptr %0, ptr %5, align 8
  %8 = getelementptr inbounds { i64, i64 }, ptr %6, i32 0, i32 0
  store i64 %2, ptr %8, align 4
  %9 = getelementptr inbounds { i64, i64 }, ptr %6, i32 0, i32 1
  store i64 %3, ptr %9, align 4
  store ptr %1, ptr %7, align 8, !tbaa !5
  %10 = load ptr, ptr %7, align 8
  %11 = call noundef i32 @_ZNK7hipsycl2rt9device_id6get_idEv(ptr noundef nonnull align 4 dereferenceable(16) %6)
  %12 = sext i32 %11 to i64
  %13 = load ptr, ptr %10, align 8, !tbaa !9
  %14 = getelementptr inbounds ptr, ptr %13, i64 2
  %15 = load ptr, ptr %14, align 8
  %16 = call noundef ptr %15(ptr noundef nonnull align 8 dereferenceable(60) %10, i64 noundef %12)
  call void @_ZNK7hipsycl2rt20ocl_hardware_context14get_cl_contextEv(ptr dead_on_unwind writable sret(%"class.cl::Context") align 8 %0, ptr noundef nonnull align 8 dereferenceable(89) %16)
  ret void
}

declare noundef i32 @_ZNK7hipsycl2rt9device_id6get_idEv(ptr noundef nonnull align 4 dereferenceable(16)) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"vtable pointer", !8, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.cl::Context" = type { %"class.cl::detail::Wrapper" }
%"class.cl::detail::Wrapper" = type { ptr }
%"class.hipsycl::rt::device_id" = type { %"struct.hipsycl::rt::backend_descriptor", i32 }
%"struct.hipsycl::rt::backend_descriptor" = type { i32, i32, i32 }

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNK7hipsycl2rt20ocl_hardware_context14get_cl_contextEv(ptr dead_on_unwind noalias writable sret(%"class.cl::Context") align 8, ptr noundef nonnull align 8 dereferenceable(89)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN7hipsycl2rt20ocl_hardware_manager11get_contextENS0_9device_idE(ptr dead_on_unwind noalias writable sret(%"class.cl::Context") align 8 %0, ptr noundef nonnull align 8 dereferenceable(60) %1, i64 %2, i64 %3) local_unnamed_addr #0 align 2 {
  %5 = alloca %"class.hipsycl::rt::device_id", align 8
  store i64 %2, ptr %5, align 8
  %6 = getelementptr inbounds i8, ptr %5, i64 8
  store i64 %3, ptr %6, align 8
  %7 = call noundef i32 @_ZNK7hipsycl2rt9device_id6get_idEv(ptr noundef nonnull align 4 dereferenceable(16) %5)
  %8 = sext i32 %7 to i64
  %9 = load ptr, ptr %1, align 8, !tbaa !5
  %10 = getelementptr inbounds i8, ptr %9, i64 16
  %11 = load ptr, ptr %10, align 8
  %12 = call noundef ptr %11(ptr noundef nonnull align 8 dereferenceable(60) %1, i64 noundef %8)
  call void @_ZNK7hipsycl2rt20ocl_hardware_context14get_cl_contextEv(ptr dead_on_unwind writable sret(%"class.cl::Context") align 8 %0, ptr noundef nonnull align 8 dereferenceable(89) %12)
  ret void
}

declare noundef i32 @_ZNK7hipsycl2rt9device_id6get_idEv(ptr noundef nonnull align 4 dereferenceable(16)) local_unnamed_addr #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"vtable pointer", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferAlignmentPass,InstCombinePass,SROAPass