; LLVM IR from facebook/redex :: libredex (ControlFlow)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector.11" = type { %"struct.std::_Vector_base.12" }
%"struct.std::_Vector_base.12" = type { %"struct.std::_Vector_base<cfg::Edge *, std::allocator<cfg::Edge *>>::_Vector_impl" }
%"struct.std::_Vector_base<cfg::Edge *, std::allocator<cfg::Edge *>>::_Vector_impl" = type { %"struct.std::_Vector_base<cfg::Edge *, std::allocator<cfg::Edge *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<cfg::Edge *, std::allocator<cfg::Edge *>>::_Vector_impl_data" = type { ptr, ptr, ptr }

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNK3cfg5Block5succsEv(ptr noundef nonnull align 8 dereferenceable(104)) #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIPN3cfg4EdgeESaIS2_EEC2ERKS4_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIPN3cfg4EdgeESaIS2_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNK3cfg5Block5predsEv(ptr noundef nonnull align 8 dereferenceable(104)) #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZNK3cfg5Block17structural_equalsEPKS0_RKSt8functionIFbRK13IRInstructionS6_EE(ptr noundef nonnull align 8 dereferenceable(104), ptr noundef, ptr noundef nonnull align 8 dereferenceable(32)) #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZNK3cfg5Block26extended_structural_equalsEPKS0_RKSt8functionIFbRK13IRInstructionS6_EE(ptr noundef nonnull align 8 dereferenceable(104) %0, ptr noundef %1, ptr noundef nonnull align 8 dereferenceable(32) %2) #1 align 2 personality ptr @__gxx_personality_v0 {
  %4 = alloca i1, align 1
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca %"class.std::vector.11", align 8
  %9 = alloca %"class.std::vector.11", align 8
  %10 = alloca ptr, align 8
  %11 = alloca i32, align 4
  %12 = alloca %"class.std::vector.11", align 8
  %13 = alloca i1, align 1
  %14 = alloca %"class.std::vector.11", align 8
  %15 = alloca i1, align 1
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  store ptr %2, ptr %7, align 8, !tbaa !5
  %16 = load ptr, ptr %5, align 8
  %17 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNK3cfg5Block5predsEv(ptr noundef nonnull align 8 dereferenceable(104) %16)
  call void @_ZNSt6vectorIPN3cfg4EdgeESaIS2_EEC2ERKS4_(ptr noundef nonnull align 8 dereferenceable(24) %8, ptr noundef nonnull align 8 dereferenceable(24) %17)
  %18 = load ptr, ptr %6, align 8, !tbaa !5
  store i1 false, ptr %13, align 1
  store i1 false, ptr %15, align 1
  %19 = invoke noundef nonnull align 8 dereferenceable(24) ptr @_ZNK3cfg5Block5predsEv(ptr noundef nonnull align 8 dereferenceable(104) %18)
          to label %20 unwind label %44

20:                                               ; preds = %3
  invoke void @_ZNSt6vectorIPN3cfg4EdgeESaIS2_EEC2ERKS4_(ptr noundef nonnull align 8 dereferenceable(24) %9, ptr noundef nonnull align 8 dereferenceable(24) %19)
          to label %21 unwind label %44

21:                                               ; preds = %20
  %22 = invoke noundef zeroext i1 @_ZN12_GLOBAL__N_127edge_type_structural_equalsESt6vectorIPN3cfg4EdgeESaIS3_EES5_(ptr noundef %8, ptr noundef %9)
          to label %23 unwind label %48

23:                                               ; preds = %21
  br i1 %22, label %24, label %35

24:                                               ; preds = %23
  %25 = invoke noundef nonnull align 8 dereferenceable(24) ptr @_ZNK3cfg5Block5succsEv(ptr noundef nonnull align 8 dereferenceable(104) %16)
          to label %26 unwind label %48

26:                                               ; preds = %24
  invoke void @_ZNSt6vectorIPN3cfg4EdgeESaIS2_EEC2ERKS4_(ptr noundef nonnull align 8 dereferenceable(24) %12, ptr noundef nonnull align 8 dereferenceable(24) %25)
          to label %27 unwind label %48

27:                                               ; preds = %26
  store i1 true, ptr %13, align 1
  %28 = load ptr, ptr %6, align 8, !tbaa !5
  %29 = invoke noundef nonnull align 8 dereferenceable(24) ptr @_ZNK3cfg5Block5succsEv(ptr noundef nonnull align 8 dereferenceable(104) %28)
          to label %30 unwind label %52

30:                                               ; preds = %27
  invoke void @_ZNSt6vectorIPN3cfg4EdgeESaIS2_EEC2ERKS4_(ptr noundef nonnull align 8 dereferenceable(24) %14, ptr noundef nonnull align 8 dereferenceable(24) %29)
          to label %31 unwind label %52

31:                                               ; preds = %30
  store i1 true, ptr %15, align 1
  %32 = invoke noundef zeroext i1 @_ZN12_GLOBAL__N_127edge_type_structural_equalsESt6vectorIPN3cfg4EdgeESaIS3_EES5_(ptr noundef %12, ptr noundef %14)
          to label %33 unwind label %56

33:                                               ; preds = %31
  %34 = xor i1 %32, true
  br label %35

35:                                               ; preds = %33, %23
  %36 = phi i1 [ true, %23 ], [ %34, %33 ]
  %37 = load i1, ptr %15, align 1
  br i1 %37, label %38, label %39

38:                                               ; preds = %35
  call void @_ZNSt6vectorIPN3cfg4EdgeESaIS2_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %14) #2
  br label %39

39:                                               ; preds = %38, %35
  %40 = load i1, ptr %13, align 1
  br i1 %40, label %41, label %42

41:                                               ; preds = %39
  call void @_ZNSt6vectorIPN3cfg4EdgeESaIS2_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %12) #2
  br label %42

42:                                               ; preds = %41, %39
  call void @_ZNSt6vectorIPN3cfg4EdgeESaIS2_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %9) #2
  call void @_ZNSt6vectorIPN3cfg4EdgeESaIS2_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %8) #2
  br i1 %36, label %43, label %69

43:                                               ; preds = %42
  store i1 false, ptr %4, align 1
  br label %73

44:                                               ; preds = %20, %3
  %45 = landingpad { ptr, i32 }
          cleanup
  %46 = extractvalue { ptr, i32 } %45, 0
  store ptr %46, ptr %10, align 8
  %47 = extractvalue { ptr, i32 } %45, 1
  store i32 %47, ptr %11, align 4
  br label %68

48:                                               ; preds = %26, %24, %21
  %49 = landingpad { ptr, i32 }
          cleanup
  %50 = extractvalue { ptr, i32 } %49, 0
  store ptr %50, ptr %10, align 8
  %51 = extractvalue { ptr, i32 } %49, 1
  store i32 %51, ptr %11, align 4
  br label %67

52:                                               ; preds = %30, %27
  %53 = landingpad { ptr, i32 }
          cleanup
  %54 = extractvalue { ptr, i32 } %53, 0
  store ptr %54, ptr %10, align 8
  %55 = extractvalue { ptr, i32 } %53, 1
  store i32 %55, ptr %11, align 4
  br label %63

56:                                               ; preds = %31
  %57 = landingpad { ptr, i32 }
          cleanup
  %58 = extractvalue { ptr, i32 } %57, 0
  store ptr %58, ptr %10, align 8
  %59 = extractvalue { ptr, i32 } %57, 1
  store i32 %59, ptr %11, align 4
  %60 = load i1, ptr %15, align 1
  br i1 %60, label %61, label %62

61:                                               ; preds = %56
  call void @_ZNSt6vectorIPN3cfg4EdgeESaIS2_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %14) #2
  br label %62

62:                                               ; preds = %61, %56
  br label %63

63:                                               ; preds = %62, %52
  %64 = load i1, ptr %13, align 1
  br i1 %64, label %65, label %66

65:                                               ; preds = %63
  call void @_ZNSt6vectorIPN3cfg4EdgeESaIS2_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %12) #2
  br label %66

66:                                               ; preds = %65, %63
  br label %67

67:                                               ; preds = %66, %48
  call void @_ZNSt6vectorIPN3cfg4EdgeESaIS2_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %9) #2
  br label %68

68:                                               ; preds = %67, %44
  call void @_ZNSt6vectorIPN3cfg4EdgeESaIS2_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %8) #2
  br label %75

69:                                               ; preds = %42
  %70 = load ptr, ptr %6, align 8, !tbaa !5
  %71 = load ptr, ptr %7, align 8, !tbaa !5
  %72 = call noundef zeroext i1 @_ZNK3cfg5Block17structural_equalsEPKS0_RKSt8functionIFbRK13IRInstructionS6_EE(ptr noundef nonnull align 8 dereferenceable(104) %16, ptr noundef %70, ptr noundef nonnull align 8 dereferenceable(32) %71)
  store i1 %72, ptr %4, align 1
  br label %73

73:                                               ; preds = %69, %43
  %74 = load i1, ptr %4, align 1
  ret i1 %74

75:                                               ; preds = %68
  %76 = load ptr, ptr %10, align 8
  %77 = load i32, ptr %11, align 4
  %78 = insertvalue { ptr, i32 } poison, ptr %76, 0
  %79 = insertvalue { ptr, i32 } %78, i32 %77, 1
  resume { ptr, i32 } %79
}

; Function Attrs: mustprogress uwtable
declare hidden noundef zeroext i1 @_ZN12_GLOBAL__N_127edge_type_structural_equalsESt6vectorIPN3cfg4EdgeESaIS3_EES5_(ptr noundef, ptr noundef) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector.11" = type { %"struct.std::_Vector_base.12" }
%"struct.std::_Vector_base.12" = type { %"struct.std::_Vector_base<cfg::Edge *, std::allocator<cfg::Edge *>>::_Vector_impl" }
%"struct.std::_Vector_base<cfg::Edge *, std::allocator<cfg::Edge *>>::_Vector_impl" = type { %"struct.std::_Vector_base<cfg::Edge *, std::allocator<cfg::Edge *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<cfg::Edge *, std::allocator<cfg::Edge *>>::_Vector_impl_data" = type { ptr, ptr, ptr }

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNK3cfg5Block5succsEv(ptr noundef nonnull align 8 dereferenceable(104)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIPN3cfg4EdgeESaIS2_EEC2ERKS4_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIPN3cfg4EdgeESaIS2_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNK3cfg5Block5predsEv(ptr noundef nonnull align 8 dereferenceable(104)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZNK3cfg5Block17structural_equalsEPKS0_RKSt8functionIFbRK13IRInstructionS6_EE(ptr noundef nonnull align 8 dereferenceable(104), ptr noundef, ptr noundef nonnull align 8 dereferenceable(32)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZNK3cfg5Block26extended_structural_equalsEPKS0_RKSt8functionIFbRK13IRInstructionS6_EE(ptr noundef nonnull align 8 dereferenceable(104) %0, ptr noundef %1, ptr noundef nonnull align 8 dereferenceable(32) %2) local_unnamed_addr #1 align 2 personality ptr @__gxx_personality_v0 {
  %4 = alloca %"class.std::vector.11", align 8
  %5 = alloca %"class.std::vector.11", align 8
  %6 = alloca %"class.std::vector.11", align 8
  %7 = alloca %"class.std::vector.11", align 8
  %8 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNK3cfg5Block5predsEv(ptr noundef nonnull align 8 dereferenceable(104) %0)
  call void @_ZNSt6vectorIPN3cfg4EdgeESaIS2_EEC2ERKS4_(ptr noundef nonnull align 8 dereferenceable(24) %4, ptr noundef nonnull align 8 dereferenceable(24) %8)
  %9 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNK3cfg5Block5predsEv(ptr noundef nonnull align 8 dereferenceable(104) %1)
  invoke void @_ZNSt6vectorIPN3cfg4EdgeESaIS2_EEC2ERKS4_(ptr noundef nonnull align 8 dereferenceable(24) %5, ptr noundef nonnull align 8 dereferenceable(24) %9)
          to label %10 unwind label %19

10:                                               ; preds = %3
  %11 = invoke noundef zeroext i1 @_ZN12_GLOBAL__N_127edge_type_structural_equalsESt6vectorIPN3cfg4EdgeESaIS3_EES5_(ptr noundef nonnull %4, ptr noundef nonnull %5)
          to label %12 unwind label %21

12:                                               ; preds = %10
  br i1 %11, label %13, label %.critedge20

13:                                               ; preds = %12
  %14 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNK3cfg5Block5succsEv(ptr noundef nonnull align 8 dereferenceable(104) %0)
  invoke void @_ZNSt6vectorIPN3cfg4EdgeESaIS2_EEC2ERKS4_(ptr noundef nonnull align 8 dereferenceable(24) %6, ptr noundef nonnull align 8 dereferenceable(24) %14)
          to label %15 unwind label %21

15:                                               ; preds = %13
  %16 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNK3cfg5Block5succsEv(ptr noundef nonnull align 8 dereferenceable(104) %1)
  invoke void @_ZNSt6vectorIPN3cfg4EdgeESaIS2_EEC2ERKS4_(ptr noundef nonnull align 8 dereferenceable(24) %7, ptr noundef nonnull align 8 dereferenceable(24) %16)
          to label %17 unwind label %23

17:                                               ; preds = %15
  %18 = invoke noundef zeroext i1 @_ZN12_GLOBAL__N_127edge_type_structural_equalsESt6vectorIPN3cfg4EdgeESaIS3_EES5_(ptr noundef nonnull %6, ptr noundef nonnull %7)
          to label %.critedge unwind label %25

.critedge:                                        ; preds = %17
  call void @_ZNSt6vectorIPN3cfg4EdgeESaIS2_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %7) #2
  call void @_ZNSt6vectorIPN3cfg4EdgeESaIS2_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %6) #2
  call void @_ZNSt6vectorIPN3cfg4EdgeESaIS2_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %5) #2
  call void @_ZNSt6vectorIPN3cfg4EdgeESaIS2_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %4) #2
  br i1 %18, label %30, label %32

19:                                               ; preds = %3
  %20 = landingpad { ptr, i32 }
          cleanup
  br label %29

21:                                               ; preds = %13, %10
  %22 = landingpad { ptr, i32 }
          cleanup
  br label %28

23:                                               ; preds = %15
  %24 = landingpad { ptr, i32 }
          cleanup
  br label %27

25:                                               ; preds = %17
  %26 = landingpad { ptr, i32 }
          cleanup
  call void @_ZNSt6vectorIPN3cfg4EdgeESaIS2_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %7) #2
  br label %27

27:                                               ; preds = %23, %25
  %.pn = phi { ptr, i32 } [ %26, %25 ], [ %24, %23 ]
  call void @_ZNSt6vectorIPN3cfg4EdgeESaIS2_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %6) #2
  br label %28

28:                                               ; preds = %27, %21
  %.pn.pn = phi { ptr, i32 } [ %.pn, %27 ], [ %22, %21 ]
  call void @_ZNSt6vectorIPN3cfg4EdgeESaIS2_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %5) #2
  br label %29

29:                                               ; preds = %28, %19
  %.pn.pn.pn = phi { ptr, i32 } [ %.pn.pn, %28 ], [ %20, %19 ]
  call void @_ZNSt6vectorIPN3cfg4EdgeESaIS2_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %4) #2
  resume { ptr, i32 } %.pn.pn.pn

30:                                               ; preds = %.critedge
  %31 = call noundef zeroext i1 @_ZNK3cfg5Block17structural_equalsEPKS0_RKSt8functionIFbRK13IRInstructionS6_EE(ptr noundef nonnull align 8 dereferenceable(104) %0, ptr noundef nonnull %1, ptr noundef nonnull align 8 dereferenceable(32) %2)
  br label %32

.critedge20:                                      ; preds = %12
  call void @_ZNSt6vectorIPN3cfg4EdgeESaIS2_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %5) #2
  call void @_ZNSt6vectorIPN3cfg4EdgeESaIS2_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %4) #2
  br label %32

32:                                               ; preds = %.critedge20, %.critedge, %30
  %.016 = phi i1 [ %31, %30 ], [ false, %.critedge ], [ false, %.critedge20 ]
  ret i1 %.016
}

; Function Attrs: mustprogress uwtable
declare hidden noundef zeroext i1 @_ZN12_GLOBAL__N_127edge_type_structural_equalsESt6vectorIPN3cfg4EdgeESaIS3_EES5_(ptr noundef, ptr noundef) local_unnamed_addr #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: GlobalOptPass,IPSCCPPass,InstCombinePass,JumpThreadingPass,SROAPass,SimplifyCFGPass,TailCallElimPass