; LLVM IR from facebookresearch/habitat-sim :: src/deps/basis-universal/encoder (basisu_etc)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.basisu::color_rgba_i16" = type { %union.anon.1 }
%union.anon.1 = type { [4 x i16] }
%struct.anon.2 = type { i16, i16, i16, i16 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN6basisu5clampIiEET_S1_S1_S1_(i32 noundef, i32 noundef, i32 noundef) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN6basisu7minimumIjEET_S1_S1_(i32 noundef, i32 noundef) #1

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZN6basisu9etc_block13unpack_color5ERNS_10color_rgbaEttbj(ptr noundef nonnull align 1 dereferenceable(4) %0, i16 noundef zeroext %1, i16 noundef zeroext %2, i1 noundef zeroext %3, i32 noundef %4) #2 align 2 {
  %6 = alloca ptr, align 8
  %7 = alloca i16, align 2
  %8 = alloca i16, align 2
  %9 = alloca i8, align 1
  %10 = alloca i32, align 4
  %11 = alloca %"class.basisu::color_rgba_i16", align 2
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i8, align 1
  store ptr %0, ptr %6, align 8, !tbaa !5
  store i16 %1, ptr %7, align 2, !tbaa !9
  store i16 %2, ptr %8, align 2, !tbaa !9
  %16 = zext i1 %3 to i8
  store i8 %16, ptr %9, align 1, !tbaa !11
  store i32 %4, ptr %10, align 4, !tbaa !13
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #3
  %17 = load i16, ptr %8, align 2, !tbaa !9
  %18 = call i64 @_ZN6basisu9etc_block13unpack_delta3Et(i16 noundef zeroext %17)
  %19 = getelementptr inbounds %"class.basisu::color_rgba_i16", ptr %11, i32 0, i32 0
  %20 = getelementptr inbounds %union.anon.1, ptr %19, i32 0, i32 0
  store i64 %18, ptr %20, align 2
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #3
  %21 = load i16, ptr %7, align 2, !tbaa !9
  %22 = zext i16 %21 to i32
  %23 = and i32 %22, 31
  %24 = getelementptr inbounds %"class.basisu::color_rgba_i16", ptr %11, i32 0, i32 0
  %25 = getelementptr inbounds %struct.anon.2, ptr %24, i32 0, i32 2
  %26 = load i16, ptr %25, align 2, !tbaa !15
  %27 = sext i16 %26 to i32
  %28 = add i32 %23, %27
  store i32 %28, ptr %12, align 4, !tbaa !13
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #3
  %29 = load i16, ptr %7, align 2, !tbaa !9
  %30 = zext i16 %29 to i32
  %31 = ashr i32 %30, 5
  %32 = and i32 %31, 31
  %33 = getelementptr inbounds %"class.basisu::color_rgba_i16", ptr %11, i32 0, i32 0
  %34 = getelementptr inbounds %struct.anon.2, ptr %33, i32 0, i32 1
  %35 = load i16, ptr %34, align 2, !tbaa !15
  %36 = sext i16 %35 to i32
  %37 = add i32 %32, %36
  store i32 %37, ptr %13, align 4, !tbaa !13
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #3
  %38 = load i16, ptr %7, align 2, !tbaa !9
  %39 = zext i16 %38 to i32
  %40 = ashr i32 %39, 10
  %41 = and i32 %40, 31
  %42 = getelementptr inbounds %"class.basisu::color_rgba_i16", ptr %11, i32 0, i32 0
  %43 = getelementptr inbounds %struct.anon.2, ptr %42, i32 0, i32 0
  %44 = load i16, ptr %43, align 2, !tbaa !15
  %45 = sext i16 %44 to i32
  %46 = add i32 %41, %45
  store i32 %46, ptr %14, align 4, !tbaa !13
  call void @llvm.lifetime.start.p0(i64 1, ptr %15) #3
  store i8 1, ptr %15, align 1, !tbaa !11
  %47 = load i32, ptr %14, align 4, !tbaa !13
  %48 = load i32, ptr %13, align 4, !tbaa !13
  %49 = or i32 %47, %48
  %50 = load i32, ptr %12, align 4, !tbaa !13
  %51 = or i32 %49, %50
  %52 = icmp ugt i32 %51, 31
  br i1 %52, label %53, label %60

53:                                               ; preds = %5
  store i8 0, ptr %15, align 1, !tbaa !11
  %54 = load i32, ptr %14, align 4, !tbaa !13
  %55 = call noundef i32 @_ZN6basisu5clampIiEET_S1_S1_S1_(i32 noundef %54, i32 noundef 0, i32 noundef 31)
  store i32 %55, ptr %14, align 4, !tbaa !13
  %56 = load i32, ptr %13, align 4, !tbaa !13
  %57 = call noundef i32 @_ZN6basisu5clampIiEET_S1_S1_S1_(i32 noundef %56, i32 noundef 0, i32 noundef 31)
  store i32 %57, ptr %13, align 4, !tbaa !13
  %58 = load i32, ptr %12, align 4, !tbaa !13
  %59 = call noundef i32 @_ZN6basisu5clampIiEET_S1_S1_S1_(i32 noundef %58, i32 noundef 0, i32 noundef 31)
  store i32 %59, ptr %12, align 4, !tbaa !13
  br label %60

60:                                               ; preds = %53, %5
  %61 = load i8, ptr %9, align 1, !tbaa !11, !range !16, !noundef !17
  %62 = trunc i8 %61 to i1
  br i1 %62, label %63, label %79

63:                                               ; preds = %60
  %64 = load i32, ptr %12, align 4, !tbaa !13
  %65 = shl i32 %64, 3
  %66 = load i32, ptr %12, align 4, !tbaa !13
  %67 = ashr i32 %66, 2
  %68 = or i32 %65, %67
  store i32 %68, ptr %12, align 4, !tbaa !13
  %69 = load i32, ptr %13, align 4, !tbaa !13
  %70 = shl i32 %69, 3
  %71 = load i32, ptr %13, align 4, !tbaa !13
  %72 = ashr i32 %71, 2
  %73 = or i32 %70, %72
  store i32 %73, ptr %13, align 4, !tbaa !13
  %74 = load i32, ptr %14, align 4, !tbaa !13
  %75 = shl i32 %74, 3
  %76 = load i32, ptr %14, align 4, !tbaa !13
  %77 = ashr i32 %76, 2
  %78 = or i32 %75, %77
  store i32 %78, ptr %14, align 4, !tbaa !13
  br label %79

79:                                               ; preds = %63, %60
  %80 = load ptr, ptr %6, align 8, !tbaa !5
  %81 = load i32, ptr %14, align 4, !tbaa !13
  %82 = load i32, ptr %13, align 4, !tbaa !13
  %83 = load i32, ptr %12, align 4, !tbaa !13
  %84 = load i32, ptr %10, align 4, !tbaa !13
  %85 = call noundef i32 @_ZN6basisu7minimumIjEET_S1_S1_(i32 noundef %84, i32 noundef 255)
  %86 = call noundef nonnull align 1 dereferenceable(4) ptr @_ZN6basisu10color_rgba16set_noclamp_rgbaEiiii(ptr noundef nonnull align 1 dereferenceable(4) %80, i32 noundef %81, i32 noundef %82, i32 noundef %83, i32 noundef %85)
  %87 = load i8, ptr %15, align 1, !tbaa !11, !range !16, !noundef !17
  %88 = trunc i8 %87 to i1
  call void @llvm.lifetime.end.p0(i64 1, ptr %15) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #3
  ret i1 %88
}

; Function Attrs: mustprogress uwtable
declare dso_local i64 @_ZN6basisu9etc_block13unpack_delta3Et(i16 noundef zeroext) #2 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(4) ptr @_ZN6basisu10color_rgba16set_noclamp_rgbaEiiii(ptr noundef nonnull align 1 dereferenceable(4), i32 noundef, i32 noundef, i32 noundef, i32 noundef) #1 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"short", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"bool", !7, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"int", !7, i64 0}
!15 = !{!7, !7, i64 0}
!16 = !{i8 0, i8 2}
!17 = !{}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN6basisu5clampIiEET_S1_S1_S1_(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN6basisu7minimumIjEET_S1_S1_(i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZN6basisu9etc_block13unpack_color5ERNS_10color_rgbaEttbj(ptr noundef nonnull align 1 dereferenceable(4) %0, i16 noundef zeroext %1, i16 noundef zeroext %2, i1 noundef zeroext %3, i32 noundef %4) local_unnamed_addr #1 align 2 {
  %6 = tail call i64 @_ZN6basisu9etc_block13unpack_delta3Et(i16 noundef zeroext %2)
  %.sroa.0.0.extract.trunc = trunc i64 %6 to i32
  %7 = zext i16 %1 to i32
  %8 = and i32 %7, 31
  %sh.diff = lshr i64 %6, 16
  %tr.sh.diff = trunc i64 %sh.diff to i32
  %9 = ashr i32 %tr.sh.diff, 16
  %10 = add nsw i32 %9, %8
  %11 = lshr i32 %7, 5
  %12 = and i32 %11, 31
  %13 = ashr i32 %.sroa.0.0.extract.trunc, 16
  %14 = add nsw i32 %13, %12
  %15 = lshr i32 %7, 10
  %16 = and i32 %15, 31
  %sext = shl i32 %.sroa.0.0.extract.trunc, 16
  %17 = ashr exact i32 %sext, 16
  %18 = add nsw i32 %17, %16
  %19 = or i32 %18, %14
  %20 = or i32 %19, %10
  %21 = icmp ult i32 %20, 32
  br i1 %21, label %26, label %22

22:                                               ; preds = %5
  %23 = tail call noundef i32 @_ZN6basisu5clampIiEET_S1_S1_S1_(i32 noundef %18, i32 noundef 0, i32 noundef 31)
  %24 = tail call noundef i32 @_ZN6basisu5clampIiEET_S1_S1_S1_(i32 noundef %14, i32 noundef 0, i32 noundef 31)
  %25 = tail call noundef i32 @_ZN6basisu5clampIiEET_S1_S1_S1_(i32 noundef %10, i32 noundef 0, i32 noundef 31)
  br label %26

26:                                               ; preds = %22, %5
  %.025 = phi i32 [ %25, %22 ], [ %10, %5 ]
  %.023 = phi i32 [ %24, %22 ], [ %14, %5 ]
  %.022 = phi i32 [ %23, %22 ], [ %18, %5 ]
  br i1 %3, label %27, label %37

27:                                               ; preds = %26
  %28 = shl i32 %.025, 3
  %29 = ashr i32 %.025, 2
  %30 = or i32 %28, %29
  %31 = shl i32 %.023, 3
  %32 = ashr i32 %.023, 2
  %33 = or i32 %31, %32
  %34 = shl i32 %.022, 3
  %35 = ashr i32 %.022, 2
  %36 = or i32 %34, %35
  br label %37

37:                                               ; preds = %27, %26
  %.126 = phi i32 [ %30, %27 ], [ %.025, %26 ]
  %.124 = phi i32 [ %33, %27 ], [ %.023, %26 ]
  %.1 = phi i32 [ %36, %27 ], [ %.022, %26 ]
  %38 = tail call noundef i32 @_ZN6basisu7minimumIjEET_S1_S1_(i32 noundef %4, i32 noundef 255)
  %39 = tail call noundef nonnull align 1 dereferenceable(4) ptr @_ZN6basisu10color_rgba16set_noclamp_rgbaEiiii(ptr noundef nonnull align 1 dereferenceable(4) %0, i32 noundef %.1, i32 noundef %.124, i32 noundef %.126, i32 noundef %38)
  ret i1 %21
}

; Function Attrs: mustprogress uwtable
declare dso_local i64 @_ZN6basisu9etc_block13unpack_delta3Et(i16 noundef zeroext) local_unnamed_addr #1 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(4) ptr @_ZN6basisu10color_rgba16set_noclamp_rgbaEiiii(ptr noundef nonnull align 1 dereferenceable(4), i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0 align 2

attributes #0 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,TailCallElimPass