; LLVM IR from AF-GRILL/DISPluginForUnreal :: Source/ThirdParty/include/dis6/AcknowledgePdu.ll (ZNK3DIS14AcknowledgePdueqERKS0_)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.DIS::AcknowledgePdu" = type { %"class.DIS::SimulationManagementFamilyPdu", i16, i16, i32 }
%"class.DIS::SimulationManagementFamilyPdu" = type { %"class.DIS::Pdu.base", [4 x i8], %"class.DIS::EntityID", %"class.DIS::EntityID" }
%"class.DIS::Pdu.base" = type <{ ptr, i8, i8, i8, i8, i32, i16, i16 }>
%"class.DIS::EntityID" = type <{ ptr, i16, i16, i16, [2 x i8] }>

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZNK3DIS14AcknowledgePdueqERKS0_(ptr noundef nonnull align 8 dereferenceable(64) %0, ptr noundef nonnull align 8 dereferenceable(64) %1) #0 align 2 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca i8, align 1
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  %6 = load ptr, ptr %3, align 8
  call void @llvm.lifetime.start.p0(i64 1, ptr %5) #3
  store i8 1, ptr %5, align 1, !tbaa !9
  %7 = load ptr, ptr %4, align 8, !tbaa !5
  %8 = call noundef zeroext i1 @_ZNK3DIS29SimulationManagementFamilyPdueqERKS0_(ptr noundef nonnull align 8 dereferenceable(56) %6, ptr noundef nonnull align 8 dereferenceable(56) %7)
  %9 = zext i1 %8 to i8
  store i8 %9, ptr %5, align 1, !tbaa !9
  %10 = getelementptr inbounds %"class.DIS::AcknowledgePdu", ptr %6, i32 0, i32 1
  %11 = load i16, ptr %10, align 8, !tbaa !11
  %12 = zext i16 %11 to i32
  %13 = load ptr, ptr %4, align 8, !tbaa !5
  %14 = getelementptr inbounds %"class.DIS::AcknowledgePdu", ptr %13, i32 0, i32 1
  %15 = load i16, ptr %14, align 8, !tbaa !11
  %16 = zext i16 %15 to i32
  %17 = icmp eq i32 %12, %16
  br i1 %17, label %19, label %18

18:                                               ; preds = %2
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %19

19:                                               ; preds = %18, %2
  %20 = getelementptr inbounds %"class.DIS::AcknowledgePdu", ptr %6, i32 0, i32 2
  %21 = load i16, ptr %20, align 2, !tbaa !18
  %22 = zext i16 %21 to i32
  %23 = load ptr, ptr %4, align 8, !tbaa !5
  %24 = getelementptr inbounds %"class.DIS::AcknowledgePdu", ptr %23, i32 0, i32 2
  %25 = load i16, ptr %24, align 2, !tbaa !18
  %26 = zext i16 %25 to i32
  %27 = icmp eq i32 %22, %26
  br i1 %27, label %29, label %28

28:                                               ; preds = %19
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %29

29:                                               ; preds = %28, %19
  %30 = getelementptr inbounds %"class.DIS::AcknowledgePdu", ptr %6, i32 0, i32 3
  %31 = load i32, ptr %30, align 4, !tbaa !19
  %32 = load ptr, ptr %4, align 8, !tbaa !5
  %33 = getelementptr inbounds %"class.DIS::AcknowledgePdu", ptr %32, i32 0, i32 3
  %34 = load i32, ptr %33, align 4, !tbaa !19
  %35 = icmp eq i32 %31, %34
  br i1 %35, label %37, label %36

36:                                               ; preds = %29
  store i8 0, ptr %5, align 1, !tbaa !9
  br label %37

37:                                               ; preds = %36, %29
  %38 = load i8, ptr %5, align 1, !tbaa !9, !range !20, !noundef !21
  %39 = trunc i8 %38 to i1
  call void @llvm.lifetime.end.p0(i64 1, ptr %5) #3
  ret i1 %39
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare noundef zeroext i1 @_ZNK3DIS29SimulationManagementFamilyPdueqERKS0_(ptr noundef nonnull align 8 dereferenceable(56), ptr noundef nonnull align 8 dereferenceable(56)) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"bool", !7, i64 0}
!11 = !{!12, !16, i64 56}
!12 = !{!"_ZTSN3DIS14AcknowledgePduE", !13, i64 0, !16, i64 56, !16, i64 58, !15, i64 60}
!13 = !{!"_ZTSN3DIS29SimulationManagementFamilyPduE", !14, i64 0, !17, i64 24, !17, i64 40}
!14 = !{!"_ZTSN3DIS3PduE", !7, i64 8, !7, i64 9, !7, i64 10, !7, i64 11, !15, i64 12, !16, i64 16, !16, i64 18}
!15 = !{!"int", !7, i64 0}
!16 = !{!"short", !7, i64 0}
!17 = !{!"_ZTSN3DIS8EntityIDE", !16, i64 8, !16, i64 10, !16, i64 12}
!18 = !{!12, !16, i64 58}
!19 = !{!12, !15, i64 60}
!20 = !{i8 0, i8 2}
!21 = !{}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZNK3DIS14AcknowledgePdueqERKS0_(ptr noundef nonnull align 8 dereferenceable(64) %0, ptr noundef nonnull align 8 dereferenceable(64) %1) local_unnamed_addr #0 align 2 {
  %3 = tail call noundef zeroext i1 @_ZNK3DIS29SimulationManagementFamilyPdueqERKS0_(ptr noundef nonnull align 8 dereferenceable(56) %0, ptr noundef nonnull align 8 dereferenceable(56) %1)
  %4 = getelementptr inbounds i8, ptr %0, i64 56
  %5 = load i16, ptr %4, align 8, !tbaa !5
  %6 = getelementptr inbounds i8, ptr %1, i64 56
  %7 = load i16, ptr %6, align 8, !tbaa !5
  %8 = icmp eq i16 %5, %7
  %spec.select = and i1 %3, %8
  %9 = getelementptr inbounds i8, ptr %0, i64 58
  %10 = load i16, ptr %9, align 2, !tbaa !14
  %11 = getelementptr inbounds i8, ptr %1, i64 58
  %12 = load i16, ptr %11, align 2, !tbaa !14
  %13 = icmp eq i16 %10, %12
  %14 = getelementptr inbounds i8, ptr %0, i64 60
  %15 = load i32, ptr %14, align 4, !tbaa !15
  %16 = getelementptr inbounds i8, ptr %1, i64 60
  %17 = load i32, ptr %16, align 4, !tbaa !15
  %18 = icmp eq i32 %15, %17
  %19 = select i1 %18, i1 %13, i1 false
  %spec.select5 = select i1 %19, i1 %spec.select, i1 false
  ret i1 %spec.select5
}

declare noundef zeroext i1 @_ZNK3DIS29SimulationManagementFamilyPdueqERKS0_(ptr noundef nonnull align 8 dereferenceable(56), ptr noundef nonnull align 8 dereferenceable(56)) local_unnamed_addr #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !12, i64 56}
!6 = !{!"_ZTSN3DIS14AcknowledgePduE", !7, i64 0, !12, i64 56, !12, i64 58, !11, i64 60}
!7 = !{!"_ZTSN3DIS29SimulationManagementFamilyPduE", !8, i64 0, !13, i64 24, !13, i64 40}
!8 = !{!"_ZTSN3DIS3PduE", !9, i64 8, !9, i64 9, !9, i64 10, !9, i64 11, !11, i64 12, !12, i64 16, !12, i64 18}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!"short", !9, i64 0}
!13 = !{!"_ZTSN3DIS8EntityIDE", !12, i64 8, !12, i64 10, !12, i64 12}
!14 = !{!6, !12, i64 58}
!15 = !{!6, !11, i64 60}


; Effective O3 passes: GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass