; LLVM IR from sslab-gatech/janus :: lkl/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy (phy_qmath)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@log_table = external hidden constant [33 x i16], align 16

; Function Attrs: nounwind uwtable
declare dso_local zeroext i16 @qm_mulu16(i16 noundef zeroext, i16 noundef zeroext) #0

; Function Attrs: nounwind uwtable
declare dso_local signext i16 @qm_muls16(i16 noundef signext, i16 noundef signext) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind uwtable
declare dso_local i32 @qm_add32(i32 noundef, i32 noundef) #0

; Function Attrs: nounwind uwtable
declare dso_local signext i16 @qm_add16(i16 noundef signext, i16 noundef signext) #0

; Function Attrs: nounwind uwtable
declare dso_local i32 @qm_shl32(i32 noundef, i32 noundef) #0

; Function Attrs: nounwind uwtable
declare dso_local signext i16 @qm_norm32(i32 noundef) #0

; Function Attrs: nounwind uwtable
define dso_local void @qm_log10(i32 noundef %0, i16 noundef signext %1, ptr noundef %2, ptr noundef %3) #0 {
  %5 = alloca i32, align 4
  %6 = alloca i16, align 2
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  %9 = alloca i16, align 2
  %10 = alloca i16, align 2
  %11 = alloca i16, align 2
  %12 = alloca i16, align 2
  %13 = alloca i32, align 4
  store i32 %0, ptr %5, align 4, !tbaa !5
  store i16 %1, ptr %6, align 2, !tbaa !9
  store ptr %2, ptr %7, align 8, !tbaa !11
  store ptr %3, ptr %8, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 2, ptr %9) #2
  call void @llvm.lifetime.start.p0(i64 2, ptr %10) #2
  call void @llvm.lifetime.start.p0(i64 2, ptr %11) #2
  call void @llvm.lifetime.start.p0(i64 2, ptr %12) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #2
  %14 = load i32, ptr %5, align 4, !tbaa !5
  %15 = call signext i16 @qm_norm32(i32 noundef %14)
  store i16 %15, ptr %9, align 2, !tbaa !9
  %16 = load i32, ptr %5, align 4, !tbaa !5
  %17 = load i16, ptr %9, align 2, !tbaa !9
  %18 = sext i16 %17 to i32
  %19 = shl i32 %16, %18
  store i32 %19, ptr %5, align 4, !tbaa !5
  %20 = load i16, ptr %6, align 2, !tbaa !9
  %21 = sext i16 %20 to i32
  %22 = load i16, ptr %9, align 2, !tbaa !9
  %23 = sext i16 %22 to i32
  %24 = add nsw i32 %21, %23
  %25 = sub nsw i32 %24, 30
  %26 = trunc i32 %25 to i16
  store i16 %26, ptr %6, align 2, !tbaa !9
  %27 = load i32, ptr %5, align 4, !tbaa !5
  %28 = ashr i32 %27, 25
  %29 = trunc i32 %28 to i16
  store i16 %29, ptr %10, align 2, !tbaa !9
  %30 = load i16, ptr %10, align 2, !tbaa !9
  %31 = sext i16 %30 to i32
  %32 = and i32 %31, 31
  %33 = trunc i32 %32 to i16
  store i16 %33, ptr %10, align 2, !tbaa !9
  %34 = load i32, ptr %5, align 4, !tbaa !5
  %35 = and i32 %34, 33554431
  store i32 %35, ptr %5, align 4, !tbaa !5
  %36 = load i32, ptr %5, align 4, !tbaa !5
  %37 = ashr i32 %36, 9
  %38 = trunc i32 %37 to i16
  store i16 %38, ptr %12, align 2, !tbaa !9
  %39 = load i16, ptr %10, align 2, !tbaa !9
  %40 = sext i16 %39 to i64
  %41 = getelementptr inbounds [33 x i16], ptr @log_table, i64 0, i64 %40
  %42 = load i16, ptr %41, align 2, !tbaa !9
  %43 = sext i16 %42 to i32
  store i32 %43, ptr %13, align 4, !tbaa !5
  %44 = load i16, ptr %12, align 2, !tbaa !9
  %45 = load i16, ptr %10, align 2, !tbaa !9
  %46 = sext i16 %45 to i32
  %47 = add nsw i32 %46, 1
  %48 = sext i32 %47 to i64
  %49 = getelementptr inbounds [33 x i16], ptr @log_table, i64 0, i64 %48
  %50 = load i16, ptr %49, align 2, !tbaa !9
  %51 = sext i16 %50 to i32
  %52 = load i16, ptr %10, align 2, !tbaa !9
  %53 = sext i16 %52 to i64
  %54 = getelementptr inbounds [33 x i16], ptr @log_table, i64 0, i64 %53
  %55 = load i16, ptr %54, align 2, !tbaa !9
  %56 = sext i16 %55 to i32
  %57 = sub nsw i32 %51, %56
  %58 = trunc i32 %57 to i16
  %59 = call zeroext i16 @qm_mulu16(i16 noundef zeroext %44, i16 noundef zeroext %58)
  store i16 %59, ptr %11, align 2, !tbaa !9
  %60 = load i32, ptr %13, align 4, !tbaa !5
  %61 = trunc i32 %60 to i16
  %62 = load i16, ptr %11, align 2, !tbaa !9
  %63 = call signext i16 @qm_add16(i16 noundef signext %61, i16 noundef signext %62)
  %64 = sext i16 %63 to i32
  store i32 %64, ptr %13, align 4, !tbaa !5
  %65 = load i32, ptr %13, align 4, !tbaa !5
  %66 = load i16, ptr %6, align 2, !tbaa !9
  %67 = sext i16 %66 to i32
  %68 = sub nsw i32 0, %67
  %69 = shl i32 %68, 15
  %70 = call i32 @qm_add32(i32 noundef %65, i32 noundef %69)
  store i32 %70, ptr %13, align 4, !tbaa !5
  %71 = load i32, ptr %13, align 4, !tbaa !5
  %72 = call signext i16 @qm_norm32(i32 noundef %71)
  store i16 %72, ptr %9, align 2, !tbaa !9
  %73 = load i32, ptr %13, align 4, !tbaa !5
  %74 = load i16, ptr %9, align 2, !tbaa !9
  %75 = sext i16 %74 to i32
  %76 = sub nsw i32 %75, 16
  %77 = call i32 @qm_shl32(i32 noundef %73, i32 noundef %76)
  store i32 %77, ptr %13, align 4, !tbaa !5
  %78 = load i32, ptr %13, align 4, !tbaa !5
  %79 = trunc i32 %78 to i16
  %80 = call signext i16 @qm_muls16(i16 noundef signext %79, i16 noundef signext 19728)
  %81 = load ptr, ptr %7, align 8, !tbaa !11
  store i16 %80, ptr %81, align 2, !tbaa !9
  %82 = load i16, ptr %9, align 2, !tbaa !9
  %83 = sext i16 %82 to i32
  %84 = add nsw i32 15, %83
  %85 = sub nsw i32 %84, 16
  %86 = add nsw i32 %85, 1
  %87 = trunc i32 %86 to i16
  %88 = load ptr, ptr %8, align 8, !tbaa !11
  store i16 %87, ptr %88, align 2, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #2
  call void @llvm.lifetime.end.p0(i64 2, ptr %12) #2
  call void @llvm.lifetime.end.p0(i64 2, ptr %11) #2
  call void @llvm.lifetime.end.p0(i64 2, ptr %10) #2
  call void @llvm.lifetime.end.p0(i64 2, ptr %9) #2
  ret void
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"short", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"any pointer", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@log_table = external hidden local_unnamed_addr constant [33 x i16], align 16

; Function Attrs: nounwind uwtable
declare dso_local zeroext i16 @qm_mulu16(i16 noundef zeroext, i16 noundef zeroext) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local signext i16 @qm_muls16(i16 noundef signext, i16 noundef signext) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local i32 @qm_add32(i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local signext i16 @qm_add16(i16 noundef signext, i16 noundef signext) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local i32 @qm_shl32(i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local signext i16 @qm_norm32(i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @qm_log10(i32 noundef %0, i16 noundef signext %1, ptr nocapture noundef writeonly %2, ptr nocapture noundef writeonly %3) local_unnamed_addr #0 {
  %5 = tail call signext i16 @qm_norm32(i32 noundef %0)
  %6 = zext nneg i16 %5 to i32
  %7 = shl i32 %0, %6
  %8 = add i16 %1, -30
  %9 = add i16 %8, %5
  %10 = lshr i32 %7, 25
  %11 = and i32 %10, 31
  %12 = zext nneg i32 %11 to i64
  %13 = lshr i32 %7, 9
  %14 = trunc i32 %13 to i16
  %15 = getelementptr inbounds [33 x i16], ptr @log_table, i64 0, i64 %12
  %16 = load i16, ptr %15, align 2, !tbaa !5
  %17 = add nuw nsw i32 %11, 1
  %18 = zext nneg i32 %17 to i64
  %19 = getelementptr inbounds [33 x i16], ptr @log_table, i64 0, i64 %18
  %20 = load i16, ptr %19, align 2, !tbaa !5
  %21 = sub i16 %20, %16
  %22 = tail call zeroext i16 @qm_mulu16(i16 noundef zeroext %14, i16 noundef zeroext %21)
  %23 = tail call signext i16 @qm_add16(i16 noundef signext %16, i16 noundef signext %22)
  %24 = sext i16 %23 to i32
  %25 = sext i16 %9 to i32
  %.neg = mul nsw i32 %25, -32768
  %26 = tail call i32 @qm_add32(i32 noundef %24, i32 noundef %.neg)
  %27 = tail call signext i16 @qm_norm32(i32 noundef %26)
  %28 = sext i16 %27 to i32
  %29 = add nsw i32 %28, -16
  %30 = tail call i32 @qm_shl32(i32 noundef %26, i32 noundef %29)
  %31 = trunc i32 %30 to i16
  %32 = tail call signext i16 @qm_muls16(i16 noundef signext %31, i16 noundef signext 19728)
  store i16 %32, ptr %2, align 2, !tbaa !5
  store i16 %27, ptr %3, align 2, !tbaa !5
  ret void
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"short", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,TailCallElimPass