; LLVM IR from trustwallet/wallet-core :: trezor-crypto/crypto (nem)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.nem_transaction_ctx = type { [32 x i8], ptr, i64, i64 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local zeroext i1 @nem_transaction_write_common(ptr noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, i64 noundef, i32 noundef) #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden zeroext i1 @nem_write_u32(ptr noundef, i32 noundef) #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden zeroext i1 @nem_write_tagged(ptr noundef, ptr noundef, i32 noundef) #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden zeroext i1 @nem_write_u64(ptr noundef, i64 noundef) #2

; Function Attrs: nounwind uwtable
define dso_local zeroext i1 @nem_transaction_create_transfer(ptr noundef %0, i8 noundef zeroext %1, i32 noundef %2, ptr noundef %3, i64 noundef %4, i32 noundef %5, ptr noundef %6, i64 noundef %7, ptr noundef %8, i32 noundef %9, i1 noundef zeroext %10, i32 noundef %11) #1 {
  %13 = alloca i1, align 1
  %14 = alloca ptr, align 8
  %15 = alloca i8, align 1
  %16 = alloca i32, align 4
  %17 = alloca ptr, align 8
  %18 = alloca i64, align 8
  %19 = alloca i32, align 4
  %20 = alloca ptr, align 8
  %21 = alloca i64, align 8
  %22 = alloca ptr, align 8
  %23 = alloca i32, align 4
  %24 = alloca i8, align 1
  %25 = alloca i32, align 4
  %26 = alloca i8, align 1
  %27 = alloca i32, align 4
  store ptr %0, ptr %14, align 8, !tbaa !5
  store i8 %1, ptr %15, align 1, !tbaa !9
  store i32 %2, ptr %16, align 4, !tbaa !10
  store ptr %3, ptr %17, align 8, !tbaa !5
  store i64 %4, ptr %18, align 8, !tbaa !12
  store i32 %5, ptr %19, align 4, !tbaa !10
  store ptr %6, ptr %20, align 8, !tbaa !5
  store i64 %7, ptr %21, align 8, !tbaa !12
  store ptr %8, ptr %22, align 8, !tbaa !5
  store i32 %9, ptr %23, align 4, !tbaa !10
  %28 = zext i1 %10 to i8
  store i8 %28, ptr %24, align 1, !tbaa !14
  store i32 %11, ptr %25, align 4, !tbaa !10
  %29 = load ptr, ptr %17, align 8, !tbaa !5
  %30 = icmp ne ptr %29, null
  br i1 %30, label %35, label %31

31:                                               ; preds = %12
  %32 = load ptr, ptr %14, align 8, !tbaa !5
  %33 = getelementptr inbounds %struct.nem_transaction_ctx, ptr %32, i32 0, i32 0
  %34 = getelementptr inbounds [32 x i8], ptr %33, i64 0, i64 0
  store ptr %34, ptr %17, align 8, !tbaa !5
  br label %35

35:                                               ; preds = %31, %12
  %36 = load ptr, ptr %22, align 8, !tbaa !5
  %37 = icmp ne ptr %36, null
  br i1 %37, label %39, label %38

38:                                               ; preds = %35
  store i32 0, ptr %23, align 4, !tbaa !10
  br label %39

39:                                               ; preds = %38, %35
  call void @llvm.lifetime.start.p0(i64 1, ptr %26) #3
  %40 = load ptr, ptr %14, align 8, !tbaa !5
  %41 = load i8, ptr %15, align 1, !tbaa !9
  %42 = zext i8 %41 to i32
  %43 = shl i32 %42, 24
  %44 = load i32, ptr %25, align 4, !tbaa !10
  %45 = icmp ne i32 %44, 0
  %46 = zext i1 %45 to i64
  %47 = select i1 %45, i32 2, i32 1
  %48 = or i32 %43, %47
  %49 = load i32, ptr %16, align 4, !tbaa !10
  %50 = load ptr, ptr %17, align 8, !tbaa !5
  %51 = load i64, ptr %18, align 8, !tbaa !12
  %52 = load i32, ptr %19, align 4, !tbaa !10
  %53 = call zeroext i1 @nem_transaction_write_common(ptr noundef %40, i32 noundef 257, i32 noundef %48, i32 noundef %49, ptr noundef %50, i64 noundef %51, i32 noundef %52)
  %54 = zext i1 %53 to i8
  store i8 %54, ptr %26, align 1, !tbaa !14
  %55 = load i8, ptr %26, align 1, !tbaa !14, !range !16, !noundef !17
  %56 = trunc i8 %55 to i1
  br i1 %56, label %58, label %57

57:                                               ; preds = %39
  store i1 false, ptr %13, align 1
  store i32 1, ptr %27, align 4
  br label %130

58:                                               ; preds = %39
  br label %59

59:                                               ; preds = %58
  %60 = load ptr, ptr %14, align 8, !tbaa !5
  %61 = load ptr, ptr %20, align 8, !tbaa !5
  %62 = call zeroext i1 @nem_write_tagged(ptr noundef %60, ptr noundef %61, i32 noundef 40)
  br i1 %62, label %64, label %63

63:                                               ; preds = %59
  store i1 false, ptr %13, align 1
  store i32 1, ptr %27, align 4
  br label %130

64:                                               ; preds = %59
  br label %65

65:                                               ; preds = %64
  br label %66

66:                                               ; preds = %65
  br label %67

67:                                               ; preds = %66
  %68 = load ptr, ptr %14, align 8, !tbaa !5
  %69 = load i64, ptr %21, align 8, !tbaa !12
  %70 = call zeroext i1 @nem_write_u64(ptr noundef %68, i64 noundef %69)
  br i1 %70, label %72, label %71

71:                                               ; preds = %67
  store i1 false, ptr %13, align 1
  store i32 1, ptr %27, align 4
  br label %130

72:                                               ; preds = %67
  br label %73

73:                                               ; preds = %72
  br label %74

74:                                               ; preds = %73
  %75 = load i32, ptr %23, align 4, !tbaa !10
  %76 = icmp ne i32 %75, 0
  br i1 %76, label %77, label %109

77:                                               ; preds = %74
  br label %78

78:                                               ; preds = %77
  %79 = load ptr, ptr %14, align 8, !tbaa !5
  %80 = load i32, ptr %23, align 4, !tbaa !10
  %81 = zext i32 %80 to i64
  %82 = add i64 8, %81
  %83 = trunc i64 %82 to i32
  %84 = call zeroext i1 @nem_write_u32(ptr noundef %79, i32 noundef %83)
  br i1 %84, label %86, label %85

85:                                               ; preds = %78
  store i1 false, ptr %13, align 1
  store i32 1, ptr %27, align 4
  br label %130

86:                                               ; preds = %78
  br label %87

87:                                               ; preds = %86
  br label %88

88:                                               ; preds = %87
  br label %89

89:                                               ; preds = %88
  %90 = load ptr, ptr %14, align 8, !tbaa !5
  %91 = load i8, ptr %24, align 1, !tbaa !14, !range !16, !noundef !17
  %92 = trunc i8 %91 to i1
  %93 = zext i1 %92 to i64
  %94 = select i1 %92, i32 2, i32 1
  %95 = call zeroext i1 @nem_write_u32(ptr noundef %90, i32 noundef %94)
  br i1 %95, label %97, label %96

96:                                               ; preds = %89
  store i1 false, ptr %13, align 1
  store i32 1, ptr %27, align 4
  br label %130

97:                                               ; preds = %89
  br label %98

98:                                               ; preds = %97
  br label %99

99:                                               ; preds = %98
  br label %100

100:                                              ; preds = %99
  %101 = load ptr, ptr %14, align 8, !tbaa !5
  %102 = load ptr, ptr %22, align 8, !tbaa !5
  %103 = load i32, ptr %23, align 4, !tbaa !10
  %104 = call zeroext i1 @nem_write_tagged(ptr noundef %101, ptr noundef %102, i32 noundef %103)
  br i1 %104, label %106, label %105

105:                                              ; preds = %100
  store i1 false, ptr %13, align 1
  store i32 1, ptr %27, align 4
  br label %130

106:                                              ; preds = %100
  br label %107

107:                                              ; preds = %106
  br label %108

108:                                              ; preds = %107
  br label %117

109:                                              ; preds = %74
  br label %110

110:                                              ; preds = %109
  %111 = load ptr, ptr %14, align 8, !tbaa !5
  %112 = call zeroext i1 @nem_write_u32(ptr noundef %111, i32 noundef 0)
  br i1 %112, label %114, label %113

113:                                              ; preds = %110
  store i1 false, ptr %13, align 1
  store i32 1, ptr %27, align 4
  br label %130

114:                                              ; preds = %110
  br label %115

115:                                              ; preds = %114
  br label %116

116:                                              ; preds = %115
  br label %117

117:                                              ; preds = %116, %108
  %118 = load i32, ptr %25, align 4, !tbaa !10
  %119 = icmp ne i32 %118, 0
  br i1 %119, label %120, label %129

120:                                              ; preds = %117
  br label %121

121:                                              ; preds = %120
  %122 = load ptr, ptr %14, align 8, !tbaa !5
  %123 = load i32, ptr %25, align 4, !tbaa !10
  %124 = call zeroext i1 @nem_write_u32(ptr noundef %122, i32 noundef %123)
  br i1 %124, label %126, label %125

125:                                              ; preds = %121
  store i1 false, ptr %13, align 1
  store i32 1, ptr %27, align 4
  br label %130

126:                                              ; preds = %121
  br label %127

127:                                              ; preds = %126
  br label %128

128:                                              ; preds = %127
  br label %129

129:                                              ; preds = %128, %117
  store i1 true, ptr %13, align 1
  store i32 1, ptr %27, align 4
  br label %130

130:                                              ; preds = %129, %125, %113, %105, %96, %85, %71, %63, %57
  call void @llvm.lifetime.end.p0(i64 1, ptr %26) #3
  %131 = load i1, ptr %13, align 1
  ret i1 %131
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !7, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"long", !7, i64 0}
!14 = !{!15, !15, i64 0}
!15 = !{!"_Bool", !7, i64 0}
!16 = !{i8 0, i8 2}
!17 = !{}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
declare dso_local zeroext i1 @nem_transaction_write_common(ptr noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, i64 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: inlinehint nounwind uwtable
declare hidden zeroext i1 @nem_write_u32(ptr noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden zeroext i1 @nem_write_tagged(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden zeroext i1 @nem_write_u64(ptr noundef, i64 noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local noundef zeroext i1 @nem_transaction_create_transfer(ptr noundef %0, i8 noundef zeroext %1, i32 noundef %2, ptr noundef %3, i64 noundef %4, i32 noundef %5, ptr noundef %6, i64 noundef %7, ptr noundef %8, i32 noundef %9, i1 noundef zeroext %10, i32 noundef %11) local_unnamed_addr #0 {
  %.not = icmp eq ptr %3, null
  %spec.select = select i1 %.not, ptr %0, ptr %3
  %.not31 = icmp eq ptr %8, null
  %.028 = select i1 %.not31, i32 0, i32 %9
  %13 = zext i8 %1 to i32
  %14 = shl nuw i32 %13, 24
  %.not32 = icmp eq i32 %11, 0
  %15 = select i1 %.not32, i32 1, i32 2
  %16 = or disjoint i32 %15, %14
  %17 = tail call zeroext i1 @nem_transaction_write_common(ptr noundef %0, i32 noundef 257, i32 noundef %16, i32 noundef %2, ptr noundef %spec.select, i64 noundef %4, i32 noundef %5)
  br i1 %17, label %18, label %37

18:                                               ; preds = %12
  %19 = tail call zeroext i1 @nem_write_tagged(ptr noundef %0, ptr noundef %6, i32 noundef 40)
  br i1 %19, label %20, label %37

20:                                               ; preds = %18
  %21 = tail call zeroext i1 @nem_write_u64(ptr noundef %0, i64 noundef %7)
  br i1 %21, label %22, label %37

22:                                               ; preds = %20
  %.not33 = icmp eq i32 %.028, 0
  br i1 %.not33, label %31, label %23

23:                                               ; preds = %22
  %24 = add i32 %.028, 8
  %25 = tail call zeroext i1 @nem_write_u32(ptr noundef %0, i32 noundef %24)
  br i1 %25, label %26, label %37

26:                                               ; preds = %23
  %27 = select i1 %10, i32 2, i32 1
  %28 = tail call zeroext i1 @nem_write_u32(ptr noundef %0, i32 noundef %27)
  br i1 %28, label %29, label %37

29:                                               ; preds = %26
  %30 = tail call zeroext i1 @nem_write_tagged(ptr noundef %0, ptr noundef %8, i32 noundef %.028)
  br i1 %30, label %33, label %37

31:                                               ; preds = %22
  %32 = tail call zeroext i1 @nem_write_u32(ptr noundef %0, i32 noundef 0)
  br i1 %32, label %33, label %37

33:                                               ; preds = %31, %29
  br i1 %.not32, label %36, label %34

34:                                               ; preds = %33
  %35 = tail call zeroext i1 @nem_write_u32(ptr noundef %0, i32 noundef %11)
  br i1 %35, label %36, label %37

36:                                               ; preds = %34, %33
  br label %37

37:                                               ; preds = %34, %31, %29, %26, %23, %20, %18, %12, %36
  %.0 = phi i1 [ true, %36 ], [ false, %12 ], [ false, %18 ], [ false, %20 ], [ false, %23 ], [ false, %26 ], [ false, %29 ], [ false, %31 ], [ false, %34 ]
  ret i1 %.0
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass