Resistive switching random access memory, materials and device engineering for 3D architecture [electronic resource]

Since NAND Flash faces challenges in continuing its rapid scaling, resistive switching random access memory (RRAM) has attracted significant attention due to its strong potential as a next generation memory device. A number of high-capacity RRAM chips have recently demonstrated the potential use of RRAM for solid-state storage applications. RRAM has outperformed NAND Flash in many aspects at the singe-device level, so the only remaining question is whether three dimensionally (3D) integrated RRAM can compete with 3D NAND Flash in the cost per bit. Therefore, it is necessary to develop a technology path towards 3D integration for future mass storage. This thesis describes a novel 3D vertical RRAM cross-point array architecture with a cost-effective fabrication process. This 3D RRAM concept is experimentally demonstrated using a double-layer stacked HfOx-based RRAM structure. The device shows excellent and consistent switching characteristics among all the layers, suggesting the potential of stacking even more layers. In the first part of the thesis, a comprehensive overview of vertical-RRAM research, ranging from memory architecture design, corresponding read/write schemes, device fabrication and characterization, interface engineering, array demonstrations, scaling limit investigations, array write-operation robustness, and array analysis is described. Results obtained from both simulations and experiments illustrate the benefits and feasibility of a 3D multi-layer stacked vertical RRAM array. The second part of the thesis presents the exploration of future memory devices with the use of carbon-based nano-materials in resistive switching memories. First, an electrode/oxide interface with inserted single-layer graphene (SLG) raises the low resistance state (LRS) resistance (> M [omega]) due to its intrinsically high out-of-plane resistance in RRAM. The raised LRS enables the design of larger array sizes because applied voltages will drop mostly on memory cells instead of on the interconnect. Next, the interface between the oxide layer and metal electrode is studied using Ramen spectroscopy coupled with electrical measurement. Raman mapping and single point measurements show noticeable changes in both D-band and G-band signals of SLG during electrical cycling. This observation suggests an alternative method to study switching mechanisms in RRAM. Finally, laser scribing is described as an attractive graphene growth and patterning technology because the process is low-cost, time-efficient, transfer-free, and flexible. A low-cost, transfer-free, flexible resistive switching device is demonstrated based on laser-scribing reduced graphene oxide (rGO) that exhibits forming-free behavior and stable switching up to 100 cycles. Moreover, reasonable reliability performance and 2-bit storage capability are demonstrated. The control experiments investigate the conducting mechanism of the resistive switching, and the temperature-dependent electrical measurement sheds further light on the working principles of the fabricated resistive switching device.

Keywords: Electrical Engineering.
Advisor: Wong Hon-Sum Philip
Mitra Subhasish advisor. Thesis advisor
Nishi Yoshio