Nanoelectromechanical relays for energy-efficient, integrated systems [electronic resource]

As CMOS transistors scale to smaller technology nodes and gate lengths become shorter, the passive power loss of CMOS devices becomes higher and CMOS-based electronics waste more energy in their off-state. This leads to shorter battery life, thus limiting the size and lifetime of untethered devices such as mobile phones, medical implants, wireless sensors and aerospace systems. Nanoelectromechanical (NEM) relays, which feature zero off-state leakage current and near-zero subthreshold slope, are ideal devices for low-energy electronics. As components in integrated CMOS-NEM systems, relays have the potential to greatly reduce overall power usage and footprint. I will first discuss the advantages of electrostatic NEM relays over other relay designs including low actuation voltages, hysteresis, good scaling behavior, and flexible materials and processing choices. A review of device physics illuminates some design requirements for better performance. Promising applications for integrated CMOS-NEM relay systems include logic and computation, low-energy memory, energy-efficient signal routing and energy management of power sources. Next, I present an advanced process flow for fabrication of CMOS-compatible NEM relays. I demonstrate back-end-of-line compatible fabrication of polysilicon germanium NEM relays with buried aluminum interconnect layer. The buried interconnect is protected from the release etch by a silicon nitride or alumina etchstop layer. A titanium nitride barrier layer prevents spiking of the aluminum into the structural layer. Ohmic contact performance is enhanced by using an ALD ruthenium or ALD titanium nitride contact layer. A lifetime of 900,000 cycles with contact resistance under 100MΩ has been observed among ruthenium-coated devices in a nitrogen ambient. Additional design considerations, such as a compliant contact etching and high overdrive voltage, can lead to contact resistances under 500Ω. Analysis of thermal behavior at the contact promises to further lower resistance, prevent welding or predict welding for use in semi-permanent latching structures. I present experimental data which closely matches an advanced model of NEM relay thermal behavior, as well as operation of a thermally "latching" electrostatic relay. Finally, device characteristics are compared with prior work. Previous designs of laterally-actuated electrostatic relays show lower resistance at higher cycles, but do not show CMOS-compatible processing. Other prior work shows CMOS-compatible processing with good performance, but does not demonstrate buried device layers. The work presented in this thesis represents a step forward in the demonstration of NEM relays for back-end-of-line compatible processing by demonstrating working relays with buried aluminum interconnect for the first time. Suggested further work includes scaling of devices to achieve CMOS-compatible actuation voltages and encapsulation to prevent premature degradation of the contact.

Keywords: Mechanical Engineering.
Advisor: Cutkosky Mark R. primary advisor. Thesis advisor
Howe Roger Thomas primary advisor. Thesis advisor
Kenny Thomas William advisor. Thesis advisor
Wong Hon-Sum Philip