Novel phototransistors for optical interconnect [electronic resource]

Scaling down the dimensions of electronic devices has driven dramatic improvements in the performance of logic elements, but not as much in the performance of on/off-chip interconnects. While individual logic elements have become smaller, faster, and more power efficient as feature sizes have shrunk, the communication bandwidth, latency, and power consumption have not benefited from the scaling down of feature sizes. As a result, conventional metal interconnects already constitute a serious performance bottleneck in today's high performance silicon chips, one that will be more problematic in the future. While optical interconnects avoid the resistive loss and the capacitive physics of metal wires, and thus can help to meet latency and bandwidth requirements, the energy per bit of optical interconnects is high compared to that of their metal counterparts, except for long wires. Since the receiver circuit, which converts incoming optical signal to electric signal, consumes most of the power, it is important to minimize the power consumption of that circuit. This dissertation presents three novel optoelectronic devices, or phototransistors, and their operation mechanism. Rather than collect generated electron-hole pairs directly, these devices use the generated carriers to change the band bending in the gate or in the substrate, and thereby modulate the output current. The operation mechanism is based on a quantitative formulation and verified with simulation results on a test structure. The formulation is two-fold; first, the response of a phototransistor depends on the flux of the incident light, and thus shows a possibility of scaling down without sacrificing responsivity; second, this phototransistor utilizes the linear relationship between the logarithm of incident light and the gate voltage shift. As proofs that operation mechanism is functional, I implemented the mechanism with an upside-down and a stacked-gate phototransistor, which operate as devices complementary to a photodetector. Both devices demonstrate a linear relationship between the logarithm of the incident light and the shift in the gate voltage, which accords with the quantitative formulation. The upside-down device shows a gate voltage shift of 0.42V with 0.1mW of 850nm wavelength light, while the stacked-gate device shows a gate voltage shift of 0.15V with 0.15mW of 1550nm wavelength light. These phototransistors enable a light-to-latch operation and the elimination of high-power consuming receiver circuits, when they are used in conjunction with photodiodes operated in the conventional photoconductive mode. I also have implemented the mechanism with a depletion-mode MOSFET based phototransistor, which operates as a high-performance photodetector. This phototransistor has demonstrated a number of advantages, including very high efficiency (> 100A/W), scalability, and CMOS compatibility. The demonstrated device has sub-wavelength dimensions, and simulation suggests that the gate length of this device can be scaled down to have a small output capacitance and a higher transconductance. These advantages suggest the possibility that we can solve two of the most challenging problems with the power requirements of the optical interconnect: power consumption in the light emitter and in the receiver. This phototransistor's high responsivity requires less optical power from the light emitter to achieve an acceptable signal-to-noise ratio and the device's scalability opens up the possibility of a small output capacitance, which would thereby reduce power consumption in the receiver circuit.

Keywords: Electrical Engineering
Advisor: Saraswat Krishna primary advisor. Thesis advisor
Harris J. S. (James Stewart)
Miller D. A. B. advisor. Thesis advisor