Resistive switching memory for non-volatile storage and neuromorphic computing [electronic resource]
Keywords: Electrical Engineering.

As CMOS scaling will soon approach its physical limit, it is necessary to consider new computing paradigms that continue to improve computing system performance. The functionality and performance of today's computing system are increasingly dependent on the characteristics of the memory sub-system. Conventional memories technologies such as SRAM, DRAM, and FLASH are facing formidable device scaling challenges. Emerging memory technologies may bring enormous opportunities for architecture evolution or revolution of the computing system in the future. Among various emerging memory technologies, oxide based resistive switching memory (RRAM) stands out due to its simple structure, low switching voltage (< 3 V), fast switching speed (< 10 ns), excellent scalability (< 10 nm), and great compatibility with the CMOS technology. During the development of the RRAM technology, key challenges include unclear physics of resistive switching in oxides, relatively poor uniformity and large variability of the switching parameters. The works in this dissertation aim to address those issues above. The physical mechanism of resistive switching is generally attributed to the conductive filament (made up of oxygen vacancies) formation and rupture in the oxide due to field assisted oxygen ion migration. As a model system for device physics study, HfOx based RRAM devices were fabricated and characterized. To identify the conduction mechanism, various electrical characterization techniques such as I-V measurements at various temperatures, low-frequency noise measurements, and AC conductance measurements were employed. It was suggested that the trap-assisted-tunneling is the dominant conduction mechanism. In order to explore the oxygen ion migration dynamics, pulse switching measurements were performed. An exponential voltage-time relationship was found between the switching time and the applied voltage. To obtain a first-order understanding of the variability of resistive switching, a Kinetic Monte Carlo (KMC) numerical simulator was developed. The generation/recombination/migration probabilities of oxygen vacancies and oxygen ions were calculated, and the conductive filament configuration was updated stochastically according to those probabilities. The KMC simulation can reproduce many experimental observations in the DC I-V sweep, pulse switching, endurance cycling, and retention baking, etc. The tail bits in the resistance distribution are attributed to the oxygen vacancy left over in the gap region due to a competition between the oxygen vacancy generation and recombination. To enable circuit and system development using RRAM, a compact device model was developed, which can be employed in many commonly available circuit simulators using the SPICE engine. One promising application for the RRAM technology is to serve as the synaptic device for the hardware implementation of neuromorphic computing. The gradual resistance modulation capability in RRAM was utilized for emulating analog synapses, and the stochastic switching behavior in RRAM was utilized for emulating binary synapses. In order to evaluate the effectiveness of analog synapses and binary synapses, a simulation of winner-take-all network was performed based on the parameters extracted from the experiments. The simulation suggests that the orientation classification can be effectively realized using both analog synapses and binary synapses. The system functionality is found to be robust against the RRAM device variability due to the adaptive algorithm and parallelism of the neural network.