SeedLM: Compressing LLM Weights into Seeds of Pseudo-Random Generators

## Abstract

Abstract Large Language Models (LLMs) have transformed natural language processing, but face significant challenges in widespread deployment due to their high runtime cost. In this paper, we introduce SeedLM, a novel post-training compression method that uses seeds of pseudo-random generators to encode and compress model weights. Specifically, for each block of weights, we find a seed that is fed into a Linear Feedback Shift Register (LFSR) during inference to efficiently generate a random matrix. This matrix is then linearly combined with compressed coefficients to reconstruct the weight block. SeedLM reduces memory access and leverages idle compute cycles during inference, effectively speeding up memory-bound tasks by trading compute for fewer memory accesses. Unlike state-of-the-art compression methods that rely on calibration data, our approach is data-free and generalizes well across diverse tasks. Our experiments with Llama 3 70B, which is particularly challenging to compress, show that SeedLM achieves significantly better zero-shot accuracy retention at 4- and 3-bit than state-of-the-art techniques, while maintaining performance comparable to FP16 baselines. Additionally, FPGA-based tests demonstrate that 4-bit SeedLM, as model size increases to 70B, approaches a 4x speed-up over an FP16 Llama 2/3 baseline.

## 1 Introduction

Large Language Models (LLMs) have demonstrated impressive performance across numerous benchmarks (Achiam et al., ; Touvron et al., ). However, the practical deployment of these models often encounters limitations due to substantial memory transfer requirements. This issue is especially pronounced during autoregressive generation, which is primarily memory-bound and takes the majority of the inference time (Lee et al., ). In contrast, operations like 8-bit integer multiplication performed at 45nm 0.9V are demonstrated to be over 800x more energy-efficient than reading the same 8 bits from DRAM (Horowitz, ). In this paper, we explore the following question: Can we trade a reasonable increase in compute for a reduction in memory accesses? A positive answer here not only transforms energy-intensive memory access operations into more energy-efficient compute operations but also alleviates the memory bandwidth limitations that pose a significant bottleneck during LLM inference.

Post-training weight compression is an effective method to reduce the size of pretrained LLMs, making them suitable for on-device execution or reducing power consumption through fewer memory reads. Current state-of-the-art techniques for compressing weights typically require calibration data and involve meticulously adjusting the weights to ensure that the learned knowledge is retained.

We introduce SeedLM, a simple yet effective compression technique which can compress weights to 3-4 bits with minimal accuracy loss. SeedLM is an innovative method for compressing the weights of LLMs
by projecting weight blocks into pseudo-random projection basis sets. By finding the optimal seeds to generate these pseudo-random projections per weight block, SeedLM ensures a low compression error and consequently, maintains the accuracy of the original model. Our approach only requires storing the seed and few projection coefficients instead of all the weight values to reconstruct high dimensional weight blocks.

As a result, SeedLM significantly reduces the memory footprint required for operating large-scale models during inference. To generate pseudo-random matrix blocks given a seed, we leverage Linear Feedback Shift Register (LFSR) hardware blocks that are widely used in applications such as cryptography, communication, and error detection (Gaitonde & Ramabadran, ; Zeng et al., ; Xiang et al., ). LFSRs can be efficiently implemented in the silicon with minimal energy and area footprint.

Figure 1 shows the Retained Accuracy (%), which is the ratio of the compressed model’s accuracy to the full-precision FP16 model’s accuracy, on the Llama 3 70B model. As illustrated, SeedLM retains approximately 97.9% of the zero-shot accuracy on average across various tasks in a data-free setting, using 4 bits per weight element (see Section 4.1 for more details). It also consistently outperforms state-of-the-art 3-bit and 4-bit compression techniques that rely on calibration data. To the best of our knowledge, this is the first time nearly identical accuracy has been achieved with 4-bit compression on LLMs without data, using a deterministic offline algorithm.

Figure: Figure 1: Retained zero-shot accuracy across a variety of tasks and compression methods, compared to the FP16 Llama 3 70B model. The top row shows data for 4-bit compression, while the bottom row shows data for 3-bit compression. We compare the performance of SeedLM, AWQ, and OmniQuant across the ARC-Easy, ARC-Challenge, HellaSwag, WinoGrande, and BoolQ tasks. While being completely data-free, SeedLM outperforms state-of-the-art weight quantization methods that rely on a calibration dataset.
Refer to caption: x1.png

In summary, our key contributions are:

- •
We demonstrate, for the first time, how LFSR hardware blocks can be leveraged to trade increased compute for reduced memory accesses.
- •
We show the first instance of achieving nearly identical accuracy with 4-bit quantization without data, using a deterministic offline algorithm.
- •
We demonstrate an effective solution to find the optimized seed for the LFSR modules while maximizing compression ratio.
- •
We prototype SeedLM on an FPGA (Field-Programmable Gate Array) and demonstrate its efficacy in reducing the inference latency with custom hardware.

## 2 Related Work

Significant research has been conducted in model compression for LLMs, a critical approach for reducing both the memory footprint and computational demands of these models. In this section, we highlight some of the most relevant techniques from prior work.

Compression With Random Basis: Recent works have demonstrated that neural networks can be decomposed into random number generator seeds and weight coefficients. In PRANC (Nooralinejad et al., ), full networks are compressed by orders of magnitude to improve storage and transmission efficiency. LoRA (Hu et al., ) compresses the weights by injecting trainable rank decomposition matrices into each layer of the network. NOLA (Koohpayegani et al., ) builds upon LoRA by compressing the low-rank matrices through a linear combination of random basis vectors, further reducing memory and computational overhead.

Our work (SeedLM) is conceptually similar in that we compress networks using a random basis. However, a key distinction from NOLA is that they do not utilize lightweight pseudo-random generator modules. Thus, they haven’t demonstrated the ability to efficiently generate weights on-the-fly by colocating weight generation with computation. Additionally, unlike SeedLM, they don’t find an optimal seed but instead rely on a random seed. These models also use much larger basis ranks applied globally rather than per-block, leading to significantly more operations per parameter to preserve accuracy, making them computationally infeasible for LLM inference.

Data-Free Post-Training Compression: A few previous works have explored data-free post-training compression (Nagel et al., ; Horton et al., ; Nunez et al., ). Such works are capable of producing a compressed model after training without the need for calibration data. They usually apply quantization or pruning techniques to obtain a smaller model. Similarly, SeedLM does not require any data for model compression. This is in contrast to most recent works on LLM compression, which require calibration data.

There are more computationally expensive methods for data-free compression that involve generating data from a teacher model and performing distillation (Lopes et al., ; Gou et al., ). These techniques are applied to LLMs as demonstrated in Liu et al. ().

Post-Training Compression with Calibration Data: An early example of post-training quantization with calibration data is found in Nagel et al. (), where activation statistics are used to decide whether to round quantized values up or down. The cost of post-training quantization is a small fraction of the total training cost.

Recently, calibration data has been leveraged for post-training compression in LLMs. AWQ (Lin et al., ) rescales salient weights before compression using activation statistics. In QuIP# (Tseng et al., ) and GPTQ (Frantar et al., ), Hessian analysis of calibration data helps make rounding decisions during quantization. SpQR (Dettmers et al., ) retains outliers during quantization to preserve accuracy. OmniQuant (Shao et al., ) employs weight clipping and other transformations to maintain accuracy. Additive Quantization (Egiazarian et al., ) learns a codebook for performing additive quantization. In our study, we used AWQ, QuIP#, and OmniQuant as our main baselines because they avoid costly training while delivering strong results.

Training-Aware Compression: Compressing the model during the training process has the disadvantage of fixing the compression method and parameters beforehand, but usually offers better accuracy. An overview of quantization-aware training is provided in Jacob et al. (); Nagel et al. (); Xi et al. (), while pruning techniques are discussed in Alizadeh-Vahid et al. (); Sun et al. (); Kusupati et al. (); LeCun et al. (). In Rouhani et al. (), stable training and post-training quantization are demonstrated using hardware-friendly 4-8 bit weights, activations, and gradients with minimal accuracy loss by utilizing micro-scaled data formats.

In this work, we focus on post-training weight compression with SeedLM, and in the following sections, we outline our methodology and present the results.

## 3 Methodology

In this section, we introduce SeedLM, our method for compressing the weights of LLMs by using seeds from a pseudo-random generator. Initially, each weight matrix is segmented into blocks of $C$ contiguous elements. Representing each block as a vector $\mathbf{w}\in\mathbb{R}^{C}$, we approximate it as a linear combination of columns from a matrix $\mathbf{U}\in\mathbb{R}^{C\times P}$. This matrix $\mathbf{U}$ is constructed using a pseudo-random generator given a seed specifically selected to generate a subspace that most effectively reconstructs $\mathbf{w}$ linearly.

Figure 2 illustrates this setup. Our primary goal is to find the optimal seed, $s$, and coefficient vector, $\mathbf{t}\in\mathbb{R}^{P}$, that minimize the reconstruction error between the original and the approximated weights. For this reconstruction, only the seed and the coefficients are stored. In the following subsection, we first outline a mechanism to efficiently generate
$\mathbf{U}$ using a $K$-bit seed in our Linear Feedback Shift Register (LFSR) framework. We will then discuss the methodologies employed to determine
$s$ and $\mathbf{t}$.

Figure: Figure 2: Compression of weights using pseudo-random generated matrices.

### 3.1 Linear Feedback Shift Register (LFSR)

A Linear Feedback Shift Register (LFSR) is a simple yet effective type of shift register, ideal for generating pseudo-random binary sequences. The primary advantages of LFSRs in hardware include cost-effectiveness and minimal resource consumption due to their straightforward implementation with basic flip-flops and XOR gates. This simplicity facilitates rapid and efficient sequence generation, which is integral to our compression technique.

An LFSR operation can be characterized by its length $K$ (which determines the number of bits in its shift register) and its feedback polynomial. To generate next pseudo-random number in the sequence, each bit in the register is first shifted to the next position. Then, the new bit entering the register is calculated as a linear combination of certain bits of the current state as specified by the feedback polynomial, typically implemented by XOR operations. Mathematically, the new bit $x_{n+1}$ generated by the LFSR can be expressed as:

$$ $x_{n+1}=\sum_{i=0}^{K-1}\alpha_{i}\cdot x_{n+i-K+1}\mod 2,$ $$

where $K\!\geq\!2$ and $\alpha_{0},\ldots,\alpha_{K}$ are the binary coefficients that define the feedback polynomial, with each $\alpha_{j}$ determining whether the bit $x_{j}$ is selected or not.

The state transition in the LFSR can be described as follows: if the current state is represented by the bits $x_{n},x_{n-1},\ldots,x_{n-K+1}$, then after the shift, the new state will be $x_{n+1},x_{n},\ldots,x_{n-K+2}$. This transition reflects the shift of every bit to the right by one position, with the new bit $x_{n+1}$ entering at the leftmost position.
Given its finite state nature, an LFSR will eventually enter a repeating cycle, suggesting an asymptotic uniform distribution over this cycle. An LFSR can cycle through at most
$2^{K}\!-\!1$ states, excluding the all-zero state.

A key goal when designing an LFSR is to guarantee a maximal-length sequence. This ensures that the LFSR will produce the longest possible sequence of non-repeating states before repeating. Intuitively, this means the LFSR will cycle through every possible state (except the all-zero state), maximizing the number of distinct pseudo-random values generated. To achieve this maximal-length property, the feedback polynomial must be primitive over the Galois field GF(2). In simple terms, a primitive polynomial ensures that the LFSR explores all $2^{K}\!-\!1$ states without prematurely entering a repeating cycle.

For our experiments, this means a fixed set of coefficients $\{\alpha_{j}:0\leq j\leq K\!-\!1\}$ that is hard-wired, ensuring maximal length if and only if it avoids the all-zero state, in which it stays in zero. Refer to Section A.1 for the indexed $j$ coefficients used for each $K$ where $\alpha_{j}$ equals one; all other coefficients are zero. For a comprehensive understanding of LFSRs and their properties, see (Bhattacharjee & Das, ).

To optimize the efficiency of generating random matrices through an LFSR, for a fixed length $K$ and a set of coefficients $\{\alpha_{j}\}$, we cache all the
$2^{K}\!-\!1$ states that sequentially follow each other – each state uniquely determined by its preceding state along with
$K$ and $\{\alpha_{j}\}$. This cache allows us to extract an arbitrarily sized random matrix from the sequence given a random seed $s$, where the matrix begins to fill up starting from the first value generated by the LFSR after the seed, not the seed itself. We can cycle through these states to generate matrices of any desired size. For an illustration, refer to Figure 3. With $K\!=\!16$ and a maximal length LFSR, all states will occupy approximately $(2^{16}\!-\!1)\times 2\text{ Bytes}\approx 130$KB of memory, which is negligible. This setup ensures a highly efficient and scalable mechanism for generating the necessary random matrices for our compression technique. $K$ is a hyper-parameter of our method which we will elaborate on in Section 3.4.

Figure: Figure 3: Illustration of the state sequence for a $K\!=\!3$ LFSR with all possible states with the feedback polynomial defined in Table A.1. The matrix $\mathbf{V}(4)$ starts filling with the value generated one cycle after the seed state $s\!=\!4$, which is highlighted with a thick circle.

### 3.2 Weight Compression Using Pseudo-Random Generators

Building on the foundations laid by the LFSR mechanisms, our methodology seeks to represent a block of data $\mathbf{w}\in\mathbb{R}^{C}$ using the decomposition $\mathbf{U}(s)\mathbf{t}$. Here, $\mathbf{U}(s)\in\mathbb{R}^{C\times P}$ is a random matrix derived from a $K$-bit maximal-length LFSR, ensuring the full sequence of possible states is used. As the output of the LFSR is in the range of $[1,2^{K}\!-\!1]$, which are unsigned integers, we normalize them to ensure they fall within the range of $[-1,1]$, enhancing their expressiveness. Importantly, the seed $s$ used to initialize the LFSR is non-zero to avoid the degenerate all-zero state. More specifically, to construct $\mathbf{U}(s)$, we first generate a matrix $\mathbf{V}(s)$ using an LFSR seeded by $s$ as illustrated in Figure 3. This matrix initially contains integers and undergoes the following normalization to ensure that its components lie between $[-1,1]$:

$$ $\mathbf{U}(s)=\frac{1}{2^{K-1}-1}\left(\mathbf{V}(s)-2^{K-1}\mathbf{1}\right),$ (1) $$

where $\mathbf{1}\in\mathbb{R}^{C\times P}$ represents a matrix of all ones, and $K$ is the LFSR bit length. To determine the optimal seed and coefficients, we solve the following optimization problem:

$$ $\displaystyle\underset{s,\mathbf{t}}{\text{minimize}}\quad\lVert\mathbf{w}- \mathbf{U}(s)\mathbf{t}\rVert_{2}^{2},\quad\text{subject to:}\quad s\in\{1, \dots,2^{K}-1\},\quad\text{and}\quad\mathbf{t}\in\mathcal{Q},$ (2) $$

where $\lVert\cdot\rVert$ denotes the Euclidean norm, and $\mathcal{Q}$ represents the set of valid quantized values. The objective is to identify an optimal seed $s^{*}$ and coefficients $\mathbf{t}^{*}$ that most effectively approximate $\mathbf{w}$. This problem is NP-hard due to the discrete nature of the seed selection and the quantization of coefficients since it involves searching through a combinatorially large set of possibilities. Next, we describe the design choices and heuristics used to solve the problem.

The quantization scheme for the vector $\mathbf{t}$ plays a critical role in balancing reconstruction accuracy with bit efficiency, adhering to our bit budget constraints. We represent each element of $\mathbf{t}$ as a 4-bit two’s complement integer, paired with a shared 4-bit exponent. This configuration allows us to capture a broad dynamic range of values within the interval $[-8\times 2^{-8},7\times 2^{7}]$. The shared 4-bit exponent further extends the dynamic range, enabling representation across several orders of magnitude. We have specifically chosen for the exponent to be a power of two, which is hardware-friendly and can be efficiently implemented using simple shift operations in digital circuits; see (Darvish Rouhani et al., ). By combining the 4-bit integer with the shared exponent, each quantized element is expressed as $t_{i}=q_{i}\times 2^{e}$, where $q_{i}$ is the 4-bit two’s complement integer and $e$ is the shared exponent. The shared exponent $e$ is selected as:

$$ $e=\max_{i}\left\lfloor\log_{2}\left(\left|t_{i}\right|\right)\right\rfloor,$ $$

where $\left|t_{i}\right|$ is the absolute value of each element of $\mathbf{t}$. After determining $e$, each $t_{i}$ is scaled by dividing it by $2^{e}$, and then quantized to a 4-bit two’s complement integer to derive $q_{i}$.

### 3.3 Approximation Approach

Looking back at the optimization problem in Eq. 2, while the unconstrained case admits a closed-form solution given by $\mathbf{U}(s)^{\dagger}\mathbf{w}$, where $\mathbf{U}(s)^{\dagger}$ denotes the Moore-Penrose pseudo-inverse of $\mathbf{U}(s)$, our discrete constraints convert it to an NP-hard optimization problem. Hence, to solve Eq. 2, we employ an approximate heuristic approach that involves the following steps:

- 1.
Generate $N=2^{K}\!-\!1$ random matrices $\{\mathbf{U}(s_{1}),\mathbf{U}(s_{2}),\dots,\mathbf{U}(s_{N})\}$, each of size $C\times P$, with an LFSR of length $K$ based on Eq. 1 and $s_{j}\!:=\!j$.
- 2.
For each matrix $\mathbf{U}(s_{j})$, project the vector $\mathbf{w}$ onto the subspace spanned by $\mathbf{U}(s_{j})$:
$\mathbf{t}_{j}=\mathbf{U}(s_{j})^{\dagger}\mathbf{w}.$
- 3.
Quantize $\mathbf{t}_{j}$ to obtain the vector $\hat{\mathbf{t}}_{j}$ using 4-bit integers and a 4-bit shared exponent $e_{j}$.
- 4.
Compute the reconstruction error for each pair $(\mathbf{U}(s_{j}),\hat{\mathbf{t}}_{j})$ as follows:
$\epsilon_{j}=\|\mathbf{w}-\mathbf{U}(s_{j})\hat{\mathbf{t}}_{j}\|_{2}^{2}.$
- 5.
Select the pair $(\hat{s^{*}},\hat{\mathbf{t}^{*}})$ that minimizes the reconstruction error:
$(\hat{s^{*}},\hat{\mathbf{t}^{*}})=\arg\min_{s_{j},\hat{\mathbf{t}}_{j}}
\epsilon_{j}.$
(3)

Our heuristic algorithm leverages randomness to explore multiple subspaces and selects the one that best approximates $\mathbf{w}$ under the given constraints.

In summary, we apply the above heuristics across all weight blocks in parallel to find the seeds and coefficients that minimize the reconstruction error. To enhance computational efficiency, we precompute and cache the pseudo-inverse matrices for all seeds and perform steps 2–5 in parallel across all blocks. This process is summarized in Algorithm 1. The inner loop can also be parallelized, and for the chosen $C$, $P$, and $K$ in the following design space exploration, the pseudo-inverses take up around 6.3MB at most, which is negligible.

Figure: Algorithm 1 Seed and Coefficient Selection for a Weight Block

### 3.4 Design Space Exploration

The minimum reconstruction error obtained from Eq. 3 depends on the block size $C$, the latent dimension $P$, and the LFSR length $K$. Here, we explore how we select the optimal configuration for an $M$-bit compression. First, let’s examine the total number of bits required to store a SeedLM block of $C$ elements, which consists of the following:

- •
$K$ bits to index the selected random seed $\hat{s^{*}}$ to generate matrix $\mathbf{U}(\hat{s^{*}})$ among the $N\!=2^{k}\!-\!1$ candidates.
- •
4 bits to store the shared exponent $e$.
- •
$4P$ bits to store the quantized vector $\hat{\mathbf{t}^{*}}$ ($P$ elements each requiring 4 bits).

So, the effective bit per element is a function of hyper-parameters $K$, $C$, and $P$. In particular, for an $M$-bit compression, we have the bit budget per element as

$$ $M=\frac{K+4+4P}{C}.$ (4) $$

To determine the optimal configuration for a given bit budget per element, $M$, we evaluate the reconstruction accuracy of our method in the search space. Specifically, we explore how a standard normal Gaussian vector $\mathbf{w}$ can be approximated using any combination of valid hyperparameters given the bit budget $M$. While assuming a Gaussian distribution may have its limitations, it has proven effective within our design space and aligns well with real-world benchmarks. Our objective is to find appropriate values for block size $C$, latent dimension $P$, and LFSR length $K$, such that the reconstruction error is minimized when the optimal seed is selected. More specifically, let $\hat{s^{*}}_{C,P,K}$ and $\hat{\mathbf{t}^{*}}_{C,P,K}$ denote the solutions obtained from Eq. 3. For an $M$-bit compression, we solve the following optimization problem:

$$ $\displaystyle\mathbb{E}[\epsilon_{\min}]:=$ $\displaystyle\underset{C,P,K}{\text{min}}\quad\mathbb{E}\big{[}\lVert\mathbf{w }-\mathbf{U}(\hat{s^{*}}_{C,P,K})\hat{\mathbf{t}^{*}}_{C,P,K}\rVert_{2}^{2} \big{]},$ (5) $\displaystyle\text{subject to:}\quad MC=K+4+4P\quad\text{and}\quad C,K,P\in \mathcal{Z}^{+},$ $$

where $\mathcal{Z}^{+}$ represents the set of all positive integers. Since the optimization problem in (5) is not analytically tractable, we numerically solved it by conducting a grid search over $C$, $P$, and $K$ constrained to positive integers and the given bit budget. Understanding the trade-offs among $C$, $P$, and $K$ is important for optimizing the approximation within a given bit budget. Each of these parameters influences the overall performance and contributes to minimizing the reconstruction error.

One critical trade-off is between the LFSR seed length $K$ and the latent dimension $P$. Increasing $K$ reduces the expected minimum error $\mathbb{E}[\epsilon_{\min}]$ by providing more opportunities to find a better projection. However, this comes at a cost: as $K$ increases, the number of required bits grows, reducing the available bit budget for $P$. The objective is to find an optimal $K$ that effectively lowers $\mathbb{E}[\epsilon_{\min}]$ without overly constraining $P$, as that could lead to a significant increase in the overall error $\mathbb{E}[\epsilon_{\min}]$. Similarly, increasing $P$ helps capture more of the energy of the vector $\mathbf{w}$, thus reducing $\mathbb{E}[\epsilon_{\min}]$. However, this also requires more bits, which may limit the value of $K$. The key is to strike a balance where enough energy is captured without overly sacrificing the exploration of better projections through $K$. Finally, increasing $C$ expands the total bit budget, allowing for larger values of both $P$ and $K$. However, this also increases the potential for higher error, as expanding the space may dilute the precision of projections.

Overall, $C$, $P$, and $K$ are interdependent, and optimizing these parameters requires a careful numerical exploration of different combinations. Based on this analysis, we selected the configurations shown in Table 1 for $M\!=\!3$ and $M\!=\!4$, which are used in the experiments reported next.

**Table 1: Selected configurations of $C$, $P$, and $K$ for $M\!=\!3$ and $M\!=\!4$.**
| Bits per element $M$ | Block size $C$ | Latent dimension $P$ | LFSR seed length $K$ |
| --- | --- | --- | --- |
| 3 | 12 | 4 | 16 |
| 4 | 8 | 3 | 16 |

## 4 Experiments

We apply Algorithm 1 across all weight blocks of pretrained LLMs to find the seeds and coefficients that minimize reconstruction error (Eq. 3). Using the configurations from Table 1, we evaluate our compression methods in terms of accuracy and performance. Our experiments focus on Llama 2 and Llama 3 models (Touvron et al., ), and unlike other methods, SeedLM does not require fine-tuning or calibration data while still achieving competitive results. We assess model quality using perplexity and accuracy, followed by performance analysis through FPGA-based matrix multiplication with low-level LFSR generation. This highlights the cost and performance benefits of SeedLM, especially in hardware-constrained environments.

### 4.1 Accuracy Results

To evaluate the quality of SeedLM, we measure perplexity on the WikiText-2 dataset (Merity et al., ) and assess accuracy across various zero-shot tasks using the LM Evaluation Harness (Gao et al., )(^1^11For all compression methods, we use LM Evaluation Harness v0.4.3 and the following task versions: arc-challenge=1.0, arc-easy=1.0, hellaswag=1.0, winogrande=1.0, boolq=2.0.). We compare our method against established compression techniques such as AWQ (Lin et al., ), OmniQuant (Shao et al., ), and QuIP# (Tseng et al., ), using the official GitHub repositories for each baseline as of September 2024. A key strength of SeedLM is that it can operate entirely data-free, in contrast to other methods that require calibration data to achieve comparable results. For the baseline methods, we use the default calibration sets from their official repositories. Our experiments involve Llama 2 models (7B, 13B, 70B) and Llama 3 models (8B, 70B), tested with 3-bit and 4-bit representations. In the case of AWQ and OmniQuant, we use 4-bit integers with channel-wise scaling to avoid significantly increasing the bits per element beyond the allocated 3 or 4 bits (since a group size of 128 in these methods adds roughly 0.25 extra bits per parameter). For QuIP# and OmniQuant, we ensure a fair comparison with SeedLM and AWQ by not performing fine-tuning on the quantized models. However, unlike SeedLM, all of them still require per-layer calibration, which relies on calibration data and activations, whereas SeedLM achieves its results without any data dependency.

To evaluate general language model performance, we measure perplexity on the WikiText-2 language modeling dataset, using 166 windows, each with a length of 2048 tokens, from the test data split. The results, as shown in Table LABEL:tab:wiki-manual, illustrate a clear trade-off between compression level and model quality. In some cases, larger models subjected to aggressive compression even underperform smaller models with milder compression. SeedLM consistently outperforms state-of-the-art compression techniques, particularly at higher compression levels. Notably, SeedLM achieves these results without the need for any calibration data.

Table: Table 2: WikiText-2 perplexity results for 3- and 4-bit representation of Llama 2 and Llama 3 models with a sequence length of 2048. The notation x-yB refers to the Llama x model with yB parameters (e.g., 2-7B means Llama 2 with 7 billion parameters). Perplexity values above 100 are shown as inf. The best perplexity values are highlighted, and results that ran out of memory on our setup (8 A100 40GB GPUs) are marked as OOM.

| Method | Bits | 2-7B | 2-13B | 2-70B | 3-8B | 3-70B |
| --- | --- | --- | --- | --- | --- | --- |
| Baseline | 16 | 5.5 | 4.9 | 3.3 | 6.1 | 2.9 |
| SeedLM | 4 | 5.7 | 5.1 | 3.5 | 7.0 | 3.8 |
| OmniQuant | 4 | 6.1 | 5.2 | 3.7 | inf | inf |
| AWQ | 4 | 5.8 | 5.1 | 3.5 | 7.1 | 4.7 |
| QuIP# | 4 | 6.5 | 5.3 | OOM | 7.6 | OOM |
| SeedLM | 3 | 6.6 | 5.8 | 4.0 | 10.1 | 5.7 |
| OmniQuant | 3 | inf | 10.7 | 7.5 | inf | inf |
| AWQ | 3 | 15.6 | 6.5 | 4.4 | 11.8 | 11.6 |
| QuIP# | 3 | 10.8 | 5.7 | OOM | 10.1 | OOM |

**Table 3: Performance comparison across different models and zero-shot tasks for $4$-bit and $3$-bit configurations. Results that ran out of memory in our setup ($8$ A100 40GB GPUs) are marked with OOM.**
| Model | Method | Bits | ARC-Easy | ARC-Challenge | HellaSwag | WinoGrande | BoolQ | Mean |
| --- | --- | --- | --- | --- | --- | --- | --- | --- |
| Llama 2<br>7B | Baseline | 16 | 74.58 | 46.33 | 75.98 | 69.06 | 77.74 | 68.74 |
| \cdashline2-9 | SeedLM | 4 | 73.23 | 44.54 | 74.45 | 68.43 | 77.19 | 67.57 |
|  | AWQ | 4 | 70.58 | 43.94 | 74.96 | 68.75 | 78.29 | 67.30 |
|  | QuIP# | 4 | 68.35 | 39.85 | 72.40 | 65.59 | 75.14 | 64.27 |
|  | OmniQuant | 4 | 70.71 | 43.52 | 74.20 | 68.27 | 73.64 | 66.07 |
| \cdashline2-9 | SeedLM | 3 | 69.87 | 41.21 | 70.72 | 66.30 | 74.28 | 64.48 |
|  | AWQ | 3 | 53.37 | 33.62 | 56.66 | 61.09 | 57.58 | 52.46 |
|  | QuIP# | 3 | 59.51 | 34.22 | 59.23 | 61.09 | 65.20 | 55.85 |
|  | OmniQuant | 3 | 35.69 | 25.77 | 35.48 | 52.88 | 42.48 | 38.46 |
| Llama 2<br>13B | Baseline | 16 | 77.44 | 48.98 | 79.38 | 72.22 | 80.55 | 71.71 |
| \cdashline2-9 | SeedLM | 4 | 76.98 | 49.83 | 78.54 | 72.77 | 79.20 | 71.46 |
|  | AWQ | 4 | 77.44 | 49.32 | 78.57 | 71.90 | 78.47 | 71.14 |
|  | QuIP# | 4 | 74.24 | 45.48 | 77.17 | 71.27 | 79.51 | 69.53 |
|  | OmniQuant | 4 | 76.18 | 47.95 | 78.10 | 72.14 | 81.77 | 71.23 |
| \cdashline2-9 | SeedLM | 3 | 72.85 | 45.39 | 74.50 | 71.35 | 78.81 | 68.58 |
|  | AWQ | 3 | 70.58 | 45.14 | 72.72 | 64.96 | 72.45 | 65.17 |
|  | QuIP# | 3 | 73.48 | 45.14 | 74.92 | 69.06 | 79.60 | 68.44 |
|  | OmniQuant | 3 | 55.85 | 34.47 | 59.54 | 53.04 | 63.39 | 53.26 |
| Llama 2<br>70B | Baseline | 16 | 80.98 | 57.25 | 83.81 | 77.98 | 83.70 | 76.74 |
| \cdashline2-9 | SeedLM | 4 | 81.14 | 56.40 | 82.97 | 76.72 | 82.26 | 75.90 |
|  | AWQ | 4 | 80.98 | 56.66 | 83.24 | 77.19 | 83.27 | 76.27 |
|  | QuIP# | 4 | OOM | OOM | OOM | OOM | OOM | OOM |
|  | OmniQuant | 4 | 79.59 | 55.97 | 82.67 | 76.80 | 83.43 | 75.69 |
| \cdashline2-9 | SeedLM | 3 | 79.00 | 53.84 | 80.51 | 76.80 | 79.02 | 73.83 |
|  | AWQ | 3 | 80.26 | 55.80 | 80.50 | 73.01 | 80.00 | 73.91 |
|  | QuIP# | 3 | OOM | OOM | OOM | OOM | OOM | OOM |
|  | OmniQuant | 3 | 63.59 | 39.51 | 68.24 | 62.04 | 65.23 | 59.72 |
| Llama 3<br>8B | Baseline | 16 | 76.81 | 52.73 | 76.97 | 72.93 | 81.87 | 72.26 |
| \cdashline2-9 | SeedLM | 4 | 76.52 | 49.74 | 76.61 | 72.93 | 80.76 | 71.31 |
|  | AWQ | 4 | 74.49 | 51.54 | 78.03 | 73.09 | 80.40 | 71.51 |
|  | QuIP# | 4 | 72.39 | 46.93 | 75.93 | 71.82 | 79.24 | 69.26 |
|  | OmniQuant | 4 | 73.95 | 47.78 | 73.42 | 69.69 | 71.99 | 67.37 |
| \cdashline2-9 | SeedLM | 3 | 67.21 | 41.55 | 68.34 | 69.22 | 67.61 | 62.79 |
|  | AWQ | 3 | 64.90 | 40.19 | 68.40 | 65.04 | 74.62 | 62.63 |
|  | QuIP# | 3 | 65.07 | 40.36 | 67.79 | 68.82 | 72.14 | 62.84 |
|  | OmniQuant | 3 | 30.26 | 22.53 | 28.96 | 49.33 | 48.47 | 35.91 |
| Llama 3<br>70B | Baseline | 16 | 85.23 | 64.33 | 84.07 | 77.66 | 86.27 | 79.51 |
| \cdashline2-9 | SeedLM | 4 | 83.80 | 59.30 | 83.84 | 77.74 | 85.60 | 78.06 |
|  | AWQ | 4 | 80.98 | 57.94 | 82.84 | 60.54 | 79.39 | 72.34 |
|  | QuIP# | 4 | OOM | OOM | OOM | OOM | OOM | OOM |
|  | OmniQuant | 4 | 25.13 | 26.54 | 26.36 | 51.38 | 37.83 | 33.45 |
| \cdashline2-9 | SeedLM | 3 | 78.45 | 52.22 | 80.77 | 77.35 | 84.59 | 74.68 |
|  | AWQ | 3 | 65.87 | 45.14 | 70.76 | 55.88 | 69.08 | 61.35 |
|  | QuIP# | 3 | OOM | OOM | OOM | OOM | OOM | OOM |
|  | OmniQuant | 3 | 25.21 | 25.94 | 26.15 | 49.64 | 37.83 | 32.95 |

Next, we show zero-shot accuracy across various tasks. As seen in Table 3, SeedLM performs on par with or better than state-of-the-art methods at the same bit rates. This underscores SeedLM’s ability to maintain competitive accuracy without relying on calibration data. Note that Llama 3 is much more sensitive to compression than Llama 2, likely due to its more advanced architecture and significantly larger training dataset. Llama 3 was trained on $15$ trillion tokens, around seven times more than Llama 2’s 2 trillion tokens, enabling it to capture more detailed language patterns and nuances. This increased complexity and sensitivity to nuance make it less compressible without a noticeable drop in performance. However, as shown in Figure 1, SeedLM still significantly outperforms other state-of-the-art methods on Llama 3 in terms of Retained Accuracy (%), i.e. ratio of the compressed model’s accuracy to the full-precision FP16 model’s accuracy. This demonstrates that SeedLM is not only effective for such a complex model but is also robust across various tasks, maintaining high accuracy.

### 4.2 Performance Analysis

In this section, we shift our focus from accuracy to performance analysis on hardware. Specifically, we explore how SeedLM can be efficiently implemented on an FPGA. FPGAs are ideal for this task because they allow for highly parallelized computations and can be reconfigured to handle specific workloads, making them well-suited for running compressed models with lower bit rates that are not well supported by conventional GPUs. With an FPGA, the LFSR generation can be supported at a low-level in hardware rather than relying on relatively expensive software implementations.

To evaluate SeedLM on an FPGA, we benchmark matrix-vector multiplication – a core operation in most large language models – both with and without SeedLM’s 4-bit parametrization. Figure 4 shows the RTL design block diagram, with the target device being an AMD Virtex7 FPGA XC7V585T-3 ().

Figure: Figure 4: Block diagram of the RTL design.
Refer to caption: x2.png

The implementation utilizes 128 DSP48 slice multipliers in parallel, calculating 128 elements of the activation vector simultaneously. The DDR response interface has a maximum bandwidth of 64 bytes per 200 MHz clock cycle, and the data path is designed to compute at the maximum DDR response throughput. When SeedLM compression is bypassed, the LFSR weight decompression is also skipped.

In the reference design, FP16 weights are read directly from DRAM, bypassing decompression. Due to the DDR interface’s 64-byte bus width, a maximum of 32 weight values can be read per cycle, limiting the utilization to only 32 of the 128 MACs. With SeedLM’s 4-bit compression, however, 128 weight values can be read per cycle, resulting in a theoretical 4x performance improvement in memory access.

We use the reference implementation without compression (FP16 for all data) as a baseline to assess both performance and resource utilization on the FPGA. Table 4 provides a detailed comparison of the FPGA resource usage, including LUTs, FFs, BlockRAM, and DSP counts.

- •
LUT – FPGA Fabric Lookup Table, used to create combinational logic.
- •
FF – FPGA Fabric Register (Flip-Flop).
- •
BRAM – FPGA Block RAM (SRAM), each BlockRAM is 36Kb.
- •
DSPs – FPGA DSP48 resources, which include an 18-bit by 18-bit multiplier and accumulator.

**Table 4: FPGA resource utilization comparison**
|  | Total | MAC Block | LSFR Decompress | PreMAC Fix2Float |  |  |  |  |
| --- | --- | --- | --- | --- | --- | --- | --- | --- |
| Reference | SeedLM | Reference | SeedLM | Reference | SeedLM | Reference | SeedLM |  |
| LUTs | 20800 | 120105 | 9902 | 42174 | 0 | 67034 | 0 | 12292 |
| FFs | 10164 | 73666 | 3118 | 12594 | 0 | 45407 | 0 | 13448 |
| BRAMs | 10.5 | 154.5 | 0 | 0 | 0 | 144 | 0 | 0 |
| DSPs | 32 | 128 | 32 | 128 | 0 | 0 | 0 | 0 |

In the reference design, only 32 MACs are used due to the input bandwidth limitation of 64 bytes per cycle. The SeedLM design, utilizing 128 MACs per cycle, results in approximately a 4x increase in MAC Block resources, aligning with the expected performance improvement.

Table 4 reveals that SeedLM increases the total LUT count to 67K and register count to 45.4K, with the fixed-point to FP16 conversion accounting for 12.3K LUTs and 13.4K registers. The design includes 128 fully pipelined fixed-to-FP16 converters to sustain the DDR response data rate. We can note that performing all the compute in fixed-point math could eliminate the need for fixed-point to FP16 conversion, but this optimization is outside the scope of this paper. Table 5 shows the number of cycles required to complete matrix operations of various sizes, measured from the first DDR read to the final write to the activation SRAM. The SeedLM design achieves a 4x throughput compared to the reference design. As matrix size increases, the startup costs become less significant, leading the speedup to approach the theoretical 4x gain. In summary, SeedLM achieves near iso-accuracy at 4-bit compared to FP16, while offering close to a 4x speedup for memory-bound tasks such as generation in LLMs with billions of parameters and beyond.

**Table 5: Performance comparison for different matrix sizes**
|  | 512 × 512 | 1024 × 1024 | 2048 × 2048 |
| --- | --- | --- | --- |
| Reference | 8593 | 34201 | 136559 |
| SeedLM | 2341 | 8723 | 34331 |
| Speed Up | 3.67 | 3.92 | 3.98 |

## 5 Concluding Remarks

In this paper, we presented SeedLM, a post-training compression method that uses pseudo-random generators to efficiently encode and compress model weights. SeedLM offers a data-free approach, avoiding the need for calibration data while retaining competitive accuracy, achieving up to around 98% zero-shot accuracy at 3- and 4-bit quantization levels. We demonstrated the method’s performance on both Llama 2 and Llama 3 models, showing that it performs comparably to existing state-of-the-art techniques. Furthermore, our FPGA implementation highlights SeedLM’s potential for improved computational efficiency in hardware-constrained environments. While we believe that additional fine-tuning could further improve results we leave that to future works.

#### Acknowledgments

We are grateful to Dmitry Belenko, Karen Khatamifard, Qingqing Cao, Seyed Mohsen Moosavi Dezfooli, and Arsalan Farooq for their invaluable feedback on this research.

## Appendix A Appendix

### A.1 Coefficients Used in LFSRs

The following table lists the indexed $j$ coefficients used for each $K$, where $\alpha_{j}$ equals one, with all other coefficients being zero. These specific coefficients correspond to the Linear Feedback Shift Registers (LFSRs) for each register length $K$, with the coefficients indexed starting from 0, representing the tap positions in the shift register. These coefficients are hard-wired into the hardware configuration of the LFSRs used in our experiments. These coefficients define the feedback polynomial for each LFSR, ensuring maximal-length cycles.

**Table 6: Indexed $j$ coefficients used in LFSRs for each register length $K$, where $\alpha_{j}=1$ and all other coefficients are zero.**
| Length of LFSR ($k$) | Indices ($j$) |
| --- | --- |
| 2 | (0, 1) |
| 3 | (0, 1) |
| 4 | (0, 1) |
| 5 | (0, 2) |
| 6 | (0, 1) |
| 7 | (0, 1) |
| 8 | (0, 2, 3, 4) |
| 9 | (0, 4) |
| 10 | (0, 3) |
| 11 | (0, 2) |
| 12 | (0, 1, 2, 8) |
| 13 | (0, 1, 2, 5) |
| 14 | (0, 1, 2, 12) |
| 15 | (0, 1) |
| 16 | (0, 1, 3, 12) |
| 17 | (0, 3) |
| 18 | (0, 7) |
| 19 | (0, 1, 2, 5) |
| 20 | (0, 3) |
| 21 | (0, 2) |
| 22 | (0, 1) |
| 23 | (0, 5) |
| 24 | (0, 1, 2, 7) |

## Peer Reviews

confidence: 3
contribution: 3
initial_rating: 6
presentation: 4
questions: 1) Please compare your method with SOTA methods which use finetuning after quantization.
2) What is your method performance when quantizing into 1.5-2.5 bits per weight? This area is where most quantization research progress is happening, your method may be competitive there too.
3) please address the OOM situation in Quip# L2-70 benchmarks (Table2). What is different in your setup vs the original one from https://arxiv.org/pdf/2307.13304? What have you tried to avoid OOM? 
4) Add performance timing benchmarks vs other methods, this solidifies your claim of speed advantage.
5) How would speedup of the method change after post-quantization finetuning?
6) Unlike some other submission, this one has no implementation code. I wonder if a private code repository could be provided for review purposes?
7) Please provide comparison to AQ, SPQR, as these are strong and valid SOTA benchmarks
soundness: 3
strengths: Novel method to store and retrieve codes with pseudo-random number generator.
High quality presentation with necessary formulas and diagrams
Attention to implementation details in Performance Analysis section.
summary: This is an interesting method of quantization, using pseudo-random generator to point to almost evenly distributed codebook items and fast adjustments.
The paper has high quality presentation with necessary formulas and diagrams
The paper has shortcomings in comparisons with the other methods, specifically it lacks finetuning upside analysis.

The paper may qualify for acceptance if the weaknesses are reasonably addressed in the review process.
weaknesses: 1) Comparison with other quantization methods is incomplete. Most striking shortcoming is lack of comparison with finetuned model which is what most current SOTA models use.

2) The paper dismisses comparison with strong methods like AQ, SPQR in desire to "avoid costly training". Yet these are quite good benchmarks to compare with, theu=y have reported figures, and to larg share of practitioners the extra training time (hours actually) could be acceptable.

3) some of the results in table 2 are not consistent with those published in the respective papers.
for instance, AWQ claims 3.41 perplexity  for L2-70, (https://arxiv.org/pdf/2306.00978, table 4) while you indicate 3.5 (Table 2)

---

confidence: 5
contribution: 3
initial_rating: 6
presentation: 3
questions: 1- **Comparison with GPTQ** : Why was GPTQ omitted from the comparisons? Can you clarify its potential impact on results, given that it’s a standard benchmark in LLM compression?

2- **Compression Limitations for LLaMA 3**: Many methods struggle to compress LLaMA 3 effectively. Do the authors have insights on why this model, in particular, is challenging to compress?

3- **Full Precision Storage Impact**: Have the authors tested SeedLM with full precision storage during inference? If so, could this be the cause of out-of-memory issues observed with some baseline methods?

4- **GPU Implementation Challenges**: Could the authors comment on the challenges of implementing SeedLM on GPUs, specifically the support for LFSR in recent GPUs and whether additional kernel launches could reduce performance for memory-bound applications on NVIDIA hardware?

5- **Parameter Optimization Overhead**: What is the computational cost of finding optimal seeds and coefficients? Could the process be streamlined for faster deployment?

6- **Sensitivity in Compressing LLaMA 3**: Many quantization techniques, appear to struggle with LLaMA 3, indicating potential limitations in compressing this model type. What features does this family of models have that makes it difficult for other methods to quantize, and why does SeedLM perform well in this case?
soundness: 3
strengths: 1- **Innovative Use of Arbitrary Data Formats**: The adoption of arbitrary data formats with shared exponents is a commendable design choice, enhancing the flexibility of SeedLM's quantization approach.

2- **Efficient FPGA Implementation**: Proposing an efficient FPGA implementation demonstrates the hardware viability of SeedLM and highlights potential real-world deployment in resource-constrained environments.

3- **Data-Free Compression**: SeedLM operates without calibration data, which differentiates it from many other compression methods that rely on data for fine-tuning and accuracy adjustments.

4- **Memory Efficiency**: By using seeds for reconstructing weights, SeedLM minimizes memory footprint, crucial for memory-bound applications like LLM inference, and shows considerable speedup, particularly on FPGAs.
summary: The paper introduces SeedLM, a novel post-training compression technique leveraging seeds of pseudo-random generators, specifically using Linear Feedback Shift Registers (LFSRs), to encode and compress weights in large language models (LLMs). SeedLM achieves memory efficiency by encoding model weights into compact seeds, reconstructing weights at runtime, and minimizing memory access during inference. Experimental results show its performance in zero-shot tasks, achieving competitive accuracy retention at 3- and 4-bit quantization levels, especially with the LLaMA 3 model, and demonstrating improved latency and throughput in FPGA implementations.
weaknesses: 1- **Absence of GPTQ Comparison**: The paper does not provide a comparison with GPTQ, a commonly used quantization baseline, which is a notable omission given GPTQ's relevance to LLM compression.

2- **Inference Efficiency Assumptions**: While the paper mentions using the latest repositories, many of these codebases likely store compressed weights in full precision during inference, leading to potential memory inefficiencies.

3- **GPU Implementation Challenges**: Although FPGA implementation is shown, the challenges of porting SeedLM to GPUs are unaddressed. Issues like increased kernel launches for memory-bound tasks and limited support for LFSRs in recent GPU hardware could impact performance.

4- **Optimization Overhead for Parameter Selection**: The process of determining optimal parameters for each weight block, such as the seeds, coefficients, and latent dimensions, may introduce significant overhead.

---

confidence: 3
contribution: 2
initial_rating: 6
presentation: 2
questions: Please refer to the weaknesses items.
soundness: 3
strengths: 1. Weight compression using pseudo-random generator seeds is a novel-sounding technique. It enables significant compression while maintaining high accuracy.
2. Unlike many state-of-the-art compression methods, the proposed method does not require calibration data, reducing the need for correction data acquisition and potentially further reducing the quantization offset problem caused by the calibration data distribution.
3. The authors validated the computational characteristics and efficiency of their proposed algorithm using FPGA, and the FPGA implementation verifies the SeedLM in some ideal hardware-constrained environments.
summary: The paper proposes SeedLM, a novel method for compressing large language model (LLM) weights by encoding them into seeds of pseudo-random generators.  SeedLM is a data-free, post-training compression method that achieves competitive accuracy at 3/4-bit compression context, as demonstrated on models like Llama 2 and Llama 3. The technique utilizes Linear Feedback Shift Registers (LFSRs) to generate pseudo-random matrices that reconstruct weight blocks during inference. Hardware implementation on an FPGA further supports the potential of SeedLM.
weaknesses: 1. The author compared the AWQ, Omniquant, and QuIP# methods. However, Omniquant and QuIP# were primarily designed for ultra-low bit-width quantization compression, such as 2-bit, but the author only compared the performance of 3/4-bit and did not show the quantization results of 2-bit. In the field of LLM quantization, SOTA methods specifically designed for 4/3-bit, such as GPTQ[1], were not included in the comparison. This makes the results unconvincing.

2. The author mentions in Section 4.1, lines 356-358, that to ensure a fair comparison with QuIP# and Omniquant, no fine-tuning was performed on them. This is a fair comparison for QuIP#, which combines codebook and fine-tuning of pre-trained parameters to improve performance. However, Omniquant does not fine-tune any pre-trained parameters, instead using block-wise gradient propagation to update the quantizer parameters, including the scaling factor and zero factor. By not using this technique in the comparison, the author is essentially not using the Omniquant method, but rather a basic statistical quantization. And, AWQ also uses calibration data to pre-compute the scaling parameters. This comparison is unfair and may cause confusion for readers. Additionally, the data in Table 2 is different from what is reported in the AWQ paper, and the author should provide an explanation for this discrepancy.

3. AWQ can quickly determine the scaling of weights and perform quantization through calibration, and the compression time for a 7B model is only a few minutes. However, the LFSR technique proposed in the paper involves matrix decomposition and optimization approximation, and the efficiency of this compression process for extremely large-scale LLMs is lacking in discussion and comparison.

4. The overall writing of the article is not clear in some details. In Eq (1), I can infer that the compression matrices for LFSR are **U** and **t**, but the details of how the input activation **X** is computed with the LFSR-compressed weights during the actual inference decoding stage are not discussed in detail. The article should provide more information on how the LFSR-compressed weights are used in the inference process and how they differ from other quantization methods. This would help to clarify the advantages and characteristics of the LFSR-based method.





[1] GPTQ: Accurate Post-Training Quantization for Generative Pre-trained Transformers.

Meta-review: This paper presents SeedLM, a novel post-training compression method for LLMs that finds input seeds from model weights for pseudo-random generators, specifically using Linear Feedback Shift Registers (LFSRs). By reconstructing weights at runtime from compact seeds, SeedLM significantly reduces memory usage while maintaining competitive accuracy.

The method operates without requiring retraining or calibration data, achieving efficient compression at 3- and 4-bit quantization levels, as demonstrated on models such as LLAMAs. Experimental results highlight its strong zero-shot performance, and hardware implementations on FPGAs show its improved throughput. 

While this paper makes meaningful contributions, it has a few notable weaknesses. Several reviewers pointed out the lack of comparisons with current state-of-the-art methods, insufficient details on the additional overhead introduced by SeedLM and how it compares to baseline approaches, missing GPU implementation and code details, and the absence of explanations regarding the handling of LLaMA models and OOM cases.

Despite these issues, they do not detract from the paper’s overall contributions. Therefore, I lean toward recommending acceptance.

Decision: Accept (Poster)