Domain: Computer Systems & Operating Systems

This problem tests knowledge of operating systems and CPU scheduling. A system implements Multilevel Feedback Queue (MLFQ) scheduling with I/O handling and priority boosting.

SYSTEM CONFIGURATION:
- 3 queues: Q0 (highest priority), Q1 (medium), Q2 (lowest)
- Time quantum: Q0=2ms, Q1=4ms, Q2=8ms
- Higher-priority queues preempt lower-priority queues (see Rule 8); within the same queue, round-robin applies (see Rule 6)
- 5 processes: P1, P2, P3, P4, P5

SCHEDULING RULES (apply exactly as stated):

RULE 1 (Priority): Always run the highest-priority (lowest queue number) ready process. Q0 > Q1 > Q2.

RULE 2 (New Process): New processes enter at Q0 with a full Q0 quantum.

RULE 3 (Quantum Exhaustion): If a process uses its entire time quantum without its CPU burst completing, demote it to the next lower queue (Q0->Q1->Q2). Q2 processes stay in Q2. Demotion applies even if the quantum boundary coincides with a preemption event. If a CPU burst completes at the exact same instant as the quantum expires, the burst completion takes precedence: the process is NOT demoted; it either blocks for I/O (Rule 4) or finishes, whichever applies next.

RULE 4 (I/O Block): If a process blocks for I/O before its quantum expires, it stays in its current queue. Its remaining quantum is discarded.

RULE 5 (I/O Completion): When I/O completes, the process returns to the BACK of its current queue with a fresh full quantum for that queue.

RULE 6 (Round Robin): Within the same queue, use round-robin. The process at the front runs first.

RULE 7 (Priority Boost): Every 20ms (at t=20, t=40, t=60, ...), ALL processes in the system are moved to Q0, including processes currently blocked on I/O. After the boost, the Q0 order is by ascending process ID (P1 before P2, etc.). Each process receives a fresh Q0 quantum.

RULE 8 (Preemption): A newly ready higher-priority (lower queue number) process immediately preempts the running process. The preempted process goes to the BACK of its current queue with its remaining quantum preserved.

RULE 9 (Tie-Breaking): If multiple processes enter the same queue at the exact same instant (e.g., after a priority boost or simultaneous I/O completions), they are ordered within that queue by ascending process ID (P1 before P2, etc.). Processes already in a queue before the simultaneous event retain their existing relative order; the newly arrived processes are appended after them in ascending PID order.

RULE 10 (I/O Duration): I/O takes exactly the specified duration. A process cannot use the CPU during I/O.

RULE 11 (Simultaneous Events): When multiple events occur at the same time, process them in this order: (1) I/O completion, (2) new process arrival, (3) quantum expiry or CPU burst completion, (4) priority boost.

RULE 12 (CPU Idle): The CPU idles only if all arrived and not-yet-finished processes are blocked on I/O.

INITIAL STATE (time 0):
All queues empty. CPU idle.

PROCESS ARRIVALS AND BEHAVIOR:
P1: Arrives t=0,  CPU burst pattern: 3ms, I/O 5ms, 4ms, I/O 3ms, 6ms, DONE
P2: Arrives t=1,  CPU burst pattern: 5ms, I/O 4ms, 2ms, I/O 6ms, 3ms, DONE
P3: Arrives t=3,  CPU burst pattern: 7ms, I/O 2ms, 5ms, DONE
P4: Arrives t=6,  CPU burst pattern: 2ms, I/O 8ms, 4ms, I/O 2ms, 1ms, DONE
P5: Arrives t=10, CPU burst pattern: 9ms, I/O 3ms, 2ms, DONE

(Pattern: CPU burst, then I/O, then CPU burst, etc., until DONE)

COMPUTE EXACTLY THESE TEN VALUES:
(1) V1: At what time does P1 complete (all bursts finished)?
(2) V2: The total time the CPU is idle (no process running).
(3) V3: How many queue demotions occur during the entire execution? (A demotion is a move from a higher queue to a lower queue caused by quantum exhaustion, not by a priority boost.)
(4) V4: At time t=25, which process is currently running? "At time t=25" means the state at exactly t=25ms, after all simultaneous events at t=25 have been resolved per Rule 11. Report the process ID (1-5), or 0 if the CPU is idle.
(5) V5: How many priority boosts (Rule 7) actually move at least one process from a non-Q0 queue (or from I/O-blocked state in a non-Q0 queue) to Q0?
(6) V6: The product of the completion times of P2 and P4.
(7) V7: How many context switches occur? Count each time the CPU switches from one process to another, or from idle to a process. Do not count a running process blocking for I/O or completing as a separate context switch; count only the subsequent transition when the CPU picks up the next process.
(8) V8: The total time P3 spends in the READY state (in a queue, not running and not blocked on I/O).
(9) V9: At time t=40, after the priority boost has been applied, how many processes are in Q2?
(10) V10: Verification checksum: U = (V1 + V3 * V5 + V7) mod 79.

FORMAT: V1=<int>;V2=<int>;V3=<int>;V4=<int>;V5=<int>;V6=<int>;V7=<int>;V8=<int>;V9=<int>;V10=<int>

Grading rubric:
criterion: Does the answer state that V1 (P1 completion time) equals exactly 49?
weight: 15
criterion: Does the answer state that V2 (total CPU idle time) equals exactly 3?
weight: 5
criterion: Does the answer state that V3 (total queue demotions) equals exactly 12?
weight: 15
criterion: Does the answer state that V4 (process running at t=25) equals exactly 5?
weight: 5
criterion: Does the answer state that V5 (priority boosts that moved at least one process) equals exactly 2?
weight: 5
criterion: Does the answer state that V6 (product of P2 and P4 completion times) equals exactly 1376?
weight: 15
criterion: Does the answer state that V7 (context switches) equals exactly 27?
weight: 15
criterion: Does the answer state that V8 (total time P3 spends in the ready state) equals exactly 23?
weight: 15
criterion: Does the answer state that V9 (number of processes in Q2 at t=40 after boost) equals exactly 0?
weight: 5
criterion: Does the answer state that V10 (verification checksum) equals exactly 21?
weight: 5

Answer:
## Setup

Queues: Q0 (quantum=2ms, highest), Q1 (quantum=4ms), Q2 (quantum=8ms, lowest).
Priority boost fires at t=20, t=40, ...
All processes including I/O-blocked ones are moved to Q0 on a boost (Rule 7).
Demotion occurs on full quantum exhaustion, even when that coincides with a preemption (Rule 3).
On I/O completion, a process gets a fresh quantum for its current queue (Rule 5).


---

## Detailed Execution Timeline

### Phase 1: t=0 to t=20 (before first boost)

t=0:   P1 arrives -> Q0. CPU idle -> P1 starts. Q0=[P1 running].
t=0-2: P1 runs 2ms (full Q0 quantum). burst_rem=1ms. P1 demoted -> Q1.
       DEMOTION 1: P1 Q0->Q1.

t=1:   P2 arrives -> Q0 back. (P1 still running until t=2; no preemption, same queue.)

t=2:   P1's quantum expires -> P1->Q1 (burst_rem=1ms). Q0=[P2]. P2 starts.
       CONTEXT SWITCH 1: (idle->P1 at t=0)   [initial start]
       CONTEXT SWITCH 2: P1->P2 at t=2.

t=2-4: P2 runs 2ms (full Q0 quantum). burst_rem=3ms. P2 demoted -> Q1.
       DEMOTION 2: P2 Q0->Q1.

t=3:   P3 arrives -> Q0 back. (P2 running; no preemption.)

t=4:   P2's quantum expires -> P2->Q1 (burst_rem=3ms). Q0=[P3]. P3 starts.
       CONTEXT SWITCH 3: P2->P3 at t=4.

t=4-6: P3 runs 2ms (full Q0 quantum). burst_rem=5ms.

t=6:   P4 arrives (Rule 11 step 2: arrival before quantum expiry).
       P4 -> Q0. Then P3's quantum expires (Rule 11 step 3) -> P3 demoted Q0->Q1 (burst_rem=5ms).
       DEMOTION 3: P3 Q0->Q1.
       Q0=[P4]. P4 starts.
       CONTEXT SWITCH 4: P3->P4 at t=6.

t=6-8: P4 runs 2ms. P4's CPU burst is exactly 2ms = full Q0 quantum.
       P4's burst completes at t=8. P4 blocks for I/O (8ms, done at t=16). Rule 4: P4 stays Q0.

t=8:   P4 blocks -> I/O. Q0=[] (P4 blocked). Q1=[P1(burst_rem=1), P2(burst_rem=3), P3(burst_rem=5)].
       P1 (front of Q1) starts. Fresh Q1 quantum=4ms.
       CONTEXT SWITCH 5: P4->P1 at t=8.

t=8-9: P1 runs 1ms, completes burst 1. P1 blocks for I/O (5ms, done at t=14). Stays Q1.
       Q1=[P2, P3].
       CONTEXT SWITCH 6: P1->P2 at t=9.

t=9:   P2 starts in Q1. burst_rem=3ms, quantum=4ms.

t=10:  P5 arrives -> Q0. P5 (Q0) preempts P2 (Q1) per Rule 8.
       P2 back of Q1 with quantum_rem=3ms, burst_rem=2ms.
       Q0=[P5]. Q1=[P3, P2].
       CONTEXT SWITCH 7: P2->P5 at t=10.

t=10-12: P5 runs 2ms (full Q0 quantum). P5 demoted -> Q1 (burst_rem=7ms).
         DEMOTION 4: P5 Q0->Q1.

t=12:  P5->Q1 (back). Q1=[P3, P2, P5]. P3 starts. Fresh quantum=4ms.
       CONTEXT SWITCH 8: P5->P3 at t=12.

t=12-16: P3 runs 4ms (full Q1 quantum). burst_rem=1ms. Normally demoted Q1->Q2.
         At t=16: P4 I/O done (Rule 11: I/O before quantum expiry).
         P4 I/O completes -> P4 back of Q0. P4 (Q0) preempts P3 (Q1).
         P3 has used its full Q1 quantum -> per Rule 3, P3 is demoted Q1->Q2 (burst_rem=1ms).
         DEMOTION 5: P3 Q1->Q2.
         CONTEXT SWITCH 9: P3->P4 at t=16.

t=14:  P1 I/O done -> P1 back of Q1. Q1=[P2, P5, P1]. (P3 still running at that point.)

t=16-18: P4 runs 2ms (full Q0 quantum). burst_rem=2ms. P4 demoted -> Q1.
         DEMOTION 6: P4 Q0->Q1.

t=18:  P4->Q1 (back). Q1=[P2, P5, P1, P4]. P2 starts. quantum_rem=3ms (preserved), burst_rem=2ms.
       CONTEXT SWITCH 10: P4->P2 at t=18.

t=18-20: P2 runs 2ms, completing burst 1 at exactly t=20.

### Phase 2: Priority Boost at t=20

At t=20, per Rule 11:
  Step 1: P2 completes burst, blocks for I/O (4ms, done at t=24). P2 stays Q1 (Rule 4).
  Step 2: Priority boost fires.
    - P1 (Q1, ready) -> Q0.
    - P2 (Q1, I/O-blocked, non-Q0) -> Q0 (boost includes I/O-blocked, Rule 7).
    - P3 (Q2, ready) -> Q0.
    - P4 (Q1, ready) -> Q0.
    - P5 (Q1, ready) -> Q0.
    Q0=[P1, P2(blocked), P3, P4, P5] ordered by PID. Each gets fresh Q0 quantum=2ms.
BOOST 1 moves processes: YES. EFFECTIVE BOOST COUNT = 1.
  CPU: P1 (front of Q0, lowest PID among ready) starts.
  CONTEXT SWITCH 11: P2->P1 at t=20.

t=20-22: P1 runs 2ms (full Q0 quantum). burst_rem=2ms. P1 demoted -> Q1.
         DEMOTION 7: P1 Q0->Q1.

t=22:  Q0=[P3, P4, P5]. P3 starts.
       CONTEXT SWITCH 12: P1->P3 at t=22.

t=22-23: P3 runs 1ms, completing burst 1 at t=23. P3 blocks I/O (2ms, done at t=25). Stays Q0.
         CONTEXT SWITCH 13: P3->P4 at t=23.

t=23-25: P4 runs. burst_rem=2ms, quantum=2ms. P4's burst done at t=25 = quantum boundary.
         P4 blocks for I/O (2ms, done at t=27). Stays Q0.

t=24:  P2 I/O done -> P2 back of Q0. Q0=[P5, P2] (P4 still running).

t=25:  Per Rule 11: I/O before quantum expiry.
       P3 I/O done at t=25 -> P3 back of Q0. Q0=[P5, P2, P3].
       P4 burst done (at quantum boundary) -> P4 blocks I/O (done at t=27). Stays Q0.
       CPU: P5 starts.
       CONTEXT SWITCH 14: P4->P5 at t=25.

       V4 = 5 (P5 starts running at t=25).

t=25-27: P5 runs 2ms (full Q0 quantum). burst_rem=5ms. P5 demoted -> Q1.
         DEMOTION 8: P5 Q0->Q1.

t=27:  Per Rule 11: I/O before quantum expiry.
       P4 I/O done -> P4 back of Q0.
       P5 quantum expires -> P5 demoted Q0->Q1.
       Q0=[P2, P3, P4]. P2 starts.
       CONTEXT SWITCH 15: P5->P2 at t=27.

t=27-29: P2 runs 2ms (burst 2 = 2ms = full quantum). P2 burst done, blocks I/O (6ms, done at t=35). Stays Q0.

t=29:  Q0=[P3, P4]. P3 starts.
       CONTEXT SWITCH 16: P2->P3 at t=29.

t=29-31: P3 runs 2ms (full Q0 quantum). burst_rem=3ms. P3 demoted -> Q1.
         DEMOTION 9: P3 Q0->Q1.

t=31:  Q0=[P4]. P4 starts.
       CONTEXT SWITCH 17: P3->P4 at t=31.

t=31-32: P4 runs 1ms, completing burst 3 (1ms < quantum=2ms). P4 DONE at t=32.
         P4 completion = t=32.
         CONTEXT SWITCH 18: P4->P1 at t=32.

t=32:  Q0=[]. Q1=[P1(burst_rem=2ms), P5(burst_rem=5ms), P3(burst_rem=3ms)]. P1 starts.

t=32-34: P1 runs 2ms, completing burst 2 at t=34. P1 blocks I/O (3ms, done at t=37). Stays Q1.
         CONTEXT SWITCH 19: P1->P5 at t=34.

t=34-35: P5 runs 1ms in Q1.

t=35:  P2 I/O done -> P2 back of Q0. P2 (Q0) preempts P5 (Q1).
       P5 back of Q1: quantum_rem=3ms, burst_rem=4ms.
       Q0=[P2]. Q1=[P3, P5].
       CONTEXT SWITCH 20: P5->P2 at t=35.

t=35-37: P2 runs 2ms in Q0 (burst 3 = 3ms, quantum=2ms). Quantum expires at t=37. burst_rem=1ms.
         P2 demoted Q0->Q1.
         DEMOTION 10: P2 Q0->Q1.

t=37:  Per Rule 11: P1 I/O done first -> P1 back of Q1. Then P2 quantum expires -> P2 Q1 (back).
       Q1=[P3, P5, P1, P2]. P3 starts.
       CONTEXT SWITCH 21: P2->P3 at t=37.

t=37-40: P3 runs 3ms, completing burst 2 at t=40. P3 DONE at t=40.
         P3 completion = t=40.

### Phase 3: Priority Boost at t=40

At t=40, per Rule 11:
  Step 1: P3 burst complete -> P3 exits (done).
  Step 2: Priority boost fires.
    Remaining processes: P1 (Q1), P2 (Q1), P5 (Q1).
    All moved to Q0. Q0=[P1, P2, P5] (by PID). Fresh Q0 quantum=2ms.
BOOST 2 moves processes: YES. EFFECTIVE BOOST COUNT = 2.
  CONTEXT SWITCH 22: P3->P1 at t=40.

V5 = 2 (both boosts moved at least one process).

V9 = 0 (Q2 is empty after boost at t=40 -- all processes moved to Q0).

t=40-42: P1 runs 2ms (full Q0 quantum). burst_rem=4ms. P1 demoted -> Q1.
         DEMOTION 11: P1 Q0->Q1.

t=42:  Q0=[P2, P5]. P2 starts.
       CONTEXT SWITCH 23: P1->P2 at t=42.

t=42-43: P2 runs 1ms, completing burst 3. P2 DONE at t=43.
         P2 completion = t=43.
         CONTEXT SWITCH 24: P2->P5 at t=43.

t=43-45: P5 runs 2ms (full Q0 quantum). burst_rem=2ms. P5 demoted -> Q1.
         DEMOTION 12: P5 Q0->Q1.

t=45:  Q1=[P1(burst_rem=4ms), P5(burst_rem=2ms)]. P1 starts.
       CONTEXT SWITCH 25: P5->P1 at t=45.

t=45-49: P1 runs 4ms in Q1 (burst=4ms, quantum=4ms). P1 burst done at t=49. P1 DONE.
         P1 completion = t=49.
         CONTEXT SWITCH 26: P1->P5 at t=49.

t=49-51: P5 runs 2ms in Q1, completing burst 1 (total 9ms across all slices). P5 blocks I/O (3ms, done at t=54). Stays Q1.

t=51-54: CPU IDLE. Only P5 remains and is blocked on I/O.
         IDLE DURATION = 3ms.
         CONTEXT SWITCH 27: idle->P5 at t=54.

t=54-56: P5 runs 2ms in Q1, completing burst 2. P5 DONE at t=56.

---

## Summary of Values

V1 = 49     (P1 completion time)

V2 = 3      (CPU idle: t=51 to t=54, 3ms)

V3 = 12     (demotions)
     P1: Q0->Q1 (t=2)
     P2: Q0->Q1 (t=4)
     P3: Q0->Q1 (t=6)
     P5: Q0->Q1 (t=12)
     P3: Q1->Q2 (t=16, quantum exhausted even though preemption was simultaneous per Rule 3)
     P4: Q0->Q1 (t=18)
     P1: Q0->Q1 (t=22, after boost)
     P5: Q0->Q1 (t=27)
     P3: Q0->Q1 (t=31)
     P2: Q0->Q1 (t=37)
     P1: Q0->Q1 (t=42, after boost)
     P5: Q0->Q1 (t=45)

V4 = 5      (P5 starts running at t=25)

V5 = 2      (boost at t=20 and boost at t=40 each moved processes)

V6 = 43 * 32 = 1376  (P2 completes t=43, P4 completes t=32)

V7 = 27     (context switches: 25 process-to-process transitions
             + 2 idle-to-process transitions: idle->P1 at t=0, idle->P5 at t=54.
             Transitions from process to idle, e.g. at t=51, are not counted.)

V8 = 23     (P3 ready time)
     t=3-4:   1ms (Q0, P2 running)
     t=6-12:  6ms (Q1, P4 then P1 then P2 then P5 running)
     t=16-20: 4ms (Q2, P4 then P2 running)
     t=20-22: 2ms (Q0, P1 running after boost)
     t=25-29: 4ms (Q0, P5 then P2 running)
     t=31-37: 6ms (Q1, P4 completes then P1 then P5 preempted then P2)
     Total: 1+6+4+2+4+6 = 23ms

V9 = 0      (at t=40, after boost, Q0=[P1,P2,P5], Q1=[], Q2=[])

V10 = (V1 + V3*V5 + V7) mod 79
    = (49 + 12*2 + 27) mod 79
    = (49 + 24 + 27) mod 79
    = 100 mod 79
    = 21

---

## Final Answer

V1=49;V2=3;V3=12;V4=5;V5=2;V6=1376;V7=27;V8=23;V9=0;V10=21