Exhibit 10.21

 

PATENT PURCHASE AGREEMENT

 

This PATENT PURCHASE AGREEMENT (“Agreement”) is entered into on April 6, 2005
(“Effective Date”) by and between Faust Communications, LLC, with an office at
[***] (“Purchaser”), and NeoMagic Corporation with an office at 3250 Jay Street,
Santa Clara, CA 95054 (“Seller”). The parties hereby agree as follows.

 

1. BACKGROUND

 

1.1 Seller owns certain United States Letters Patents and/or applications for
United States Letters Patents and/or related foreign patents and applications.

 

1.2 Seller wishes to sell its right, title and interest in such patents and
applications to Purchaser.

 

1.3 Purchaser wishes to purchase such patents and applications.

 

2. DEFINITIONS

 

2.1 “Assignment Agreements” means the agreements assigning ownership of the
Patents from the inventors and/or prior owners to Seller.

 

2.2 “Closing Date” means the date on which Purchaser has paid the Seller the
total Purchase Price.

 

2.3 “List of Prosecution Counsel” means the names and addresses of prosecution
counsel who prosecuted the Patents and who are currently handling the Patents.

 

2.4 “Patents” means those patents and applications listed in Exhibit A hereto,
and all reissues, reexaminations, extensions, continuations, continuations in
part, continuing prosecution applications, and divisions of such patents and
applications; provisional patent applications that are or will be continuations
or continuations in part of such patents and applications; and foreign
counterparts to any of the foregoing including without limitation utility
models.

 

2.5 “Purchase Price” means Four Million Five Hundred and Fifty Thousand Dollars
(USD 4,550,000).

 

3. DELIVERY AND PAYMENT

 

3.1 Delivery. On the Effective Date, Seller shall deliver an executed original
of the Assignment of Patent Rights in Exhibit B hereto to Purchaser.

 

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[***] Confidential treatment requested pursuant to a request for confidential
treatment filed with the Securities and Exchange Commission. Omitted portions
have been filed separately with the Commission.

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3.2 Payment. On the Effective Date, Purchaser shall pay to Seller the Purchase
Price.

 

4. TRANSFER OF PATENTS

 

4.1 Patent Assignment. Effective on the Closing Date, Seller hereby sells,
assigns, transfers and conveys to Purchaser all right, title and interest it has
in and to the Patents and all inventions and discoveries described therein,
including without limitation, all rights of Seller under the Assignment
Agreements, and all rights of Seller to collect royalties under such Patents.

 

4.2 Assignment of Causes of Action. Effective on the Closing Date, Seller hereby
sells, assigns, transfers and conveys to Purchaser all right, title and interest
it has in and to all causes of action and enforcement rights, whether currently
pending, filed, or otherwise, for the Patents and all inventions and discoveries
described therein, including without limitation all rights to pursue damages,
injunctive relief and other remedies for past, current and future infringement
of the Patents.

 

4.3 Grant Under Patent Rights. Effective on the Closing Date, Purchaser hereby
grants to Seller, under the Patent Rights (as defined in Exhibit B hereto), and
for the lives thereof, a royalty-free, irrevocable, non-exclusive,
non-transferable (except as permitted under Section 4.3 below), worldwide right
and license (the “Seller License”) to practice the methods and to make, have
made, use, distribute, lease, sell, offer for sale, import, export, develop and
otherwise dispose of and exploit any products, processes or services covered by
the Patent Rights (“Covered Products”). This Seller License shall also apply to
the reproduction and subsequent distribution of Covered Products, in
substantially identical form as they are distributed by the Seller, by
authorized agents of the Seller such as a distributor, replicator, VAR or OEM.

 

4.4 Limitation on Transferability. The Seller License in Section 4.3 above may
be transferred one time to a purchaser of all, or substantially all, of Seller’s
operating assets (other than cash) which are covered by the Seller License, or
to a party that by merger or otherwise, acquires all, or substantially all, of
Seller’s outstanding capital stock (any such transaction referred to as the
“Acquisition” and any such purchaser or acquiring party referred to as the
“Assignee”). In the event of such Acquisition, the Seller License shall
automatically become limited to the Covered Products of (1) Seller that are
either under development or that are commercially released on the effective date
of such Acquisition and (2) Assignee that are commercially released as of the
effective date of the Acquisition and, for each of (1) and (2) any new versions
that have merely incremental differences from Seller’s and Assignee’s Covered
Products covered by the Seller License on the effective date of the Acquisition
(all such products, processes and services referred to collectively as the
“Covered Items”). In no event, however, shall the Seller License be construed or
interpreted to include any other products, processes or services of the Seller,
Assignee or any other third party. The Seller License with respect to the
Covered Items shall automatically terminate upon any subsequent Acquisition by
any third party (“Subsequent Acquisition”), provided that the Seller License
shall continue in full force and effect with respect to any commercially

 

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[***] Confidential treatment requested pursuant to a request for confidential
treatment filed with the Securities and Exchange Commission. Omitted portions
have been filed separately with the Commission.

 

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released Covered Items of Seller or Assignee that are in inventory or are in
production on the effective date of any Subsequent Acquisition. Seller or
Assignee shall provide Purchaser written notice within one hundred and twenty
(120) days of the Seller License being transferred under this Section 4.4 and
specifically detail the Covered Items as of the effective date of the
Acquisition. If Purchaser is not so notified of such transfer of the Seller
License within one hundred and twenty (120) days of the effective date of
Acquisition, the Seller License under Section 4.3 shall automatically terminate.

 

5. ADDITIONAL OBLIGATIONS

 

5.1 Further Assurances. At the reasonable request of Purchaser and without
demanding further consideration from Purchaser, Seller agrees to execute and
deliver such other instruments and do and perform such other acts and things as
may be reasonably necessary for effecting completely the consummation of the
transfer of ownership in and to the Patents as contemplated hereby, including
without limitation execution, acknowledgment and recordation of other such
papers, and using all reasonable best efforts to obtain the same from the
respective inventors, as necessary or desirable for fully perfecting and
conveying unto Purchaser the benefit of the transfer of ownership in and to the
Patents as contemplated hereby.

 

5.2 Further Assistance. Subject to the terms and conditions hereof, Seller
agrees, upon the reasonable request of Purchaser, to do all things necessary,
proper, or advisable, including without limitation the execution, acknowledgment
and recordation of specific assignments, oaths, declarations and other documents
on a country-by-country basis, to assist Purchaser in obtaining, perfecting,
sustaining, and/or enforcing the Patent Rights. Such assistance may also include
providing, and obtaining from the respective inventors, prompt production of
pertinent facts and documents, giving of testimony, execution of petitions,
oaths, powers of attorney, specifications, declarations or other papers and
other assistance reasonably necessary for filing patent applications, complying
with any duty of disclosure, and conducting prosecution, reexamination, reissue,
interference or other priority proceedings, opposition proceedings, cancellation
proceedings, public use proceedings, infringement or other court actions and the
like with respect to the Patent Rights. Seller’s agreement to render any of the
foregoing assistance is subject to Purchaser’s payment of all reasonable
expenses of Seller incurred in connection therewith and the availability of
Seller’s personnel.

 

5.3 Payment of Fees. Seller shall pay any maintenance fees, annuities, and the
like due on the Patents for a period of thirty (30) calendar days following the
Effective Date.

 

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[***] Confidential treatment requested pursuant to a request for confidential
treatment filed with the Securities and Exchange Commission. Omitted portions
have been filed separately with the Commission.

 

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6. REPRESENTATIONS AND WARRANTIES

 

Seller hereby warrants to Purchaser as follows:

 

6.1 Authority. Seller has the right and authority to enter into this Agreement
and to carry out its obligations hereunder.

 

6.2 Title and Contest. Seller has good and marketable title to the Patents,
including without limitation all rights, title, and interest in the Patents to
sue for infringement thereof. The Patents are free and clear of all liens,
mortgages, security interests or other encumbrances, and restrictions on
transfer. There are no actions, suits, claims or proceedings threatened, pending
or in progress on the part of any named inventor of the Patents relating in any
way to the Patents and Seller has not received notice of (and Seller is not
aware of any facts or circumstances which could reasonably be expected to give
rise to) any other actions, suits, investigations, claims or proceedings
threatened, pending or in progress relating in any way to the Patents. There are
no existing contracts, agreements, options, commitments, proposals, bids,
offers, or rights with, to, or in any person to acquire any of the Patents.

 

6.3 Existing Licenses. No rights or licenses have been granted under the
Patents.

 

6.4 Restrictions on Rights. Purchaser will not be subject to any covenant not to
sue or similar restrictions on its enforcement or enjoyment of the Patents as a
result of the transaction contemplated in this Agreement, or any prior
transaction related to the Patents.

 

6.5 Conduct. To Seller’s knowledge, none of Seller or its representatives has
engaged in any conduct, or omitted to perform any necessary act, the result of
which would invalidate any of the Patents or hinder their enforcement, including
but not limited to misrepresenting Seller’s patent rights to a standard-setting
organization.

 

6.6 Enforcement. Seller has not put a third party on notice of actual or
potential infringement of any of the Patents or considered enforcement action(s)
with respect to any of the Patents.

 

6.7 Patent Office Proceedings. None of the Patents have been or are currently
involved in any reexamination, reissue, interference proceeding, or any similar
proceeding and that no such proceedings are pending or threatened.

 

6.8 Related Assets. There are no other patents issued and/or applications
pending for or on behalf of Seller which are subject to a Terminal Disclaimer
under 37 C.F.R. §1.321 that require any of such patents issued and/or
applications and any of the Patents conveyed in this Agreement to remain under
common ownership.

 

6.9 Fees. All maintenance fees, annuities, and the like due on the Patents have
been timely paid through the Effective Date.

 

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[***] Confidential treatment requested pursuant to a request for confidential
treatment filed with the Securities and Exchange Commission. Omitted portions
have been filed separately with the Commission.

 

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6.10 Validity and Enforceability. To Seller’s knowledge, the Patents have never
been found invalid or unenforceable for any reason in any administrative,
arbitration, judicial or other proceeding, and Seller has not received any
notice or information of any kind from any source suggesting that the Patents
may be invalid or unenforceable.

 

7. MISCELLANEOUS

 

7.1 No Representation or Warranty. SELLER MAKES NO REPRESENTATIONS OR WARRANTIES
WHATSOEVER THAT ANY OF THE PATENTS COVERED BY THIS AGREEMENT ARE EITHER VALID OR
ARE INFRINGED BY ANY OTHER PARTIES.

 

7.2 Limitation on Consequential Damages. EXCEPT IN THE CASE OF FRAUD BY SELLER,
NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR LOSS OF PROFITS, OR ANY OTHER
INDIRECT OR SPECIAL, CONSEQUENTIAL, PUNITIVE OR INCIDENTAL DAMAGES, HOWEVER
CAUSED, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. THE PARTIES
ACKNOWLEDGE THAT THESE LIMITATIONS ON POTENTIAL LIABILITIES WERE AN ESSENTIAL
ELEMENT IN SETTING CONSIDERATION UNDER THIS AGREEMENT

 

7.3 Limitation of Liability. EXCEPT IN THE CASE OF FRAUD BY SELLER, IN NO EVENT
SHALL EITHER PARTY’S TOTAL LIABILITY UNDER THIS AGREEMENT EXCEED THE PURCHASE
PRICE. THE PARTIES ACKNOWLEDGE THAT THESE LIMITATIONS ON POTENTIAL LIABILITIES
WERE AN ESSENTIAL ELEMENT IN SETTING CONSIDERATION UNDER THIS AGREEMENT.

 

7.4 Compliance with Laws. Notwithstanding anything contained in this Agreement
to the contrary, the obligations of the parties shall be subject to all laws,
present and future, of any government having jurisdiction over the parties and
this transaction, and to orders, regulations, directions or requests of any such
government.

 

7.5 Confidentiality of Terms. The parties hereto shall keep the terms and
existence of this Agreement and the identities of the parties hereto
confidential and shall not now or hereafter divulge any of this information to
any third party except: (a) with the prior written consent of the other party,
such consent shall not be unreasonably withheld; (b) as otherwise may be
required by law or legal process, including in confidence to financial advisors
in their capacity of advising a party in such matters; (c) during the course of
litigation, so long as the disclosure of such terms and conditions are
restricted in the same manner as is the confidential information of other
litigating parties; or (d) in confidence to its legal counsel, accountants,
banks and financing sources and their advisors solely in connection with
complying with financial transactions; provided that, in (b) through (d) above,
(i) the disclosing party shall use all legitimate and legal means available to
minimize the disclosure to third parties, including without limitation seeking a
confidential treatment request or protective order whenever appropriate or
available; and (ii), other than disclosures

 

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[***] Confidential treatment requested pursuant to a request for confidential
treatment filed with the Securities and Exchange Commission. Omitted portions
have been filed separately with the Commission.

 

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pursuant to subsection (d) above, the disclosing party shall provide the other
party with at least ten (10) days prior written notice of such disclosure. The
above notwithstanding, Purchaser agrees that, on or after the Effective Date,
Seller shall be allowed to make one or more public announcements in order to
fulfill its requirements as a public company with respect to the disclosure of
this Agreement. Seller agrees that it will submit any such announcements to
Purchaser at least two (2) days prior to its making those announcements for
Purchaser’s approval, which approval shall not be unreasonably withheld.

 

7.6 Governing Law. Any claim arising under or relating to this Agreement shall
be governed by the internal substantive laws of the State of New York without
regard to principles of conflict of laws.

 

7.7 Jurisdiction. Each party hereby agrees to jurisdiction and venue in the
courts of the State of New York or the Federal courts sitting therein for all
disputes and litigation arising under or relating to this Agreement.

 

7.8 Entire Agreement. The terms and conditions of this Agreement, including its
exhibits, constitutes the entire agreement between the parties with respect to
the subject matter hereof, and merges and supersedes all prior and
contemporaneous agreements, understandings, negotiations and discussions.
Neither of the parties shall be bound by any conditions, definitions,
warranties, understandings, or representations with respect to the subject
matter hereof other than as expressly provided herein. The section headings
contained in this Agreement are for reference purposes only and shall not affect
in any way the meaning or interpretation of this Agreement. No oral explanation
or oral information by either party hereto shall alter the meaning or
interpretation of this Agreement. No amendments or modifications shall be
effective unless in a writing signed by authorized representatives of both
parties. These terms and conditions will prevail notwithstanding any different,
conflicting or additional terms and conditions which may appear on any purchase
order, acknowledgment or other writing not expressly incorporated into this
Agreement. This Agreement may be executed in two (2) or more counterparts, all
of which, taken together, shall be regarded as one and the same instrument. The
following exhibits are attached hereto and incorporated herein: Exhibit A
(entitled “Patent Rights to be Assigned”) and Exhibit B (entitled “Assignment of
Patent Rights”).

 

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[***] Confidential treatment requested pursuant to a request for confidential
treatment filed with the Securities and Exchange Commission. Omitted portions
have been filed separately with the Commission.

 

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7.9 Notices: All notices required or permitted to be given hereunder shall be in
writing, shall make reference to this Agreement, and shall be delivered by hand,
or dispatched by prepaid air courier or by registered or certified airmail,
postage prepaid, addressed as follows:

 

If to Seller

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If to Purchaser

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NeoMagic Corporation   Faust Communications, LLC 3250 Jay Street   [***] Santa
Clara, CA 95054   [***] Attn: Prakash Agarwal, Chairman and CEO   Attn: Managing
Director

 

Such notices shall be deemed served when received by addressee or, if delivery
is not accomplished by reason of some fault of the addressee, when tendered for
delivery. Either party may give written notice of a change of address and, after
notice of such change has been received, any notice or request shall thereafter
be given to such party at such changed address.

 

7.10 Relationship of Parties. The parties hereto are independent contractors.
Neither party has any express or implied right or authority to assume or create
any obligations on behalf of the other or to bind the other to any contract,
agreement or undertaking with any third party. Nothing in this Agreement shall
be construed to create a partnership, joint venture, employment or agency
relationship between Seller and Purchaser.

 

7.11 Equitable Relief. Each party agrees that damages alone would be
insufficient to compensate the other for any material breach of this Agreement,
acknowledges that irreparable harm would result from a breach of this Agreement,
and consents to the entering of an order for injunctive relief to prevent a
breach or further breach, and the entering of an order for specific performance
to compel performance of any obligations under this Agreement.

 

7.12 Severability. The terms and conditions stated herein are declared to be
severable. If any paragraph, provision, or clause in this Agreement shall be
found or be held to be invalid or unenforceable in any jurisdiction in which
this Agreement is being performed, the remainder of this Agreement shall be
valid and enforceable and the parties shall use good faith to negotiate a
substitute, valid and enforceable provision which most nearly effects the
parties’ intent in entering into this Agreement.

 

7.13 Waiver. Failure by either party to enforce any term of this Agreement shall
not be deemed a waiver of future enforcement of that or any other term in this
Agreement or any other agreement that may be in place between the parties.

 

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[***] Confidential treatment requested pursuant to a request for confidential
treatment filed with the Securities and Exchange Commission. Omitted portions
have been filed separately with the Commission.

 

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7.14 Assignment. The terms and conditions of this Agreement shall inure to the
benefit of Purchaser, its successors, assigns and other legal representatives.
Subject to the limitations on the transfer of the Seller License under Section
4.4 above, Seller shall be entitled to assign this Agreement to, and the terms
and condition hereof shall inure to the benefit of, any successor in interest to
all or substantially all of the business or assets of Seller (whether by merger,
reorganization, asset sale, or otherwise) that assumes all of Seller’s
obligations under this Agreement. Purchaser shall be provided written notice of
any such assignment within one hundred and twenty (120) days of the effective
date of such assignment, which notice shall include the name and business
address of the relevant assignee.

 

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[***] Confidential treatment requested pursuant to a request for confidential
treatment filed with the Securities and Exchange Commission. Omitted portions
have been filed separately with the Commission.

 

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In witness whereof, the parties have executed this Patent Purchase Agreement as
of the Effective Date:

 

Faust Communications, LLC   NeoMagic Corp.

[***]

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/s/ Scott Sullinger

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Signature   Signature

[***]

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Scott Sullinger

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Printed Name   Printed Name

Authorized Representative

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Chief Financial Officer

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Title   Title

April 6, 2005

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April 6, 2005

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Date   Date

 

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[***] Confidential treatment requested pursuant to a request for confidential
treatment filed with the Securities and Exchange Commission. Omitted portions
have been filed separately with the Commission.

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Exhibit A

 

Patent Rights To Be Assigned

 

Patent or Application No.

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   Country

--------------------------------------------------------------------------------

   Filing Date

--------------------------------------------------------------------------------

  

Title and Inventor(s)

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US5506499

   US    June 5, 1995   

Multiple probing of an auxilary test pad which allows for reliable bonding to a
primary bonding pad

 

Puar; Deepraj S.

US5587672

   US    September 25, 1995   

Dynamic logic having power-down mode with periodic clock refresh for a low-power
graphics controller

 

Ranganathan; Ravi|Puar; Deepraj S.

US5615376

   US    August 3, 1994   

Clock management for power reduction in a video display sub-system

 

Ranganathan; Ravi

US5754170

   US    January 16, 1996   

Transparent blocking of CRT refresh fetches during video overlay using dummy
fetches

 

Ranganathan; Ravi

US5757338

   US    August 21, 1996   

EMI reduction for a flat-panel display controller using horizontal-line based
spread spectrum

 

Bassetti; Chester F.|Pimpalkhare; Mangesh S.|Dharmarajan; Krishnan C.

US5764201

   US    April 22, 1996   

Multiplexed yuv-movie pixel path for driving dual displays

 

Ranganathan; Ravi

US5781200

   US    August 8, 1996   

Tile memory mapping for increased throughput in a dual bank access DRAM

 

Lu; Hsuehchung Shelton|Fan;

Huei-Yi

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Exhibit A

 

US5790083

   US    April 10, 1996   

Programmable burst of line-clock pulses during vertical retrace to reduce
flicker and charge build-up on passive LCD display panels during simultaneous
LCD and CRT display

 

Bassetti; Chester F.

US5805126

   US    May 8, 1996   

Display system with highly linear, flicker-free gray scales using high
framecounts

 

Bassetti; Chester F.

US5877780

   US    August 8, 1996   

Semiconductor chip having multiple independent memory sections, at least one of
which includes simultaneously accessible arrays

 

Lu; Hsuehchung Shelton|Rossman; Andrew|LeNgoc; Dahn

US5900887

   US    May 5, 1997   

Multiplexed wide interface to SGRAM on a graphics controller for complex-pattern
fills without color and mask registers

 

Leung; Clement K.|Ranganathan; Ravi

US5903480

   US    September 29, 1997   

Division-free phase-shift for digital-audio special effects

 

Lin; Tao

US5907295

   US    August 4, 1997   

Audio sample-rate conversion using a linear-interpolation stage with a multi-tap
low-pass filter requiring reduced coefficient storage

 

Lin; Tao

 

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Exhibit A

 

US5929924

   US    March 10, 1997   

Portable PC simultaneously displaying on a flat-panel display and on an external
NTSC/PAL TV using line buffer with variable horizontal-line rate during vertical
blanking period

 

Chen; Andy His-Wen

US5936683

   US    September 29, 1997   

YUV-to-RGB conversion without multiplies using look-up tables and pre-clipping

 

Lin; Tao

US5943382

   US    December 15, 1997   

Dual-loop spread-spectrum clock generator with master PLL and slave
voltage-modulation-locked loop

 

Li; Hung-Sung|Pimpalkhare; Mangesh S.

US5970110

   US    January 9, 1998   

Precise, low-jitter fractional divider using counter of rotating clock phases

 

Li; Hung-Sung

US6007228

   US    May 21, 1997   

Master digital mixer with digital-audio links to external audio in a docking
station and to internal audio inside a portable PC

 

Agarwal; Suresh|Dharmarajan; Krishnan C.

US6016151

   US    September 12, 1997   

3D triangle rendering by texture hardware and color software using simultaneous
triangle-walking and interpolation for parallel operation

 

Lin; Tao

US6023745

   US    August 8, 1996   

Scoreboarding for DRAM access within a multi-array DRAM device using
simultaneous activate and read/write accesses

 

Lu; Hsuehchung Shelton

 

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Exhibit A

 

US6043801

   US    October 28, 1997   

Display system with highly linear, flicker-free gray scales using high
framecounts

 

Bassetti; Chester F.

US6046735

   US    April 6, 1998   

EMI reduction for a flat-panel display controller using horizontal-line-based
spread spectrum

 

Bassetti; Chester F.|Pimpalkhare; Mangesh S.|Dharmarajan; Krishnan C.

US6049316

   US    June 12, 1997   

PC with multiple video-display refresh-rate configurations using active and
default registers

 

Nolan; Rebecca|Tang; Richard X.

US6057789

   US    October 29, 1998   

Re-synchronization of independently-clocked audio streams by dynamically
switching among 3 ratios for sampling-rate-conversion

 

Lin; Tao

US6057809

   US    May 20, 1998   

Modulation of line-select times of individual rows of a flat-panel display for
gray-scaling

 

Singhal; Dave M.|Bassetti; Chester F.

US6072415

   US    October 29, 1998   

Multi-mode 8/9-bit DAC with variable input-precision and output range for VGA
and NTSC outputs

 

Cheng; Yu-Chi

US6078513

   US    August 16, 1999   

NMOS dynamic content-addressable-memory CAM cell with self-booting pass
transistors and local row and column select

 

Ong; Adrian E.|Puar; Deepraj S.

 

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Exhibit A

 

US6091386

   US    June 23, 1998   

Extended frame-rate acceleration with gray-scaling for multi-virtual-segment
flat-panel displays

 

Lin; Tao

US6101620

   US    July 18, 1997   

Testable interleaved dual-DRAM architecture for a video memory controller with
split internal/external memory

 

Ranganathan; Ravi

US6104658

   US    September 29, 1998   

Distributed DRAM refreshing

 

Lu; Hsuehchung Shelton

US6157978

   US    January 6, 1999   

Multimedia round-robin arbitration with phantom slots for super-priority
real-time agent

 

Ng; David Way|Mathur; Harish Narian

US6184894

   US    January 29, 1999   

Adaptive tri-linear interpolation for use when switching to a new
level-of-detail map

 

Rosman; Andrew|Pimpalkhare; Mangesh S.

US6188411

   US    July 2, 1998   

Closed-loop reading of index registers using wide read and narrow write for
multi-threaded system

 

Lai; Michael Man Lok

US6188594

   US    June 9, 1999   

Reduced-pitch 6-transistor NMOS content-addressable-memory cell

 

Ong; Adrian E.

US6189082

   US    January 29, 1999   

Burst access of registers at non-consecutive addresses using a mapping control
word

 

Ramamurthy; Sriram

 

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Exhibit A

 

US6205524

   US    September 16, 1998   

Multimedia arbiter and method using fixed round-robin slots for real-time agents
and a timed priority slot for non-real-time agents

 

Ng; David Way

US6222550

   US    December 17, 1998   

Multiple triangle pixel-pipelines with span-range pixel interlock for processing
separate non-overlapping triangles for superscalar 3D graphics engine

 

Rosman; Andrew|Li; Ming-Ju

US6230235

   US    September 29, 1998   

Address lookup DRAM aging

 

Lu; Hsuehchung Shelton|Keene; David

US6236347

   US    March 31, 2000   

Dual-mode graphics DAC with variable 8/9-bit input-precision for VGA and NTSC
outputs

 

Cheng; Yu-Chi

US6252919

   US    December 17, 1998   

Re-synchronization of independently-clocked audio streams by fading-in with a
fractional sample over multiple periods for sample-rate conversion

 

Lin; Tao

US6260054

   US    October 29, 1998   

Reciprocal generator using piece-wise-linear segments of varying width with
floating-point format

 

Rosman; Andrew|Lin; Tao

US6272283

   US    April 22, 1998   

Copy-protection for laptop PC by disabling TV-out while viewing protected video
on PC display

 

Nguyen; Thu N.

US6295068

   US    April 6, 1999   

Advanced graphics port (AGP) display driver with restricted execute mode for
transparently transferring textures to a local texture cache

 

Peddada; Vijay|Ranade; Shreekant M.

 

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Exhibit A

 

US6308220

   US    January 29, 1999   

Circulating parallel-search engine with random inputs for network routing table
stored in a wide embedded DRAM

 

Mathur; Harish N.

US6374148

   US    October 13, 1999   

Portable-PC audio system with digital-audio links to external audio in a docking
station

 

Dharmarajan; Krishnan C.|Agarwal; Suresh

US6421466

   US    September 29, 1999   

Hierarchical motion estimation with levels of varying bit width for digital
video compression

 

Lin; Tao

US6424658

   US    February 17, 1999   

Store-and-forward network switch using an embedded DRAM

 

Mathur; Harish N.

US6433789

   US    February 18, 2000   

Steaming prefetching texture cache for level of detail maps in a 3D-graphics
engine

 

Rosman; Andrew

US6473529

   US    November 3, 1999   

Sum-of-absolute-difference calculator for motion estimation using inversion and
carry compensation with full and half-adders

 

Lin; Tao

US6501482

   US    October 11, 2000   

Texture map blender with adaptive interpolation when switching to a new
level-of-detail map

 

Rosman; Andrew|Pimpalkhare; Mangesh S.

 

- 7 -

--------------------------------------------------------------------------------

Exhibit A

 

US6564329

   US    March 16, 1999   

System and method for dynamic clock generation

 

Cheung; Edmund|Sponring; Otto

US6591286

   US    January 18, 2002   

Pipelined carry-lookahead generation for a fast incrementer

 

Lu; Wei-Ping

US6628330

   US    November 3, 1999   

Color interpolator and horizontal/vertical edge enhancer using two line buffer
and alternating even/odd filters for digital camera

 

Lin; Tao

US6642962

   US    September 1, 1999   

Merged pipeline for color interpolation and edge enhancement of digital images

 

Lin; Tao|Yu; Vincent Chor-Fung|Tang; Tianhua|Hwang; Beong-Kwon

US6680738

   US    February 22, 2002   

Single-block virtual frame buffer translated to multiple physical blocks for
multi-block display refresh generator

 

Ishii; Takatoshi|Cheung; Edmund|Brannon; Sherwood

US6721000

   US    February 23, 2000   

Adaptive pixel-level color enhancement for a digital camera

 

Lin; Tao|Tang; Tianhua

US6741257

   US    January 20, 2003   

Graphics engine command FIFO for programming multiple registers using a mapping
index with register offsets

 

Retika; John Y.

US6791576

   US    February 23, 2000   

Gamma correction using double mapping with ratiometrically-related segments of
two different ratios

 

Lin; Tao

 

- 8 -

--------------------------------------------------------------------------------

Exhibit B

 

ASSIGNMENT OF PATENT RIGHTS

 

For good and valuable consideration, the receipt of which is hereby
acknowledged, NeoMagic Corporation having offices at 3250 Jay Street, Santa
Clara, CA 95054 (“Assignor”), does hereby sell, assign, transfer and convey unto
Faust Communications, LLC, with an office at [***] (“Assignee”) or its
designees, all of Assignor’s right, title and interest in and to the patent
applications and patents listed below, any patents, registrations, or
certificates of invention issuing on any patent applications listed below, the
inventions disclosed in any of the foregoing, any and all counterpart United
States, international and foreign patents, applications and certificates of
invention based upon or covering any portion of the foregoing, and all reissues,
re-examinations, divisionals, renewals, extensions, provisionals, continuations
and continuations-in-part of any of the foregoing (collectively “Patent
Rights”):

 

Patent or Application No.

--------------------------------------------------------------------------------

   Country

--------------------------------------------------------------------------------

   Filing Date

--------------------------------------------------------------------------------

  

Title and Inventor(s)

--------------------------------------------------------------------------------

US5506499

   US    June 5, 1995   

Multiple probing of an auxiliary test pad which allows for reliable bonding to a
primary bonding pad

 

Puar; Deepraj S.

US5587672

   US    September 25, 1995   

Dynamic logic having power-down mode with periodic clock refresh for a low-power
graphics controller

 

Ranganathan; Ravi|Puar; Deepraj S.

US5615376

   US    August 3, 1994   

Clock management for power reduction in a video display sub-system

 

Ranganathan; Ravi

US5754170

   US    January 16, 1996   

Transparent blocking of CRT refresh fetches during video overlay using dummy
fetches

 

Ranganathan; Ravi

US5757338

   US    August 21, 1996   

EMI reduction for a flat-panel display controller using horizontal-line based
spread spectrum

 

Bassetti; Chester F.|Pimpalkhare; Mangesh S.|Dharmarajan; Krishnan C.

 

--------------------------------------------------------------------------------

[***] Confidential treatment requested pursuant to a request for confidential
treatment filed with the Securities and Exchange Commission. Omitted portions
have been filed separately with the Commission.

 

 

--------------------------------------------------------------------------------

Exhibit B

 

US5764201

   US    April 22, 1996   

Multiplexed yuv-movie pixel path for driving dual displays

 

Ranganathan; Ravi

US5781200

   US    August 8, 1996   

Tile memory mapping for increased throughput in a dual bank access DRAM

 

Lu; Hsuehchung Shelton|Fan; Huei-Yi

US5790083

   US    April 10, 1996   

Programmable burst of line-clock pulses during vertical retrace to reduce
flicker and charge build-up on passive LCD display panels during simultaneous
LCD and CRT display

 

Bassetti; Chester F.

US5805126

   US    May 8, 1996   

Display system with highly linear, flicker-free gray scales using high
framecounts

 

Bassetti; Chester F.

US5877780

   US    August 8, 1996   

Semiconductor chip having multiple independent memory sections, at least one of
which includes simultaneously accessible arrays

 

Lu; Hsuehchung Shelton|Rossman; Andrew|LeNgoc; Dahn

US5900887

   US    May 5, 1997   

Multiplexed wide interface to SGRAM on a graphics controller for complex-pattern
fills without color and mask registers

 

Leung; Clement K.|Ranganathan; Ravi

 

- 2 -

--------------------------------------------------------------------------------

Exhibit B

 

US5903480

   US    September 29, 1997   

Division-free phase-shift for digital-audio special effects

 

Lin; Tao

US5907295

   US    August 4, 1997   

Audio sample-rate conversion using a linear-interpolation stage with a multi-tap
low-pass filter requiring reduced coefficient storage

 

Lin; Ta

US5929924

   US    March 10, 1997   

Portable PC simultaneously displaying on a flat-panel display and on an external
NTSC/PAL TV using line buffer with variable horizontal-line rate during vertical
blanking period

 

Chen; Andy His-Wen

US5936683

   US    September 29, 1997   

YUV-to-RGB conversion without multiplies using look-up tables and pre-clipping

 

Lin; Tao

US5943382

   US    December 15, 1997   

Dual-loop spread-spectrum clock generator with master PLL and slave
voltage-modulation-locked loop

 

Li; Hung-Sung|Pimpalkhare; Mangesh S.

US5970110

   US    January 9, 1998   

Precise, low-jitter fractional divider using counter of rotating clock phases

 

Li; Hung-Sung

US6007228

   US    May 21, 1997   

Master digital mixer with digital-audio links to external audio in a docking
station and to internal audio inside a portable PC

 

Agarwal; Suresh|Dharmarajan; Krishnan C.

 

- 3 -

--------------------------------------------------------------------------------

Exhibit B

 

US6016151

   US    September 12, 1997   

3D triangle rendering by texture hardware and color software using simultaneous
triangle-walking and interpolation for parallel operation

 

Lin; Tao

US6023745

   US    August 8, 1996   

Scoreboarding for DRAM access within a multi-array DRAM device using
simultaneous activate and read/write accesses

 

Lu; Hsuehchung Shelton

US6043801

   US    October 28, 1997   

Display system with highly linear, flicker-free gray scales using high
framecounts

 

Bassetti; Chester F.

US6046735

   US    April 6, 1998   

EMI reduction for a flat-panel display controller using horizontal-line-based
spread spectrum

 

Bassetti; Chester F.|Pimpalkhare; Mangesh S.|Dharmarajan; Krishnan C.

US6049316

   US    June 12, 1997   

PC with multiple video-display refresh-rate configurations using active and
default registers

 

Nolan; Rebecca|Tang; Richard X.

US6057789

   US    October 29, 1998   

Re-synchronization of independently-clocked audio streams by dynamically
switching among 3 ratios for sampling-rate-conversion

 

Lin; Tao

US6057809

   US    May 20, 1998   

Modulation of line-select times of individual rows of a flat-panel display for
gray-scaling

 

Singhal; Dave M.|Bassetti; Chester F.

 

- 4 -

--------------------------------------------------------------------------------

Exhibit B

 

US6072415

   US    October 29, 1998   

Multi-mode 8/9-bit DAC with variable input-precision and output range for VGA
and NTSC outputs

 

Cheng; Yu-Chi

US6078513

   US    August 16, 1999   

NMOS dynamic content-addressable-memory CAM cell with self-booting pass
transistors and local row and column select

 

Ong; Adrian E.|Puar; Deepraj S.

US6091386

   US    June 23, 1998   

Extended frame-rate acceleration with gray-scaling for multi-virtual-segment
flat-panel displays

 

Lin; Tao

US6101620

   US    July 18, 1997   

Testable interleaved dual-DRAM architecture for a video memory controller with
split internal/external memory

 

Ranganathan; Ravi

US6104658

   US    September 29, 1998   

Distributed DRAM refreshing

 

Lu; Hsuehchung Shelton

US6157978

   US    January 6, 1999   

Multimedia round-robin arbitration with phantom slots for super-priority
real-time agent

 

Ng; David Way|Mathur; Harish Narian

US6184894

   US    January 29, 1999   

Adaptive tri-linear interpolation for use when switching to a new
level-of-detail map

 

Rosman; Andrew|Pimpalkhare; Mangesh S.

US6188411

   US    July 2, 1998   

Closed-loop reading of index registers using wide read and narrow write for
multi-threaded system

 

Lai; Michael Man Lok

 

- 5 -

--------------------------------------------------------------------------------

Exhibit B

 

US6188594

   US    June 9, 1999   

Reduced-pitch 6-transistor NMOS content-addressable-memory cell

 

Ong; Adrian E.

US6189082

   US    January 29, 1999   

Burst access of registers at non-consecutive addresses using a mapping control
word

 

Ramamurthy; Sriram

US6205524

   US    September 16, 1998   

Multimedia arbiter and method using fixed round-robin slots for real-time agents
and a timed priority slot for non-real-time agents

 

Ng; David Way

US6222550

   US    December 17, 1998   

Multiple triangle pixel-pipelines with span-range pixel interlock for processing
separate non-overlapping triangles for superscalar 3D graphics engine

 

Rosman; Andrew|Li; Ming-Ju

US6230235

   US    September 29, 1998   

Address lookup DRAM aging

 

Lu; Hsuehchung Shelton|Keene; David

US6236347

   US    March 31, 2000   

Dual-mode graphics DAC with variable 8/9-bit input-precision for VGA and NTSC
outputs

 

Cheng; Yu-Chi

US6252919

   US    December 17, 1998   

Re-synchronization of independently-clocked audio streams by fading-in with a
fractional sample over multiple periods for sample-rate conversion

 

Lin; Tao

US6260054

   US    October 29, 1998   

Reciprocal generator using piece-wise-linear segments of varying width with
floating-point format

 

Rosman; Andrew|Lin; Tao

 

- 6 -

--------------------------------------------------------------------------------

Exhibit B

 

US6272283

   US    April 22, 1998   

Copy-protection for laptop PC by disabling TV-out while viewing protected video
on PC display

 

Nguyen; Thu N.

US6295068

   US    April 6, 1999   

Advanced graphics port (AGP) display driver with restricted execute mode for
transparently transferring textures to a local texture cache

 

Peddada; Vijay|Ranade; Shreekant M.

US6308220

   US    January 29, 1999   

Circulating parallel-search engine with random inputs for network routing table
stored in a wide embedded DRAM

 

Mathur; Harish N.

US6374148

   US    October 13, 1999   

Portable-PC audio system with digital-audio links to external audio in a docking
station

 

Dharmarajan; Krishnan C.|Agarwal; Suresh

US6421466

   US    September 29, 1999   

Hierarchical motion estimation with levels of varying bit width for digital
video compression

 

Lin; Tao

US6424658

   US    February 17, 1999   

Store-and-forward network switch using an embedded DRAM

 

Mathur; Harish N.

US6433789

   US    February 18, 2000   

Steaming prefetching texture cache for level of detail maps in a 3D-graphics
engine

 

Rosman; Andrew

 

- 7 -

--------------------------------------------------------------------------------

Exhibit B

 

US6473529

   US    November 3, 1999   

Sum-of-absolute-difference calculator for motion estimation using inversion and
carry compensation with full and half-adders

 

Lin; Tao

US6501482

   US    October 11, 2000   

Texture map blender with adaptive interpolation when switching to a new
level-of-detail map

 

Rosman; Andrew|Pimpalkhare; Mangesh S.

US6564329

   US    March 16, 1999   

System and method for dynamic clock generation

 

Cheung; Edmund|Sponring; Otto

US6591286

   US    January 18, 2002   

Pipelined carry-lookahead generation for a fast incrementer

 

Lu; Wei-Ping

US6628330

   US    November 3, 1999   

Color interpolator and horizontal/vertical edge enhancer using two line buffer
and alternating even/odd filters for digital camera

 

Lin; Tao

US6642962

   US    September 1, 1999   

Merged pipeline for color interpolation and edge enhancement of digital images

 

Lin; Tao|Yu; Vincent Chor-Fung|Tang; Tianhua|Hwang; Beong-Kwon

US6680738

   US    February 22, 2002   

Single-block virtual frame buffer translated to multiple physical blocks for
multi-block display refresh generator

 

Ishii; Takatoshi|Cheung; Edmund|Brannon; Sherwood

US6721000

   US    February 23, 2000   

Adaptive pixel-level color enhancement for a digital camera

 

Lin; Tao|Tang; Tianhua

 

- 8 -

--------------------------------------------------------------------------------

Exhibit B

 

US6741257

   US    January 20, 2003   

Graphics engine command FIFO for programming multiple registers using a mapping
index with register offsets

 

Retika; John Y.

US6791576

   US    February 23, 2000   

Gamma correction using double mapping with ratiometrically-related segments of
two different ratios

 

Lin; Tao

 

Assignor further agrees to and hereby does sell, assign, transfer and convey
unto Assignee all rights: (i) in and to causes of action and enforcement rights
for the Patent Rights including all rights to pursue damages, injunctive relief
and other remedies for past and future infringement of the Patent Rights, and
(ii) to apply in any or all countries of the world for patents, certificates of
invention or other governmental grants for the Patent Rights, including without
limitation under the Paris Convention for the Protection of Industrial Property,
the International Patent Cooperation Treaty, or any other convention, treaty,
agreement or understanding. Assignor also hereby authorizes the respective
patent office or governmental agency in each jurisdiction to issue any and all
patents or certificates of invention which may be granted upon any of the Patent
Rights in the name of Assignee, as the assignee to the entire interest therein.

 

Assignor warrants to Assignee that (i) Assignor has the right and authority to
enter into this assignment of patent rights and to carry out its obligations
hereunder; (ii) Assignor has good and marketable title to the Patent Rights,
including without limitation all rights, title, and interest in the Patent
Rights to sue for infringement thereof; and (iii) the Patent Rights are free and
clear of all liens, mortgages, security interests or other encumbrances, and
restrictions on transfer.

 

IN WITNESS WHEREOF this Assignment of Patent Rights is executed at Santa Clara,
CA on April 6, 2005.

 

ASSIGNOR

 

By:  

/s/ Scott Sullinger

--------------------------------------------------------------------------------

Name:   Scott Sullinger Title:   CFO

 

- 9 -

--------------------------------------------------------------------------------

Exhibit B

 

(Signature MUST be notarized)

 

- 10 -