Repository: angr/pypcode (language: python)

Issue:
Startup time is incredibly slow
* Lazy bindings generation
* Big XML files loaded; switch to binary XML?


Discussion / hints:

Fix patch:
diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml
index 11461c9d..dddac99b 100644
--- a/.github/workflows/build.yml
+++ b/.github/workflows/build.yml
@@ -3,18 +3,33 @@ name: Build
 on: [push, pull_request]
 
 jobs:
-  Ubuntu:
-    runs-on: ubuntu-latest
+  BuildAndTest:
+    runs-on: ${{ matrix.os }}
+    strategy:
+      matrix:
+        os: [ubuntu-20.04, ubuntu-18.04,
+             macos-10.15,
+             windows-2019, windows-2016]
+        py: [ '3.x', 'pypy-3.7' ]
     steps:
     - name: Clone Tree
       uses: actions/checkout@v2
+    - name: Setup Python
+      uses: actions/setup-python@v2
+      with:
+        python-version: ${{ matrix.py }}
+        architecture: x64 # Windows actually gets 32b pypy
     - name: Install Dependencies
       run: |
-        python3 -m pip install -U pip setuptools
+        python -m pip install -U pip setuptools
     - name: Install
       run: |
-        python3 -m pip install --user .
-        cd /tmp
-        python3 -m pypcode -l
-        echo "McA5xnYRSInBg+EfigwKMAwHSP/A6+vD" | base64 -d > test-x64.bin
+        python -m pip install --user -v .
+    - name: Test
+      run: |
+        mkdir tmp
+        cd tmp
+
+        python -m pypcode -l
+        python -c "import base64; open('test-x64.bin', 'wb').write(base64.b64decode('McA5xnYRSInBg+EfigwKMAwHSP/A6+vD'))"
         python -m pypcode x86:LE:64:default test-x64.bin
diff --git a/.gitignore b/.gitignore
index e3adba01..5011bb7d 100644
--- a/.gitignore
+++ b/.gitignore
@@ -1,5 +1,3 @@
 *.egg-info/
 __pycache__/
 build/
-pypcode/pypcode-native.so
-
diff --git a/README.md b/README.md
index 777df1a4..5003c662 100644
--- a/README.md
+++ b/README.md
@@ -1,15 +1,22 @@
 pypcode ![Build Status](https://github.com/angr/pypcode/workflows/Build/badge.svg?event=push)
 =======
-Experimental Python bindings to Ghidra's [SLEIGH](https://ghidra.re/courses/languages/html/sleigh.html) library. Currently building for Linux-based systems, though cross-platform support is not far away (PRs welcome).
+Machine code disassembly and IR translation library for Python using the
+excellent [SLEIGH](https://ghidra.re/courses/languages/html/sleigh.html) library
+from the [Ghidra](https://ghidra-sre.org/) framework. Primarily for use in
+[angr](http://angr.io).
 
-Install
--------
-Install with PIP and Git via:
+Quick Start
+-----------
+This package can be installed on Linux, macOS, and Windows platforms for recent
+versions of both CPython and PyPy. You will need a working compiler and CMake to
+build the bindings.
+
+Install with PIP+Git via:
 
 ```bash
 python3 -m pip install --user git+https://github.com/angr/pypcode
 ```
 
-Example Usage
--------------
-See `__main__.py` for example usage which converts a chunk of x86 code to pcode.
+You can now invoke the `pypcode` module from command line to translate supported
+machine code to P-code from command line. Run `python -m pypcode --help` for
+usage information. See module source for examples of using pypcode as a library.
diff --git a/pypcode/.gitignore b/pypcode/.gitignore
new file mode 100644
index 00000000..140f8cf8
--- /dev/null
+++ b/pypcode/.gitignore
@@ -0,0 +1,1 @@
+*.so
diff --git a/pypcode/__init__.py b/pypcode/__init__.py
index d528934d..6f00e341 100644
--- a/pypcode/__init__.py
+++ b/pypcode/__init__.py
@@ -1,43 +1,44 @@
 #!/usr/bin/env python
-import cppyy
+"""
+Pythonic interface to SLEIGH by way of the csleigh C API wrapper and CFFI.
+"""
+
 import sys
-import logging
 import os.path
 import xml.etree.ElementTree as ET
-from typing import Generator, Sequence
-
-log = logging.getLogger(__name__)
-
-PYPCODENATIVE_PATH=os.path.join(os.path.dirname(__file__), 'pypcode-native')
-SLEIGH_SRC_PATH=os.path.join(PYPCODENATIVE_PATH, 'sleigh')
-SLEIGH_SPECFILES_PATH=os.path.join(PYPCODENATIVE_PATH, 'processors')
-
-log.debug('Loading Library')
-cppyy.include(os.path.join(PYPCODENATIVE_PATH, 'pypcode-native.h'))
-cppyy.include(os.path.join(SLEIGH_SRC_PATH, 'translate.hh'))
-cppyy.include(os.path.join(SLEIGH_SRC_PATH, 'error.hh'))
-cppyy.load_library(os.path.join(PYPCODENATIVE_PATH, 'pypcode-native.so'))
-
-# Import names into this namespace
-from cppyy.gbl import Address
-from cppyy.gbl import AssemblyEmitCacher
-from cppyy.gbl import AddrSpace
-from cppyy.gbl import ContextInternal
-from cppyy.gbl import DocumentStorage
-from cppyy.gbl import Element
-from cppyy.gbl import get_opname
-from cppyy.gbl import PcodeRawOutHelper
-from cppyy.gbl import SimpleLoadImage
-from cppyy.gbl import Sleigh
-from cppyy.gbl import OpCode
-from cppyy.gbl import VarnodeData
-from cppyy.gbl import PcodeOpRaw
+from enum import Enum
+from typing import Generator, Sequence, Optional, Mapping, Union
 
-class ArchLanguage:
+from ._csleigh import ffi
+from ._csleigh.lib import *
+
+
+PKG_SRC_DIR = os.path.abspath(os.path.dirname(__file__))
+SPECFILES_DIR = os.path.join(PKG_SRC_DIR, 'processors')
+
+
+def gen_enum(pyname:str, cprefix:str):
   """
-  Encapsulates a particular language for an architecture as defined in a *.ldefs
-  file for an arch.
+  Wrangle prefixed C enum names into a Python enum type, e.g.:
+
+  enum csleigh_OpCode {           --> class OpCode(Enum):
+      ...                         -->   ...
+      csleigh_CPUI_BOOL_AND = 39, -->   BOOL_AND =39
+      ...                         -->   ...
+  };                              -->
+
+  Provide destination type name in `pyname` and `cprefix` (e.g. csleigh_CPUI_).
+
   """
+  return Enum(pyname, { n[len(cprefix):]:v
+    for n,v in globals().items() if n.startswith(cprefix) })
+
+
+OpCode = gen_enum('OpCode', 'csleigh_CPUI_')
+SleighErrorType = gen_enum('SleighErrorType', 'csleigh_ERROR_TYPE_')
+
+
+class ArchLanguage:
 
   __slots__ = (
     "archdir",
@@ -47,7 +48,7 @@ class ArchLanguage:
   archdir: str
   ldef: ET.Element
 
-  def __init__(self, archdir: str, ldef: ET.Element):
+  def __init__(self, archdir:str, ldef:ET.Element):
     self.archdir = archdir
     self.ldef = ldef
 
@@ -66,9 +67,9 @@ def description(self) -> str:
   def __getattr__(self, key):
     if key in self.ldef.attrib:
       return self.ldef.attrib[key]
-    super().__attr__(key)
+    raise AttributeError(key)
 
-  def init_context_from_pspec(self, context:ContextInternal) -> None:
+  def init_context_from_pspec(self, ctx:'csleigh_Context') -> None:
     pspec = ET.parse(self.pspec_path)
     cd = pspec.getroot().find('context_data')
     if cd is None: return
@@ -76,14 +77,10 @@ def init_context_from_pspec(self, context:ContextInternal) -> None:
     if cs is None: return
     for e in cs:
       assert(e.tag == 'set')
-      context.setVariableDefault(e.attrib['name'], int(e.attrib['val']))
+      csleigh_setVariableDefault(ctx, e.attrib['name'].encode('utf-8'), int(e.attrib['val']))
+
 
 class Arch:
-  """
-  Encapsulates information about a particular architecture. An architecture
-  can have many 'languages'. Query the `languages` property for a list of all
-  supported languages.
-  """
 
   __slots__ = (
     "archpath",
@@ -99,7 +96,7 @@ class Arch:
   ldef: ET.ElementTree
   languages: Sequence[ArchLanguage]
 
-  def __init__(self, archname: str, ldefpath: str):
+  def __init__(self, archname:str, ldefpath:str):
     self.archpath = os.path.dirname(ldefpath)
     self.archname = archname
     self.ldefpath = ldefpath
@@ -108,12 +105,568 @@ def __init__(self, archname: str, ldefpath: str):
 
   @classmethod
   def enumerate(cls) -> Generator['Arch', None, None]:
-    # processors/<architecture>/data/languages/<variant>.ldefs
-    for archname in os.listdir(SLEIGH_SPECFILES_PATH):
-      langdir = os.path.join(SLEIGH_SPECFILES_PATH, archname, 'data', 'languages')
+    """
+    Enumerate all available architectures and languages.
+
+    Language definitions are sourced from definitions shipped with pypcode and
+    can be found in processors/<architecture>/data/languages/<variant>.ldefs
+    """
+    for archname in os.listdir(SPECFILES_DIR):
+      langdir = os.path.join(SPECFILES_DIR, archname, 'data', 'languages')
       if not (os.path.exists(langdir) and os.path.isdir(langdir)): continue
       for langname in os.listdir(langdir):
         if not langname.endswith('.ldefs'): continue
         ldefpath = os.path.join(langdir, langname)
         yield Arch(archname, ldefpath)
 
+
+class Context:
+
+  __slots__ = (
+    'lang',
+    'ctx_c',
+    '_cached_addr_spaces',
+    )
+
+  lang: ArchLanguage
+  ctx_c: 'csleigh_Context'
+  _cached_addr_spaces: Mapping['csleigh_AddrSpace', 'AddrSpace']
+
+  def __init__(self, lang:ArchLanguage):
+    self._cached_addr_spaces = {}
+    self.lang = lang
+    self.ctx_c = csleigh_createContext(self.lang.slafile_path.encode('utf-8'))
+    self.lang.init_context_from_pspec(self.ctx_c)
+
+  def __del__(self):
+    csleigh_destroyContext(self.ctx_c)
+
+  def get_cached_addr_space(self, cobj:'csleigh_AddrSpace') -> 'AddrSpace':
+    """
+    Used during translation to cache unchanging address space objects. Should
+    not be called by pypcode users.
+    """
+    return self._cached_addr_spaces.get(cobj)
+
+  def set_cached_addr_space(self, cobj:'csleigh_AddrSpace', pobj:'AddrSpace') -> None:
+    """
+    Used during translation to cache unchanging address space objects. Should
+    not be called by pypcode users.
+    """
+    self._cached_addr_spaces[cobj] = pobj
+
+  def translate(self, code:Union[bytes, bytearray], base:int, max_inst:int = 0, max_bytes:int = 0, bb_terminating:bool = False) -> 'TranslationResult':
+    """
+    Disassemble and translate to p-code.
+
+    :param code:           Buffer of machine code to translate
+    :param base:           Base address of the machine code
+    :param max_inst:       Maximum number of instructions to translate, or 0 for no limit
+    :param max_bytes:      Maximum number of bytes to translate, or 0 for no limit
+    :param bb_terminating: End translation at basic block boundaries
+    """
+    c_data = ffi.from_buffer(code)
+    max_bytes = min(len(code), max_bytes) if (max_bytes > 0) else len(code)
+    res_c = csleigh_translate(self.ctx_c, c_data, max_bytes, base, max_inst, bb_terminating)
+    res = TranslationResult.from_c(self, res_c)
+    csleigh_freeResult(res_c)
+    return res
+
+  def get_register_name(self, space:'AddrSpace', offset:int, size:int) -> str:
+    """
+    Call SleighBase::getRegisterName in this context.
+    """
+    return ffi.string(csleigh_Sleigh_getRegisterName(
+      self.ctx_c, space.to_c(), offset, size)).decode('utf-8')
+
+
+class ContextObj:
+
+  __slots__ = (
+    'ctx',
+    )
+
+  ctx: Context
+
+  def __init__(self, ctx:Context):
+    self.ctx = ctx
+
+
+class AddrSpace(ContextObj):
+
+  __slots__ = (
+    'cobj',
+    'name',
+    )
+
+  cobj: 'csleigh_AddrSpace'
+  name: str
+
+  def __init__(self, ctx:Context, cobj:'csleigh_AddrSpace'):
+    super().__init__(ctx)
+    self.cobj = cobj
+    self.name = ffi.string(csleigh_AddrSpace_getName(cobj)).decode('utf-8')
+
+  @classmethod
+  def from_c_uncached(cls, ctx:Context, cobj:'csleigh_AddrSpace') -> 'AddrSpace':
+    return cls(ctx, cobj)
+
+  @classmethod
+  def from_c(cls, ctx:Context, cobj:'csleigh_AddrSpace') -> 'AddrSpace':
+    obj = ctx.get_cached_addr_space(cobj)
+    if obj is None:
+      obj = cls.from_c_uncached(ctx, cobj)
+      ctx.set_cached_addr_space(cobj, obj)
+    return obj
+
+  def to_c(self) -> 'csleigh_AddrSpace':
+    return self.cobj
+
+
+class Address(ContextObj):
+
+  __slots__ = (
+    'space',
+    'offset',
+    )
+
+  space: AddrSpace
+  offset: int
+
+  def __init__(self, ctx:Context, space:AddrSpace, offset:int):
+    super().__init__(ctx)
+    self.space = space
+    self.offset = offset
+
+  @classmethod
+  def from_c(cls, ctx:Context, cobj:'csleigh_Address') -> 'Address':
+    return cls(ctx, AddrSpace.from_c(ctx, cobj.space), cobj.offset)
+
+  def to_c(self) -> 'csleigh_Address':
+    # XXX: The boxing in AddrSpace/Address is a little excessive, but lets us
+    # access the API as provided by SLEIGH, and should still be fast.
+    cobj = ffi.new('csleigh_Address *')
+    cobj.space = self.space.to_c()
+    cobj.offset = self.offset
+    return cobj
+
+  @property
+  def is_constant(self) -> bool:
+    """
+    Return True if this address is in the constant space.
+    """
+    return csleigh_Addr_isConstant(self.to_c())
+
+  def get_space_from_const(self) -> AddrSpace:
+    """
+    For LOAD/STORE, the address space which is being accessed is encoded as
+    a pointer stored in a constant space offset. See Address::getSpaceFromConst.
+    """
+    return AddrSpace.from_c(self.ctx, csleigh_Addr_getSpaceFromConst(self.to_c()))
+
+
+class Varnode(ContextObj):
+
+  __slots__ = (
+    'space',
+    'offset',
+    'size',
+    )
+
+  space: AddrSpace
+  offset: int
+  size: int
+
+  def __init__(self, ctx:Context, space:AddrSpace, offset:int, size:int):
+    super().__init__(ctx)
+    self.space = space
+    self.offset = offset
+    self.size = size
+
+  @classmethod
+  def from_c(cls, ctx:Context, cobj:'csleigh_Varnode') -> 'Varnode':
+    return cls(ctx, AddrSpace.from_c(ctx, cobj.space), cobj.offset, cobj.size)
+
+  def __str__(self):
+    return '%s[%#x:%d]' % (self.space.name, self.offset, self.size)
+
+  def get_addr(self) -> Address:
+    return Address(self.ctx, self.space, self.offset)
+
+  def get_register_name(self) -> str:
+    """
+    Convenience function to call SleighBase::getRegisterName with current
+    Varnode attributes.
+    """
+    return self.ctx.get_register_name(self.space, self.offset, self.size)
+
+  def get_space_from_const(self) -> AddrSpace:
+    """
+    Convenience function to call Address::getSpaceFromConst with current Varnode
+    attributes.
+    """
+    return self.get_addr().get_space_from_const()
+
+
+class SeqNum(ContextObj):
+
+  __slots__ = (
+    'pc',
+    'uniq',
+    'order',
+    )
+
+  pc: Address
+  uniq: int
+  order: int
+
+  def __init__(self, ctx:Context, pc:AddrSpace, uniq:int, order:int):
+    super().__init__(ctx)
+    self.pc = pc
+    self.uniq = uniq
+    self.order = order
+
+  @classmethod
+  def from_c(cls, ctx:Context, cobj:'csleigh_SeqNum') -> 'SeqNum':
+    return cls(ctx, Address.from_c(ctx, cobj.pc), cobj.uniq, cobj.order)
+
+
+class PcodeOp(ContextObj):
+
+  __slots__ = (
+    'seq',
+    'opcode',
+    'output',
+    'inputs',
+    )
+
+  seq: int
+  opcode: OpCode
+  output: Optional[Varnode]
+  inputs: Sequence[Varnode]
+
+  def __init__(self, ctx:Context, seq:int, opcode:OpCode, inputs:Sequence[Varnode], output:Optional[Varnode] = None):
+    super().__init__(ctx)
+    self.seq = seq
+    self.opcode = opcode
+    self.output = output
+    self.inputs = inputs
+
+  @classmethod
+  def from_c(cls, ctx:Context, cobj:'csleigh_PcodeOp') -> 'PcodeOp':
+    return cls(ctx, SeqNum.from_c(ctx, cobj.seq), OpCode(cobj.opcode),
+      [Varnode.from_c(ctx, cobj.inputs[i]) for i in range(cobj.inputs_count)],
+      Varnode.from_c(ctx, cobj.output) if cobj.output else None)
+
+  def __str__(self):
+    s = ''
+    if self.output:
+      s += str(self.output) + ' = '
+    s += f'{self.opcode.name} {", ".join(map(str, self.inputs))}'
+    return s
+
+
+class OpFormat:
+
+  @staticmethod
+  def fmt_vn(vn:Varnode) -> str:
+    if vn.space.name == 'const':
+      return '%#x' % vn.offset
+    elif vn.space.name == 'register':
+      name = vn.get_register_name()
+      if name:
+        return name
+    return str(vn)
+
+  def fmt(self, op:PcodeOp) -> str:
+    return f'{op.opcode.name} {", ".join(map(self.fmt_vn, op.inputs))}'
+
+
+class OpFormatUnary(OpFormat):
+
+  __slots__ = (
+    'operator',
+    )
+
+  def __init__(self, operator:str):
+    super().__init__()
+    self.operator = operator
+
+  def fmt(self, op:PcodeOp) -> str:
+    return f'{self.operator}{self.fmt_vn(op.inputs[0])}'
+
+
+class OpFormatBinary(OpFormat):
+
+  __slots__ = (
+    'operator',
+    )
+
+  def __init__(self, operator:str):
+    super().__init__()
+    self.operator = operator
+
+  def fmt(self, op:PcodeOp) -> str:
+    return f'{self.fmt_vn(op.inputs[0])} {self.operator} {self.fmt_vn(op.inputs[1])}'
+
+
+class OpFormatFunc(OpFormat):
+
+  __slots__ = (
+    'operator',
+    )
+
+  def __init__(self, operator:str):
+    super().__init__()
+    self.operator = operator
+
+  def fmt(self, op:PcodeOp) -> str:
+    return f'{self.operator}({", ".join(map(self.fmt_vn, op.inputs))})'
+
+
+class OpFormatSpecial(OpFormat):
+
+  def fmt_BRANCH(self, op:PcodeOp) -> str:
+    return f'goto {self.fmt_vn(op.inputs[0])}'
+
+  def fmt_BRANCHIND(self, op:PcodeOp) -> str:
+    return f'goto [{self.fmt_vn(op.inputs[0])}]'
+
+  def fmt_CALL(self, op:PcodeOp) -> str:
+    return f'call {self.fmt_vn(op.inputs[0])}'
+
+  def fmt_CALLIND(self, op:PcodeOp) -> str:
+    return f'call [{self.fmt_vn(op.inputs[0])}]'
+
+  def fmt_CBRANCH(self, op:PcodeOp) -> str:
+    return f'if ({self.fmt_vn(op.inputs[1])}) goto {self.fmt_vn(op.inputs[0])}'
+
+  def fmt_LOAD(self, op:PcodeOp) -> str:
+    return f'*[{op.inputs[0].get_space_from_const().name}]{self.fmt_vn(op.inputs[1])}'
+
+  def fmt_RETURN(self, op:PcodeOp) -> str:
+    return f'return {self.fmt_vn(op.inputs[0])}'
+
+  def fmt_STORE(self, op:PcodeOp) -> str:
+    return f'*[{op.inputs[0].get_space_from_const().name}]{self.fmt_vn(op.inputs[1])} = {op.inputs[2]}'
+
+  def fmt(self, op:PcodeOp) -> str:
+    return {
+      OpCode.BRANCH:    self.fmt_BRANCH,
+      OpCode.BRANCHIND: self.fmt_BRANCHIND,
+      OpCode.CALL:      self.fmt_CALL,
+      OpCode.CALLIND:   self.fmt_CALLIND,
+      OpCode.CBRANCH:   self.fmt_CBRANCH,
+      OpCode.LOAD:      self.fmt_LOAD,
+      OpCode.RETURN:    self.fmt_RETURN,
+      OpCode.STORE:     self.fmt_STORE,
+    }.get(op.opcode)(op)
+
+
+class PcodePrettyPrinter:
+
+  DEFAULT_OP_FORMAT = OpFormat()
+
+  OP_FORMATS = {
+    OpCode.BOOL_AND          : OpFormatBinary('&&'),
+    OpCode.BOOL_NEGATE       : OpFormatUnary('!'),
+    OpCode.BOOL_OR           : OpFormatBinary('||'),
+    OpCode.BOOL_XOR          : OpFormatBinary('^^'),
+    OpCode.BRANCH            : OpFormatSpecial(),
+    OpCode.BRANCHIND         : OpFormatSpecial(),
+    OpCode.CALL              : OpFormatSpecial(),
+    OpCode.CALLIND           : OpFormatSpecial(),
+    OpCode.CBRANCH           : OpFormatSpecial(),
+    OpCode.COPY              : OpFormatUnary(''),
+    OpCode.CPOOLREF          : OpFormatFunc('cpool'),
+    OpCode.FLOAT_ABS         : OpFormatFunc('abs'),
+    OpCode.FLOAT_ADD         : OpFormatBinary('f+'),
+    OpCode.FLOAT_CEIL        : OpFormatFunc('ceil'),
+    OpCode.FLOAT_DIV         : OpFormatBinary('f/'),
+    OpCode.FLOAT_EQUAL       : OpFormatBinary('f=='),
+    OpCode.FLOAT_FLOAT2FLOAT : OpFormatFunc('float2float'),
+    OpCode.FLOAT_FLOOR       : OpFormatFunc('floor'),
+    OpCode.FLOAT_INT2FLOAT   : OpFormatFunc('int2float'),
+    OpCode.FLOAT_LESS        : OpFormatBinary('f<'),
+    OpCode.FLOAT_LESSEQUAL   : OpFormatBinary('f<='),
+    OpCode.FLOAT_MULT        : OpFormatBinary('f*'),
+    OpCode.FLOAT_NAN         : OpFormatFunc('nan'),
+    OpCode.FLOAT_NEG         : OpFormatUnary('f- '),
+    OpCode.FLOAT_NOTEQUAL    : OpFormatBinary('f!='),
+    OpCode.FLOAT_ROUND       : OpFormatFunc('round'),
+    OpCode.FLOAT_SQRT        : OpFormatFunc('sqrt'),
+    OpCode.FLOAT_SUB         : OpFormatBinary('f-'),
+    OpCode.FLOAT_TRUNC       : OpFormatFunc('trunc'),
+    OpCode.INT_2COMP         : OpFormatUnary('-'),
+    OpCode.INT_ADD           : OpFormatBinary('+'),
+    OpCode.INT_AND           : OpFormatBinary('&'),
+    OpCode.INT_CARRY         : OpFormatFunc('carry'),
+    OpCode.INT_DIV           : OpFormatBinary('/'),
+    OpCode.INT_EQUAL         : OpFormatBinary('=='),
+    OpCode.INT_LEFT          : OpFormatBinary('<<'),
+    OpCode.INT_LESS          : OpFormatBinary('<'),
+    OpCode.INT_LESSEQUAL     : OpFormatBinary('<='),
+    OpCode.INT_MULT          : OpFormatBinary('*'),
+    OpCode.INT_NEGATE        : OpFormatUnary('~'),
+    OpCode.INT_NOTEQUAL      : OpFormatBinary('!='),
+    OpCode.INT_OR            : OpFormatBinary('|'),
+    OpCode.INT_REM           : OpFormatBinary('%'),
+    OpCode.INT_RIGHT         : OpFormatBinary('>>'),
+    OpCode.INT_SBORROW       : OpFormatFunc('sborrow'),
+    OpCode.INT_SCARRY        : OpFormatFunc('scarry'),
+    OpCode.INT_SDIV          : OpFormatBinary('s/'),
+    OpCode.INT_SEXT          : OpFormatFunc('sext'),
+    OpCode.INT_SLESS         : OpFormatBinary('s<'),
+    OpCode.INT_SLESSEQUAL    : OpFormatBinary('s<='),
+    OpCode.INT_SREM          : OpFormatBinary('s%'),
+    OpCode.INT_SRIGHT        : OpFormatBinary('s>>'),
+    OpCode.INT_SUB           : OpFormatBinary('-'),
+    OpCode.INT_XOR           : OpFormatBinary('^'),
+    OpCode.INT_ZEXT          : OpFormatFunc('zext'),
+    OpCode.LOAD              : OpFormatSpecial(),
+    OpCode.NEW               : OpFormatFunc('newobject'),
+    OpCode.POPCOUNT          : OpFormatFunc('popcount'),
+    OpCode.RETURN            : OpFormatSpecial(),
+    OpCode.STORE             : OpFormatSpecial(),
+  }
+
+  @classmethod
+  def fmt_op(cls, op:PcodeOp) -> str:
+    fmt = cls.OP_FORMATS.get(op.opcode, cls.DEFAULT_OP_FORMAT)
+    return (f'{fmt.fmt_vn(op.output)} = ' if op.output else '') + fmt.fmt(op)
+
+
+class Translation(ContextObj):
+
+  __slots__ = (
+    'address',
+    'length',
+    'asm_mnem',
+    'asm_body',
+    'ops',
+    )
+
+  address: Address
+  length: int
+  asm_mnem: str
+  asm_body: str
+  ops: Sequence[PcodeOp]
+
+  def __init__(self, ctx:Context, address:Address, length:int, asm_mnem:str, asm_body:str, ops:Sequence[PcodeOp]):
+    super().__init__(ctx)
+    self.address = address
+    self.length = length
+    self.asm_mnem = asm_mnem
+    self.asm_body = asm_body
+    self.ops = ops
+
+  @classmethod
+  def from_c(cls, ctx:Context, cobj:'csleigh_Translation') -> 'Translation':
+    return cls(ctx, Address.from_c(ctx, cobj.address),
+               cobj.length,
+               ffi.string(cobj.asm_mnem).decode('utf-8'),
+               ffi.string(cobj.asm_body).decode('utf-8'),
+               [PcodeOp.from_c(ctx, cobj.ops[i]) for i in range(cobj.ops_count)])
+
+
+class SleighError(Exception):
+
+  __slots__ = (
+    'ctx',
+    )
+
+  ctx: Context
+
+  def __init__(self, ctx:Context, explain:str):
+    super().__init__(explain)
+    self.ctx = ctx
+
+
+class UnimplError(SleighError):
+
+  __slots__ = (
+    'explain',
+    'address',
+    'instruction_length',
+    )
+
+  explain: str
+  address: Address
+  instruction_length: int
+
+  def __init__(self, ctx:Context, explain:str, address:Address, instruction_length:int):
+    super().__init__(ctx, explain)
+    self.explain = explain
+    self.address = address
+    self.instruction_length = instruction_length
+
+  @classmethod
+  def from_c(cls, ctx:Context, cobj:'csleigh_Error') -> 'UnimplError':
+    assert(SleighErrorType(cobj.type) == SleighErrorType.UNIMPL)
+    return cls(
+      ctx,
+      ffi.string(cobj.explain).decode('utf-8'),
+      Address.from_c(ctx, cobj.unimpl.address),
+      cobj.unimpl.instruction_length
+      )
+
+
+class BadDataError(SleighError):
+
+  __slots__ = (
+    'explain',
+    'address',
+    )
+
+  explain: str
+  address: Address
+
+  def __init__(self, ctx:Context, explain:str, address:Address):
+    super().__init__(ctx, explain)
+    self.explain = explain
+    self.address = address
+
+  @classmethod
+  def from_c(cls, ctx:Context, cobj:'csleigh_Error') -> 'BadDataError':
+    assert(SleighErrorType(cobj.type) == SleighErrorType.BADDATA)
+    return cls(
+      ctx,
+      ffi.string(cobj.explain).decode('utf-8'),
+      Address.from_c(ctx, cobj.unimpl.address)
+      )
+
+
+class SleighErrorFactory:
+  @classmethod
+  def from_c(cls, ctx:Context, cobj:'csleigh_Error') -> Union[None, UnimplError, BadDataError]:
+    t = SleighErrorType(cobj.type)
+    if t == SleighErrorType.NOERROR:
+      return None
+    else:
+      return {
+        SleighErrorType.UNIMPL: UnimplError,
+        SleighErrorType.BADDATA: BadDataError,
+      }[t].from_c(ctx, cobj)
+
+
+class TranslationResult(ContextObj):
+
+  __slots__ = (
+    'instructions',
+    'error',
+    )
+
+  instructions: Sequence[Translation]
+  error: SleighError
+
+  def __init__(self, ctx:Context, instructions:Sequence[Translation], error:Optional[SleighError] = None):
+    super().__init__(ctx)
+    self.instructions = instructions
+    self.error = error
+
+  @classmethod
+  def from_c(cls, ctx:Context, cobj:'csleigh_TranslationResult') -> 'TranslationResult':
+    return cls(ctx,
+      [Translation.from_c(ctx, cobj.instructions[i]) for i in range(cobj.instructions_count)],
+      SleighErrorFactory.from_c(ctx, cobj.error)
+      )
diff --git a/pypcode/__main__.py b/pypcode/__main__.py
index 92816f5b..027ea98a 100644
--- a/pypcode/__main__.py
+++ b/pypcode/__main__.py
@@ -1,32 +1,36 @@
 #!/usr/bin/env python
+"""
+Runs when invoking pypcode module from command line. Lists supported
+architectures, and handles basic disassembly and translation to P-code of
+supported binaries. Does not parse object files, the binary files must be plain
+machine code bytes in a file.
+"""
+
 import argparse
 import logging
-import os
-import os.path
 import sys
 from difflib import SequenceMatcher
 
-from pypcode import *
+from pypcode import Arch, Context, PcodePrettyPrinter
 
 log = logging.getLogger(__name__)
 logging.basicConfig(level=logging.DEBUG, format='[%(name)s:%(levelname)s] %(message)s')
 
+
 def main():
   ap = argparse.ArgumentParser(prog='pypcode', description='Disassemble and translate machine code to P-code using SLEIGH')
-  ap.add_argument('-l', '--list', action='store_true', help='list architecture languages')
+  ap.add_argument('-l', '--list', action='store_true', help='list supported architecture languages')
   ap.add_argument('langid', help='architecture language id')
   ap.add_argument('binary', help='path to flat binary code')
   ap.add_argument('base', default='0', nargs='?', help='base address to load at')
   ap.add_argument('-o', '--offset', default='0', help='offset in binary file to load from')
   ap.add_argument('-s', '--length', default=None, help='length of code in bytes to load')
   ap.add_argument('-i', '--max-instructions', default=0, type=int, help='maximum number of instructions to translate')
-
-  langs = {}
-  for arch in Arch.enumerate():
-    for lang in arch.languages:
-      langs[lang.id] = lang
+  ap.add_argument('-r', '--raw', action='store_true', default=False, help='show raw p-code (disable pretty-printing)')
+  ap.add_argument('-b', '--basic-block', action='store_true', default=False, help='stop translation at end of basic block')
 
   # List supported languages
+  langs = {l.id:l for arch in Arch.enumerate() for l in arch.languages}
   if ('-l' in sys.argv) or ('--list' in sys.argv):
     for langid in sorted(langs):
       print('%-35s - %s' % (langid, langs[langid].description))
@@ -46,66 +50,27 @@ def main():
       print('')
     print('Try `--list` for full list of architectures.')
     return
-  lang = langs[args.langid]
 
   # Load target binary code
   base = int(args.base, 0)
   with open(args.binary, 'rb') as f:
     f.seek(int(args.offset, 0))
-    code = bytearray(f.read(int(args.length, 0)) if args.length else f.read())
-
-  # Init SLEIGH
-  log.debug('Loading image')
-  loader = SimpleLoadImage(base, code, len(code))
-  log.debug('Creating context')
-  context = ContextInternal()
-  log.debug('Setting up translator')
-  trans = Sleigh(loader, context)
-  log.debug('Reading Sleigh file into DOM')
-  docstorage = DocumentStorage()
-  log.debug('Opening document')
-  doc = docstorage.openDocument(lang.slafile_path).getRoot()
-  log.debug('Registering tags')
-  docstorage.registerTag(doc)
-  log.debug('Initializing translator')
-  trans.initialize(docstorage)
-  log.debug('Initializing context')
-  lang.init_context_from_pspec(context)
+    code = f.read(int(args.length, 0)) if args.length else f.read()
 
   # Translate
-  emit     = PcodeRawOutHelper(trans)
-  asm      = AssemblyEmitCacher()
-  addr     = Address(trans.getDefaultCodeSpace(), base)
-  lastaddr = Address(trans.getDefaultCodeSpace(), base + len(code))
-
-  def vardata_str(data):
-    s = '(%s, 0x%x, %d) ' % (data.space.getName(), data.offset, data.size)
-    if data.space.getName() == 'register':
-      regname = trans.getRegisterName(data.space, data.offset, data.size)
-      s += '{%s} ' % regname
-    return s
-
-  num_insn_xlat = 0
-  while (addr.getOffset() < lastaddr.getOffset()
-    and (args.max_instructions == 0 or num_insn_xlat < args.max_instructions)):
-    try:
-      emit.clearCache()
-      trans.printAssembly(asm, addr)
-      length = trans.oneInstruction(emit, addr)
-      print('%08x/%d: %s %s' % (asm.addr.getOffset(), length, asm.mnem, asm.body))
-      for op in emit.opcache:
-        out  = op.getOutput()
-        outs = (vardata_str(out) + '=') if out else ''
-        var  = ' '.join(vardata_str(op.getInput(i)) for i in range(op.numInput()))
-        print('%-30s %-12s %s' % (outs, get_opname(op.getOpcode()), var))
-      print('')
-      addr = addr + length
+  ctx = Context(langs[args.langid])
+  res = ctx.translate(code, base, args.max_instructions, bb_terminating=args.basic_block)
 
-    except Exception as e:
-      print(e)
-      break
+  for insn in res.instructions:
+    print('-' * 80)
+    print('%08x/%d: %s %s' % (insn.address.offset, insn.length, insn.asm_mnem, insn.asm_body))
+    print('-' * 80)
+    for op in insn.ops:
+      print('%3d: %s' % (op.seq.uniq, str(op) if args.raw else PcodePrettyPrinter.fmt_op(op)))
+    print('')
 
-    num_insn_xlat += 1
+  if res.error:
+    print('** An error occured during translation: ' + repr(res.error))
 
 if __name__ == '__main__':
 	main()
diff --git a/pypcode/processors/.gitignore b/pypcode/processors/.gitignore
new file mode 100644
index 00000000..1a3a8bb5
--- /dev/null
+++ b/pypcode/processors/.gitignore
@@ -0,0 +1,1 @@
+*.sla
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diff --git a/pypcode/pypcode-native/processors/PowerPC/data/languages/ppc_a2.sinc b/pypcode/processors/PowerPC/data/languages/ppc_a2.sinc
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rename from pypcode/pypcode-native/processors/PowerPC/data/languages/ppc_a2.sinc
rename to pypcode/processors/PowerPC/data/languages/ppc_a2.sinc
diff --git a/pypcode/pypcode-native/processors/PowerPC/data/languages/ppc_common.sinc b/pypcode/processors/PowerPC/data/languages/ppc_common.sinc
similarity index 100%
rename from pypcode/pypcode-native/processors/PowerPC/data/languages/ppc_common.sinc
rename to pypcode/processors/PowerPC/data/languages/ppc_common.sinc
diff --git a/pypcode/pypcode-native/processors/PowerPC/data/languages/ppc_embedded.sinc b/pypcode/processors/PowerPC/data/languages/ppc_embedded.sinc
similarity index 100%
rename from pypcode/pypcode-native/processors/PowerPC/data/languages/ppc_embedded.sinc
rename to pypcode/processors/PowerPC/data/languages/ppc_embedded.sinc
diff --git a/pypcode/pypcode-native/processors/PowerPC/data/languages/ppc_instructions.sinc b/pypcode/processors/PowerPC/data/languages/ppc_instructions.sinc
similarity index 100%
rename from pypcode/pypcode-native/processors/PowerPC/data/languages/ppc_instructions.sinc
rename to pypcode/processors/PowerPC/data/languages/ppc_instructions.sinc
diff --git a/pypcode/pypcode-native/processors/PowerPC/data/languages/ppc_isa.sinc b/pypcode/processors/PowerPC/data/languages/ppc_isa.sinc
similarity index 100%
rename from pypcode/pypcode-native/processors/PowerPC/data/languages/ppc_isa.sinc
rename to pypcode/processors/PowerPC/data/languages/ppc_isa.sinc
diff --git a/pypcode/pypcode-native/processors/PowerPC/data/languages/ppc_vle.sinc b/pypcode/processors/PowerPC/data/languages/ppc_vle.sinc
similarity index 100%
rename from pypcode/pypcode-native/processors/PowerPC/data/languages/ppc_vle.sinc
rename to pypcode/processors/PowerPC/data/languages/ppc_vle.sinc
diff --git a/pypcode/pypcode-native/processors/PowerPC/data/languages/quicciii.sinc b/pypcode/processors/PowerPC/data/languages/quicciii.sinc
similarity index 100%
rename from pypcode/pypcode-native/processors/PowerPC/data/languages/quicciii.sinc
rename to pypcode/processors/PowerPC/data/languages/quicciii.sinc
diff --git a/pypcode/pypcode-native/processors/PowerPC/data/languages/stmwInstructions.sinc b/pypcode/processors/PowerPC/data/languages/stmwInstructions.sinc
similarity index 100%
rename from pypcode/pypcode-native/processors/PowerPC/data/languages/stmwInstructions.sinc
rename to pypcode/processors/PowerPC/data/languages/stmwInstructions.sinc
diff --git a/pypcode/pypcode-native/processors/PowerPC/data/languages/stswiInstructions.sinc b/pypcode/processors/PowerPC/data/languages/stswiInstructions.sinc
similarity index 100%
rename from pypcode/pypcode-native/processors/PowerPC/data/languages/stswiInstructions.sinc
rename to pypcode/processors/PowerPC/data/languages/stswiInstructions.sinc
diff --git a/pypcode/pypcode-native/processors/PowerPC/data/languages/vsx.sinc b/pypcode/processors/PowerPC/data/languages/vsx.sinc
similarity index 100%
rename from pypcode/pypcode-native/processors/PowerPC/data/languages/vsx.sinc
rename to pypcode/processors/PowerPC/data/languages/vsx.sinc
diff --git a/pypcode/pypcode-native/processors/PowerPC/data/manuals/PowerISA.idx b/pypcode/processors/PowerPC/data/manuals/PowerISA.idx
similarity index 100%
rename from pypcode/pypcode-native/processors/PowerPC/data/manuals/PowerISA.idx
rename to pypcode/processors/PowerPC/data/manuals/PowerISA.idx
diff --git a/pypcode/pypcode-native/processors/PowerPC/data/manuals/PowerPC.idx b/pypcode/processors/PowerPC/data/manuals/PowerPC.idx
similarity index 100%
rename from pypcode/pypcode-native/processors/PowerPC/data/manuals/PowerPC.idx
rename to pypcode/processors/PowerPC/data/manuals/PowerPC.idx
diff --git a/pypcode/pypcode-native/processors/PowerPC/data/patterns/PPC_BE_patterns.xml b/pypcode/processors/PowerPC/data/patterns/PPC_BE_patterns.xml
similarity index 100%
rename from pypcode/pypcode-native/processors/PowerPC/data/patterns/PPC_BE_patterns.xml
rename to pypcode/processors/PowerPC/data/patterns/PPC_BE_patterns.xml
diff --git a/pypcode/pypcode-native/processors/PowerPC/data/patterns/patternconstraints.xml b/pypcode/processors/PowerPC/data/patterns/patternconstraints.xml
similarity index 100%
rename from pypcode/pypcode-native/processors/PowerPC/data/patterns/patternconstraints.xml
rename to pypcode/processors/PowerPC/data/patterns/patternconstraints.xml
diff --git a/pypcode/pypcode-native/processors/PowerPC/data/ppc64-r2CallStubs.xml b/pypcode/processors/PowerPC/data/ppc64-r2CallStubs.xml
similarity index 100%
rename from pypcode/pypcode-native/processors/PowerPC/data/ppc64-r2CallStubs.xml
rename to pypcode/processors/PowerPC/data/ppc64-r2CallStubs.xml
diff --git a/pypcode/pypcode-native/processors/RISCV/data/languages/RV32G.pspec b/pypcode/processors/RISCV/data/languages/RV32G.pspec
similarity index 100%
rename from pypcode/pypcode-native/processors/RISCV/data/languages/RV32G.pspec
rename to pypcode/processors/RISCV/data/languages/RV32G.pspec
diff --git a/pypcode/pypcode-native/processors/RISCV/data/languages/RV32GC.pspec b/pypcode/processors/RISCV/data/languages/RV32GC.pspec
similarity index 100%
rename from pypcode/pypcode-native/processors/RISCV/data/languages/RV32GC.pspec
rename to pypcode/processors/RISCV/data/languages/RV32GC.pspec
diff --git a/pypcode/pypcode-native/processors/RISCV/data/languages/RV32I.pspec b/pypcode/processors/RISCV/data/languages/RV32I.pspec
similarity index 100%
rename from pypcode/pypcode-native/processors/RISCV/data/languages/RV32I.pspec
rename to pypcode/processors/RISCV/data/languages/RV32I.pspec
diff --git a/pypcode/pypcode-native/processors/RISCV/data/languages/RV32IC.pspec b/pypcode/processors/RISCV/data/languages/RV32IC.pspec
similarity index 100%
rename from pypcode/pypcode-native/processors/RISCV/data/languages/RV32IC.pspec
rename to pypcode/processors/RISCV/data/languages/RV32IC.pspec
diff --git a/pypcode/pypcode-native/processors/RISCV/data/languages/RV32IMC.pspec b/pypcode/processors/RISCV/data/languages/RV32IMC.pspec
similarity index 100%
rename from pypcode/pypcode-native/processors/RISCV/data/languages/RV32IMC.pspec
rename to pypcode/processors/RISCV/data/languages/RV32IMC.pspec
diff --git a/pypcode/pypcode-native/processors/RISCV/data/languages/RV64G.pspec b/pypcode/processors/RISCV/data/languages/RV64G.pspec
similarity index 100%
rename from pypcode/pypcode-native/processors/RISCV/data/languages/RV64G.pspec
rename to pypcode/processors/RISCV/data/languages/RV64G.pspec
diff --git a/pypcode/pypcode-native/processors/RISCV/data/languages/RV64GC.pspec b/pypcode/processors/RISCV/data/languages/RV64GC.pspec
similarity index 100%
rename from pypcode/pypcode-native/processors/RISCV/data/languages/RV64GC.pspec
rename to pypcode/processors/RISCV/data/languages/RV64GC.pspec
diff --git a/pypcode/pypcode-native/processors/RISCV/data/languages/RV64I.pspec b/pypcode/processors/RISCV/data/languages/RV64I.pspec
similarity index 100%
rename from pypcode/pypcode-native/processors/RISCV/data/languages/RV64I.pspec
rename to pypcode/processors/RISCV/data/languages/RV64I.pspec
diff --git a/pypcode/pypcode-native/processors/RISCV/data/languages/RV64IC.pspec b/pypcode/processors/RISCV/data/languages/RV64IC.pspec
similarity index 100%
rename from pypcode/pypcode-native/processors/RISCV/data/languages/RV64IC.pspec
rename to pypcode/processors/RISCV/data/languages/RV64IC.pspec
diff --git a/pypcode/pypcode-native/processors/RISCV/data/languages/riscv.csr.sinc b/pypcode/processors/RISCV/data/languages/riscv.csr.sinc
similarity index 100%
rename from pypcode/pypcode-native/processors/RISCV/data/languages/riscv.csr.sinc
rename to pypcode/processors/RISCV/data/languages/riscv.csr.sinc
diff --git a/pypcode/pypcode-native/processors/RISCV/data/languages/riscv.custom.sinc b/pypcode/processors/RISCV/data/languages/riscv.custom.sinc
similarity index 100%
rename from pypcode/pypcode-native/processors/RISCV/data/languages/riscv.custom.sinc
rename to pypcode/processors/RISCV/data/languages/riscv.custom.sinc
diff --git a/pypcode/pypcode-native/processors/RISCV/data/languages/riscv.ilp32d.slaspec b/pypcode/processors/RISCV/data/languages/riscv.ilp32d.slaspec
similarity index 100%
rename from pypcode/pypcode-native/processors/RISCV/data/languages/riscv.ilp32d.slaspec
rename to pypcode/processors/RISCV/data/languages/riscv.ilp32d.slaspec
diff --git a/pypcode/pypcode-native/processors/RISCV/data/languages/riscv.instr.sinc b/pypcode/processors/RISCV/data/languages/riscv.instr.sinc
similarity index 100%
rename from pypcode/pypcode-native/processors/RISCV/data/languages/riscv.instr.sinc
rename to pypcode/processors/RISCV/data/languages/riscv.instr.sinc
diff --git a/pypcode/pypcode-native/processors/RISCV/data/languages/riscv.ldefs b/pypcode/processors/RISCV/data/languages/riscv.ldefs
similarity index 100%
rename from pypcode/pypcode-native/processors/RISCV/data/languages/riscv.ldefs
rename to pypcode/processors/RISCV/data/languages/riscv.ldefs
diff --git a/pypcode/pypcode-native/processors/RISCV/data/languages/riscv.lp64d.slaspec b/pypcode/processors/RISCV/data/languages/riscv.lp64d.slaspec
similarity index 100%
rename from pypcode/pypcode-native/processors/RISCV/data/languages/riscv.lp64d.slaspec
rename to pypcode/processors/RISCV/data/languages/riscv.lp64d.slaspec
diff --git a/pypcode/pypcode-native/processors/RISCV/data/languages/riscv.opinion b/pypcode/processors/RISCV/data/languages/riscv.opinion
similarity index 100%
rename from pypcode/pypcode-native/processors/RISCV/data/languages/riscv.opinion
rename to pypcode/processors/RISCV/data/languages/riscv.opinion
diff --git a/pypcode/pypcode-native/processors/RISCV/data/languages/riscv.priv.sinc b/pypcode/processors/RISCV/data/languages/riscv.priv.sinc
similarity index 100%
rename from pypcode/pypcode-native/processors/RISCV/data/languages/riscv.priv.sinc
rename to pypcode/processors/RISCV/data/languages/riscv.priv.sinc
diff --git a/pypcode/pypcode-native/processors/RISCV/data/languages/riscv.reg.sinc b/pypcode/processors/RISCV/data/languages/riscv.reg.sinc
similarity index 100%
rename from pypcode/pypcode-native/processors/RISCV/data/languages/riscv.reg.sinc
rename to pypcode/processors/RISCV/data/languages/riscv.reg.sinc
diff --git a/pypcode/pypcode-native/processors/RISCV/data/languages/riscv.rv32a.sinc b/pypcode/processors/RISCV/data/languages/riscv.rv32a.sinc
similarity index 100%
rename from pypcode/pypcode-native/processors/RISCV/data/languages/riscv.rv32a.sinc
rename to pypcode/processors/RISCV/data/languages/riscv.rv32a.sinc
diff --git a/pypcode/pypcode-native/processors/RISCV/data/languages/riscv.rv32b.sinc b/pypcode/processors/RISCV/data/languages/riscv.rv32b.sinc
similarity index 100%
rename from pypcode/pypcode-native/processors/RISCV/data/languages/riscv.rv32b.sinc
rename to pypcode/processors/RISCV/data/languages/riscv.rv32b.sinc
diff --git a/pypcode/pypcode-native/processors/RISCV/data/languages/riscv.rv32d.sinc b/pypcode/processors/RISCV/data/languages/riscv.rv32d.sinc
similarity index 100%
rename from pypcode/pypcode-native/processors/RISCV/data/languages/riscv.rv32d.sinc
rename to pypcode/processors/RISCV/data/languages/riscv.rv32d.sinc
diff --git a/pypcode/pypcode-native/processors/RISCV/data/languages/riscv.rv32f.sinc b/pypcode/processors/RISCV/data/languages/riscv.rv32f.sinc
similarity index 100%
rename from pypcode/pypcode-native/processors/RISCV/data/languages/riscv.rv32f.sinc
rename to pypcode/processors/RISCV/data/languages/riscv.rv32f.sinc
diff --git a/pypcode/pypcode-native/processors/RISCV/data/languages/riscv.rv32i.sinc b/pypcode/processors/RISCV/data/languages/riscv.rv32i.sinc
similarity index 100%
rename from pypcode/pypcode-native/processors/RISCV/data/languages/riscv.rv32i.sinc
rename to pypcode/processors/RISCV/data/languages/riscv.rv32i.sinc
diff --git a/pypcode/pypcode-native/processors/RISCV/data/languages/riscv.rv32k.sinc b/pypcode/processors/RISCV/data/languages/riscv.rv32k.sinc
similarity index 100%
rename from pypcode/pypcode-native/processors/RISCV/data/languages/riscv.rv32k.sinc
rename to pypcode/processors/RISCV/data/languages/riscv.rv32k.sinc
diff --git a/pypcode/pypcode-native/processors/RISCV/data/languages/riscv.rv32m.sinc b/pypcode/processors/RISCV/data/languages/riscv.rv32m.sinc
similarity index 100%
rename from pypcode/pypcode-native/processors/RISCV/data/languages/riscv.rv32m.sinc
rename to pypcode/processors/RISCV/data/languages/riscv.rv32m.sinc
diff --git a/pypcode/pypcode-native/processors/RISCV/data/languages/riscv.rv32p.sinc b/pypcode/processors/RISCV/data/languages/riscv.rv32p.sinc
similarity index 100%
rename from pypcode/pypcode-native/processors/RISCV/data/languages/riscv.rv32p.sinc
rename to pypcode/processors/RISCV/data/languages/riscv.rv32p.sinc
diff --git a/pypcode/pypcode-native/processors/RISCV/data/languages/riscv.rv32q.sinc b/pypcode/processors/RISCV/data/languages/riscv.rv32q.sinc
similarity index 100%
rename from pypcode/pypcode-native/processors/RISCV/data/languages/riscv.rv32q.sinc
rename to pypcode/processors/RISCV/data/languages/riscv.rv32q.sinc
diff --git a/pypcode/pypcode-native/processors/RISCV/data/languages/riscv.rv64a.sinc b/pypcode/processors/RISCV/data/languages/riscv.rv64a.sinc
similarity index 100%
rename from pypcode/pypcode-native/processors/RISCV/data/languages/riscv.rv64a.sinc
rename to pypcode/processors/RISCV/data/languages/riscv.rv64a.sinc
diff --git a/pypcode/pypcode-native/processors/RISCV/data/languages/riscv.rv64b.sinc b/pypcode/processors/RISCV/data/languages/riscv.rv64b.sinc
similarity index 100%
rename from pypcode/pypcode-native/processors/RISCV/data/languages/riscv.rv64b.sinc
rename to pypcode/processors/RISCV/data/languages/riscv.rv64b.sinc
diff --git a/pypcode/pypcode-native/processors/RISCV/data/languages/riscv.rv64d.sinc b/pypcode/processors/RISCV/data/languages/riscv.rv64d.sinc
similarity index 100%
rename from pypcode/pypcode-native/processors/RISCV/data/languages/riscv.rv64d.sinc
rename to pypcode/processors/RISCV/data/languages/riscv.rv64d.sinc
diff --git a/pypcode/pypcode-native/processors/RISCV/data/languages/riscv.rv64f.sinc b/pypcode/processors/RISCV/data/languages/riscv.rv64f.sinc
similarity index 100%
rename from pypcode/pypcode-native/processors/RISCV/data/languages/riscv.rv64f.sinc
rename to pypcode/processors/RISCV/data/languages/riscv.rv64f.sinc
diff --git a/pypcode/pypcode-native/processors/RISCV/data/languages/riscv.rv64i.sinc b/pypcode/processors/RISCV/data/languages/riscv.rv64i.sinc
similarity index 100%
rename from pypcode/pypcode-native/processors/RISCV/data/languages/riscv.rv64i.sinc
rename to pypcode/processors/RISCV/data/languages/riscv.rv64i.sinc
diff --git a/pypcode/pypcode-native/processors/RISCV/data/languages/riscv.rv64k.sinc b/pypcode/processors/RISCV/data/languages/riscv.rv64k.sinc
similarity index 100%
rename from pypcode/pypcode-native/processors/RISCV/data/languages/riscv.rv64k.sinc
rename to pypcode/processors/RISCV/data/languages/riscv.rv64k.sinc
diff --git a/pypcode/pypcode-native/processors/RISCV/data/languages/riscv.rv64m.sinc b/pypcode/processors/RISCV/data/languages/riscv.rv64m.sinc
similarity index 100%
rename from pypcode/pypcode-native/processors/RISCV/data/languages/riscv.rv64m.sinc
rename to pypcode/processors/RISCV/data/languages/riscv.rv64m.sinc
diff --git a/pypcode/pypcode-native/processors/RISCV/data/languages/riscv.rv64p.sinc b/pypcode/processors/RISCV/data/languages/riscv.rv64p.sinc
similarity index 100%
rename from pypcode/pypcode-native/processors/RISCV/data/languages/riscv.rv64p.sinc
rename to pypcode/processors/RISCV/data/languages/riscv.rv64p.sinc
diff --git a/pypcode/pypcode-native/processors/RISCV/data/languages/riscv.rv64q.sinc b/pypcode/processors/RISCV/data/languages/riscv.rv64q.sinc
similarity index 100%
rename from pypcode/pypcode-native/processors/RISCV/data/languages/riscv.rv64q.sinc
rename to pypcode/processors/RISCV/data/languages/riscv.rv64q.sinc
diff --git a/pypcode/pypcode-native/processors/RISCV/data/languages/riscv.rvc.sinc b/pypcode/processors/RISCV/data/languages/riscv.rvc.sinc
similarity index 100%
rename from pypcode/pypcode-native/processors/RISCV/data/languages/riscv.rvc.sinc
rename to pypcode/processors/RISCV/data/languages/riscv.rvc.sinc
diff --git a/pypcode/pypcode-native/processors/RISCV/data/languages/riscv.rvv.sinc b/pypcode/processors/RISCV/data/languages/riscv.rvv.sinc
similarity index 100%
rename from pypcode/pypcode-native/processors/RISCV/data/languages/riscv.rvv.sinc
rename to pypcode/processors/RISCV/data/languages/riscv.rvv.sinc
diff --git a/pypcode/pypcode-native/processors/RISCV/data/languages/riscv.table.sinc b/pypcode/processors/RISCV/data/languages/riscv.table.sinc
similarity index 100%
rename from pypcode/pypcode-native/processors/RISCV/data/languages/riscv.table.sinc
rename to pypcode/processors/RISCV/data/languages/riscv.table.sinc
diff --git a/pypcode/pypcode-native/processors/RISCV/data/languages/riscv.zi.sinc b/pypcode/processors/RISCV/data/languages/riscv.zi.sinc
similarity index 100%
rename from pypcode/pypcode-native/processors/RISCV/data/languages/riscv.zi.sinc
rename to pypcode/processors/RISCV/data/languages/riscv.zi.sinc
diff --git a/pypcode/pypcode-native/processors/RISCV/data/languages/riscv32-fp.cspec b/pypcode/processors/RISCV/data/languages/riscv32-fp.cspec
similarity index 100%
rename from pypcode/pypcode-native/processors/RISCV/data/languages/riscv32-fp.cspec
rename to pypcode/processors/RISCV/data/languages/riscv32-fp.cspec
diff --git a/pypcode/pypcode-native/processors/RISCV/data/languages/riscv32.cspec b/pypcode/processors/RISCV/data/languages/riscv32.cspec
similarity index 100%
rename from pypcode/pypcode-native/processors/RISCV/data/languages/riscv32.cspec
rename to pypcode/processors/RISCV/data/languages/riscv32.cspec
diff --git a/pypcode/pypcode-native/processors/RISCV/data/languages/riscv32.dwarf b/pypcode/processors/RISCV/data/languages/riscv32.dwarf
similarity index 100%
rename from pypcode/pypcode-native/processors/RISCV/data/languages/riscv32.dwarf
rename to pypcode/processors/RISCV/data/languages/riscv32.dwarf
diff --git a/pypcode/pypcode-native/processors/RISCV/data/languages/riscv64-fp.cspec b/pypcode/processors/RISCV/data/languages/riscv64-fp.cspec
similarity index 100%
rename from pypcode/pypcode-native/processors/RISCV/data/languages/riscv64-fp.cspec
rename to pypcode/processors/RISCV/data/languages/riscv64-fp.cspec
diff --git a/pypcode/pypcode-native/processors/RISCV/data/languages/riscv64.cspec b/pypcode/processors/RISCV/data/languages/riscv64.cspec
similarity index 100%
rename from pypcode/pypcode-native/processors/RISCV/data/languages/riscv64.cspec
rename to pypcode/processors/RISCV/data/languages/riscv64.cspec
diff --git a/pypcode/pypcode-native/processors/RISCV/data/languages/riscv64.dwarf b/pypcode/processors/RISCV/data/languages/riscv64.dwarf
similarity index 100%
rename from pypcode/pypcode-native/processors/RISCV/data/languages/riscv64.dwarf
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diff --git a/pypcode/pypcode-native/processors/RISCV/data/patterns/patterncontraints.xml b/pypcode/processors/RISCV/data/patterns/patterncontraints.xml
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rename from pypcode/pypcode-native/processors/x86/data/languages/avx2_manual.sinc
rename to pypcode/processors/x86/data/languages/avx2_manual.sinc
diff --git a/pypcode/pypcode-native/processors/x86/data/languages/avx_manual.sinc b/pypcode/processors/x86/data/languages/avx_manual.sinc
similarity index 100%
rename from pypcode/pypcode-native/processors/x86/data/languages/avx_manual.sinc
rename to pypcode/processors/x86/data/languages/avx_manual.sinc
diff --git a/pypcode/pypcode-native/processors/x86/data/languages/bmi1.sinc b/pypcode/processors/x86/data/languages/bmi1.sinc
similarity index 100%
rename from pypcode/pypcode-native/processors/x86/data/languages/bmi1.sinc
rename to pypcode/processors/x86/data/languages/bmi1.sinc
diff --git a/pypcode/pypcode-native/processors/x86/data/languages/bmi2.sinc b/pypcode/processors/x86/data/languages/bmi2.sinc
similarity index 100%
rename from pypcode/pypcode-native/processors/x86/data/languages/bmi2.sinc
rename to pypcode/processors/x86/data/languages/bmi2.sinc
diff --git a/pypcode/pypcode-native/processors/x86/data/languages/cet.sinc b/pypcode/processors/x86/data/languages/cet.sinc
similarity index 100%
rename from pypcode/pypcode-native/processors/x86/data/languages/cet.sinc
rename to pypcode/processors/x86/data/languages/cet.sinc
diff --git a/pypcode/pypcode-native/processors/x86/data/languages/clwb.sinc b/pypcode/processors/x86/data/languages/clwb.sinc
similarity index 100%
rename from pypcode/pypcode-native/processors/x86/data/languages/clwb.sinc
rename to pypcode/processors/x86/data/languages/clwb.sinc
diff --git a/pypcode/pypcode-native/processors/x86/data/languages/fma.sinc b/pypcode/processors/x86/data/languages/fma.sinc
similarity index 100%
rename from pypcode/pypcode-native/processors/x86/data/languages/fma.sinc
rename to pypcode/processors/x86/data/languages/fma.sinc
diff --git a/pypcode/pypcode-native/processors/x86/data/languages/ia.sinc b/pypcode/processors/x86/data/languages/ia.sinc
similarity index 100%
rename from pypcode/pypcode-native/processors/x86/data/languages/ia.sinc
rename to pypcode/processors/x86/data/languages/ia.sinc
diff --git a/pypcode/pypcode-native/processors/x86/data/languages/lzcnt.sinc b/pypcode/processors/x86/data/languages/lzcnt.sinc
similarity index 100%
rename from pypcode/pypcode-native/processors/x86/data/languages/lzcnt.sinc
rename to pypcode/processors/x86/data/languages/lzcnt.sinc
diff --git a/pypcode/pypcode-native/processors/x86/data/languages/mpx.sinc b/pypcode/processors/x86/data/languages/mpx.sinc
similarity index 100%
rename from pypcode/pypcode-native/processors/x86/data/languages/mpx.sinc
rename to pypcode/processors/x86/data/languages/mpx.sinc
diff --git a/pypcode/pypcode-native/processors/x86/data/languages/old/x86RealV1.lang b/pypcode/processors/x86/data/languages/old/x86RealV1.lang
similarity index 100%
rename from pypcode/pypcode-native/processors/x86/data/languages/old/x86RealV1.lang
rename to pypcode/processors/x86/data/languages/old/x86RealV1.lang
diff --git a/pypcode/pypcode-native/processors/x86/data/languages/old/x86RealV1.trans b/pypcode/processors/x86/data/languages/old/x86RealV1.trans
similarity index 100%
rename from pypcode/pypcode-native/processors/x86/data/languages/old/x86RealV1.trans
rename to pypcode/processors/x86/data/languages/old/x86RealV1.trans
diff --git a/pypcode/pypcode-native/processors/x86/data/languages/old/x86V1.lang b/pypcode/processors/x86/data/languages/old/x86V1.lang
similarity index 100%
rename from pypcode/pypcode-native/processors/x86/data/languages/old/x86V1.lang
rename to pypcode/processors/x86/data/languages/old/x86V1.lang
diff --git a/pypcode/pypcode-native/processors/x86/data/languages/old/x86V1.trans b/pypcode/processors/x86/data/languages/old/x86V1.trans
similarity index 100%
rename from pypcode/pypcode-native/processors/x86/data/languages/old/x86V1.trans
rename to pypcode/processors/x86/data/languages/old/x86V1.trans
diff --git a/pypcode/pypcode-native/processors/x86/data/languages/old/x86_64bit_v1.lang b/pypcode/processors/x86/data/languages/old/x86_64bit_v1.lang
similarity index 100%
rename from pypcode/pypcode-native/processors/x86/data/languages/old/x86_64bit_v1.lang
rename to pypcode/processors/x86/data/languages/old/x86_64bit_v1.lang
diff --git a/pypcode/pypcode-native/processors/x86/data/languages/old/x86_64bit_v1.trans b/pypcode/processors/x86/data/languages/old/x86_64bit_v1.trans
similarity index 100%
rename from pypcode/pypcode-native/processors/x86/data/languages/old/x86_64bit_v1.trans
rename to pypcode/processors/x86/data/languages/old/x86_64bit_v1.trans
diff --git a/pypcode/pypcode-native/processors/x86/data/languages/old/x86smmV1.lang b/pypcode/processors/x86/data/languages/old/x86smmV1.lang
similarity index 100%
rename from pypcode/pypcode-native/processors/x86/data/languages/old/x86smmV1.lang
rename to pypcode/processors/x86/data/languages/old/x86smmV1.lang
diff --git a/pypcode/pypcode-native/processors/x86/data/languages/old/x86smmV1.trans b/pypcode/processors/x86/data/languages/old/x86smmV1.trans
similarity index 100%
rename from pypcode/pypcode-native/processors/x86/data/languages/old/x86smmV1.trans
rename to pypcode/processors/x86/data/languages/old/x86smmV1.trans
diff --git a/pypcode/pypcode-native/processors/x86/data/languages/pclmulqdq.sinc b/pypcode/processors/x86/data/languages/pclmulqdq.sinc
similarity index 100%
rename from pypcode/pypcode-native/processors/x86/data/languages/pclmulqdq.sinc
rename to pypcode/processors/x86/data/languages/pclmulqdq.sinc
diff --git a/pypcode/pypcode-native/processors/x86/data/languages/rdrand.sinc b/pypcode/processors/x86/data/languages/rdrand.sinc
similarity index 100%
rename from pypcode/pypcode-native/processors/x86/data/languages/rdrand.sinc
rename to pypcode/processors/x86/data/languages/rdrand.sinc
diff --git a/pypcode/pypcode-native/processors/x86/data/languages/rdseed.sinc b/pypcode/processors/x86/data/languages/rdseed.sinc
similarity index 100%
rename from pypcode/pypcode-native/processors/x86/data/languages/rdseed.sinc
rename to pypcode/processors/x86/data/languages/rdseed.sinc
diff --git a/pypcode/pypcode-native/processors/x86/data/languages/sgx.sinc b/pypcode/processors/x86/data/languages/sgx.sinc
similarity index 100%
rename from pypcode/pypcode-native/processors/x86/data/languages/sgx.sinc
rename to pypcode/processors/x86/data/languages/sgx.sinc
diff --git a/pypcode/pypcode-native/processors/x86/data/languages/sha.sinc b/pypcode/processors/x86/data/languages/sha.sinc
similarity index 100%
rename from pypcode/pypcode-native/processors/x86/data/languages/sha.sinc
rename to pypcode/processors/x86/data/languages/sha.sinc
diff --git a/pypcode/pypcode-native/processors/x86/data/languages/smx.sinc b/pypcode/processors/x86/data/languages/smx.sinc
similarity index 100%
rename from pypcode/pypcode-native/processors/x86/data/languages/smx.sinc
rename to pypcode/processors/x86/data/languages/smx.sinc
diff --git a/pypcode/pypcode-native/processors/x86/data/languages/x86-16-real.pspec b/pypcode/processors/x86/data/languages/x86-16-real.pspec
similarity index 100%
rename from pypcode/pypcode-native/processors/x86/data/languages/x86-16-real.pspec
rename to pypcode/processors/x86/data/languages/x86-16-real.pspec
diff --git a/pypcode/pypcode-native/processors/x86/data/languages/x86-16.cspec b/pypcode/processors/x86/data/languages/x86-16.cspec
similarity index 100%
rename from pypcode/pypcode-native/processors/x86/data/languages/x86-16.cspec
rename to pypcode/processors/x86/data/languages/x86-16.cspec
diff --git a/pypcode/pypcode-native/processors/x86/data/languages/x86-16.gdis b/pypcode/processors/x86/data/languages/x86-16.gdis
similarity index 100%
rename from pypcode/pypcode-native/processors/x86/data/languages/x86-16.gdis
rename to pypcode/processors/x86/data/languages/x86-16.gdis
diff --git a/pypcode/pypcode-native/processors/x86/data/languages/x86-16.pspec b/pypcode/processors/x86/data/languages/x86-16.pspec
similarity index 100%
rename from pypcode/pypcode-native/processors/x86/data/languages/x86-16.pspec
rename to pypcode/processors/x86/data/languages/x86-16.pspec
diff --git a/pypcode/pypcode-native/processors/x86/data/languages/x86-64-gcc.cspec b/pypcode/processors/x86/data/languages/x86-64-gcc.cspec
similarity index 100%
rename from pypcode/pypcode-native/processors/x86/data/languages/x86-64-gcc.cspec
rename to pypcode/processors/x86/data/languages/x86-64-gcc.cspec
diff --git a/pypcode/pypcode-native/processors/x86/data/languages/x86-64-win.cspec b/pypcode/processors/x86/data/languages/x86-64-win.cspec
similarity index 100%
rename from pypcode/pypcode-native/processors/x86/data/languages/x86-64-win.cspec
rename to pypcode/processors/x86/data/languages/x86-64-win.cspec
diff --git a/pypcode/pypcode-native/processors/x86/data/languages/x86-64.dwarf b/pypcode/processors/x86/data/languages/x86-64.dwarf
similarity index 100%
rename from pypcode/pypcode-native/processors/x86/data/languages/x86-64.dwarf
rename to pypcode/processors/x86/data/languages/x86-64.dwarf
diff --git a/pypcode/pypcode-native/processors/x86/data/languages/x86-64.pspec b/pypcode/processors/x86/data/languages/x86-64.pspec
similarity index 100%
rename from pypcode/pypcode-native/processors/x86/data/languages/x86-64.pspec
rename to pypcode/processors/x86/data/languages/x86-64.pspec
diff --git a/pypcode/pypcode-native/processors/x86/data/languages/x86-64.slaspec b/pypcode/processors/x86/data/languages/x86-64.slaspec
similarity index 100%
rename from pypcode/pypcode-native/processors/x86/data/languages/x86-64.slaspec
rename to pypcode/processors/x86/data/languages/x86-64.slaspec
diff --git a/pypcode/pypcode-native/processors/x86/data/languages/x86.dwarf b/pypcode/processors/x86/data/languages/x86.dwarf
similarity index 100%
rename from pypcode/pypcode-native/processors/x86/data/languages/x86.dwarf
rename to pypcode/processors/x86/data/languages/x86.dwarf
diff --git a/pypcode/pypcode-native/processors/x86/data/languages/x86.ldefs b/pypcode/processors/x86/data/languages/x86.ldefs
similarity index 100%
rename from pypcode/pypcode-native/processors/x86/data/languages/x86.ldefs
rename to pypcode/processors/x86/data/languages/x86.ldefs
diff --git a/pypcode/pypcode-native/processors/x86/data/languages/x86.opinion b/pypcode/processors/x86/data/languages/x86.opinion
similarity index 100%
rename from pypcode/pypcode-native/processors/x86/data/languages/x86.opinion
rename to pypcode/processors/x86/data/languages/x86.opinion
diff --git a/pypcode/pypcode-native/processors/x86/data/languages/x86.pspec b/pypcode/processors/x86/data/languages/x86.pspec
similarity index 100%
rename from pypcode/pypcode-native/processors/x86/data/languages/x86.pspec
rename to pypcode/processors/x86/data/languages/x86.pspec
diff --git a/pypcode/pypcode-native/processors/x86/data/languages/x86.slaspec b/pypcode/processors/x86/data/languages/x86.slaspec
similarity index 100%
rename from pypcode/pypcode-native/processors/x86/data/languages/x86.slaspec
rename to pypcode/processors/x86/data/languages/x86.slaspec
diff --git a/pypcode/pypcode-native/processors/x86/data/languages/x86borland.cspec b/pypcode/processors/x86/data/languages/x86borland.cspec
similarity index 100%
rename from pypcode/pypcode-native/processors/x86/data/languages/x86borland.cspec
rename to pypcode/processors/x86/data/languages/x86borland.cspec
diff --git a/pypcode/pypcode-native/processors/x86/data/languages/x86delphi.cspec b/pypcode/processors/x86/data/languages/x86delphi.cspec
similarity index 100%
rename from pypcode/pypcode-native/processors/x86/data/languages/x86delphi.cspec
rename to pypcode/processors/x86/data/languages/x86delphi.cspec
diff --git a/pypcode/pypcode-native/processors/x86/data/languages/x86gcc.cspec b/pypcode/processors/x86/data/languages/x86gcc.cspec
similarity index 100%
rename from pypcode/pypcode-native/processors/x86/data/languages/x86gcc.cspec
rename to pypcode/processors/x86/data/languages/x86gcc.cspec
diff --git a/pypcode/pypcode-native/processors/x86/data/languages/x86win.cspec b/pypcode/processors/x86/data/languages/x86win.cspec
similarity index 100%
rename from pypcode/pypcode-native/processors/x86/data/languages/x86win.cspec
rename to pypcode/processors/x86/data/languages/x86win.cspec
diff --git a/pypcode/pypcode-native/processors/x86/data/manuals/x86.idx b/pypcode/processors/x86/data/manuals/x86.idx
similarity index 100%
rename from pypcode/pypcode-native/processors/x86/data/manuals/x86.idx
rename to pypcode/processors/x86/data/manuals/x86.idx
diff --git a/pypcode/pypcode-native/processors/x86/data/patterns/patternconstraints.xml b/pypcode/processors/x86/data/patterns/patternconstraints.xml
similarity index 100%
rename from pypcode/pypcode-native/processors/x86/data/patterns/patternconstraints.xml
rename to pypcode/processors/x86/data/patterns/patternconstraints.xml
diff --git a/pypcode/pypcode-native/processors/x86/data/patterns/x86-16_default_patterns.xml b/pypcode/processors/x86/data/patterns/x86-16_default_patterns.xml
similarity index 100%
rename from pypcode/pypcode-native/processors/x86/data/patterns/x86-16_default_patterns.xml
rename to pypcode/processors/x86/data/patterns/x86-16_default_patterns.xml
diff --git a/pypcode/pypcode-native/processors/x86/data/patterns/x86-64gcc_patterns.xml b/pypcode/processors/x86/data/patterns/x86-64gcc_patterns.xml
similarity index 100%
rename from pypcode/pypcode-native/processors/x86/data/patterns/x86-64gcc_patterns.xml
rename to pypcode/processors/x86/data/patterns/x86-64gcc_patterns.xml
diff --git a/pypcode/pypcode-native/processors/x86/data/patterns/x86-64win_patterns.xml b/pypcode/processors/x86/data/patterns/x86-64win_patterns.xml
similarity index 100%
rename from pypcode/pypcode-native/processors/x86/data/patterns/x86-64win_patterns.xml
rename to pypcode/processors/x86/data/patterns/x86-64win_patterns.xml
diff --git a/pypcode/pypcode-native/processors/x86/data/patterns/x86delphi_patterns.xml b/pypcode/processors/x86/data/patterns/x86delphi_patterns.xml
similarity index 100%
rename from pypcode/pypcode-native/processors/x86/data/patterns/x86delphi_patterns.xml
rename to pypcode/processors/x86/data/patterns/x86delphi_patterns.xml
diff --git a/pypcode/pypcode-native/processors/x86/data/patterns/x86gcc_patterns.xml b/pypcode/processors/x86/data/patterns/x86gcc_patterns.xml
similarity index 100%
rename from pypcode/pypcode-native/processors/x86/data/patterns/x86gcc_patterns.xml
rename to pypcode/processors/x86/data/patterns/x86gcc_patterns.xml
diff --git a/pypcode/pypcode-native/processors/x86/data/patterns/x86win_patterns.xml b/pypcode/processors/x86/data/patterns/x86win_patterns.xml
similarity index 100%
rename from pypcode/pypcode-native/processors/x86/data/patterns/x86win_patterns.xml
rename to pypcode/processors/x86/data/patterns/x86win_patterns.xml
diff --git a/pypcode/pypcode-native/.gitignore b/pypcode/pypcode-native/.gitignore
index f6d6237f..e0bd3776 100644
--- a/pypcode/pypcode-native/.gitignore
+++ b/pypcode/pypcode-native/.gitignore
@@ -1,10 +1,7 @@
-sleigh/com_opt/
-sleigh/libsla.a
-pypcode-native.so
 *.java
 Module.manifest
 build.gradle
 certification.manifest
-*.sla
-sleigh/sla_opt
-sleigh/sleigh_opt
+bin/
+lib/
+csleigh.i
diff --git a/pypcode/pypcode-native/CMakeLists.txt b/pypcode/pypcode-native/CMakeLists.txt
new file mode 100644
index 00000000..282585ee
--- /dev/null
+++ b/pypcode/pypcode-native/CMakeLists.txt
@@ -0,0 +1,73 @@
+cmake_minimum_required(VERSION 3.9)
+project(csleigh)
+# set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -O0 -ggdb")
+
+# First for the generic no-config case (e.g. with mingw)
+set( CMAKE_RUNTIME_OUTPUT_DIRECTORY ${CMAKE_SOURCE_DIR}/bin )
+set( CMAKE_LIBRARY_OUTPUT_DIRECTORY ${CMAKE_SOURCE_DIR}/lib )
+set( CMAKE_ARCHIVE_OUTPUT_DIRECTORY ${CMAKE_SOURCE_DIR}/lib )
+# Second, for multi-config builds (e.g. msvc)
+foreach( OUTPUTCONFIG ${CMAKE_CONFIGURATION_TYPES} )
+    string( TOUPPER ${OUTPUTCONFIG} OUTPUTCONFIG )
+    set( CMAKE_RUNTIME_OUTPUT_DIRECTORY_${OUTPUTCONFIG} ${CMAKE_SOURCE_DIR}/bin )
+    set( CMAKE_LIBRARY_OUTPUT_DIRECTORY_${OUTPUTCONFIG} ${CMAKE_SOURCE_DIR}/lib )
+    set( CMAKE_ARCHIVE_OUTPUT_DIRECTORY_${OUTPUTCONFIG} ${CMAKE_SOURCE_DIR}/lib )
+endforeach( OUTPUTCONFIG CMAKE_CONFIGURATION_TYPES )
+
+if (MSVC)
+    add_compile_options(/O3 /std:c++14)
+else()
+    add_compile_options(-m64 -O3 -Wall -Wno-sign-compare -D__TERMINAL__ -std=c++14)
+endif()
+
+set(SLEIGH_COMMON
+	sleigh/address.cc
+	sleigh/context.cc
+	sleigh/float.cc
+	sleigh/globalcontext.cc
+	sleigh/opcodes.cc
+	sleigh/pcodecompile.cc
+	sleigh/pcodeparse.cc
+	sleigh/pcoderaw.cc
+	sleigh/semantics.cc
+	sleigh/sleigh.cc
+	sleigh/sleighbase.cc
+	sleigh/slghpatexpress.cc
+	sleigh/slghpattern.cc
+	sleigh/slghsymbol.cc
+	sleigh/space.cc
+	sleigh/translate.cc
+	sleigh/xml.cc
+	)
+
+add_executable(sleigh
+	sleigh/filemanage.cc
+	sleigh/slgh_compile.cc
+	sleigh/slghparse.cc
+	sleigh/slghscan.cc
+	${SLEIGH_COMMON}
+)
+
+add_library(csleigh
+	csleigh.cc
+	${SLEIGH_COMMON}
+)
+
+set_target_properties(csleigh PROPERTIES POSITION_INDEPENDENT_CODE ON)
+
+if (MSVC)
+	if (CMAKE_SIZEOF_VOID_P EQUAL 8)
+		set(PREPROCESSOR_ONLY_FLAGS /DCFFI_CDEF=1 /EP /C /D_WINDOWS=1 /D_WIN64)
+	else ()
+		set(PREPROCESSOR_ONLY_FLAGS /DCFFI_CDEF=1 /EP /C /D_WINDOWS=1 /D_WIN32)
+	endif ()
+else()
+    set(PREPROCESSOR_ONLY_FLAGS -DCFFI_CDEF=1 -E -P -C)
+endif()
+
+add_custom_target(
+	csleigh.i ALL
+	COMMAND ${CMAKE_C_COMPILER} ${CMAKE_C_FLAGS} ${PREPROCESSOR_ONLY_FLAGS} ${CMAKE_SOURCE_DIR}/csleigh.h > ${CMAKE_SOURCE_DIR}/csleigh.i
+	BYPRODUCTS ${CMAKE_SOURCE_DIR}/csleigh.i
+	VERBATIM
+)
diff --git a/pypcode/pypcode-native/Makefile b/pypcode/pypcode-native/Makefile
index ce4f0b5a..15f34a6f 100644
--- a/pypcode/pypcode-native/Makefile
+++ b/pypcode/pypcode-native/Makefile
@@ -1,10 +1,7 @@
-SLEIGH_DIR:=sleigh
-PROCESSORS_DIR:=processors
+PROCESSORS_DIR:=../processors
 SPECFILES:=$(shell find $(PROCESSORS_DIR) -name '*.slaspec')
 SLAFILES:=$(SPECFILES:.slaspec=.sla)
-SLEIGH_BIN:=$(SLEIGH_DIR)/sleigh_opt
-LIBSLA:=$(SLEIGH_DIR)/libsla.a
-PYPCODE_NATIVE:=pypcode-native.so
+SLEIGH_BIN:=./bin/sleigh
 
 V = 0
 VE_0 := @
@@ -17,27 +14,13 @@ else
 QUIET=>/dev/null
 endif
 
-all: $(PYPCODE_NATIVE) $(SLAFILES)
-
-$(PYPCODE_NATIVE): $(LIBSLA) pypcode-native.cc pypcode-native.h
-	@echo "cc      $@"
-	$(VE) gcc -shared -o $@ \
-		-Wl,--whole-archive $(LIBSLA) -Wl,--no-whole-archive \
-		-fPIC pypcode-native.cc
+all: $(SLAFILES)
 
 %.sla: %.slaspec $(SLEIGH_BIN)
 	@echo "sleigh  $@"
 	$(VE) $(SLEIGH_BIN) $< $@ $(QUIET)
 
-$(LIBSLA):
-	@echo "make    $@"
-	$(VE) $(MAKE) -C $(SLEIGH_DIR) CFLAGS="-fPIC" libsla.a $(QUIET)
-
-$(SLEIGH_BIN):
-	@echo "make    $@"
-	$(VE) $(MAKE) -C $(SLEIGH_DIR) sleigh_opt $(QUIET)
-
 .PHONY: clean
 clean:
-	$(VE) $(MAKE) -C $(SLEIGH_DIR) reallyclean $(QUIET)
-	$(VE) rm -f $(PYPCODE_NATIVE) $(SLAFILES) $(QUIET)
+	$(VE) rm -f $(SLAFILES) $(QUIET)
+
diff --git a/pypcode/pypcode-native/build_local.sh b/pypcode/pypcode-native/build_local.sh
new file mode 100755
index 00000000..6cbfe101
--- /dev/null
+++ b/pypcode/pypcode-native/build_local.sh
@@ -0,0 +1,7 @@
+#!/bin/bash
+# Use this to rebuild the module if you have installed the package
+# in editable mode
+set -e
+set -x
+cmake -S . -B build && cmake --build build --parallel --verbose
+python cffi_build.py && mv pypcode/_csleigh*.so ..
diff --git a/pypcode/pypcode-native/cffi_build.py b/pypcode/pypcode-native/cffi_build.py
new file mode 100644
index 00000000..805188af
--- /dev/null
+++ b/pypcode/pypcode-native/cffi_build.py
@@ -0,0 +1,25 @@
+from cffi import FFI
+import os.path
+import platform
+
+SOURCE_DIR = os.path.abspath(os.path.dirname(__file__))
+
+
+libs = {
+    'Windows': [],
+    'Darwin': ['c++'],
+    'Linux': ['stdc++']
+}[platform.system()]
+
+ffibuilder = FFI()
+ffibuilder.cdef(open(os.path.join(SOURCE_DIR, "csleigh.i")).read())
+ffibuilder.set_source("pypcode._csleigh",
+    """
+    #include "csleigh.i"
+    """,
+    libraries=['csleigh'] + libs,
+    include_dirs=[SOURCE_DIR],
+    library_dirs=[os.path.join(SOURCE_DIR, 'lib')])
+
+if __name__ == "__main__":
+    ffibuilder.compile(verbose=True)
diff --git a/pypcode/pypcode-native/csleigh.cc b/pypcode/pypcode-native/csleigh.cc
new file mode 100644
index 00000000..01b250df
--- /dev/null
+++ b/pypcode/pypcode-native/csleigh.cc
@@ -0,0 +1,381 @@
+//
+// Minimal SLEIGH library C API, for disassembly and translation to P-code.
+//
+#include <stdio.h>
+#include <assert.h>
+#include <stdbool.h>
+#include "sleigh/loadimage.hh"
+#include "sleigh/sleigh.hh"
+#include "csleigh.h"
+
+// #define DEBUG
+#ifdef DEBUG
+#define LOG(fmt, ...) fprintf(stderr, "csleigh: " fmt "\n", ## __VA_ARGS__);
+#else
+#define LOG(fmt, ...) do {} while (0)
+#endif
+
+// https://gist.github.com/xymopen/352cbb55ddc2a767ed7c5999cfed4d31
+template< class T, class M >
+static inline constexpr ptrdiff_t offset_of( const M T::*member ) {
+    return reinterpret_cast< ptrdiff_t >( &( reinterpret_cast< T* >( 0 )->*member ) );
+}
+template< class T, class M >
+static inline constexpr T* owner_of( M *ptr, const M T::*member ) {
+    return reinterpret_cast< T* >( reinterpret_cast< intptr_t >( ptr ) - offset_of( member ) );
+}
+
+void convertAddressToCType(const Address &in, LPX(Address) &out) {
+    out.space = (LPX(AddrSpace)*)in.getSpace();
+    out.offset = in.getOffset();
+}
+
+class SimpleLoadImage : public LoadImage
+{
+    uintb                m_baseaddr;
+    int4                 m_length;
+    const unsigned char *m_data;
+
+public:
+    SimpleLoadImage()
+    : LoadImage("nofile")
+    {
+        m_baseaddr = 0;
+        m_data = NULL;
+        m_length = 0;
+    }
+
+    void setData(uintb ad, const unsigned char *ptr,int4 sz)
+    {
+        m_baseaddr = ad;
+        m_data = ptr;
+        m_length = sz;
+    }
+
+    void loadFill(uint1 *ptr, int4 size, const Address &addr)
+    {
+        LOG("Filling %d bytes at %lx", size, addr.getOffset());
+        uintb start = addr.getOffset();
+        uintb max = m_baseaddr + m_length - 1;
+
+        //
+        // When decoding an instruction, SLEIGH will attempt to pull in several
+        // bytes at a time, starting at each instruction boundary.
+        //
+        // If the start address is outside of the defined range, bail out.
+        // Otherwise, if we have some data to provide but cannot sastisfy the
+        // entire request, fill the remainder of the buffer with zero.
+        //
+        if (start > max || start < m_baseaddr) {
+            throw std::out_of_range("Attempting to lift outside buffer range");
+        }
+
+        for(int4 i = 0; i < size; i++) {
+            uintb curoff = start + i;
+            if ((curoff < m_baseaddr) || (curoff>max)) {
+                ptr[i] = 0;
+                continue;
+            }
+            uintb diff = curoff - m_baseaddr;
+            ptr[i] = m_data[(int4)diff];
+        }
+    }
+
+    virtual string getArchType(void) const { return "myload"; }
+    virtual void adjustVma(long adjust) { }
+};
+
+
+class PcodeEmitCacher : public PcodeEmit
+{
+public:
+    vector<unique_ptr<LPX(Varnode)>> m_vars;
+    vector<LPX(PcodeOp)>             m_ops;
+    uintm                            m_uniq;
+
+    PcodeEmitCacher()
+    : m_uniq(0)
+    {
+    }
+
+    void createVarnode(const VarnodeData *var, LPX(Varnode) &out)
+    {
+        assert(var->space != NULL);
+        out.space = (LPX(AddrSpace)*)(var->space);
+        out.offset = var->offset;
+        out.size = var->size;
+    }
+
+    void dump(const Address &addr, OpCode opc, VarnodeData *outvar,
+              VarnodeData *vars, int4 isize)
+    {
+        assert(isize > 0);
+
+        m_ops.emplace_back();
+        LPX(PcodeOp) &op = m_ops.back();
+        convertAddressToCType(addr, op.seq.pc);
+        op.seq.uniq = m_uniq++;
+        op.opcode = (LPX(OpCode))opc;
+
+        int num_varnodes = isize;
+        if (outvar) num_varnodes += 1;
+        LPX(Varnode) *vna = new LPX(Varnode)[num_varnodes];
+
+        int vni = 0;
+        if (outvar) {
+            createVarnode(outvar, vna[vni]);
+            op.output = &vna[vni++];
+        } else {
+            op.output = NULL;
+        }
+
+        op.inputs_count = isize;
+        op.inputs = &vna[vni];
+        for (int4 i = 0; i < isize; i++) {
+            createVarnode(&vars[i], vna[vni++]);
+        }
+
+        m_vars.emplace_back(vna);
+    }
+};
+
+
+class AssemblyEmitCacher : public AssemblyEmit
+{
+public:
+    Address  m_addr;
+    string   m_mnem;
+    string   m_body;
+
+    void dump(const Address &addr, const string &mnem, const string &body)
+    {
+        m_addr = addr;
+        m_mnem = mnem;
+        m_body = body;
+    };
+};
+
+
+class TranslationResult
+{
+public:
+    LPX(TranslationResult)     m_res;
+    string                     m_error_msg;
+    vector<LPX(Translation)>   m_insns;
+    vector<AssemblyEmitCacher> m_asms;
+    vector<PcodeEmitCacher>    m_pcodes;
+
+    TranslationResult()
+    {
+        LOG("Created result %p", this);
+        m_res.error.type = LPX(ERROR_TYPE_NOERROR);
+    }
+
+    ~TranslationResult() {
+        LOG("Destroying result %p", this);
+    }
+
+    void updateWithException(UnimplError &e, Address &addr)
+    {
+        m_res.error.type = LPX(ERROR_TYPE_UNIMPL);
+        m_error_msg = e.explain;
+        m_res.error.explain = m_error_msg.c_str();
+        convertAddressToCType(addr, m_res.error.unimpl.address);
+        m_res.error.unimpl.instruction_length = e.instruction_length;
+    }
+
+    void updateWithException(BadDataError &e, Address &addr)
+    {
+        m_res.error.type = LPX(ERROR_TYPE_BADDATA);
+        m_error_msg = e.explain;
+        m_res.error.explain = m_error_msg.c_str();
+        convertAddressToCType(addr, m_res.error.baddata.address);
+    }
+};
+
+
+class TranslationContext
+{
+public:
+    SimpleLoadImage     m_loader;
+    ContextInternal     m_context_internal;
+    DocumentStorage     m_document_storage;
+    Document           *m_document;
+    Element            *m_tags;
+    unique_ptr<Sleigh>  m_sleigh;
+    string              m_register_name_cache;
+
+    TranslationContext()
+    {
+        LOG("%p Context created", this);
+    }
+
+    ~TranslationContext()
+    {
+        LOG("%p Freeing context", this);
+    }
+
+    bool loadSlaFile(const char *path)
+    {
+        LOG("%p Loading slafile...", this);
+        // FIXME: try/catch XmlError
+        m_document = m_document_storage.openDocument(path);
+        m_tags = m_document->getRoot();
+        m_document_storage.registerTag(m_tags);
+
+        LOG("Setting up translator");
+        m_sleigh.reset(new Sleigh(&m_loader, &m_context_internal));
+        m_sleigh->initialize(m_document_storage);
+
+        return true;
+    }
+
+    LPX(TranslationResult) *translate(const unsigned char *bytes,
+                                      unsigned int num_bytes,
+                                      uintb address,
+                                      unsigned int max_instructions,
+                                      bool bb_terminating)
+    {
+        LOG("%p Translating bytes=%p, num_bytes=%d, address=%lx, "
+            "max_instructions=%d",
+            this, bytes, num_bytes, address, max_instructions);
+
+        // Reset state
+        m_sleigh->reset(&m_loader, &m_context_internal);
+        m_sleigh->initialize(m_document_storage);
+        m_loader.setData(address, bytes, num_bytes);
+
+        TranslationResult *res = new TranslationResult();
+        int4 offset = 0;
+        bool end_bb = false;
+
+        // Translate instructions
+        while (!end_bb && (offset < num_bytes) && (!max_instructions ||
+               (res->m_insns.size() < max_instructions))) {
+            Address addr(m_sleigh->getDefaultCodeSpace(), address + offset);
+            try {
+                int4 ilen = m_sleigh->instructionLength(addr);
+
+                res->m_asms.emplace_back();
+                m_sleigh->printAssembly(res->m_asms.back(), addr);
+
+                res->m_pcodes.emplace_back();
+                m_sleigh->oneInstruction(res->m_pcodes.back(), addr);
+
+                res->m_insns.emplace_back();
+                LPX(Translation) &insn = res->m_insns.back();
+                convertAddressToCType(addr, insn.address);
+                insn.length = ilen;
+
+                offset += ilen;
+
+                if (bb_terminating) {
+                    for (auto op : res->m_pcodes.back().m_ops) {
+                        if (op.opcode == OP(BRANCH) ||
+                            op.opcode == OP(CBRANCH) ||
+                            op.opcode == OP(BRANCHIND) ||
+                            op.opcode == OP(RETURN) ||
+                            op.opcode == OP(CALL) ||
+                            op.opcode == OP(CALLIND)) {
+                            end_bb = true;
+                            break;
+                        }
+                    }
+                }
+            } catch (UnimplError &e) {
+                res->updateWithException(e, addr);
+                break;
+            } catch (BadDataError &e) {
+                res->updateWithException(e, addr);
+                break;
+            }
+        }
+
+        // Serialize
+        for (int i = 0; i < res->m_insns.size(); i++) {
+            res->m_insns[i].asm_mnem = res->m_asms[i].m_mnem.c_str();
+            res->m_insns[i].asm_body = res->m_asms[i].m_body.c_str();
+            res->m_insns[i].ops = &res->m_pcodes[i].m_ops[0];
+            res->m_insns[i].ops_count = res->m_pcodes[i].m_ops.size();
+        }
+
+        res->m_res.instructions_count = res->m_insns.size();
+        if (res->m_res.instructions_count) {
+            res->m_res.instructions = &res->m_insns[0];
+        }
+
+        return &res->m_res;
+    }
+
+    const char *Sleigh_getRegisterName(AddrSpace* as, uintb off, int4 size)
+    {
+        m_register_name_cache = m_sleigh->getRegisterName(as, off, size);
+        return m_register_name_cache.c_str();
+    }
+};
+
+
+//------------------------------------------------------------------------------
+// C API
+//------------------------------------------------------------------------------
+
+LPX(Context) LPX(createContext)(const char *slafile)
+{
+    TranslationContext *ctx = new TranslationContext();
+    if (!ctx->loadSlaFile(slafile)) {
+        delete ctx;
+        ctx = NULL;
+    }
+    return (LPX(Context))(ctx);
+}
+
+void LPX(destroyContext)(LPX(Context) c)
+{
+    delete (TranslationContext *)c;
+}
+
+LPX(TranslationResult) *LPX(translate)(LPX(Context) c,
+                                       const unsigned char *bytes,
+                                       unsigned int num_bytes,
+                                       uintb address,
+                                       unsigned int max_instructions,
+                                       bool bb_terminating)
+{
+    return ((TranslationContext *)c)->translate(bytes, num_bytes, address,
+                                                max_instructions,
+                                                bb_terminating);
+}
+
+void LPX(freeResult)(LPX(TranslationResult) *r)
+{
+    if (r) delete owner_of(r, &TranslationResult::m_res);
+}
+
+void LPX(setVariableDefault)(LPX(Context) c, const char *name, uintm val)
+{
+    ((TranslationContext *)c)->m_context_internal.setVariableDefault(name, val);
+}
+
+int LPX(Addr_isConstant)(LPX(Address) *a)
+{
+    return Address((AddrSpace *)(a->space), a->offset).isConstant();
+}
+
+LPX(AddrSpace) LPX(Addr_getSpaceFromConst)(LPX(Address) *a)
+{
+    AddrSpace *space = Address::getSpaceFromConst(
+        Address((AddrSpace *)(a->space), a->offset));
+    return (LPX(AddrSpace))space;
+}
+
+const char *LPX(AddrSpace_getName)(LPX(AddrSpace) as)
+{
+    return ((AddrSpace *)as)->getName().c_str();
+}
+
+const char *LPX(Sleigh_getRegisterName)(LPX(Context) c, LPX(AddrSpace) as,
+                                        uintb off, int4 size)
+{
+    return ((TranslationContext *)c)->Sleigh_getRegisterName(
+        (AddrSpace *)as, off, size);
+}
diff --git a/pypcode/pypcode-native/csleigh.h b/pypcode/pypcode-native/csleigh.h
new file mode 100644
index 00000000..f223c0d0
--- /dev/null
+++ b/pypcode/pypcode-native/csleigh.h
@@ -0,0 +1,221 @@
+/*
+ * Minimal SLEIGH library C API, for disassembly and translation to P-code.
+ */
+#ifndef CSLEIGH_H
+#define CSLEIGH_H
+
+#include <stdbool.h>
+
+#include "sleigh/types.h"
+
+/* Names in this header are prefixed to avoid collisions with SLEIGH. */
+#define LPX(name) csleigh_ ## name
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define OPS_X \
+	INV_OP( 0, INVALID,           "Invalid") \
+	DEC_OP( 1, COPY,              "Copy one operand to another") \
+	DEC_OP( 2, LOAD,              "Load from a pointer into a specified address space") \
+	DEC_OP( 3, STORE,             "Store at a pointer into a specified address space") \
+	DEC_OP( 4, BRANCH,            "Always branch") \
+	DEC_OP( 5, CBRANCH,           "Conditional branch") \
+	DEC_OP( 6, BRANCHIND,         "Indirect branch (jumptable)") \
+	DEC_OP( 7, CALL,              "Call to an absolute address") \
+	DEC_OP( 8, CALLIND,           "Call through an indirect address") \
+	DEC_OP( 9, CALLOTHER,         "User-defined operation") \
+	DEC_OP(10, RETURN,            "Return from subroutine") \
+	DEC_OP(11, INT_EQUAL,         "Integer comparison, equality (==)") \
+	DEC_OP(12, INT_NOTEQUAL,      "Integer comparison, in-equality (!=)") \
+	DEC_OP(13, INT_SLESS,         "Integer comparison, signed less-than (<)") \
+	DEC_OP(14, INT_SLESSEQUAL,    "Integer comparison, signed less-than-or-equal (<=)") \
+	DEC_OP(15, INT_LESS,          "Integer comparison, unsigned less-than (<)") \
+	DEC_OP(16, INT_LESSEQUAL,     "Integer comparison, unsigned less-than-or-equal (<=)") \
+	DEC_OP(17, INT_ZEXT,          "Zero extension") \
+	DEC_OP(18, INT_SEXT,          "Sign extension") \
+	DEC_OP(19, INT_ADD,           "Addition, signed or unsigned (+)") \
+	DEC_OP(20, INT_SUB,           "Subtraction, signed or unsigned (-)") \
+	DEC_OP(21, INT_CARRY,         "Test for unsigned carry") \
+	DEC_OP(22, INT_SCARRY,        "Test for signed carry") \
+	DEC_OP(23, INT_SBORROW,       "Test for signed borrow") \
+	DEC_OP(24, INT_2COMP,         "Twos complement") \
+	DEC_OP(25, INT_NEGATE,        "Logical/bitwise negation (~)") \
+	DEC_OP(26, INT_XOR,           "Logical/bitwise exclusive-or (^)") \
+	DEC_OP(27, INT_AND,           "Logical/bitwise and (&)") \
+	DEC_OP(28, INT_OR,            "Logical/bitwise or (|)") \
+	DEC_OP(29, INT_LEFT,          "Left shift (<<)") \
+	DEC_OP(30, INT_RIGHT,         "Right shift, logical (>>)") \
+	DEC_OP(31, INT_SRIGHT,        "Right shift, arithmetic (>>)") \
+	DEC_OP(32, INT_MULT,          "Integer multiplication, signed and unsigned (*)") \
+	DEC_OP(33, INT_DIV,           "Integer division, unsigned (/)") \
+	DEC_OP(34, INT_SDIV,          "Integer division, signed (/)") \
+	DEC_OP(35, INT_REM,           "Remainder/modulo, unsigned (%)") \
+	DEC_OP(36, INT_SREM,          "Remainder/modulo, signed (%)") \
+	DEC_OP(37, BOOL_NEGATE,       "Boolean negate (!)") \
+	DEC_OP(38, BOOL_XOR,          "Boolean exclusive-or (^^)") \
+	DEC_OP(39, BOOL_AND,          "Boolean and (&&)") \
+	DEC_OP(40, BOOL_OR,           "Boolean or (||)") \
+	DEC_OP(41, FLOAT_EQUAL,       "Floating-point comparison, equality (==)") \
+	DEC_OP(42, FLOAT_NOTEQUAL,    "Floating-point comparison, in-equality (!=)") \
+	DEC_OP(43, FLOAT_LESS,        "Floating-point comparison, less-than (<)") \
+	DEC_OP(44, FLOAT_LESSEQUAL,   "Floating-point comparison, less-than-or-equal (<=)") \
+	INV_OP(45, INVALID,           "Invalid") \
+	DEC_OP(46, FLOAT_NAN,         "Not-a-number test (NaN)") \
+	DEC_OP(47, FLOAT_ADD,         "Floating-point addition (+)") \
+	DEC_OP(48, FLOAT_DIV,         "Floating-point division (/)") \
+	DEC_OP(49, FLOAT_MULT,        "Floating-point multiplication (*)") \
+	DEC_OP(50, FLOAT_SUB,         "Floating-point subtraction (-)") \
+	DEC_OP(51, FLOAT_NEG,         "Floating-point negation (-)") \
+	DEC_OP(52, FLOAT_ABS,         "Floating-point absolute value (abs)") \
+	DEC_OP(53, FLOAT_SQRT,        "Floating-point square root (sqrt)") \
+	DEC_OP(54, FLOAT_INT2FLOAT,   "Convert an integer to a floating-point") \
+	DEC_OP(55, FLOAT_FLOAT2FLOAT, "Convert between different floating-point sizes") \
+	DEC_OP(56, FLOAT_TRUNC,       "Round towards zero") \
+	DEC_OP(57, FLOAT_CEIL,        "Round towards +infinity") \
+	DEC_OP(58, FLOAT_FLOOR,       "Round towards -infinity") \
+	DEC_OP(59, FLOAT_ROUND,       "Round towards nearest") \
+	DEC_OP(60, MULTIEQUAL,        "Phi-node operator") \
+	DEC_OP(61, INDIRECT,          "Copy with an indirect effect") \
+	DEC_OP(62, PIECE,             "Concatenate") \
+	DEC_OP(63, SUBPIECE,          "Truncate") \
+	DEC_OP(64, CAST,              "Cast from one data-type to another") \
+	DEC_OP(65, PTRADD,            "Index into an array ([])") \
+	DEC_OP(66, PTRSUB,            "Drill down to a sub-field  (->)") \
+	DEC_OP(67, SEGMENTOP,         "Look-up a segmented address") \
+	DEC_OP(68, CPOOLREF,          "Recover a value from the constant pool") \
+	DEC_OP(69, NEW,               "Allocate a new object (new)") \
+	DEC_OP(70, INSERT,            "Insert a bit-range") \
+	DEC_OP(71, EXTRACT,           "Extract a bit-range") \
+	DEC_OP(72, POPCOUNT,          "Count the 1-bits") \
+
+#define OP(opname) LPX(CPUI_ ## opname)
+
+typedef enum {
+#define DEC_OP(oid, oname, odesc) OP(oname) = oid,
+#define INV_OP(oid, oname, odesc)
+OPS_X
+#undef DEC_OP
+#undef INV_OP
+} LPX(OpCode);
+
+/* Opaque types */
+typedef void *LPX(Context);
+typedef void *LPX(AddrSpace);
+
+typedef struct {
+	LPX(AddrSpace) space;
+	uintb          offset;
+} LPX(Address);
+
+typedef struct {
+	LPX(AddrSpace) space;
+	uintb          offset;
+	uint4          size;
+} LPX(Varnode);
+
+typedef struct {
+	LPX(Address) pc;
+	uintm        uniq;
+	uintm        order;
+} LPX(SeqNum);
+
+typedef struct {
+	LPX(SeqNum)   seq;
+	LPX(OpCode)   opcode;
+	LPX(Varnode) *output; /* NULL if no output */
+	LPX(Varnode) *inputs;
+	unsigned int  inputs_count;
+} LPX(PcodeOp);
+
+typedef enum {
+	LPX(ERROR_TYPE_NOERROR) = 0,
+	LPX(ERROR_TYPE_GENERIC) = 1,
+	LPX(ERROR_TYPE_UNIMPL)  = 2,
+	LPX(ERROR_TYPE_BADDATA) = 3,
+} LPX(ErrorType);
+
+typedef struct {
+	LPX(Address) address;
+	int4 instruction_length;
+} LPX(UnimplError);
+
+typedef struct {
+	LPX(Address) address;
+} LPX(BadDataError);
+
+typedef struct {
+	LPX(ErrorType)  type;
+	const char     *explain;
+	union {
+		LPX(UnimplError)  unimpl;
+		LPX(BadDataError) baddata;
+	};
+} LPX(Error);
+
+typedef struct {
+	LPX(Address)  address;
+	int4          length;
+	const char   *asm_mnem;
+	const char   *asm_body;
+	LPX(PcodeOp) *ops;
+	unsigned int  ops_count;
+} LPX(Translation);
+
+typedef struct {
+	LPX(Error)        error;
+	LPX(Translation) *instructions;
+	unsigned int      instructions_count;
+} LPX(TranslationResult);
+
+/*
+ * Create a translation context
+ */
+LPX(Context) LPX(createContext)(const char *slafile);
+
+/*
+ * Free a translation context
+ */
+void LPX(destroyContext)(LPX(Context) c);
+
+/*
+ * Translate machine code to P-code
+ */
+LPX(TranslationResult) *LPX(translate)(LPX(Context) c, const unsigned char *bytes, unsigned int num_bytes, uintb address, unsigned int max_instructions, bool bb_terminating);
+
+/*
+ * Free a TranslationResult
+ */
+void LPX(freeResult)(LPX(TranslationResult) *r);
+
+/*
+ * ContextDatabase::setVariableDefault
+ */
+void LPX(setVariableDefault)(LPX(Context) c, const char *name, uintm val);
+
+/*
+ * Address::isConstant
+ */
+int LPX(Addr_isConstant)(LPX(Address) *a);
+
+/*
+ * Address::getSpaceFromConst
+ */
+LPX(AddrSpace) LPX(Addr_getSpaceFromConst)(LPX(Address) *a);
+
+/*
+ * AddrSpace::getName
+ */
+const char *LPX(AddrSpace_getName)(LPX(AddrSpace) as);
+
+/*
+ * Sleigh::getRegisterName
+ */
+const char *LPX(Sleigh_getRegisterName)(LPX(Context) c, LPX(AddrSpace) as, uintb off, int4 size);
+
+#ifdef __cplusplus
+} /* extern "C" { */
+#endif
+
+#endif
diff --git a/pypcode/pypcode-native/pypcode-native.cc b/pypcode/pypcode-native/pypcode-native.cc
deleted file mode 100644
index ec210c76..00000000
--- a/pypcode/pypcode-native/pypcode-native.cc
+++ /dev/null
@@ -1,57 +0,0 @@
-#include "pypcode-native.h"
-
-// This is the only important method for the LoadImage. It returns bytes from the static array
-// depending on the address range requested
-void SimpleLoadImage::loadFill(uint1 *ptr,int4 size,const Address &addr)
-{
-  uintb start = addr.getOffset();
-  uintb max = baseaddr + (length-1);
-  for(int4 i=0;i<size;++i) {  // For every byte requestes
-    uintb curoff = start + i; // Calculate offset of byte
-    if ((curoff < baseaddr)||(curoff>max)) {  // If byte does not fall in window
-      ptr[i] = 0;   // return 0
-      continue;
-    }
-    uintb diff = curoff - baseaddr;
-    ptr[i] = data[(int4)diff];  // Otherwise return data from our window
-  }
-}
-
-/// Create an internal copy of the VarnodeData and cache it.
-/// param var is the incoming VarnodeData being dumped
-/// return the cloned VarnodeData
-VarnodeData *PcodeRawOutHelper::createVarnode(const VarnodeData *var)
-{
-  VarnodeData *res = new VarnodeData();
-  *res = *var;
-  varcache.push_back(res);
-  return res;
-}
-
-void PcodeRawOutHelper::clearCache(void)
-{
-  for(int4 i=0;i<opcache.size();++i)
-    delete opcache[i];
-  for(int4 i=0;i<varcache.size();++i)
-    delete varcache[i];
-  opcache.clear();
-  varcache.clear();
-}
-
-void PcodeRawOutHelper::dump(const Address &addr,OpCode opc,VarnodeData *outvar,VarnodeData *vars,int4 isize)
-
-{
-  PcodeOpRaw *op = new PcodeOpRaw();
-  op->setSeqNum(addr,uniq);
-  opcache.push_back(op);
-  op->setBehavior( inst[opc] );
-  uniq += 1;
-  if (outvar != (VarnodeData *)0) {
-    VarnodeData *outvn = createVarnode(outvar);
-    op->setOutput(outvn);
-  }
-  for(int4 i=0;i<isize;++i) {
-    VarnodeData *invn = createVarnode(vars+i);
-    op->addInput(invn);
-  }
-}
diff --git a/pypcode/pypcode-native/pypcode-native.h b/pypcode/pypcode-native/pypcode-native.h
deleted file mode 100644
index 56b42db8..00000000
--- a/pypcode/pypcode-native/pypcode-native.h
+++ /dev/null
@@ -1,53 +0,0 @@
-#ifndef PYPCODE_NATIVE_H
-#define PYPCODE_NATIVE_H
-
-#include "sleigh/loadimage.hh"
-#include "sleigh/sleigh.hh"
-
-// This is a tiny LoadImage class which feeds the executable bytes to the translator
-class SimpleLoadImage : public LoadImage {
-  uintb baseaddr;
-  int4 length;
-  uint1 *data;
-public:
-  SimpleLoadImage(uintb ad,uint1 *ptr,int4 sz) : LoadImage("nofile") { baseaddr = ad; data = ptr; length = sz; }
-  void setData(uintb ad,uint1 *ptr,int4 sz) { baseaddr = ad; data = ptr; length = sz; }
-  virtual void loadFill(uint1 *ptr,int4 size,const Address &addr);
-  virtual string getArchType(void) const { return "myload"; }
-  virtual void adjustVma(long adjust) { }
-};
-
-class PcodeRawOutHelper : public PcodeEmit {
-public:
-  vector<PcodeOpRaw *> opcache;  ///< The cache of current p-code ops
-  vector<VarnodeData *> varcache;  ///< The cache of current varnodes
-  vector<OpBehavior *> inst; ///< Array of behaviors for translating OpCode
-  uintm uniq;       ///< Starting offset for defining temporaries in unique space
-
-  VarnodeData *createVarnode(const VarnodeData *var); ///< Clone and cache a raw VarnodeData
-
-  PcodeRawOutHelper(Translate &trans) {
-    OpBehavior::registerInstructions(inst,&trans);
-  }
-  void clearCache(void);
-  virtual void dump(const Address &addr,OpCode opc,VarnodeData *outvar,VarnodeData *vars,int4 isize);
-
-
-  // FIXME: Lifetime of PcodeRawOutHelper is handled on Python side, but need
-  // to add destructor to cleanup opcache/varcache on delete.
-};
-
-class AssemblyEmitCacher : public AssemblyEmit {
-public:
-  Address addr;
-  string mnem;
-  string body;
-
-  void dump(const Address &addr,const string &mnem,const string &body) {
-    this->addr = addr;
-    this->mnem = mnem;
-    this->body = body;
-  };
-};
-
-#endif
diff --git a/pypcode/pypcode-native/sleigh/address.hh b/pypcode/pypcode-native/sleigh/address.hh
index 8da8bba4..4a97d07e 100644
--- a/pypcode/pypcode-native/sleigh/address.hh
+++ b/pypcode/pypcode-native/sleigh/address.hh
@@ -4,9 +4,9 @@
  * Licensed under the Apache License, Version 2.0 (the "License");
  * you may not use this file except in compliance with the License.
  * You may obtain a copy of the License at
- * 
+ *
  *      http://www.apache.org/licenses/LICENSE-2.0
- * 
+ *
  * Unless required by applicable law or agreed to in writing, software
  * distributed under the License is distributed on an "AS IS" BASIS,
  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
@@ -103,7 +103,7 @@ public:
 /// A SeqNum extends the address for a PcodeOp to include:
 ///   - A fixed \e time field, which is set at the time the PcodeOp
 ///     is created. The \e time field guarantees a unique SeqNum
-///     for the life of the PcodeOp. 
+///     for the life of the PcodeOp.
 ///   - An \e order field, which is guaranteed to be comparable
 ///     for the execution order of the PcodeOp within its basic
 ///     block.  The \e order field also provides uniqueness but
@@ -127,7 +127,7 @@ public:
 
   /// Get the \e time field of a sequence number
   uintm getTime(void) const { return uniq; }
-  
+
   /// Get the \e order field of a sequence number
   uintm getOrder(void) const { return order; }
 
@@ -324,7 +324,7 @@ inline Address &Address::operator=(const Address &op2)
 /// space and offset are the same.
 /// \param op2 is the address to compare to \e this
 /// \return \b true if the addresses are the same
-inline bool Address::operator==(const Address &op2) const { 
+inline bool Address::operator==(const Address &op2) const {
   return ((base==op2.base)&&(offset==op2.offset));
 }
 
diff --git a/pypcode/pypcode-native/sleigh/loadimage.hh b/pypcode/pypcode-native/sleigh/loadimage.hh
index 59d4c9a5..4844f614 100644
--- a/pypcode/pypcode-native/sleigh/loadimage.hh
+++ b/pypcode/pypcode-native/sleigh/loadimage.hh
@@ -21,6 +21,14 @@
 
 #include "address.hh"
 
+// XXX: On Windows, LoadImage is defined as a macro which conflicts with name
+// of the class declared in this file. For now, just undefine the macro.
+#ifdef _WINDOWS
+#ifdef LoadImage
+#undef LoadImage
+#endif
+#endif
+
 /// \brief Exception indicating data was not available
 ///
 /// This exception is thrown when a request for load image
diff --git a/samples/.gitignore b/samples/.gitignore
deleted file mode 100644
index 07719c04..00000000
--- a/samples/.gitignore
+++ /dev/null
@@ -1,3 +0,0 @@
-dockcross-*
-*.o
-*.bin
diff --git a/samples/Makefile b/samples/Makefile
deleted file mode 100644
index 6014bdfc..00000000
--- a/samples/Makefile
+++ /dev/null
@@ -1,50 +0,0 @@
-#
-# Compiles $(TARGET).c for several architectures using dockcross containers
-#
-
-ALL_ARCH= \
-	linux-mips \
-	linux-mipsel \
-	linux-arm64 \
-	linux-armv5 \
-	linux-armv6 \
-	linux-armv7 \
-	linux-armv7a \
-	linux-x64 \
-	linux-ppc64le
-
-TARGET=simple_code
-ALL_DOCKCROSS=$(addprefix dockcross-, $(ALL_ARCH))
-ALL_BINS=$(addprefix $(TARGET)., $(addsuffix .bin, $(ALL_ARCH)))
-ALL_OBJS=$(addprefix $(TARGET)., $(addsuffix .o,   $(ALL_ARCH)))
-
-all: $(ALL_BINS)
-
-.PRECIOUS: $(ALL_DOCKCROSS)
-dockcross-%:
-	@echo "\n\n[**] Getting $@"
-	docker pull     $(patsubst dockcross-%, dockcross/%, $@)
-	docker run --rm $(patsubst dockcross-%, dockcross/%, $@) > $@
-	chmod +x $@
-
-targ_to_arch = $(strip $(patsubst $(TARGET).%, %, $(patsubst %.bin, %, $(1))))
-$(TARGET).%.bin: $(TARGET).c dockcross-%
-	@echo "\n\n[**] Compiling for $(call targ_to_arch, $@)"
-	./dockcross-$(call targ_to_arch, $@) make ARCH=$(call targ_to_arch, $@) target
-	mv $@i $@
-
-clean:
-	rm -f $(ALL_BINS) $(ALL_OBJS)
-
-# ---
-
-OBJCOPY=$(shell dirname ${CC})/$(CROSS_TRIPLE)-objcopy
-
-target: $(TARGET).$(ARCH).bini
-
-.PRECIOUS: $(TARGET).$(ARCH).o
-%.$(ARCH).bini: %.$(ARCH).o
-	$(OBJCOPY) -O binary --only-section=.text $< $@
-
-%.$(ARCH).o: %.c
-	$(CC) -c -Os -o $@ $<
diff --git a/samples/simple_code.c b/samples/simple_code.c
deleted file mode 100644
index b022af24..00000000
--- a/samples/simple_code.c
+++ /dev/null
@@ -1,6 +0,0 @@
-void my_function(char *data, unsigned int length, const char key[32]) {
-	int i;
-	for (i = 0; i < length; i++) {
-		data[i] ^= key[i % 32];
-	}
-}
diff --git a/setup.py b/setup.py
index a6627b2f..053188a5 100644
--- a/setup.py
+++ b/setup.py
@@ -6,25 +6,72 @@
 import subprocess
 from setuptools import setup
 from setuptools.command.build_py import build_py
+import struct
 
-SOURCE_DIR = os.path.abspath(os.path.dirname(__file__))
-LIB_SOURCE_DIR = os.path.join(SOURCE_DIR, 'pypcode', 'pypcode-native')
-OUTPUT_DIR = os.path.join(SOURCE_DIR, 'pypcode')
+is_64b = (struct.calcsize("P")*8 == 64)
+
+PKG_DIR = os.path.abspath(os.path.dirname(__file__))
+PKG_SRC_DIR = os.path.join(PKG_DIR, 'pypcode')
+LIB_SRC_DIR = os.path.join(PKG_SRC_DIR, 'pypcode-native')
+SPECFILES_DIR = os.path.join(PKG_SRC_DIR, 'processors')
+
+BIN_EXTENSION = {
+  'Windows' : '.exe',
+  'Linux'   : '',
+  'Darwin'  : ''
+}[platform.system()]
+
+# cffi:setuptools_ext.py
+def execfile(filename, glob):
+	# We use execfile() (here rewritten for Python 3) instead of
+	# __import__() to load the build script.  The problem with
+	# a normal import is that in some packages, the intermediate
+	# __init__.py files may already try to import the file that
+	# we are generating.
+	with open(filename) as f:
+		src = f.read()
+	src += '\n'      # Python 2.6 compatibility
+	code = compile(src, filename, 'exec')
+	exec(code, glob, glob)
 
 class custom_build(build_py):
 	def run(self):
-		if not os.path.exists(OUTPUT_DIR):
-			os.makedirs(OUTPUT_DIR)
-		subprocess.check_call(['make'], cwd=LIB_SOURCE_DIR)
-		shutil.copyfile(os.path.join(LIB_SOURCE_DIR, 'pypcode-native.so'),
-		                os.path.join(OUTPUT_DIR,     'pypcode-native.so'))
+		try:
+			out = subprocess.check_output(['cmake', '--version'])
+		except OSError:
+			raise RuntimeError('Please install CMake to build')
+
+		cmake_config_args = [
+			'-DCMAKE_VERBOSE_MAKEFILE:BOOL=ON',
+			'-DCMAKE_WINDOWS_EXPORT_ALL_SYMBOLS=TRUE',
+			]
+		cmake_build_args = []
+		if platform.system() == 'Windows':
+			cmake_config_args += ['-A', 'x64' if is_64b else 'Win32']
+			cmake_build_args += ['--config', 'Release']
+
+		# Build sleigh and csleigh library
+		SLEIGH_BUILD_DIR=os.path.join(LIB_SRC_DIR, 'build')
+		subprocess.check_call(['cmake', '-S', '.', '-B', 'build'] + cmake_config_args, cwd=LIB_SRC_DIR)
+		subprocess.check_call(['cmake', '--build', 'build', '--parallel', '--verbose'] + cmake_build_args, cwd=LIB_SRC_DIR)
+		shutil.rmtree(SLEIGH_BUILD_DIR)
+
+		# Build sla files
+		sleigh = os.path.join(LIB_SRC_DIR, 'bin', 'sleigh' + BIN_EXTENSION)
+		subprocess.check_call([sleigh, '-a', SPECFILES_DIR])
+
+		# Build CFFI module
+		build_file_name = 'pypcode/pypcode-native/cffi_build.py'
+		mod_vars = {'__name__': '__main__', '__file__': build_file_name}
+		execfile(build_file_name, mod_vars)
+
 		return super().run()
 
 with open('README.md') as f:
 	long_description = f.read()
 
 setup(name='pypcode',
-	version='0.0.3',
+	version='0.0.4',
 	description='Python bindings to Ghidra\'s SLEIGH library',
 	long_description=long_description,
 	long_description_content_type='text/markdown',
@@ -32,12 +79,8 @@ def run(self):
 	author_email='contact@mborgerson.com',
 	url='https://github.com/angr/pypcode',
 	cmdclass=dict(build_py=custom_build),
-	include_package_data=True,
 	packages=['pypcode'],
-	package_data={
-		'pypcode': ['pypcode-native.*']
-		},
-	install_requires=[
-		'cppyy'
-		]
+	include_package_data=True,
+	setup_requires=['cffi'],
+	install_requires=['cffi']
 	)


Test patch:
diff --git a/pypcode/pypcode-native/processors/HCS08/data/test-vectors/HC05_tv.s b/pypcode/processors/HCS08/data/test-vectors/HC05_tv.s
similarity index 100%
rename from pypcode/pypcode-native/processors/HCS08/data/test-vectors/HC05_tv.s
rename to pypcode/processors/HCS08/data/test-vectors/HC05_tv.s
diff --git a/pypcode/pypcode-native/processors/HCS08/data/test-vectors/HC08_tv.s b/pypcode/processors/HCS08/data/test-vectors/HC08_tv.s
similarity index 100%
rename from pypcode/pypcode-native/processors/HCS08/data/test-vectors/HC08_tv.s
rename to pypcode/processors/HCS08/data/test-vectors/HC08_tv.s
diff --git a/pypcode/pypcode-native/processors/HCS08/data/test-vectors/HCS08_tv.s b/pypcode/processors/HCS08/data/test-vectors/HCS08_tv.s
similarity index 100%
rename from pypcode/pypcode-native/processors/HCS08/data/test-vectors/HCS08_tv.s
rename to pypcode/processors/HCS08/data/test-vectors/HCS08_tv.s