Repository: riscv-software-src/riscv-perf-model (language: cpp)

Issue:
olympia missing uarch support for some extensions
`olympia` is missing `zbb`, `zba`, and `zbs` + the uarch extensions.  Mavis supports them, they're just not added to olympia's ISA.  Easy to add, will do it.


Discussion / hints:

Fix patch:
diff --git a/arches/isa_json/olympia_uarch_rv64b.json b/arches/isa_json/olympia_uarch_rv64b.json
index cfa7573d..0844c188 100644
--- a/arches/isa_json/olympia_uarch_rv64b.json
+++ b/arches/isa_json/olympia_uarch_rv64b.json
@@ -208,5 +208,53 @@
         "dispatch" : ["alu"],
         "pipe" : "mul",
         "latency" : 3
+    },
+    {
+        "mnemonic" : "bclr",
+        "dispatch" : ["alu"],
+        "pipe" : "int",
+        "latency" : 1
+    },
+    {
+        "mnemonic" : "bclri",
+        "dispatch" : ["alu"],
+        "pipe" : "int",
+        "latency" : 1
+    },
+    {
+        "mnemonic" : "bext",
+        "dispatch" : ["alu"],
+        "pipe" : "int",
+        "latency" : 1
+    },
+    {
+        "mnemonic" : "bexti",
+        "dispatch" : ["alu"],
+        "pipe" : "int",
+        "latency" : 1
+    },
+    {
+        "mnemonic" : "binv",
+        "dispatch" : ["alu"],
+        "pipe" : "int",
+        "latency" : 1
+    },
+    {
+        "mnemonic" : "binvi",
+        "dispatch" : ["alu"],
+        "pipe" : "int",
+        "latency" : 1
+    },
+    {
+        "mnemonic" : "bset",
+        "dispatch" : ["alu"],
+        "pipe" : "int",
+        "latency" : 1
+    },
+    {
+        "mnemonic" : "bseti",
+        "dispatch" : ["alu"],
+        "pipe" : "int",
+        "latency" : 1
     }
 ]
diff --git a/arches/isa_json/olympia_uarch_rv64g.json b/arches/isa_json/olympia_uarch_rv64g.json
index c5715da1..8ff3dcc4 100644
--- a/arches/isa_json/olympia_uarch_rv64g.json
+++ b/arches/isa_json/olympia_uarch_rv64g.json
@@ -65,6 +65,12 @@
         "pipe" : "int",
         "latency" : 1
     },
+    {
+        "mnemonic" : "li",
+        "dispatch" : ["alu"],
+        "pipe" : "int",
+        "latency" : 1
+    },
     {
         "mnemonic" : "nop",
         "dispatch" : ["alu"],
diff --git a/core/Inst.hpp b/core/Inst.hpp
index 7e7a4c9c..ba069947 100644
--- a/core/Inst.hpp
+++ b/core/Inst.hpp
@@ -93,7 +93,11 @@ namespace olympia
             opcode_info_    (opcode_info),
             inst_arch_info_ (inst_arch_info),
             status_state_(Status::FETCHED)
-        { }
+        {
+            sparta_assert(inst_arch_info_ != nullptr,
+                          "Mavis decoded the instruction, but Olympia has no uarch data for it: "
+                          << getDisasm() << " " << std::hex << " opc: 0x" << getOpCode());
+        }
 
         // This is needed by Mavis as an optimization.  Try NOT to
         // implement it and let the compiler do it for us for speed.
diff --git a/core/MavisUnit.cpp b/core/MavisUnit.cpp
index e0942c30..d3b824ce 100644
--- a/core/MavisUnit.cpp
+++ b/core/MavisUnit.cpp
@@ -15,6 +15,9 @@ namespace olympia
                                          const std::string& pseudo_file_path)
     {
         std::vector<std::string> isa_files = {isa_file_path + "/isa_rv64g.json",
+                                              isa_file_path + "/isa_rv64zba.json",
+                                              isa_file_path + "/isa_rv64zbb.json",
+                                              isa_file_path + "/isa_rv64zbs.json",
                                               isa_file_path + "/isa_rv64c.json",
                                               isa_file_path + "/isa_rv64cf.json",
                                               isa_file_path + "/isa_rv64cd.json"};
diff --git a/stf_lib b/stf_lib
index 742037fb..5a3841de 160000
--- a/stf_lib
+++ b/stf_lib
@@ -1,1 +1,1 @@
-Subproject commit 742037fb80bfe97cb27d7063e24f9bb60b0144f3
+Subproject commit 5a3841de3ea97941de481414c897b981c05efda3


Test patch:
diff --git a/test/sim/CMakeLists.txt b/test/sim/CMakeLists.txt
index 80c91d25..a221a962 100644
--- a/test/sim/CMakeLists.txt
+++ b/test/sim/CMakeLists.txt
@@ -10,6 +10,7 @@ file(CREATE_LINK ${SIM_BASE}/reports ${CMAKE_CURRENT_BINARY_DIR}/reports SYMBOLI
 file(CREATE_LINK ${SIM_BASE}/arches  ${CMAKE_CURRENT_BINARY_DIR}/arches SYMBOLIC)
 file(CREATE_LINK ${SIM_BASE}/mavis/json ${CMAKE_CURRENT_BINARY_DIR}/mavis_isa_files SYMBOLIC)
 file(CREATE_LINK ${SIM_BASE}/traces  ${CMAKE_CURRENT_BINARY_DIR}/traces SYMBOLIC)
+file(CREATE_LINK ${SIM_BASE}/test/sim/json_tests  ${CMAKE_CURRENT_BINARY_DIR}/json_tests SYMBOLIC)
 
 # Tests
 sparta_named_test(olympia_json_test olympia --workload traces/example_json.json)
@@ -40,6 +41,9 @@ sparta_named_test(olympia_dhry_test_report_html olympia -i 1M
   --report reports/core_report.def
   --workload traces/dhry_riscv.zstf)
 
+sparta_named_test(olympia_json_test_missing_opcodes olympia
+  --workload json_tests/missing_opcodes.json)
+
 # Test the arches
 file(GLOB TEST_YAML "${SIM_BASE}/arches/*.yaml")
 foreach(ARCH_FULL_PATH ${TEST_YAML})
diff --git a/test/sim/json_tests/missing_opcodes.json b/test/sim/json_tests/missing_opcodes.json
new file mode 100644
index 00000000..02f7462f
--- /dev/null
+++ b/test/sim/json_tests/missing_opcodes.json
@@ -0,0 +1,14 @@
+[
+    {
+        "mnemonic": "sh3add.uw",
+        "rs1": 3,
+        "rs2": 1,
+        "rd": 4
+    },
+    {
+        "mnemonic": "bset",
+        "rs1": 3,
+        "rs2": 1,
+        "rd": 4
+    }
+]